2 * Universal Host Controller Interface driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004-2006 Alan Stern, stern@rowland.harvard.edu
18 * Intel documents this fairly well, and as far as I know there
19 * are no royalties or anything like that, but even so there are
20 * people who decided that they want to do the same thing in a
21 * completely different way.
25 #include <linux/config.h>
26 #include <linux/module.h>
27 #include <linux/pci.h>
28 #include <linux/kernel.h>
29 #include <linux/init.h>
30 #include <linux/delay.h>
31 #include <linux/ioport.h>
32 #include <linux/sched.h>
33 #include <linux/slab.h>
34 #include <linux/errno.h>
35 #include <linux/unistd.h>
36 #include <linux/interrupt.h>
37 #include <linux/spinlock.h>
38 #include <linux/debugfs.h>
40 #include <linux/dmapool.h>
41 #include <linux/dma-mapping.h>
42 #include <linux/usb.h>
43 #include <linux/bitops.h>
45 #include <asm/uaccess.h>
48 #include <asm/system.h>
50 #include "../core/hcd.h"
52 #include "pci-quirks.h"
57 #define DRIVER_VERSION "v3.0"
58 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
59 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
61 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
64 * debug = 0, no debugging messages
65 * debug = 1, dump failed URBs except for stalls
66 * debug = 2, dump all failed URBs (including stalls)
67 * show all queues in /debug/uhci/[pci_addr]
68 * debug = 3, show all TDs in URBs when dumping
71 #define DEBUG_CONFIGURED 1
73 module_param(debug, int, S_IRUGO | S_IWUSR);
74 MODULE_PARM_DESC(debug, "Debug level");
77 #define DEBUG_CONFIGURED 0
82 #define ERRBUF_LEN (32 * 1024)
84 static kmem_cache_t *uhci_up_cachep; /* urb_priv */
86 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
87 static void wakeup_rh(struct uhci_hcd *uhci);
88 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
90 #include "uhci-debug.c"
95 * Finish up a host controller reset and update the recorded state.
97 static void finish_reset(struct uhci_hcd *uhci)
101 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
102 * bits in the port status and control registers.
103 * We have to clear them by hand.
105 for (port = 0; port < uhci->rh_numports; ++port)
106 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
108 uhci->port_c_suspend = uhci->resuming_ports = 0;
109 uhci->rh_state = UHCI_RH_RESET;
110 uhci->is_stopped = UHCI_IS_STOPPED;
111 uhci_to_hcd(uhci)->state = HC_STATE_HALT;
112 uhci_to_hcd(uhci)->poll_rh = 0;
116 * Last rites for a defunct/nonfunctional controller
117 * or one we don't want to use any more.
119 static void hc_died(struct uhci_hcd *uhci)
121 uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
123 uhci->hc_inaccessible = 1;
127 * Initialize a controller that was newly discovered or has lost power
128 * or otherwise been reset while it was suspended. In none of these cases
129 * can we be sure of its previous state.
131 static void check_and_reset_hc(struct uhci_hcd *uhci)
133 if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))
138 * Store the basic register settings needed by the controller.
140 static void configure_hc(struct uhci_hcd *uhci)
142 /* Set the frame length to the default: 1 ms exactly */
143 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
145 /* Store the frame list base address */
146 outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);
148 /* Set the current frame number */
149 outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER,
150 uhci->io_addr + USBFRNUM);
152 /* Mark controller as not halted before we enable interrupts */
153 uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED;
157 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
162 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
166 switch (to_pci_dev(uhci_dev(uhci))->vendor) {
170 case PCI_VENDOR_ID_GENESYS:
171 /* Genesys Logic's GL880S controllers don't generate
172 * resume-detect interrupts.
176 case PCI_VENDOR_ID_INTEL:
177 /* Some of Intel's USB controllers have a bug that causes
178 * resume-detect interrupts if any port has an over-current
179 * condition. To make matters worse, some motherboards
180 * hardwire unused USB ports' over-current inputs active!
181 * To prevent problems, we will not enable resume-detect
182 * interrupts if any ports are OC.
184 for (port = 0; port < uhci->rh_numports; ++port) {
185 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
194 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
195 __releases(uhci->lock)
196 __acquires(uhci->lock)
201 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
202 dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
203 "%s%s\n", __FUNCTION__,
204 (auto_stop ? " (auto-stop)" : ""));
206 /* If we get a suspend request when we're already auto-stopped
207 * then there's nothing to do.
209 if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) {
210 uhci->rh_state = new_state;
214 /* Enable resume-detect interrupts if they work.
215 * Then enter Global Suspend mode, still configured.
217 uhci->working_RD = 1;
218 int_enable = USBINTR_RESUME;
219 if (resume_detect_interrupts_are_broken(uhci)) {
220 uhci->working_RD = int_enable = 0;
222 outw(int_enable, uhci->io_addr + USBINTR);
223 outw(USBCMD_EGSM | USBCMD_CF, uhci->io_addr + USBCMD);
227 /* If we're auto-stopping then no devices have been attached
228 * for a while, so there shouldn't be any active URBs and the
229 * controller should stop after a few microseconds. Otherwise
230 * we will give the controller one frame to stop.
232 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
233 uhci->rh_state = UHCI_RH_SUSPENDING;
234 spin_unlock_irq(&uhci->lock);
236 spin_lock_irq(&uhci->lock);
237 if (uhci->hc_inaccessible) /* Died */
240 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
241 dev_warn(&uhci_to_hcd(uhci)->self.root_hub->dev,
242 "Controller not stopped yet!\n");
244 uhci_get_current_frame_number(uhci);
246 uhci->rh_state = new_state;
247 uhci->is_stopped = UHCI_IS_STOPPED;
248 uhci_to_hcd(uhci)->poll_rh = !int_enable;
250 uhci_scan_schedule(uhci, NULL);
254 static void start_rh(struct uhci_hcd *uhci)
256 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
257 uhci->is_stopped = 0;
259 /* Mark it configured and running with a 64-byte max packet.
260 * All interrupts are enabled, even though RESUME won't do anything.
262 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
263 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
264 uhci->io_addr + USBINTR);
266 uhci->rh_state = UHCI_RH_RUNNING;
267 uhci_to_hcd(uhci)->poll_rh = 1;
270 static void wakeup_rh(struct uhci_hcd *uhci)
271 __releases(uhci->lock)
272 __acquires(uhci->lock)
274 dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
275 "%s%s\n", __FUNCTION__,
276 uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
277 " (auto-start)" : "");
279 /* If we are auto-stopped then no devices are attached so there's
280 * no need for wakeup signals. Otherwise we send Global Resume
283 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
284 uhci->rh_state = UHCI_RH_RESUMING;
285 outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF,
286 uhci->io_addr + USBCMD);
287 spin_unlock_irq(&uhci->lock);
289 spin_lock_irq(&uhci->lock);
290 if (uhci->hc_inaccessible) /* Died */
293 /* End Global Resume and wait for EOP to be sent */
294 outw(USBCMD_CF, uhci->io_addr + USBCMD);
297 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
298 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
303 /* Restart root hub polling */
304 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
307 static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs)
309 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
310 unsigned short status;
314 * Read the interrupt status, and write it back to clear the
315 * interrupt cause. Contrary to the UHCI specification, the
316 * "HC Halted" status bit is persistent: it is RO, not R/WC.
318 status = inw(uhci->io_addr + USBSTS);
319 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
321 outw(status, uhci->io_addr + USBSTS); /* Clear it */
323 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
324 if (status & USBSTS_HSE)
325 dev_err(uhci_dev(uhci), "host system error, "
327 if (status & USBSTS_HCPE)
328 dev_err(uhci_dev(uhci), "host controller process "
329 "error, something bad happened!\n");
330 if (status & USBSTS_HCH) {
331 spin_lock_irqsave(&uhci->lock, flags);
332 if (uhci->rh_state >= UHCI_RH_RUNNING) {
333 dev_err(uhci_dev(uhci),
334 "host controller halted, "
336 if (debug > 1 && errbuf) {
337 /* Print the schedule for debugging */
338 uhci_sprint_schedule(uhci,
344 /* Force a callback in case there are
346 mod_timer(&hcd->rh_timer, jiffies);
348 spin_unlock_irqrestore(&uhci->lock, flags);
352 if (status & USBSTS_RD)
353 usb_hcd_poll_rh_status(hcd);
355 spin_lock_irqsave(&uhci->lock, flags);
356 uhci_scan_schedule(uhci, regs);
357 spin_unlock_irqrestore(&uhci->lock, flags);
364 * Store the current frame number in uhci->frame_number if the controller
365 * is runnning. Expand from 11 bits (of which we use only 10) to a
366 * full-sized integer.
368 * Like many other parts of the driver, this code relies on being polled
369 * more than once per second as long as the controller is running.
371 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
373 if (!uhci->is_stopped) {
376 delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) &
377 (UHCI_NUMFRAMES - 1);
378 uhci->frame_number += delta;
383 * De-allocate all resources
385 static void release_uhci(struct uhci_hcd *uhci)
389 if (DEBUG_CONFIGURED) {
390 spin_lock_irq(&uhci->lock);
391 uhci->is_initialized = 0;
392 spin_unlock_irq(&uhci->lock);
394 debugfs_remove(uhci->dentry);
397 for (i = 0; i < UHCI_NUM_SKELQH; i++)
398 uhci_free_qh(uhci, uhci->skelqh[i]);
400 uhci_free_td(uhci, uhci->term_td);
402 dma_pool_destroy(uhci->qh_pool);
404 dma_pool_destroy(uhci->td_pool);
406 kfree(uhci->frame_cpu);
408 dma_free_coherent(uhci_dev(uhci),
409 UHCI_NUMFRAMES * sizeof(*uhci->frame),
410 uhci->frame, uhci->frame_dma_handle);
413 static int uhci_init(struct usb_hcd *hcd)
415 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
416 unsigned io_size = (unsigned) hcd->rsrc_len;
419 uhci->io_addr = (unsigned long) hcd->rsrc_start;
421 /* The UHCI spec says devices must have 2 ports, and goes on to say
422 * they may have more but gives no way to determine how many there
423 * are. However according to the UHCI spec, Bit 7 of the port
424 * status and control register is always set to 1. So we try to
425 * use this to our advantage. Another common failure mode when
426 * a nonexistent register is addressed is to return all ones, so
427 * we test for that also.
429 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
430 unsigned int portstatus;
432 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
433 if (!(portstatus & 0x0080) || portstatus == 0xffff)
437 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
439 /* Anything greater than 7 is weird so we'll ignore it. */
440 if (port > UHCI_RH_MAXCHILD) {
441 dev_info(uhci_dev(uhci), "port count misdetected? "
442 "forcing to 2 ports\n");
445 uhci->rh_numports = port;
447 /* Kick BIOS off this hardware and reset if the controller
448 * isn't already safely quiescent.
450 check_and_reset_hc(uhci);
454 /* Make sure the controller is quiescent and that we're not using it
455 * any more. This is mainly for the benefit of programs which, like kexec,
456 * expect the hardware to be idle: not doing DMA or generating IRQs.
458 * This routine may be called in a damaged or failing kernel. Hence we
459 * do not acquire the spinlock before shutting down the controller.
461 static void uhci_shutdown(struct pci_dev *pdev)
463 struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev);
465 hc_died(hcd_to_uhci(hcd));
469 * Allocate a frame list, and then setup the skeleton
471 * The hardware doesn't really know any difference
472 * in the queues, but the order does matter for the
473 * protocols higher up. The order is:
475 * - any isochronous events handled before any
476 * of the queues. We don't do that here, because
477 * we'll create the actual TD entries on demand.
478 * - The first queue is the interrupt queue.
479 * - The second queue is the control queue, split into low- and full-speed
480 * - The third queue is bulk queue.
481 * - The fourth queue is the bandwidth reclamation queue, which loops back
482 * to the full-speed control queue.
484 static int uhci_start(struct usb_hcd *hcd)
486 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
489 struct dentry *dentry;
491 hcd->uses_new_polling = 1;
493 spin_lock_init(&uhci->lock);
495 INIT_LIST_HEAD(&uhci->idle_qh_list);
497 init_waitqueue_head(&uhci->waitqh);
499 if (DEBUG_CONFIGURED) {
500 dentry = debugfs_create_file(hcd->self.bus_name,
501 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root,
502 uhci, &uhci_debug_operations);
504 dev_err(uhci_dev(uhci), "couldn't create uhci "
507 goto err_create_debug_entry;
509 uhci->dentry = dentry;
512 uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
513 UHCI_NUMFRAMES * sizeof(*uhci->frame),
514 &uhci->frame_dma_handle, 0);
516 dev_err(uhci_dev(uhci), "unable to allocate "
517 "consistent memory for frame list\n");
518 goto err_alloc_frame;
520 memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
522 uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
524 if (!uhci->frame_cpu) {
525 dev_err(uhci_dev(uhci), "unable to allocate "
526 "memory for frame pointers\n");
527 goto err_alloc_frame_cpu;
530 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
531 sizeof(struct uhci_td), 16, 0);
532 if (!uhci->td_pool) {
533 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
534 goto err_create_td_pool;
537 uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
538 sizeof(struct uhci_qh), 16, 0);
539 if (!uhci->qh_pool) {
540 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
541 goto err_create_qh_pool;
544 uhci->term_td = uhci_alloc_td(uhci);
545 if (!uhci->term_td) {
546 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
547 goto err_alloc_term_td;
550 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
551 uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL);
552 if (!uhci->skelqh[i]) {
553 dev_err(uhci_dev(uhci), "unable to allocate QH\n");
554 goto err_alloc_skelqh;
559 * 8 Interrupt queues; link all higher int queues to int1,
560 * then link int1 to control and control to bulk
562 uhci->skel_int128_qh->link =
563 uhci->skel_int64_qh->link =
564 uhci->skel_int32_qh->link =
565 uhci->skel_int16_qh->link =
566 uhci->skel_int8_qh->link =
567 uhci->skel_int4_qh->link =
568 uhci->skel_int2_qh->link = UHCI_PTR_QH |
569 cpu_to_le32(uhci->skel_int1_qh->dma_handle);
571 uhci->skel_int1_qh->link = UHCI_PTR_QH |
572 cpu_to_le32(uhci->skel_ls_control_qh->dma_handle);
573 uhci->skel_ls_control_qh->link = UHCI_PTR_QH |
574 cpu_to_le32(uhci->skel_fs_control_qh->dma_handle);
575 uhci->skel_fs_control_qh->link = UHCI_PTR_QH |
576 cpu_to_le32(uhci->skel_bulk_qh->dma_handle);
577 uhci->skel_bulk_qh->link = UHCI_PTR_QH |
578 cpu_to_le32(uhci->skel_term_qh->dma_handle);
580 /* This dummy TD is to work around a bug in Intel PIIX controllers */
581 uhci_fill_td(uhci->term_td, 0, uhci_explen(0) |
582 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
583 uhci->term_td->link = cpu_to_le32(uhci->term_td->dma_handle);
585 uhci->skel_term_qh->link = UHCI_PTR_TERM;
586 uhci->skel_term_qh->element = cpu_to_le32(uhci->term_td->dma_handle);
589 * Fill the frame list: make all entries point to the proper
592 * The interrupt queues will be interleaved as evenly as possible.
593 * There's not much to be done about period-1 interrupts; they have
594 * to occur in every frame. But we can schedule period-2 interrupts
595 * in odd-numbered frames, period-4 interrupts in frames congruent
596 * to 2 (mod 4), and so on. This way each frame only has two
597 * interrupt QHs, which will help spread out bandwidth utilization.
599 for (i = 0; i < UHCI_NUMFRAMES; i++) {
603 * ffs (Find First bit Set) does exactly what we need:
604 * 1,3,5,... => ffs = 0 => use skel_int2_qh = skelqh[8],
605 * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[7], etc.
606 * ffs >= 7 => not on any high-period queue, so use
607 * skel_int1_qh = skelqh[9].
608 * Add UHCI_NUMFRAMES to insure at least one bit is set.
610 irq = 8 - (int) __ffs(i + UHCI_NUMFRAMES);
614 /* Only place we don't use the frame list routines */
615 uhci->frame[i] = UHCI_PTR_QH |
616 cpu_to_le32(uhci->skelqh[irq]->dma_handle);
620 * Some architectures require a full mb() to enforce completion of
621 * the memory writes above before the I/O transfers in configure_hc().
626 uhci->is_initialized = 1;
634 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
636 uhci_free_qh(uhci, uhci->skelqh[i]);
639 uhci_free_td(uhci, uhci->term_td);
642 dma_pool_destroy(uhci->qh_pool);
645 dma_pool_destroy(uhci->td_pool);
648 kfree(uhci->frame_cpu);
651 dma_free_coherent(uhci_dev(uhci),
652 UHCI_NUMFRAMES * sizeof(*uhci->frame),
653 uhci->frame, uhci->frame_dma_handle);
656 debugfs_remove(uhci->dentry);
658 err_create_debug_entry:
662 static void uhci_stop(struct usb_hcd *hcd)
664 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
666 spin_lock_irq(&uhci->lock);
667 if (!uhci->hc_inaccessible)
669 uhci_scan_schedule(uhci, NULL);
670 spin_unlock_irq(&uhci->lock);
676 static int uhci_rh_suspend(struct usb_hcd *hcd)
678 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
681 spin_lock_irq(&uhci->lock);
682 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
684 else if (!uhci->hc_inaccessible)
685 suspend_rh(uhci, UHCI_RH_SUSPENDED);
686 spin_unlock_irq(&uhci->lock);
690 static int uhci_rh_resume(struct usb_hcd *hcd)
692 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
695 spin_lock_irq(&uhci->lock);
696 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
697 dev_warn(&hcd->self.root_hub->dev, "HC isn't running!\n");
699 } else if (!uhci->hc_inaccessible)
701 spin_unlock_irq(&uhci->lock);
705 static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
707 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
710 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
712 spin_lock_irq(&uhci->lock);
713 if (uhci->hc_inaccessible) /* Dead or already suspended */
716 if (uhci->rh_state > UHCI_RH_SUSPENDED) {
717 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
722 /* All PCI host controllers are required to disable IRQ generation
723 * at the source, so we must turn off PIRQ.
725 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
727 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
728 uhci->hc_inaccessible = 1;
731 /* FIXME: Enable non-PME# remote wakeup? */
734 spin_unlock_irq(&uhci->lock);
738 static int uhci_resume(struct usb_hcd *hcd)
740 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
742 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
744 /* Since we aren't in D3 any more, it's safe to set this flag
745 * even if the controller was dead. It might not even be dead
746 * any more, if the firmware or quirks code has reset it.
748 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
751 if (uhci->rh_state == UHCI_RH_RESET) /* Dead */
754 spin_lock_irq(&uhci->lock);
756 /* FIXME: Disable non-PME# remote wakeup? */
758 uhci->hc_inaccessible = 0;
760 /* The BIOS may have changed the controller settings during a
761 * system wakeup. Check it and reconfigure to avoid problems.
763 check_and_reset_hc(uhci);
766 if (uhci->rh_state == UHCI_RH_RESET) {
768 /* The controller had to be reset */
769 usb_root_hub_lost_power(hcd->self.root_hub);
770 suspend_rh(uhci, UHCI_RH_SUSPENDED);
773 spin_unlock_irq(&uhci->lock);
775 if (!uhci->working_RD) {
776 /* Suspended root hub needs to be polled */
778 usb_hcd_poll_rh_status(hcd);
784 /* Wait until a particular device/endpoint's QH is idle, and free it */
785 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
786 struct usb_host_endpoint *hep)
788 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
791 spin_lock_irq(&uhci->lock);
792 qh = (struct uhci_qh *) hep->hcpriv;
796 while (qh->state != QH_STATE_IDLE) {
798 spin_unlock_irq(&uhci->lock);
799 wait_event_interruptible(uhci->waitqh,
800 qh->state == QH_STATE_IDLE);
801 spin_lock_irq(&uhci->lock);
805 uhci_free_qh(uhci, qh);
807 spin_unlock_irq(&uhci->lock);
810 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
812 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
813 unsigned frame_number;
816 /* Minimize latency by avoiding the spinlock */
817 frame_number = uhci->frame_number;
819 delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) &
820 (UHCI_NUMFRAMES - 1);
821 return frame_number + delta;
824 static const char hcd_name[] = "uhci_hcd";
826 static const struct hc_driver uhci_driver = {
827 .description = hcd_name,
828 .product_desc = "UHCI Host Controller",
829 .hcd_priv_size = sizeof(struct uhci_hcd),
831 /* Generic hardware linkage */
835 /* Basic lifecycle operations */
839 .suspend = uhci_suspend,
840 .resume = uhci_resume,
841 .bus_suspend = uhci_rh_suspend,
842 .bus_resume = uhci_rh_resume,
846 .urb_enqueue = uhci_urb_enqueue,
847 .urb_dequeue = uhci_urb_dequeue,
849 .endpoint_disable = uhci_hcd_endpoint_disable,
850 .get_frame_number = uhci_hcd_get_frame_number,
852 .hub_status_data = uhci_hub_status_data,
853 .hub_control = uhci_hub_control,
856 static const struct pci_device_id uhci_pci_ids[] = { {
857 /* handle any USB UHCI controller */
858 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
859 .driver_data = (unsigned long) &uhci_driver,
860 }, { /* end: all zeroes */ }
863 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
865 static struct pci_driver uhci_pci_driver = {
866 .name = (char *)hcd_name,
867 .id_table = uhci_pci_ids,
869 .probe = usb_hcd_pci_probe,
870 .remove = usb_hcd_pci_remove,
871 .shutdown = uhci_shutdown,
874 .suspend = usb_hcd_pci_suspend,
875 .resume = usb_hcd_pci_resume,
879 static int __init uhci_hcd_init(void)
881 int retval = -ENOMEM;
883 printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "\n");
888 if (DEBUG_CONFIGURED) {
889 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
892 uhci_debugfs_root = debugfs_create_dir("uhci", NULL);
893 if (!uhci_debugfs_root)
897 uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
898 sizeof(struct urb_priv), 0, 0, NULL, NULL);
902 retval = pci_register_driver(&uhci_pci_driver);
909 if (kmem_cache_destroy(uhci_up_cachep))
910 warn("not all urb_privs were freed!");
913 debugfs_remove(uhci_debugfs_root);
923 static void __exit uhci_hcd_cleanup(void)
925 pci_unregister_driver(&uhci_pci_driver);
927 if (kmem_cache_destroy(uhci_up_cachep))
928 warn("not all urb_privs were freed!");
930 debugfs_remove(uhci_debugfs_root);
934 module_init(uhci_hcd_init);
935 module_exit(uhci_hcd_cleanup);
937 MODULE_AUTHOR(DRIVER_AUTHOR);
938 MODULE_DESCRIPTION(DRIVER_DESC);
939 MODULE_LICENSE("GPL");