1 /****************************************************************************
2 * (C) Copyright 2008 Samsung Electronics Co., Ltd., All rights reserved
4 * [File Name] : s3c-otg-common-datastruct.h
5 * [Description] : The Header file defines Data Structures to be used at sub-modules of S3C6400HCD.
6 * [Author] : Yang Soon Yeal { syatom.yang@samsung.com }
7 * [Department] : System LSI Division/System SW Lab
8 * [Created Date]: 2008/06/03
10 * (1) 2008/06/03 by Yang Soon Yeal { syatom.yang@samsung.com }
11 * - Created this file and defines Data Structure to be managed by Transfer.
12 * (2) 2008/08/18 by SeungSoo Yang ( ss1.yang@samsung.com )
13 * - modifying ED structure
15 ****************************************************************************/
16 /****************************************************************************
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
30 ****************************************************************************/
32 #ifndef _DATA_STRUCT_DEF_H
33 #define _DATA_STRUCT_DEF_H
36 // ----------------------------------------------------------------------------
37 // Include files : None.
38 // ----------------------------------------------------------------------------
41 #include <linux/wakelock.h>
42 #include <plat/s5p-otghost.h>
43 //#include "s3c-otg-common-typedef.h"
44 #include "s3c-otg-hcdi-list.h"
46 //#include "s3c-otg-common-regdef.h"
47 //#include "s3c-otg-common-errorcode.h"
54 typedef union _hcintmsk_t
62 unsigned xfercompl : 1;
71 unsigned frmovrun : 1;
72 unsigned datatglerr : 1;
73 unsigned reserved : 21;
77 typedef union _hcintn_t
98 typedef union _pcgcctl_t
100 /** raw register data */
105 unsigned stoppclk :1;
106 unsigned gatehclk :1;
108 unsigned rstpdwnmodule :1;
109 unsigned physuspended :1;
110 unsigned Reserved5_31 :27;
115 typedef struct isoch_packet_desc
117 u32 isoch_packiet_start_addr;// start address of buffer is buffer address + uiOffsert.
119 u32 transferred_szie;
121 }isoch_packet_desc_t;//, *isoch_packet_desc_t *,**isoch_packet_desc_t **;
124 typedef struct standard_dev_req_info
127 u8 conrol_transfer_stage;
128 u32 vir_standard_dev_req_addr;
129 u32 phy_standard_dev_req_addr;
130 }standard_dev_req_info_t;
133 typedef struct control_data_tgl_t
142 typedef struct ed_status
145 control_data_tgl_t control_data_tgl;
147 bool is_in_transfer_ready_q;
148 bool is_in_transferring;
149 u32 in_transferring_td;
150 bool is_alloc_resource_for_ed;
151 }ed_status_t;//, *ed_status_t *,**ed_status_t **;
154 typedef struct ed_desc
169 }ed_dest_t;//, *ed_dest_t *,**ed_dest_t **;
172 //Defines the Data Structures of Transfer.
173 typedef struct hc_reg
176 hcintmsk_t hc_int_msk;
180 }hc_reg_t;//, *hc_reg_t *, **hc_reg_t **;
183 typedef struct stransfer
187 ed_dest_t *ed_desc_p;
188 ed_status_t *ed_status_p;
189 u32 start_vir_buf_addr;
190 u32 start_phy_buf_addr;
195 }stransfer_t;//, *stransfer_t *,**stransfer_t **;
202 bool is_need_to_insert_scheduler;
204 ed_status_t ed_status;
205 otg_list_head ed_list_entry;
206 otg_list_head td_list_entry;
207 otg_list_head trans_ready_q_list_entry;
210 }ed_t;//, *ed_t *, **ed_t **;
218 void *call_back_func_p;
219 void *call_back_func_param_p;
220 bool is_transferring;
221 bool is_transfer_done;
222 u32 transferred_szie;
223 bool is_standard_dev_req;
224 standard_dev_req_info_t standard_dev_req_info;
229 stransfer_t cur_stransfer;
230 USB_ERROR_CODE error_code;
232 otg_list_head td_list_entry;
234 //Isochronous Transfer Specific
235 u32 isoch_packet_num;
236 isoch_packet_desc_t *isoch_packet_desc_p;
237 u32 isoch_packet_index;
238 u32 isoch_packet_position;
241 u32 used_total_bus_time;
243 // the private data can be used by S3C6400Interface.
245 }td_t;//, *td_t *,**td_t **;
248 //Define Data Structures of Scheduler.
249 typedef struct trans_ready_q
251 bool is_periodic_transfer;
252 otg_list_head trans_ready_q_list_head;
253 u32 trans_ready_entry_num;
255 //In case of Periodic Transfer
256 u32 total_perio_bus_bandwidth;
257 u8 total_alloc_chnum;
258 }trans_ready_q_t;//, *trans_ready_q_t *,**trans_ready_q_t **;
261 //Define USB OTG Reg Data Structure by Kyuhyeok.
263 #define MAX_COUNT 10000
264 #define INT_ALL 0xffffffff
266 typedef union _haint_t
271 u32 channel_intr_0 :1;
272 u32 channel_intr_1 :1;
273 u32 channel_intr_2 :1;
274 u32 channel_intr_3 :1;
275 u32 channel_intr_4 :1;
276 u32 channel_intr_5 :1;
277 u32 channel_intr_6 :1;
278 u32 channel_intr_7 :1;
279 u32 channel_intr_8 :1;
280 u32 channel_intr_9 :1;
281 u32 channel_intr_10 :1;
282 u32 channel_intr_11 :1;
283 u32 channel_intr_12 :1;
284 u32 channel_intr_13 :1;
285 u32 channel_intr_14 :1;
286 u32 channel_intr_15 :1;
291 typedef union _gresetctl_t
293 /** raw register data */
298 unsigned csftrst : 1;
299 unsigned hsftrst : 1;
301 unsigned intknqflsh : 1;
302 unsigned rxfflsh : 1;
303 unsigned txfflsh : 1;
305 unsigned reserved11_29 : 19;
307 unsigned ahbidle : 1;
312 typedef union _gahbcfg_t
314 /** raw register data */
319 unsigned glblintrmsk : 1;
320 #define GAHBCFG_GLBINT_ENABLE 1
321 unsigned hburstlen : 4;
322 #define INT_DMA_MODE_SINGLE 00
323 #define INT_DMA_MODE_INCR 01
324 #define INT_DMA_MODE_INCR4 03
325 #define INT_DMA_MODE_INCR8 05
326 #define INT_DMA_MODE_INCR16 07
327 unsigned dmaenable : 1;
328 #define GAHBCFG_DMAENABLE 1
329 unsigned reserved : 1;
330 unsigned nptxfemplvl : 1;
331 unsigned ptxfemplvl : 1;
332 #define GAHBCFG_TXFEMPTYLVL_EMPTY 1
333 #define GAHBCFG_TXFEMPTYLVL_HALFEMPTY 0
334 unsigned reserved9_31 : 22;
338 typedef union _gusbcfg_t
340 /** raw register data */
345 unsigned toutcal : 3;
347 unsigned ulpi_utmi_sel : 1;
353 unsigned usbtrdtim : 4;
354 unsigned nptxfrwnden : 1;
355 unsigned phylpwrclksel : 1;
356 unsigned reserved : 13;
357 unsigned forcehstmode : 1;
358 unsigned reserved2 : 2;
363 typedef union _ghwcfg2_t
365 /** raw register data */
370 unsigned op_mode : 3;
371 #define MODE_HNP_SRP_CAPABLE 0
372 #define MODE_SRP_ONLY_CAPABLE 1
373 #define MODE_NO_HNP_SRP_CAPABLE 2
374 #define MODE_SRP_CAPABLE_DEVICE 3
375 #define MODE_NO_SRP_CAPABLE_DEVICE 4
376 #define MODE_SRP_CAPABLE_HOST 5
377 #define MODE_NO_SRP_CAPABLE_HOST 6
379 unsigned architecture : 2;
380 #define HWCFG2_ARCH_SLAVE_ONLY 0x00
381 #define HWCFG2_ARCH_EXT_DMA 0x01
382 #define HWCFG2_ARCH_INT_DMA 0x02
384 unsigned point2point : 1;
385 unsigned hs_phy_type : 2;
386 unsigned fs_phy_type : 2;
387 unsigned num_dev_ep : 4;
388 unsigned num_host_chan : 4;
389 unsigned perio_ep_supported : 1;
390 unsigned dynamic_fifo : 1;
391 unsigned rx_status_q_depth : 2;
392 unsigned nonperio_tx_q_depth : 2;
393 unsigned host_perio_tx_q_depth : 2;
394 unsigned dev_token_q_depth : 5;
395 unsigned reserved31 : 1;
399 typedef union _gintsts_t
401 /** raw register data */
403 #define SOF_INTR_MASK 0x0008
408 #define DEVICE_MODE 0
409 unsigned curmode : 1;
410 #define OTG_HOST_MODE 1
411 #define OTG_DEVICE_MODE 0
413 unsigned modemismatch : 1;
414 unsigned otgintr : 1;
415 unsigned sofintr : 1;
416 unsigned rxstsqlvl : 1;
417 unsigned nptxfempty : 1;
418 unsigned ginnakeff : 1;
419 unsigned goutnakeff : 1;
420 unsigned reserved8 : 1;
421 unsigned i2cintr : 1;
422 unsigned erlysuspend : 1;
423 unsigned usbsuspend : 1;
424 unsigned usbreset : 1;
425 unsigned enumdone : 1;
426 unsigned isooutdrop : 1;
427 unsigned eopframe : 1;
428 unsigned intokenrx : 1;
429 unsigned epmismatch : 1;
430 unsigned inepint : 1;
431 unsigned outepintr : 1;
432 unsigned incompisoin : 1;
433 unsigned incompisoout : 1;
434 unsigned reserved22_23 : 2;
435 unsigned portintr : 1;
437 unsigned ptxfempty : 1;
438 unsigned reserved27 : 1;
439 unsigned conidstschng : 1;
440 unsigned disconnect : 1;
441 unsigned sessreqintr : 1;
442 unsigned wkupintr : 1;
447 typedef union _hcfg_t
449 /** raw register data */
455 /** FS/LS Phy Clock Select */
456 unsigned fslspclksel : 2;
457 #define HCFG_30_60_MHZ 0
458 #define HCFG_48_MHZ 1
461 /** FS/LS Only Support */
462 unsigned fslssupp : 1;
463 unsigned reserved3_31 : 29;
467 typedef union _hprt_t
469 /** raw register data */
474 unsigned prtconnsts : 1;
475 unsigned prtconndet : 1;
477 unsigned prtenchng : 1;
478 unsigned prtovrcurract : 1;
479 unsigned prtovrcurrchng : 1;
481 unsigned prtsusp : 1;
483 unsigned reserved9 : 1;
484 unsigned prtlnsts : 2;
486 unsigned prttstctl : 4;
488 #define HPRT0_PRTSPD_HIGH_SPEED 0
489 #define HPRT0_PRTSPD_FULL_SPEED 1
490 #define HPRT0_PRTSPD_LOW_SPEED 2
491 unsigned reserved19_31 : 13;
496 typedef union _gintmsk_t
498 /** raw register data */
503 unsigned reserved0 : 1;
504 unsigned modemismatch : 1;
505 unsigned otgintr : 1;
506 unsigned sofintr : 1;
507 unsigned rxstsqlvl : 1;
508 unsigned nptxfempty : 1;
509 unsigned ginnakeff : 1;
510 unsigned goutnakeff : 1;
511 unsigned reserved8 : 1;
512 unsigned i2cintr : 1;
513 unsigned erlysuspend : 1;
514 unsigned usbsuspend : 1;
515 unsigned usbreset : 1;
516 unsigned enumdone : 1;
517 unsigned isooutdrop : 1;
518 unsigned eopframe : 1;
519 unsigned reserved16 : 1;
520 unsigned epmismatch : 1;
521 unsigned inepintr : 1;
522 unsigned outepintr : 1;
523 unsigned incompisoin : 1;
524 unsigned incompisoout : 1;
525 unsigned reserved22_23 : 2;
526 unsigned portintr : 1;
528 unsigned ptxfempty : 1;
529 unsigned reserved27 : 1;
530 unsigned conidstschng : 1;
531 unsigned disconnect : 1;
532 unsigned sessreqintr : 1;
533 unsigned wkupintr : 1;
541 u8 hc_num; // Host channel number used for register address lookup
543 unsigned dev_addr : 7; // Device to access
544 unsigned ep_is_in : 1; // EP direction; 0: OUT, 1: IN
546 unsigned ep_num : 4; // EP to access
547 unsigned low_speed : 1; // 1: Low speed, 0: Not low speed
548 unsigned ep_type : 2; // Endpoint type.
549 // One of the following values:
550 // - OTG_EP_TYPE_CONTROL: 0
551 // - OTG_EP_TYPE_ISOC: 1
552 // - OTG_EP_TYPE_BULK: 2
553 // - OTG_EP_TYPE_INTR: 3
555 unsigned rsvdb1 : 1; // 8 bit padding
557 u8 rsvd2; // 4 byte boundary
559 unsigned max_packet : 12; // Max packet size in bytes
561 unsigned data_pid_start : 2;
562 #define OTG_HC_PID_DATA0 0
563 #define OTG_HC_PID_DATA2 1
564 #define OTG_HC_PID_DATA1 2
565 #define OTG_HC_PID_MDATA 3
566 #define OTG_HC_PID_SETUP 3
568 unsigned multi_count : 2; // Number of periodic transactions per (micro)frame
571 // Flag to indicate whether the transfer has been started. Set to 1 if
572 // it has been started, 0 otherwise.
576 // Set to 1 to indicate that a PING request should be issued on this
577 // channel. If 0, process normally.
580 // Set to 1 to indicate that the error count for this transaction is
581 // non-zero. Set to 0 if the error count is 0.
583 u32 *xfer_buff; // Pointer to the current transfer buffer position.
584 u16 start_pkt_count; // Packet count at start of transfer.
586 u32 xfer_len; // Total number of bytes to transfer.
587 u32 xfer_count; // Number of bytes transferred so far.
590 // Set to 1 if the host channel has been halted, but the core is not
591 // finished flushing queued requests. Otherwise 0.
593 u8 halt_status; // Reason for halting the host channel
594 u8 short_read; // Set when the host channel does a short read.
595 u8 rsvd3; // 4 byte boundary
600 // Port status for the HC
601 #define HCD_DRIVE_RESET 0x0001
602 #define HCD_SEND_SETUP 0x0002
604 #define HC_MAX_PKT_COUNT 511
605 #define HC_MAX_TRANSFER_SIZE 65535
606 #define MAXP_SIZE_64BYTE 64
607 #define MAXP_SIZE_512BYTE 512
608 #define MAXP_SIZE_1024BYTE 1024
610 typedef union _hcchar_t
618 // Maximum packet size in bytes
629 unsigned reserved : 1;
631 // 0: Full/high speed device, 1: Low speed device
632 unsigned lspddev : 1;
634 // 0: Control, 1: Isoc, 2: Bulk, 3: Intr
636 #define OTG_EP_TYPE_CONTROL 0
637 #define OTG_EP_TYPE_ISOC 1
638 #define OTG_EP_TYPE_BULK 2
639 #define OTG_EP_TYPE_INTR 3
641 // Packets per frame for periodic transfers. 0 is reserved.
642 unsigned multicnt : 2;
645 unsigned devaddr : 7;
647 // Frame to transmit periodic transaction.
659 typedef union _hctsiz_t
667 // Total transfer size in bytes
668 unsigned xfersize : 19;
670 // Data packets to transfer
671 unsigned pktcnt : 10;
673 // Packet ID for next data packet
677 // 3: MDATA (non-Control), SETUP (Control)
679 #define HCTSIZ_DATA0 0
680 #define HCTSIZ_DATA1 2
681 #define HCTSIZ_DATA2 1
682 #define HCTSIZ_MDATA 3
683 #define HCTSIZ_SETUP 3
685 // Do PING protocol when 1
692 typedef union _grxstsr_t
704 unsigned Reserved : 11;
708 typedef union _hfir_t
717 unsigned Reserved : 16;
721 typedef union _hfnum_t
730 #define HFNUM_MAX_FRNUM 0x3FFF
735 typedef union grstctl_t
737 /** raw register data */
742 unsigned csftrst : 1;
743 unsigned hsftrst : 1;
745 unsigned intknqflsh : 1;
746 unsigned rxfflsh : 1;
747 unsigned txfflsh : 1;
749 unsigned reserved11_29 : 19;
751 unsigned ahbidle : 1;
755 typedef struct hc_info
757 hcintmsk_t hc_int_msk;
762 }hc_info_t;//, *hc_info_t *, **hc_info_t **;
764 #ifndef USB_MAXCHILDREN
765 #define USB_MAXCHILDREN (31)
768 typedef struct _usb_hub_descriptor_t
773 u16 hub_characteristics;
774 u8 power_on_to_power_good;
775 u8 hub_control_current;
776 /* add 1 bit for hub status change; round to bytes */
777 u8 DeviceRemovable[(USB_MAXCHILDREN + 1 + 7) / 8];
778 u8 port_pwr_ctrl_mask[(USB_MAXCHILDREN + 1 + 7) / 8];
779 }usb_hub_descriptor_t;