drivers/usb/host/s3c-otg/s3c-otg-common-datastruct.h

   1 /****************************************************************************
   2  *  (C) Copyright 2008 Samsung Electronics Co., Ltd., All rights reserved
   3  *
   4  *  [File Name]   : s3c-otg-common-datastruct.h
   5  *  [Description] : The Header file defines Data Structures to be used at sub-modules of S3C6400HCD.
   6  *  [Author]      : Yang Soon Yeal { syatom.yang@samsung.com }
   7  *  [Department]  : System LSI Division/System SW Lab
   8  *  [Created Date]: 2008/06/03
   9  *  [Revision History]
  10  *      (1) 2008/06/03   by Yang Soon Yeal { syatom.yang@samsung.com }
  11  *          - Created this file and defines Data Structure to be managed by Transfer.
  12  *      (2) 2008/08/18   by SeungSoo Yang ( ss1.yang@samsung.com )
  13  *          - modifying ED structure
  14  *
  15  ****************************************************************************/
  16 /****************************************************************************
  17  * This program is free software; you can redistribute it and/or modify
  18  * it under the terms of the GNU General Public License as published by
  19  * the Free Software Foundation; either version 2 of the License, or
  20  * (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  30  ****************************************************************************/
  31
  32 #ifndef  _DATA_STRUCT_DEF_H
  33 #define  _DATA_STRUCT_DEF_H
  34
  35 /*
  36 // ----------------------------------------------------------------------------
  37 // Include files : None.
  38 // ----------------------------------------------------------------------------
  39 */
  40
  41 #include <linux/wakelock.h>
  42 #include <plat/s5p-otghost.h>
  43 //#include "s3c-otg-common-typedef.h"
  44 #include "s3c-otg-hcdi-list.h"
  45
  46 //#include "s3c-otg-common-regdef.h"
  47 //#include "s3c-otg-common-errorcode.h"
  48
  49 #ifdef __cplusplus
  50 extern "C"
  51 {
  52 #endif
  53
  54 typedef union _hcintmsk_t
  55 {
  56         // raw register data
  57         u32 d32;
  58
  59         // register bits
  60         struct
  61         {
  62                 unsigned xfercompl              : 1;
  63                 unsigned chhltd                 : 1;
  64                 unsigned ahberr                 : 1;
  65                 unsigned stall                  : 1;
  66                 unsigned nak                    : 1;
  67                 unsigned ack                    : 1;
  68                 unsigned nyet                   : 1;
  69                 unsigned xacterr                        : 1;
  70                 unsigned bblerr                 : 1;
  71                 unsigned frmovrun               : 1;
  72                 unsigned datatglerr             : 1;
  73                 unsigned reserved               : 21;
  74         } b;
  75 } hcintmsk_t;
  76
  77 typedef union _hcintn_t
  78 {
  79         u32     d32;
  80         struct
  81         {
  82                 u32     xfercompl                       :1;
  83                 u32     chhltd                          :1;
  84                 u32     abherr                          :1;
  85                 u32     stall                           :1;
  86                 u32     nak                             :1;
  87                 u32     ack                             :1;
  88                 u32     nyet                            :1;
  89                 u32     xacterr                         :1;
  90                 u32     bblerr                          :1;
  91                 u32     frmovrun                        :1;
  92                 u32     datatglerr                      :1;
  93                 u32     reserved                        :21;
  94         }b;
  95 }hcintn_t;
  96
  97
  98 typedef union _pcgcctl_t
  99 {
 100         /** raw register data */
 101         u32 d32;
 102         /** register bits */
 103         struct
 104         {
 105                 unsigned        stoppclk                        :1;
 106                 unsigned        gatehclk                        :1;
 107                 unsigned        pwrclmp                 :1;
 108                 unsigned        rstpdwnmodule   :1;
 109                 unsigned        physuspended            :1;
 110                 unsigned        Reserved5_31            :27;
 111         }b;
 112 }pcgcctl_t;
 113
 114
 115 typedef struct isoch_packet_desc
 116 {
 117         u32                             isoch_packiet_start_addr;// start address of buffer is buffer address + uiOffsert.
 118         u32                             buf_size;
 119         u32                             transferred_szie;
 120         u32                             isoch_status;
 121 }isoch_packet_desc_t;//, *isoch_packet_desc_t *,**isoch_packet_desc_t **;
 122
 123
 124 typedef struct  standard_dev_req_info
 125 {
 126         bool                            is_data_stage;
 127         u8                              conrol_transfer_stage;
 128         u32                             vir_standard_dev_req_addr;
 129         u32                             phy_standard_dev_req_addr;
 130 }standard_dev_req_info_t;
 131
 132
 133 typedef struct control_data_tgl_t
 134 {
 135         u8                      setup_tgl;
 136         u8                      data_tgl;
 137         u8                      status_tgl;
 138 }control_data_tgl_t;
 139
 140
 141
 142 typedef struct ed_status
 143 {
 144         u8                      data_tgl;
 145         control_data_tgl_t              control_data_tgl;
 146         bool                    is_ping_enable;
 147         bool                    is_in_transfer_ready_q;
 148         bool                    is_in_transferring;
 149         u32                     in_transferring_td;
 150         bool                    is_alloc_resource_for_ed;
 151 }ed_status_t;//, *ed_status_t *,**ed_status_t **;
 152
 153
 154 typedef struct ed_desc
 155 {
 156         u8      device_addr;
 157         u8      endpoint_num;
 158         bool    is_ep_in;
 159         u8      dev_speed;
 160         u8      endpoint_type;
 161         u16     max_packet_size;
 162         u8      mc;
 163         u8      interval;
 164         u32         sched_frame;
 165         u32         used_bus_time;
 166         u8      hub_addr;
 167         u8      hub_port;
 168         bool        is_do_split;
 169 }ed_dest_t;//, *ed_dest_t *,**ed_dest_t **;
 170
 171
 172 //Defines the Data Structures of Transfer.
 173 typedef struct hc_reg
 174 {
 175
 176         hcintmsk_t      hc_int_msk;
 177         hcintn_t                hc_int;
 178         u32             dma_addr;
 179
 180 }hc_reg_t;//, *hc_reg_t *, **hc_reg_t **;
 181
 182
 183 typedef struct stransfer
 184 {
 185         u32             stransfer_id;
 186         u32             parent_td;
 187         ed_dest_t       *ed_desc_p;
 188         ed_status_t     *ed_status_p;
 189         u32             start_vir_buf_addr;
 190         u32             start_phy_buf_addr;
 191         u32             buf_size;
 192         u32             packet_cnt;
 193         u8              alloc_chnum;
 194         hc_reg_t                hc_reg;
 195 }stransfer_t;//, *stransfer_t *,**stransfer_t **;
 196
 197
 198 typedef struct ed
 199 {
 200         u32             ed_id;
 201         bool            is_halted;
 202         bool            is_need_to_insert_scheduler;
 203         ed_dest_t       ed_desc;
 204         ed_status_t     ed_status;
 205         otg_list_head   ed_list_entry;
 206         otg_list_head   td_list_entry;
 207         otg_list_head   trans_ready_q_list_entry;
 208         u32             num_td;
 209         void            *ed_private;
 210 }ed_t;//, *ed_t *, **ed_t **;
 211
 212
 213
 214 typedef struct td
 215 {
 216         u32                             td_id;
 217         ed_t                            *parent_ed_p;
 218         void                            *call_back_func_p;
 219         void                            *call_back_func_param_p;
 220         bool                            is_transferring;
 221         bool                            is_transfer_done;
 222         u32                             transferred_szie;
 223         bool                                    is_standard_dev_req;
 224         standard_dev_req_info_t         standard_dev_req_info;
 225         u32                             vir_buf_addr;
 226         u32                             phy_buf_addr;
 227         u32                             buf_size;
 228         u32                             transfer_flag;
 229         stransfer_t                     cur_stransfer;
 230         USB_ERROR_CODE          error_code;
 231         u32                             err_cnt;
 232         otg_list_head                   td_list_entry;
 233
 234         //Isochronous Transfer Specific
 235         u32                             isoch_packet_num;
 236         isoch_packet_desc_t             *isoch_packet_desc_p;
 237         u32                             isoch_packet_index;
 238         u32                             isoch_packet_position;
 239         u32                             sched_frame;
 240         u32                             interval;
 241         u32                             used_total_bus_time;
 242
 243         // the private data can be used by S3C6400Interface.
 244         void                            *td_private;
 245 }td_t;//, *td_t *,**td_t **;
 246
 247
 248 //Define Data Structures of Scheduler.
 249 typedef struct trans_ready_q
 250 {
 251         bool            is_periodic_transfer;
 252         otg_list_head   trans_ready_q_list_head;
 253         u32             trans_ready_entry_num;
 254
 255         //In case of Periodic Transfer
 256         u32             total_perio_bus_bandwidth;
 257         u8              total_alloc_chnum;
 258 }trans_ready_q_t;//, *trans_ready_q_t *,**trans_ready_q_t **;
 259
 260
 261 //Define USB OTG Reg Data Structure by Kyuhyeok.
 262
 263 #define MAX_COUNT 10000
 264 #define INT_ALL 0xffffffff
 265
 266 typedef union _haint_t
 267 {
 268         u32     d32;
 269         struct
 270         {
 271                 u32     channel_intr_0          :1;
 272                 u32     channel_intr_1          :1;
 273                 u32     channel_intr_2          :1;
 274                 u32     channel_intr_3          :1;
 275                 u32     channel_intr_4          :1;
 276                 u32     channel_intr_5          :1;
 277                 u32     channel_intr_6          :1;
 278                 u32     channel_intr_7          :1;
 279                 u32     channel_intr_8          :1;
 280                 u32     channel_intr_9          :1;
 281                 u32     channel_intr_10         :1;
 282                 u32     channel_intr_11         :1;
 283                 u32     channel_intr_12         :1;
 284                 u32     channel_intr_13         :1;
 285                 u32     channel_intr_14         :1;
 286                 u32     channel_intr_15         :1;
 287                 u32     reserved1               :16;
 288         }b;
 289 }haint_t;
 290
 291 typedef union _gresetctl_t
 292 {
 293         /** raw register data */
 294         u32 d32;
 295         /** register bits */
 296         struct
 297         {
 298                 unsigned csftrst                        : 1;
 299                 unsigned hsftrst                        : 1;
 300                 unsigned hstfrm                         : 1;
 301                 unsigned intknqflsh             : 1;
 302                 unsigned rxfflsh                        : 1;
 303                 unsigned txfflsh                        : 1;
 304                 unsigned txfnum                         : 5;
 305                 unsigned reserved11_29          : 19;
 306                 unsigned dmareq                         : 1;
 307                 unsigned ahbidle                        : 1;
 308         } b;
 309 } gresetctl_t;
 310
 311
 312 typedef union _gahbcfg_t
 313 {
 314         /** raw register data */
 315         u32 d32;
 316         /** register bits */
 317         struct
 318         {
 319                 unsigned glblintrmsk            : 1;
 320 #define GAHBCFG_GLBINT_ENABLE   1
 321                 unsigned hburstlen                      : 4;
 322 #define INT_DMA_MODE_SINGLE             00
 323 #define INT_DMA_MODE_INCR                       01
 324 #define INT_DMA_MODE_INCR4              03
 325 #define INT_DMA_MODE_INCR8              05
 326 #define INT_DMA_MODE_INCR16             07
 327                 unsigned dmaenable                      : 1;
 328 #define GAHBCFG_DMAENABLE       1
 329                 unsigned reserved                       : 1;
 330                 unsigned nptxfemplvl            : 1;
 331                 unsigned ptxfemplvl             : 1;
 332 #define GAHBCFG_TXFEMPTYLVL_EMPTY               1
 333 #define GAHBCFG_TXFEMPTYLVL_HALFEMPTY   0
 334                 unsigned reserved9_31           : 22;
 335         } b;
 336 } gahbcfg_t;
 337
 338 typedef union _gusbcfg_t
 339 {
 340         /** raw register data */
 341         u32 d32;
 342         /** register bits */
 343         struct
 344         {
 345                 unsigned toutcal                        : 3;
 346                 unsigned phyif                          : 1;
 347                 unsigned ulpi_utmi_sel          : 1;
 348                 unsigned fsintf                         : 1;
 349                 unsigned physel                         : 1;
 350                 unsigned ddrsel                         : 1;
 351                 unsigned srpcap                         : 1;
 352                 unsigned hnpcap                         : 1;
 353                 unsigned usbtrdtim                      : 4;
 354                 unsigned nptxfrwnden            : 1;
 355                 unsigned phylpwrclksel          : 1;
 356                 unsigned reserved                       : 13;
 357                 unsigned forcehstmode           : 1;
 358                 unsigned reserved2                      : 2;
 359         } b;
 360 } gusbcfg_t;
 361
 362
 363 typedef union _ghwcfg2_t
 364 {
 365         /** raw register data */
 366         u32 d32;
 367         /** register bits */
 368         struct {
 369                 /* GHWCFG2 */
 370                 unsigned op_mode                                        : 3;
 371 #define MODE_HNP_SRP_CAPABLE            0
 372 #define MODE_SRP_ONLY_CAPABLE           1
 373 #define MODE_NO_HNP_SRP_CAPABLE         2
 374 #define MODE_SRP_CAPABLE_DEVICE                 3
 375 #define MODE_NO_SRP_CAPABLE_DEVICE  4
 376 #define MODE_SRP_CAPABLE_HOST           5
 377 #define MODE_NO_SRP_CAPABLE_HOST        6
 378
 379                 unsigned architecture                           : 2;
 380 #define HWCFG2_ARCH_SLAVE_ONLY          0x00
 381 #define HWCFG2_ARCH_EXT_DMA                     0x01
 382 #define HWCFG2_ARCH_INT_DMA             0x02
 383
 384                 unsigned point2point                            : 1;
 385                 unsigned hs_phy_type                            : 2;
 386                 unsigned fs_phy_type                            : 2;
 387                 unsigned num_dev_ep                             : 4;
 388                 unsigned num_host_chan                          : 4;
 389                 unsigned perio_ep_supported             : 1;
 390                 unsigned dynamic_fifo                           : 1;
 391                 unsigned rx_status_q_depth              : 2;
 392                 unsigned nonperio_tx_q_depth            : 2;
 393                 unsigned host_perio_tx_q_depth  : 2;
 394                 unsigned dev_token_q_depth              : 5;
 395                 unsigned reserved31                             : 1;
 396         } b;
 397 } ghwcfg2_t;
 398
 399 typedef union _gintsts_t
 400 {
 401         /** raw register data */
 402         u32 d32;
 403 #define SOF_INTR_MASK 0x0008
 404         /** register bits */
 405         struct
 406         {
 407 #define HOST_MODE                       1
 408 #define DEVICE_MODE             0
 409                 unsigned curmode                        : 1;
 410 #define OTG_HOST_MODE           1
 411 #define OTG_DEVICE_MODE 0
 412
 413                 unsigned modemismatch           : 1;
 414                 unsigned otgintr                        : 1;
 415                 unsigned sofintr                        : 1;
 416                 unsigned rxstsqlvl                      : 1;
 417                 unsigned nptxfempty             : 1;
 418                 unsigned ginnakeff                      : 1;
 419                 unsigned goutnakeff             : 1;
 420                 unsigned reserved8                      : 1;
 421                 unsigned i2cintr                        : 1;
 422                 unsigned erlysuspend            : 1;
 423                 unsigned usbsuspend             : 1;
 424                 unsigned usbreset                       : 1;
 425                 unsigned enumdone                       : 1;
 426                 unsigned isooutdrop             : 1;
 427                 unsigned eopframe                       : 1;
 428                 unsigned intokenrx                      : 1;
 429                 unsigned epmismatch             : 1;
 430                 unsigned inepint                        : 1;
 431                 unsigned outepintr                      : 1;
 432                 unsigned incompisoin            : 1;
 433                 unsigned incompisoout           : 1;
 434                 unsigned reserved22_23          : 2;
 435                 unsigned portintr                       : 1;
 436                 unsigned hcintr                         : 1;
 437                 unsigned ptxfempty                      : 1;
 438                 unsigned reserved27             : 1;
 439                 unsigned conidstschng           : 1;
 440                 unsigned disconnect             : 1;
 441                 unsigned sessreqintr            : 1;
 442                 unsigned wkupintr                       : 1;
 443         } b;
 444 } gintsts_t;
 445
 446
 447 typedef union _hcfg_t
 448 {
 449         /** raw register data */
 450         u32 d32;
 451
 452         /** register bits */
 453         struct
 454         {
 455                 /** FS/LS Phy Clock Select */
 456                 unsigned fslspclksel    : 2;
 457 #define HCFG_30_60_MHZ  0
 458 #define HCFG_48_MHZ         1
 459 #define HCFG_6_MHZ              2
 460
 461                 /** FS/LS Only Support */
 462                 unsigned fslssupp               : 1;
 463                 unsigned reserved3_31           : 29;
 464         } b;
 465 } hcfg_t;
 466
 467 typedef union _hprt_t
 468 {
 469         /** raw register data */
 470         u32 d32;
 471         /** register bits */
 472         struct
 473         {
 474                 unsigned prtconnsts             : 1;
 475                 unsigned prtconndet             : 1;
 476                 unsigned prtena                         : 1;
 477                 unsigned prtenchng                      : 1;
 478                 unsigned prtovrcurract          : 1;
 479                 unsigned prtovrcurrchng : 1;
 480                 unsigned prtres                         : 1;
 481                 unsigned prtsusp                        : 1;
 482                 unsigned prtrst                         : 1;
 483                 unsigned reserved9                      : 1;
 484                 unsigned prtlnsts                       : 2;
 485                 unsigned prtpwr                         : 1;
 486                 unsigned prttstctl                      : 4;
 487                 unsigned prtspd                         : 2;
 488 #define HPRT0_PRTSPD_HIGH_SPEED 0
 489 #define HPRT0_PRTSPD_FULL_SPEED 1
 490 #define HPRT0_PRTSPD_LOW_SPEED  2
 491                 unsigned reserved19_31          : 13;
 492         } b;
 493 } hprt_t;
 494
 495
 496 typedef union _gintmsk_t
 497 {
 498         /** raw register data */
 499         u32 d32;
 500         /** register bits */
 501         struct
 502         {
 503                 unsigned reserved0                      : 1;
 504                 unsigned modemismatch           : 1;
 505                 unsigned otgintr                        : 1;
 506                 unsigned sofintr                        : 1;
 507                 unsigned rxstsqlvl                      : 1;
 508                 unsigned nptxfempty             : 1;
 509                 unsigned ginnakeff                      : 1;
 510                 unsigned goutnakeff             : 1;
 511                 unsigned reserved8                      : 1;
 512                 unsigned i2cintr                        : 1;
 513                 unsigned erlysuspend            : 1;
 514                 unsigned usbsuspend             : 1;
 515                 unsigned usbreset                       : 1;
 516                 unsigned enumdone                       : 1;
 517                 unsigned isooutdrop             : 1;
 518                 unsigned eopframe                       : 1;
 519                 unsigned reserved16             : 1;
 520                 unsigned epmismatch             : 1;
 521                 unsigned inepintr                       : 1;
 522                 unsigned outepintr                      : 1;
 523                 unsigned incompisoin            : 1;
 524                 unsigned incompisoout           : 1;
 525                 unsigned reserved22_23          : 2;
 526                 unsigned portintr                       : 1;
 527                 unsigned hcintr                         : 1;
 528                 unsigned ptxfempty                      : 1;
 529                 unsigned reserved27             : 1;
 530                 unsigned conidstschng           : 1;
 531                 unsigned disconnect             : 1;
 532                 unsigned sessreqintr            : 1;
 533                 unsigned wkupintr                       : 1;
 534         } b;
 535 } gintmsk_t;
 536
 537
 538 typedef struct _hc_t
 539 {
 540
 541         u8  hc_num;                             // Host channel number used for register address lookup
 542
 543         unsigned dev_addr               : 7;            // Device to access
 544         unsigned ep_is_in               : 1;            // EP direction; 0: OUT, 1: IN
 545
 546         unsigned ep_num                 : 4;            // EP to access
 547         unsigned low_speed              : 1;            // 1: Low speed, 0: Not low speed
 548         unsigned ep_type                : 2;            // Endpoint type.
 549         // One of the following values:
 550         //      - OTG_EP_TYPE_CONTROL: 0
 551         //      - OTG_EP_TYPE_ISOC: 1
 552         //      - OTG_EP_TYPE_BULK: 2
 553         //      - OTG_EP_TYPE_INTR: 3
 554
 555         unsigned rsvdb1                 : 1;            // 8 bit padding
 556
 557         u8 rsvd2;                               // 4 byte boundary
 558
 559         unsigned max_packet     : 12;   // Max packet size in bytes
 560
 561         unsigned data_pid_start : 2;
 562 #define OTG_HC_PID_DATA0 0
 563 #define OTG_HC_PID_DATA2 1
 564 #define OTG_HC_PID_DATA1 2
 565 #define OTG_HC_PID_MDATA 3
 566 #define OTG_HC_PID_SETUP 3
 567
 568         unsigned multi_count    : 2;    // Number of periodic transactions per (micro)frame
 569
 570
 571         // Flag to indicate whether the transfer has been started. Set to 1 if
 572         // it has been started, 0 otherwise.
 573         u8 xfer_started;
 574
 575
 576         // Set to 1 to indicate that a PING request should be issued on this
 577         // channel. If 0, process normally.
 578         u8      do_ping;
 579
 580         // Set to 1 to indicate that the error count for this transaction is
 581         // non-zero. Set to 0 if the error count is 0.
 582         u8 error_state;
 583         u32 *xfer_buff;         // Pointer to the current transfer buffer position.
 584         u16 start_pkt_count;    // Packet count at start of transfer.
 585
 586         u32 xfer_len;           // Total number of bytes to transfer.
 587         u32 xfer_count;         // Number of bytes transferred so far.
 588
 589
 590         // Set to 1 if the host channel has been halted, but the core is not
 591         // finished flushing queued requests. Otherwise 0.
 592         u8 halt_pending;
 593         u8 halt_status; // Reason for halting the host channel
 594         u8 short_read;          // Set when the host channel does a short read.
 595         u8 rsvd3;                       // 4 byte boundary
 596
 597 } hc_t;
 598
 599
 600 // Port status for the HC
 601 #define HCD_DRIVE_RESET         0x0001
 602 #define HCD_SEND_SETUP          0x0002
 603
 604 #define HC_MAX_PKT_COUNT                511
 605 #define HC_MAX_TRANSFER_SIZE    65535
 606 #define MAXP_SIZE_64BYTE                64
 607 #define MAXP_SIZE_512BYTE       512
 608 #define MAXP_SIZE_1024BYTE      1024
 609
 610 typedef union _hcchar_t
 611 {
 612         // raw register data
 613         u32 d32;
 614
 615         // register bits
 616         struct
 617         {
 618                 // Maximum packet size in bytes
 619                 unsigned mps            : 11;
 620
 621                 // Endpoint number
 622                 unsigned epnum          : 4;
 623
 624                 // 0: OUT, 1: IN
 625                 unsigned epdir          : 1;
 626 #define HCDIR_OUT                               0
 627 #define HCDIR_IN                                1
 628
 629                 unsigned reserved       : 1;
 630
 631                 // 0: Full/high speed device, 1: Low speed device
 632                 unsigned lspddev        : 1;
 633
 634                 // 0: Control, 1: Isoc, 2: Bulk, 3: Intr
 635                 unsigned eptype         : 2;
 636 #define OTG_EP_TYPE_CONTROL     0
 637 #define OTG_EP_TYPE_ISOC                1
 638 #define OTG_EP_TYPE_BULK                2
 639 #define OTG_EP_TYPE_INTR                3
 640
 641                 // Packets per frame for periodic transfers. 0 is reserved.
 642                 unsigned multicnt       : 2;
 643
 644                 // Device address
 645                 unsigned devaddr        : 7;
 646
 647                 // Frame to transmit periodic transaction.
 648                 // 0: even, 1: odd
 649                 unsigned oddfrm         : 1;
 650
 651                 // Channel disable
 652                 unsigned chdis          : 1;
 653
 654                 // Channel enable
 655                 unsigned chen           : 1;
 656         } b;
 657 } hcchar_t;
 658
 659 typedef union _hctsiz_t
 660 {
 661         // raw register data
 662         u32 d32;
 663
 664         // register bits
 665         struct
 666         {
 667                 // Total transfer size in bytes
 668                 unsigned xfersize       : 19;
 669
 670                 // Data packets to transfer
 671                 unsigned pktcnt         : 10;
 672
 673                 // Packet ID for next data packet
 674                 // 0: DATA0
 675                 // 1: DATA2
 676                 // 2: DATA1
 677                 // 3: MDATA (non-Control), SETUP (Control)
 678                 unsigned pid            : 2;
 679 #define HCTSIZ_DATA0            0
 680 #define HCTSIZ_DATA1            2
 681 #define HCTSIZ_DATA2            1
 682 #define HCTSIZ_MDATA            3
 683 #define HCTSIZ_SETUP            3
 684
 685                 // Do PING protocol when 1
 686                 unsigned dopng          : 1;
 687         } b;
 688 } hctsiz_t;
 689
 690
 691
 692 typedef union _grxstsr_t
 693 {
 694         // raw register data
 695         u32 d32;
 696
 697         // register bits
 698         struct
 699         {
 700                 unsigned chnum          : 4;
 701                 unsigned bcnt           : 11;
 702                 unsigned dpid           : 2;
 703                 unsigned pktsts         : 4;
 704                 unsigned Reserved               : 11;
 705         } b;
 706 } grxstsr_t;
 707
 708 typedef union _hfir_t
 709 {
 710         // raw register data
 711         u32 d32;
 712
 713         // register bits
 714         struct
 715         {
 716                 unsigned frint          : 16;
 717                 unsigned Reserved               : 16;
 718         } b;
 719 } hfir_t;
 720
 721 typedef union _hfnum_t
 722 {
 723         // raw register data
 724         u32 d32;
 725
 726         // register bits
 727         struct
 728         {
 729                 unsigned frnum : 16;
 730 #define HFNUM_MAX_FRNUM 0x3FFF
 731                 unsigned frrem : 16;
 732         } b;
 733 } hfnum_t;
 734
 735 typedef union grstctl_t
 736 {
 737         /** raw register data */
 738         u32 d32;
 739         /** register bits */
 740         struct
 741         {
 742                 unsigned csftrst                : 1;
 743                 unsigned hsftrst                : 1;
 744                 unsigned hstfrm                 : 1;
 745                 unsigned intknqflsh     : 1;
 746                 unsigned rxfflsh                : 1;
 747                 unsigned txfflsh                : 1;
 748                 unsigned txfnum                 : 5;
 749                 unsigned reserved11_29  : 19;
 750                 unsigned dmareq                 : 1;
 751                 unsigned ahbidle                : 1;
 752         } b;
 753 } grstctl_t;
 754
 755 typedef struct  hc_info
 756 {
 757         hcintmsk_t                      hc_int_msk;
 758         hcintn_t                                hc_int;
 759         u32                             dma_addr;
 760         hcchar_t                                hc_char;
 761         hctsiz_t                                hc_size;
 762 }hc_info_t;//, *hc_info_t *, **hc_info_t **;
 763
 764 #ifndef USB_MAXCHILDREN
 765         #define USB_MAXCHILDREN (31)
 766 #endif
 767
 768 typedef struct _usb_hub_descriptor_t
 769 {
 770         u8  desc_length;
 771         u8  desc_type;
 772         u8  port_number;
 773         u16 hub_characteristics;
 774         u8  power_on_to_power_good;
 775         u8  hub_control_current;
 776                 /* add 1 bit for hub status change; round to bytes */
 777         u8  DeviceRemovable[(USB_MAXCHILDREN + 1 + 7) / 8];
 778         u8  port_pwr_ctrl_mask[(USB_MAXCHILDREN + 1 + 7) / 8];
 779 }usb_hub_descriptor_t;
 780
 781 #ifdef __cplusplus
 782 }
 783 #endif
 784
 785 #endif