drivers/usb/host/ohci-hcd.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
   4  *
   5  * Interrupt support is added. Now, it has been tested
   6  * on ULI1575 chip and works well with USB keyboard.
   7  *
   8  * (C) Copyright 2007
   9  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
  10  *
  11  * (C) Copyright 2003
  12  * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
  13  *
  14  * Note: Much of this code has been derived from Linux 2.4
  15  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  16  * (C) Copyright 2000-2002 David Brownell
  17  *
  18  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  19  * ebenard@eukrea.com - based on s3c24x0's driver
  20  */
  21 /*
  22  * IMPORTANT NOTES
  23  * 1 - Read doc/README.generic_usb_ohci
  24  * 2 - this driver is intended for use with USB Mass Storage Devices
  25  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
  26  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  27  *     to activate workaround for bug #41 or this driver will NOT work!
  28  */
  29
  30 #include <common.h>
  31 #include <cpu_func.h>
  32 #include <asm/byteorder.h>
  33 #include <dm.h>
  34 #include <errno.h>
  35 #include <asm/cache.h>
  36 #include <linux/delay.h>
  37
  38 #include <malloc.h>
  39 #include <memalign.h>
  40 #include <usb.h>
  41
  42 #include "ohci.h"
  43
  44 #ifdef CONFIG_AT91RM9200
  45 #include <asm/arch/hardware.h>  /* needed for AT91_USB_HOST_BASE */
  46 #endif
  47
  48 #if defined(CONFIG_CPU_ARM920T) || \
  49         defined(CONFIG_PCI) || \
  50         defined(CONFIG_SYS_OHCI_USE_NPS)
  51 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
  52 #endif
  53
  54 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  55 #undef DEBUG
  56 #undef SHOW_INFO
  57 #undef OHCI_FILL_TRACE
  58
  59 /* For initializing controller (mask in an HCFS mode too) */
  60 #define OHCI_CONTROL_INIT \
  61         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  62
  63 #ifdef DEBUG
  64 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  65 #else
  66 #define dbg(format, arg...) do {} while (0)
  67 #endif /* DEBUG */
  68 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  69 #ifdef SHOW_INFO
  70 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  71 #else
  72 #define info(format, arg...) do {} while (0)
  73 #endif
  74
  75 #ifdef CONFIG_SYS_OHCI_BE_CONTROLLER
  76 # define m16_swap(x) cpu_to_be16(x)
  77 # define m32_swap(x) cpu_to_be32(x)
  78 #else
  79 # define m16_swap(x) cpu_to_le16(x)
  80 # define m32_swap(x) cpu_to_le32(x)
  81 #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
  82
  83 /* We really should do proper cache flushing everywhere */
  84 #define flush_dcache_buffer(addr, size) \
  85         flush_dcache_range((unsigned long)(addr), \
  86                 ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
  87 #define invalidate_dcache_buffer(addr, size) \
  88         invalidate_dcache_range((unsigned long)(addr), \
  89                 ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
  90
  91 /* Do not use sizeof(ed / td) as our ed / td structs contain extra members */
  92 #define flush_dcache_ed(addr) flush_dcache_buffer(addr, 16)
  93 #define flush_dcache_td(addr) flush_dcache_buffer(addr, 16)
  94 #define flush_dcache_iso_td(addr) flush_dcache_buffer(addr, 32)
  95 #define flush_dcache_hcca(addr) flush_dcache_buffer(addr, 256)
  96 #define invalidate_dcache_ed(addr) invalidate_dcache_buffer(addr, 16)
  97 #define invalidate_dcache_td(addr) invalidate_dcache_buffer(addr, 16)
  98 #define invalidate_dcache_iso_td(addr) invalidate_dcache_buffer(addr, 32)
  99 #define invalidate_dcache_hcca(addr) invalidate_dcache_buffer(addr, 256)
 100
 101 #if CONFIG_IS_ENABLED(DM_USB)
 102 /*
 103  * The various ohci_mdelay(1) calls in the code seem unnecessary. We keep
 104  * them around when building for older boards not yet converted to the dm
 105  * just in case (to avoid regressions), for dm this turns them into nops.
 106  */
 107 #define ohci_mdelay(x)
 108 #else
 109 #define ohci_mdelay(x) mdelay(x)
 110 #endif
 111
 112 #if !CONFIG_IS_ENABLED(DM_USB)
 113 /* global ohci_t */
 114 static ohci_t gohci;
 115 /* this must be aligned to a 256 byte boundary */
 116 struct ohci_hcca ghcca[1];
 117 #endif
 118
 119 /* mapping of the OHCI CC status to error codes */
 120 static int cc_to_error[16] = {
 121         /* No  Error  */               0,
 122         /* CRC Error  */               USB_ST_CRC_ERR,
 123         /* Bit Stuff  */               USB_ST_BIT_ERR,
 124         /* Data Togg  */               USB_ST_CRC_ERR,
 125         /* Stall      */               USB_ST_STALLED,
 126         /* DevNotResp */               -1,
 127         /* PIDCheck   */               USB_ST_BIT_ERR,
 128         /* UnExpPID   */               USB_ST_BIT_ERR,
 129         /* DataOver   */               USB_ST_BUF_ERR,
 130         /* DataUnder  */               USB_ST_BUF_ERR,
 131         /* reservd    */               -1,
 132         /* reservd    */               -1,
 133         /* BufferOver */               USB_ST_BUF_ERR,
 134         /* BuffUnder  */               USB_ST_BUF_ERR,
 135         /* Not Access */               -1,
 136         /* Not Access */               -1
 137 };
 138
 139 static const char *cc_to_string[16] = {
 140         "No Error",
 141         "CRC: Last data packet from endpoint contained a CRC error.",
 142         "BITSTUFFING: Last data packet from endpoint contained a bit " \
 143                      "stuffing violation",
 144         "DATATOGGLEMISMATCH: Last packet from endpoint had data toggle PID\n" \
 145                      "that did not match the expected value.",
 146         "STALL: TD was moved to the Done Queue because the endpoint returned" \
 147                      " a STALL PID",
 148         "DEVICENOTRESPONDING: Device did not respond to token (IN) or did\n" \
 149                      "not provide a handshake (OUT)",
 150         "PIDCHECKFAILURE: Check bits on PID from endpoint failed on data PID\n"\
 151                      "(IN) or handshake (OUT)",
 152         "UNEXPECTEDPID: Receive PID was not valid when encountered or PID\n" \
 153                      "value is not defined.",
 154         "DATAOVERRUN: The amount of data returned by the endpoint exceeded\n" \
 155                      "either the size of the maximum data packet allowed\n" \
 156                      "from the endpoint (found in MaximumPacketSize field\n" \
 157                      "of ED) or the remaining buffer size.",
 158         "DATAUNDERRUN: The endpoint returned less than MaximumPacketSize\n" \
 159                      "and that amount was not sufficient to fill the\n" \
 160                      "specified buffer",
 161         "reserved1",
 162         "reserved2",
 163         "BUFFEROVERRUN: During an IN, HC received data from endpoint faster\n" \
 164                      "than it could be written to system memory",
 165         "BUFFERUNDERRUN: During an OUT, HC could not retrieve data from\n" \
 166                      "system memory fast enough to keep up with data USB " \
 167                      "data rate.",
 168         "NOT ACCESSED: This code is set by software before the TD is placed" \
 169                      "on a list to be processed by the HC.(1)",
 170         "NOT ACCESSED: This code is set by software before the TD is placed" \
 171                      "on a list to be processed by the HC.(2)",
 172 };
 173
 174 static inline u32 roothub_a(struct ohci *hc)
 175         { return ohci_readl(&hc->regs->roothub.a); }
 176 static inline u32 roothub_b(struct ohci *hc)
 177         { return ohci_readl(&hc->regs->roothub.b); }
 178 static inline u32 roothub_status(struct ohci *hc)
 179         { return ohci_readl(&hc->regs->roothub.status); }
 180 static inline u32 roothub_portstatus(struct ohci *hc, int i)
 181         { return ohci_readl(&hc->regs->roothub.portstatus[i]); }
 182
 183 /* forward declaration */
 184 static int hc_interrupt(ohci_t *ohci);
 185 static void td_submit_job(ohci_t *ohci, struct usb_device *dev,
 186                           unsigned long pipe, void *buffer, int transfer_len,
 187                           struct devrequest *setup, urb_priv_t *urb,
 188                           int interval);
 189 static int ep_link(ohci_t * ohci, ed_t * ed);
 190 static int ep_unlink(ohci_t * ohci, ed_t * ed);
 191 static ed_t *ep_add_ed(ohci_dev_t *ohci_dev, struct usb_device *usb_dev,
 192                        unsigned long pipe, int interval, int load);
 193
 194 /*-------------------------------------------------------------------------*/
 195
 196 /* TDs ... */
 197 static struct td *td_alloc(ohci_dev_t *ohci_dev, struct usb_device *usb_dev)
 198 {
 199         int i;
 200         struct td *td;
 201
 202         td = NULL;
 203         for (i = 0; i < NUM_TD; i++)
 204         {
 205                 if (ohci_dev->tds[i].usb_dev == NULL)
 206                 {
 207                         td = &ohci_dev->tds[i];
 208                         td->usb_dev = usb_dev;
 209                         break;
 210                 }
 211         }
 212
 213         return td;
 214 }
 215
 216 static inline void ed_free(struct ed *ed)
 217 {
 218         ed->usb_dev = NULL;
 219 }
 220
 221 /*-------------------------------------------------------------------------*
 222  * URB support functions
 223  *-------------------------------------------------------------------------*/
 224
 225 /* free HCD-private data associated with this URB */
 226
 227 static void urb_free_priv(urb_priv_t *urb)
 228 {
 229         int             i;
 230         int             last;
 231         struct td       *td;
 232
 233         last = urb->length - 1;
 234         if (last >= 0) {
 235                 for (i = 0; i <= last; i++) {
 236                         td = urb->td[i];
 237                         if (td) {
 238                                 td->usb_dev = NULL;
 239                                 urb->td[i] = NULL;
 240                         }
 241                 }
 242         }
 243         free(urb);
 244 }
 245
 246 /*-------------------------------------------------------------------------*/
 247
 248 #ifdef DEBUG
 249 static int sohci_get_current_frame_number(ohci_t *ohci);
 250
 251 /* debug| print the main components of an URB
 252  * small: 0) header + data packets 1) just header */
 253
 254 static void pkt_print(ohci_t *ohci, urb_priv_t *purb, struct usb_device *dev,
 255                       unsigned long pipe, void *buffer, int transfer_len,
 256                       struct devrequest *setup, char *str, int small)
 257 {
 258         dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx",
 259                         str,
 260                         sohci_get_current_frame_number(ohci),
 261                         usb_pipedevice(pipe),
 262                         usb_pipeendpoint(pipe),
 263                         usb_pipeout(pipe)? 'O': 'I',
 264                         usb_pipetype(pipe) < 2 ? \
 265                                 (usb_pipeint(pipe)? "INTR": "ISOC"): \
 266                                 (usb_pipecontrol(pipe)? "CTRL": "BULK"),
 267                         (purb ? purb->actual_length : 0),
 268                         transfer_len, dev->status);
 269 #ifdef  OHCI_VERBOSE_DEBUG
 270         if (!small) {
 271                 int i, len;
 272
 273                 if (usb_pipecontrol(pipe)) {
 274                         printf(__FILE__ ": cmd(8):");
 275                         for (i = 0; i < 8 ; i++)
 276                                 printf(" %02x", ((__u8 *) setup) [i]);
 277                         printf("\n");
 278                 }
 279                 if (transfer_len > 0 && buffer) {
 280                         printf(__FILE__ ": data(%d/%d):",
 281                                 (purb ? purb->actual_length : 0),
 282                                 transfer_len);
 283                         len = usb_pipeout(pipe)? transfer_len:
 284                                         (purb ? purb->actual_length : 0);
 285                         for (i = 0; i < 16 && i < len; i++)
 286                                 printf(" %02x", ((__u8 *) buffer) [i]);
 287                         printf("%s\n", i < len? "...": "");
 288                 }
 289         }
 290 #endif
 291 }
 292
 293 /* just for debugging; prints non-empty branches of the int ed tree
 294  * inclusive iso eds */
 295 void ep_print_int_eds(ohci_t *ohci, char *str)
 296 {
 297         int i, j;
 298          __u32 *ed_p;
 299         for (i = 0; i < 32; i++) {
 300                 j = 5;
 301                 ed_p = &(ohci->hcca->int_table [i]);
 302                 if (*ed_p == 0)
 303                     continue;
 304                 invalidate_dcache_ed(ed_p);
 305                 printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
 306                 while (*ed_p != 0 && j--) {
 307                         ed_t *ed = (ed_t *)m32_swap(ed_p);
 308                         invalidate_dcache_ed(ed);
 309                         printf(" ed: %4x;", ed->hwINFO);
 310                         ed_p = &ed->hwNextED;
 311                 }
 312                 printf("\n");
 313         }
 314 }
 315
 316 static void ohci_dump_intr_mask(char *label, __u32 mask)
 317 {
 318         dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
 319                 label,
 320                 mask,
 321                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
 322                 (mask & OHCI_INTR_OC) ? " OC" : "",
 323                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
 324                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
 325                 (mask & OHCI_INTR_UE) ? " UE" : "",
 326                 (mask & OHCI_INTR_RD) ? " RD" : "",
 327                 (mask & OHCI_INTR_SF) ? " SF" : "",
 328                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
 329                 (mask & OHCI_INTR_SO) ? " SO" : ""
 330                 );
 331 }
 332
 333 static void maybe_print_eds(char *label, __u32 value)
 334 {
 335         ed_t *edp = (ed_t *)value;
 336
 337         if (value) {
 338                 dbg("%s %08x", label, value);
 339                 invalidate_dcache_ed(edp);
 340                 dbg("%08x", edp->hwINFO);
 341                 dbg("%08x", edp->hwTailP);
 342                 dbg("%08x", edp->hwHeadP);
 343                 dbg("%08x", edp->hwNextED);
 344         }
 345 }
 346
 347 static char *hcfs2string(int state)
 348 {
 349         switch (state) {
 350         case OHCI_USB_RESET:    return "reset";
 351         case OHCI_USB_RESUME:   return "resume";
 352         case OHCI_USB_OPER:     return "operational";
 353         case OHCI_USB_SUSPEND:  return "suspend";
 354         }
 355         return "?";
 356 }
 357
 358 /* dump control and status registers */
 359 static void ohci_dump_status(ohci_t *controller)
 360 {
 361         struct ohci_regs        *regs = controller->regs;
 362         __u32                   temp;
 363
 364         temp = ohci_readl(&regs->revision) & 0xff;
 365         if (temp != 0x10)
 366                 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
 367
 368         temp = ohci_readl(&regs->control);
 369         dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
 370                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
 371                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
 372                 (temp & OHCI_CTRL_IR) ? " IR" : "",
 373                 hcfs2string(temp & OHCI_CTRL_HCFS),
 374                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
 375                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
 376                 (temp & OHCI_CTRL_IE) ? " IE" : "",
 377                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
 378                 temp & OHCI_CTRL_CBSR
 379                 );
 380
 381         temp = ohci_readl(&regs->cmdstatus);
 382         dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
 383                 (temp & OHCI_SOC) >> 16,
 384                 (temp & OHCI_OCR) ? " OCR" : "",
 385                 (temp & OHCI_BLF) ? " BLF" : "",
 386                 (temp & OHCI_CLF) ? " CLF" : "",
 387                 (temp & OHCI_HCR) ? " HCR" : ""
 388                 );
 389
 390         ohci_dump_intr_mask("intrstatus", ohci_readl(&regs->intrstatus));
 391         ohci_dump_intr_mask("intrenable", ohci_readl(&regs->intrenable));
 392
 393         maybe_print_eds("ed_periodcurrent",
 394                         ohci_readl(&regs->ed_periodcurrent));
 395
 396         maybe_print_eds("ed_controlhead", ohci_readl(&regs->ed_controlhead));
 397         maybe_print_eds("ed_controlcurrent",
 398                         ohci_readl(&regs->ed_controlcurrent));
 399
 400         maybe_print_eds("ed_bulkhead", ohci_readl(&regs->ed_bulkhead));
 401         maybe_print_eds("ed_bulkcurrent", ohci_readl(&regs->ed_bulkcurrent));
 402
 403         maybe_print_eds("donehead", ohci_readl(&regs->donehead));
 404 }
 405
 406 static void ohci_dump_roothub(ohci_t *controller, int verbose)
 407 {
 408         __u32                   temp, ndp, i;
 409
 410         temp = roothub_a(controller);
 411         ndp = (temp & RH_A_NDP);
 412 #ifdef CONFIG_AT91C_PQFP_UHPBUG
 413         ndp = (ndp == 2) ? 1:0;
 414 #endif
 415         if (verbose) {
 416                 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
 417                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
 418                         (temp & RH_A_NOCP) ? " NOCP" : "",
 419                         (temp & RH_A_OCPM) ? " OCPM" : "",
 420                         (temp & RH_A_DT) ? " DT" : "",
 421                         (temp & RH_A_NPS) ? " NPS" : "",
 422                         (temp & RH_A_PSM) ? " PSM" : "",
 423                         ndp
 424                         );
 425                 temp = roothub_b(controller);
 426                 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
 427                         temp,
 428                         (temp & RH_B_PPCM) >> 16,
 429                         (temp & RH_B_DR)
 430                         );
 431                 temp = roothub_status(controller);
 432                 dbg("roothub.status: %08x%s%s%s%s%s%s",
 433                         temp,
 434                         (temp & RH_HS_CRWE) ? " CRWE" : "",
 435                         (temp & RH_HS_OCIC) ? " OCIC" : "",
 436                         (temp & RH_HS_LPSC) ? " LPSC" : "",
 437                         (temp & RH_HS_DRWE) ? " DRWE" : "",
 438                         (temp & RH_HS_OCI) ? " OCI" : "",
 439                         (temp & RH_HS_LPS) ? " LPS" : ""
 440                         );
 441         }
 442
 443         for (i = 0; i < ndp; i++) {
 444                 temp = roothub_portstatus(controller, i);
 445                 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
 446                         i,
 447                         temp,
 448                         (temp & RH_PS_PRSC) ? " PRSC" : "",
 449                         (temp & RH_PS_OCIC) ? " OCIC" : "",
 450                         (temp & RH_PS_PSSC) ? " PSSC" : "",
 451                         (temp & RH_PS_PESC) ? " PESC" : "",
 452                         (temp & RH_PS_CSC) ? " CSC" : "",
 453
 454                         (temp & RH_PS_LSDA) ? " LSDA" : "",
 455                         (temp & RH_PS_PPS) ? " PPS" : "",
 456                         (temp & RH_PS_PRS) ? " PRS" : "",
 457                         (temp & RH_PS_POCI) ? " POCI" : "",
 458                         (temp & RH_PS_PSS) ? " PSS" : "",
 459
 460                         (temp & RH_PS_PES) ? " PES" : "",
 461                         (temp & RH_PS_CCS) ? " CCS" : ""
 462                         );
 463         }
 464 }
 465
 466 static void ohci_dump(ohci_t *controller, int verbose)
 467 {
 468         dbg("OHCI controller usb-%s state", controller->slot_name);
 469
 470         /* dumps some of the state we know about */
 471         ohci_dump_status(controller);
 472         if (verbose)
 473                 ep_print_int_eds(controller, "hcca");
 474         invalidate_dcache_hcca(controller->hcca);
 475         dbg("hcca frame #%04x", controller->hcca->frame_no);
 476         ohci_dump_roothub(controller, 1);
 477 }
 478 #endif /* DEBUG */
 479
 480 /*-------------------------------------------------------------------------*
 481  * Interface functions (URB)
 482  *-------------------------------------------------------------------------*/
 483
 484 /* get a transfer request */
 485
 486 int sohci_submit_job(ohci_t *ohci, ohci_dev_t *ohci_dev, urb_priv_t *urb,
 487                      struct devrequest *setup)
 488 {
 489         ed_t *ed;
 490         urb_priv_t *purb_priv = urb;
 491         int i, size = 0;
 492         struct usb_device *dev = urb->dev;
 493         unsigned long pipe = urb->pipe;
 494         void *buffer = urb->transfer_buffer;
 495         int transfer_len = urb->transfer_buffer_length;
 496         int interval = urb->interval;
 497
 498         /* when controller's hung, permit only roothub cleanup attempts
 499          * such as powering down ports */
 500         if (ohci->disabled) {
 501                 err("sohci_submit_job: EPIPE");
 502                 return -1;
 503         }
 504
 505         /* we're about to begin a new transaction here so mark the
 506          * URB unfinished */
 507         urb->finished = 0;
 508
 509         /* every endpoint has a ed, locate and fill it */
 510         ed = ep_add_ed(ohci_dev, dev, pipe, interval, 1);
 511         if (!ed) {
 512                 err("sohci_submit_job: ENOMEM");
 513                 return -1;
 514         }
 515
 516         /* for the private part of the URB we need the number of TDs (size) */
 517         switch (usb_pipetype(pipe)) {
 518         case PIPE_BULK: /* one TD for every 4096 Byte */
 519                 size = (transfer_len - 1) / 4096 + 1;
 520                 break;
 521         case PIPE_CONTROL:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
 522                 size = (transfer_len == 0)? 2:
 523                                         (transfer_len - 1) / 4096 + 3;
 524                 break;
 525         case PIPE_INTERRUPT: /* 1 TD */
 526                 size = 1;
 527                 break;
 528         }
 529
 530         ed->purb = urb;
 531
 532         if (size >= (N_URB_TD - 1)) {
 533                 err("need %d TDs, only have %d", size, N_URB_TD);
 534                 return -1;
 535         }
 536         purb_priv->pipe = pipe;
 537
 538         /* fill the private part of the URB */
 539         purb_priv->length = size;
 540         purb_priv->ed = ed;
 541         purb_priv->actual_length = 0;
 542
 543         /* allocate the TDs */
 544         /* note that td[0] was allocated in ep_add_ed */
 545         for (i = 0; i < size; i++) {
 546                 purb_priv->td[i] = td_alloc(ohci_dev, dev);
 547                 if (!purb_priv->td[i]) {
 548                         purb_priv->length = i;
 549                         urb_free_priv(purb_priv);
 550                         err("sohci_submit_job: ENOMEM");
 551                         return -1;
 552                 }
 553         }
 554
 555         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
 556                 urb_free_priv(purb_priv);
 557                 err("sohci_submit_job: EINVAL");
 558                 return -1;
 559         }
 560
 561         /* link the ed into a chain if is not already */
 562         if (ed->state != ED_OPER)
 563                 ep_link(ohci, ed);
 564
 565         /* fill the TDs and link it to the ed */
 566         td_submit_job(ohci, dev, pipe, buffer, transfer_len,
 567                       setup, purb_priv, interval);
 568
 569         return 0;
 570 }
 571
 572 /*-------------------------------------------------------------------------*/
 573
 574 #ifdef DEBUG
 575 /* tell us the current USB frame number */
 576 static int sohci_get_current_frame_number(ohci_t *ohci)
 577 {
 578         invalidate_dcache_hcca(ohci->hcca);
 579         return m16_swap(ohci->hcca->frame_no);
 580 }
 581 #endif
 582
 583 /*-------------------------------------------------------------------------*
 584  * ED handling functions
 585  *-------------------------------------------------------------------------*/
 586
 587 /* search for the right branch to insert an interrupt ed into the int tree
 588  * do some load ballancing;
 589  * returns the branch and
 590  * sets the interval to interval = 2^integer (ld (interval)) */
 591
 592 static int ep_int_ballance(ohci_t *ohci, int interval, int load)
 593 {
 594         int i, branch = 0;
 595
 596         /* search for the least loaded interrupt endpoint
 597          * branch of all 32 branches
 598          */
 599         for (i = 0; i < 32; i++)
 600                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
 601                         branch = i;
 602
 603         branch = branch % interval;
 604         for (i = branch; i < 32; i += interval)
 605                 ohci->ohci_int_load [i] += load;
 606
 607         return branch;
 608 }
 609
 610 /*-------------------------------------------------------------------------*/
 611
 612 /*  2^int( ld (inter)) */
 613
 614 static int ep_2_n_interval(int inter)
 615 {
 616         int i;
 617         for (i = 0; ((inter >> i) > 1) && (i < 5); i++);
 618         return 1 << i;
 619 }
 620
 621 /*-------------------------------------------------------------------------*/
 622
 623 /* the int tree is a binary tree
 624  * in order to process it sequentially the indexes of the branches have to
 625  * be mapped the mapping reverses the bits of a word of num_bits length */
 626 static int ep_rev(int num_bits, int word)
 627 {
 628         int i, wout = 0;
 629
 630         for (i = 0; i < num_bits; i++)
 631                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
 632         return wout;
 633 }
 634
 635 /*-------------------------------------------------------------------------*
 636  * ED handling functions
 637  *-------------------------------------------------------------------------*/
 638
 639 /* link an ed into one of the HC chains */
 640
 641 static int ep_link(ohci_t *ohci, ed_t *edi)
 642 {
 643         volatile ed_t *ed = edi;
 644         int int_branch;
 645         int i;
 646         int inter;
 647         int interval;
 648         int load;
 649         __u32 *ed_p;
 650
 651         ed->state = ED_OPER;
 652         ed->int_interval = 0;
 653
 654         switch (ed->type) {
 655         case PIPE_CONTROL:
 656                 ed->hwNextED = 0;
 657                 flush_dcache_ed(ed);
 658                 if (ohci->ed_controltail == NULL)
 659                         ohci_writel((uintptr_t)ed, &ohci->regs->ed_controlhead);
 660                 else
 661                         ohci->ed_controltail->hwNextED =
 662                                                    m32_swap((unsigned long)ed);
 663
 664                 ed->ed_prev = ohci->ed_controltail;
 665                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
 666                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 667                         ohci->hc_control |= OHCI_CTRL_CLE;
 668                         ohci_writel(ohci->hc_control, &ohci->regs->control);
 669                 }
 670                 ohci->ed_controltail = edi;
 671                 break;
 672
 673         case PIPE_BULK:
 674                 ed->hwNextED = 0;
 675                 flush_dcache_ed(ed);
 676                 if (ohci->ed_bulktail == NULL)
 677                         ohci_writel((uintptr_t)ed, &ohci->regs->ed_bulkhead);
 678                 else
 679                         ohci->ed_bulktail->hwNextED =
 680                                                    m32_swap((unsigned long)ed);
 681
 682                 ed->ed_prev = ohci->ed_bulktail;
 683                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
 684                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 685                         ohci->hc_control |= OHCI_CTRL_BLE;
 686                         ohci_writel(ohci->hc_control, &ohci->regs->control);
 687                 }
 688                 ohci->ed_bulktail = edi;
 689                 break;
 690
 691         case PIPE_INTERRUPT:
 692                 load = ed->int_load;
 693                 interval = ep_2_n_interval(ed->int_period);
 694                 ed->int_interval = interval;
 695                 int_branch = ep_int_ballance(ohci, interval, load);
 696                 ed->int_branch = int_branch;
 697
 698                 for (i = 0; i < ep_rev(6, interval); i += inter) {
 699                         inter = 1;
 700                         for (ed_p = &(ohci->hcca->int_table[\
 701                                                 ep_rev(5, i) + int_branch]);
 702                                 (*ed_p != 0) &&
 703                                 (((ed_t *)ed_p)->int_interval >= interval);
 704                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
 705                                         inter = ep_rev(6,
 706                                                  ((ed_t *)ed_p)->int_interval);
 707                         ed->hwNextED = *ed_p;
 708                         flush_dcache_ed(ed);
 709                         *ed_p = m32_swap((unsigned long)ed);
 710                         flush_dcache_hcca(ohci->hcca);
 711                 }
 712                 break;
 713         }
 714         return 0;
 715 }
 716
 717 /*-------------------------------------------------------------------------*/
 718
 719 /* scan the periodic table to find and unlink this ED */
 720 static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,
 721                             unsigned index, unsigned period)
 722 {
 723         __maybe_unused unsigned long aligned_ed_p;
 724
 725         for (; index < NUM_INTS; index += period) {
 726                 __u32   *ed_p = &ohci->hcca->int_table [index];
 727
 728                 /* ED might have been unlinked through another path */
 729                 while (*ed_p != 0) {
 730                         if (((struct ed *)(uintptr_t)
 731                                         m32_swap((unsigned long)ed_p)) == ed) {
 732                                 *ed_p = ed->hwNextED;
 733                                 aligned_ed_p = (unsigned long)ed_p;
 734                                 aligned_ed_p &= ~(ARCH_DMA_MINALIGN - 1);
 735                                 flush_dcache_range(aligned_ed_p,
 736                                         aligned_ed_p + ARCH_DMA_MINALIGN);
 737                                 break;
 738                         }
 739                         ed_p = &(((struct ed *)(uintptr_t)
 740                                      m32_swap((unsigned long)ed_p))->hwNextED);
 741                 }
 742         }
 743 }
 744
 745 /* unlink an ed from one of the HC chains.
 746  * just the link to the ed is unlinked.
 747  * the link from the ed still points to another operational ed or 0
 748  * so the HC can eventually finish the processing of the unlinked ed */
 749
 750 static int ep_unlink(ohci_t *ohci, ed_t *edi)
 751 {
 752         volatile ed_t *ed = edi;
 753         int i;
 754
 755         ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
 756         flush_dcache_ed(ed);
 757
 758         switch (ed->type) {
 759         case PIPE_CONTROL:
 760                 if (ed->ed_prev == NULL) {
 761                         if (!ed->hwNextED) {
 762                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
 763                                 ohci_writel(ohci->hc_control,
 764                                             &ohci->regs->control);
 765                         }
 766                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 767                                 &ohci->regs->ed_controlhead);
 768                 } else {
 769                         ed->ed_prev->hwNextED = ed->hwNextED;
 770                         flush_dcache_ed(ed->ed_prev);
 771                 }
 772                 if (ohci->ed_controltail == ed) {
 773                         ohci->ed_controltail = ed->ed_prev;
 774                 } else {
 775                         ((ed_t *)(uintptr_t)m32_swap(
 776                             *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 777                 }
 778                 break;
 779
 780         case PIPE_BULK:
 781                 if (ed->ed_prev == NULL) {
 782                         if (!ed->hwNextED) {
 783                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
 784                                 ohci_writel(ohci->hc_control,
 785                                             &ohci->regs->control);
 786                         }
 787                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 788                                &ohci->regs->ed_bulkhead);
 789                 } else {
 790                         ed->ed_prev->hwNextED = ed->hwNextED;
 791                         flush_dcache_ed(ed->ed_prev);
 792                 }
 793                 if (ohci->ed_bulktail == ed) {
 794                         ohci->ed_bulktail = ed->ed_prev;
 795                 } else {
 796                         ((ed_t *)(uintptr_t)m32_swap(
 797                              *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 798                 }
 799                 break;
 800
 801         case PIPE_INTERRUPT:
 802                 periodic_unlink(ohci, ed, 0, 1);
 803                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
 804                     ohci->ohci_int_load[i] -= ed->int_load;
 805                 break;
 806         }
 807         ed->state = ED_UNLINK;
 808         return 0;
 809 }
 810
 811 /*-------------------------------------------------------------------------*/
 812
 813 /* add/reinit an endpoint; this should be done once at the
 814  * usb_set_configuration command, but the USB stack is a little bit
 815  * stateless so we do it at every transaction if the state of the ed
 816  * is ED_NEW then a dummy td is added and the state is changed to
 817  * ED_UNLINK in all other cases the state is left unchanged the ed
 818  * info fields are setted anyway even though most of them should not
 819  * change
 820  */
 821 static ed_t *ep_add_ed(ohci_dev_t *ohci_dev, struct usb_device *usb_dev,
 822                        unsigned long pipe, int interval, int load)
 823 {
 824         td_t *td;
 825         ed_t *ed_ret;
 826         volatile ed_t *ed;
 827
 828         ed = ed_ret = &ohci_dev->ed[(usb_pipeendpoint(pipe) << 1) |
 829                         (usb_pipecontrol(pipe)? 0: usb_pipeout(pipe))];
 830
 831         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
 832                 err("ep_add_ed: pending delete");
 833                 /* pending delete request */
 834                 return NULL;
 835         }
 836
 837         if (ed->state == ED_NEW) {
 838                 /* dummy td; end of td list for ed */
 839                 td = td_alloc(ohci_dev, usb_dev);
 840                 ed->hwTailP = m32_swap((unsigned long)td);
 841                 ed->hwHeadP = ed->hwTailP;
 842                 ed->state = ED_UNLINK;
 843                 ed->type = usb_pipetype(pipe);
 844                 ohci_dev->ed_cnt++;
 845         }
 846
 847         ed->hwINFO = m32_swap(usb_pipedevice(pipe)
 848                         | usb_pipeendpoint(pipe) << 7
 849                         | (usb_pipeisoc(pipe)? 0x8000: 0)
 850                         | (usb_pipecontrol(pipe)? 0: \
 851                                            (usb_pipeout(pipe)? 0x800: 0x1000))
 852                         | (usb_dev->speed == USB_SPEED_LOW) << 13
 853                         | usb_maxpacket(usb_dev, pipe) << 16);
 854
 855         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
 856                 ed->int_period = interval;
 857                 ed->int_load = load;
 858         }
 859
 860         flush_dcache_ed(ed);
 861
 862         return ed_ret;
 863 }
 864
 865 /*-------------------------------------------------------------------------*
 866  * TD handling functions
 867  *-------------------------------------------------------------------------*/
 868
 869 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
 870
 871 static void td_fill(ohci_t *ohci, unsigned int info,
 872         void *data, int len,
 873         struct usb_device *dev, int index, urb_priv_t *urb_priv)
 874 {
 875         volatile td_t  *td, *td_pt;
 876 #ifdef OHCI_FILL_TRACE
 877         int i;
 878 #endif
 879
 880         if (index > urb_priv->length) {
 881                 err("index > length");
 882                 return;
 883         }
 884         /* use this td as the next dummy */
 885         td_pt = urb_priv->td [index];
 886         td_pt->hwNextTD = 0;
 887         flush_dcache_td(td_pt);
 888
 889         /* fill the old dummy TD */
 890         td = urb_priv->td [index] =
 891                              (td_t *)(uintptr_t)
 892                              (m32_swap(urb_priv->ed->hwTailP) & ~0xf);
 893
 894         td->ed = urb_priv->ed;
 895         td->next_dl_td = NULL;
 896         td->index = index;
 897         td->data = (uintptr_t)data;
 898 #ifdef OHCI_FILL_TRACE
 899         if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
 900                 for (i = 0; i < len; i++)
 901                 printf("td->data[%d] %#2x ", i, ((unsigned char *)td->data)[i]);
 902                 printf("\n");
 903         }
 904 #endif
 905         if (!len)
 906                 data = 0;
 907
 908         td->hwINFO = m32_swap(info);
 909         td->hwCBP = m32_swap((unsigned long)data);
 910         if (data)
 911                 td->hwBE = m32_swap((unsigned long)(data + len - 1));
 912         else
 913                 td->hwBE = 0;
 914
 915         td->hwNextTD = m32_swap((unsigned long)td_pt);
 916         flush_dcache_td(td);
 917
 918         /* append to queue */
 919         td->ed->hwTailP = td->hwNextTD;
 920         flush_dcache_ed(td->ed);
 921 }
 922
 923 /*-------------------------------------------------------------------------*/
 924
 925 /* prepare all TDs of a transfer */
 926
 927 static void td_submit_job(ohci_t *ohci, struct usb_device *dev,
 928                           unsigned long pipe, void *buffer, int transfer_len,
 929                           struct devrequest *setup, urb_priv_t *urb,
 930                           int interval)
 931 {
 932         int data_len = transfer_len;
 933         void *data;
 934         int cnt = 0;
 935         __u32 info = 0;
 936         unsigned int toggle = 0;
 937
 938         flush_dcache_buffer(buffer, data_len);
 939
 940         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle
 941          * bits for resetting */
 942         if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
 943                 toggle = TD_T_TOGGLE;
 944         } else {
 945                 toggle = TD_T_DATA0;
 946                 usb_settoggle(dev, usb_pipeendpoint(pipe),
 947                                 usb_pipeout(pipe), 1);
 948         }
 949         urb->td_cnt = 0;
 950         if (data_len)
 951                 data = buffer;
 952         else
 953                 data = 0;
 954
 955         switch (usb_pipetype(pipe)) {
 956         case PIPE_BULK:
 957                 info = usb_pipeout(pipe)?
 958                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
 959                 while (data_len > 4096) {
 960                         td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle),
 961                                 data, 4096, dev, cnt, urb);
 962                         data += 4096; data_len -= 4096; cnt++;
 963                 }
 964                 info = usb_pipeout(pipe)?
 965                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
 966                 td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle), data,
 967                         data_len, dev, cnt, urb);
 968                 cnt++;
 969
 970                 if (!ohci->sleeping) {
 971                         /* start bulk list */
 972                         ohci_writel(OHCI_BLF, &ohci->regs->cmdstatus);
 973                 }
 974                 break;
 975
 976         case PIPE_CONTROL:
 977                 /* Setup phase */
 978                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
 979                 flush_dcache_buffer(setup, 8);
 980                 td_fill(ohci, info, setup, 8, dev, cnt++, urb);
 981
 982                 /* Optional Data phase */
 983                 if (data_len > 0) {
 984                         info = usb_pipeout(pipe)?
 985                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
 986                                 TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
 987                         /* NOTE:  mishandles transfers >8K, some >4K */
 988                         td_fill(ohci, info, data, data_len, dev, cnt++, urb);
 989                 }
 990
 991                 /* Status phase */
 992                 info = (usb_pipeout(pipe) || data_len == 0) ?
 993                         TD_CC | TD_DP_IN | TD_T_DATA1:
 994                         TD_CC | TD_DP_OUT | TD_T_DATA1;
 995                 td_fill(ohci, info, data, 0, dev, cnt++, urb);
 996
 997                 if (!ohci->sleeping) {
 998                         /* start Control list */
 999                         ohci_writel(OHCI_CLF, &ohci->regs->cmdstatus);
1000                 }
1001                 break;
1002
1003         case PIPE_INTERRUPT:
1004                 info = usb_pipeout(urb->pipe)?
1005                         TD_CC | TD_DP_OUT | toggle:
1006                         TD_CC | TD_R | TD_DP_IN | toggle;
1007                 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
1008                 break;
1009         }
1010         if (urb->length != cnt)
1011                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
1012 }
1013
1014 /*-------------------------------------------------------------------------*
1015  * Done List handling functions
1016  *-------------------------------------------------------------------------*/
1017
1018 /* calculate the transfer length and update the urb */
1019
1020 static void dl_transfer_length(td_t *td)
1021 {
1022         __u32 tdBE, tdCBP;
1023         urb_priv_t *lurb_priv = td->ed->purb;
1024
1025         tdBE   = m32_swap(td->hwBE);
1026         tdCBP  = m32_swap(td->hwCBP);
1027
1028         if (!(usb_pipecontrol(lurb_priv->pipe) &&
1029             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
1030                 if (tdBE != 0) {
1031                         if (td->hwCBP == 0)
1032                                 lurb_priv->actual_length += tdBE - td->data + 1;
1033                         else
1034                                 lurb_priv->actual_length += tdCBP - td->data;
1035                 }
1036         }
1037 }
1038
1039 /*-------------------------------------------------------------------------*/
1040 static void check_status(td_t *td_list)
1041 {
1042         urb_priv_t *lurb_priv = td_list->ed->purb;
1043         int        urb_len    = lurb_priv->length;
1044         __u32      *phwHeadP  = &td_list->ed->hwHeadP;
1045         int        cc;
1046
1047         cc = TD_CC_GET(m32_swap(td_list->hwINFO));
1048         if (cc) {
1049                 err(" USB-error: %s (%x)", cc_to_string[cc], cc);
1050
1051                 invalidate_dcache_ed(td_list->ed);
1052                 if (*phwHeadP & m32_swap(0x1)) {
1053                         if (lurb_priv &&
1054                             ((td_list->index + 1) < urb_len)) {
1055                                 *phwHeadP =
1056                                         (lurb_priv->td[urb_len - 1]->hwNextTD &\
1057                                                         m32_swap(0xfffffff0)) |
1058                                                    (*phwHeadP & m32_swap(0x2));
1059
1060                                 lurb_priv->td_cnt += urb_len -
1061                                                      td_list->index - 1;
1062                         } else
1063                                 *phwHeadP &= m32_swap(0xfffffff2);
1064                         flush_dcache_ed(td_list->ed);
1065                 }
1066         }
1067 }
1068
1069 /* replies to the request have to be on a FIFO basis so
1070  * we reverse the reversed done-list */
1071 static td_t *dl_reverse_done_list(ohci_t *ohci)
1072 {
1073         uintptr_t td_list_hc;
1074         td_t *td_rev = NULL;
1075         td_t *td_list = NULL;
1076
1077         invalidate_dcache_hcca(ohci->hcca);
1078         td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
1079         ohci->hcca->done_head = 0;
1080         flush_dcache_hcca(ohci->hcca);
1081
1082         while (td_list_hc) {
1083                 td_list = (td_t *)td_list_hc;
1084                 invalidate_dcache_td(td_list);
1085                 check_status(td_list);
1086                 td_list->next_dl_td = td_rev;
1087                 td_rev = td_list;
1088                 td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
1089         }
1090         return td_list;
1091 }
1092
1093 /*-------------------------------------------------------------------------*/
1094 /*-------------------------------------------------------------------------*/
1095
1096 static void finish_urb(ohci_t *ohci, urb_priv_t *urb, int status)
1097 {
1098         if ((status & (ED_OPER | ED_UNLINK)) && (urb->state != URB_DEL))
1099                 urb->finished = 1;
1100         else
1101                 dbg("finish_urb: strange.., ED state %x, \n", status);
1102 }
1103
1104 /*
1105  * Used to take back a TD from the host controller. This would normally be
1106  * called from within dl_done_list, however it may be called directly if the
1107  * HC no longer sees the TD and it has not appeared on the donelist (after
1108  * two frames).  This bug has been observed on ZF Micro systems.
1109  */
1110 static int takeback_td(ohci_t *ohci, td_t *td_list)
1111 {
1112         ed_t *ed;
1113         int cc;
1114         int stat = 0;
1115         /* urb_t *urb; */
1116         urb_priv_t *lurb_priv;
1117         __u32 tdINFO, edHeadP, edTailP;
1118
1119         invalidate_dcache_td(td_list);
1120         tdINFO = m32_swap(td_list->hwINFO);
1121
1122         ed = td_list->ed;
1123         lurb_priv = ed->purb;
1124
1125         dl_transfer_length(td_list);
1126
1127         lurb_priv->td_cnt++;
1128
1129         /* error code of transfer */
1130         cc = TD_CC_GET(tdINFO);
1131         if (cc) {
1132                 err("USB-error: %s (%x)", cc_to_string[cc], cc);
1133                 stat = cc_to_error[cc];
1134         }
1135
1136         /* see if this done list makes for all TD's of current URB,
1137         * and mark the URB finished if so */
1138         if (lurb_priv->td_cnt == lurb_priv->length)
1139                 finish_urb(ohci, lurb_priv, ed->state);
1140
1141         dbg("dl_done_list: processing TD %x, len %x\n",
1142                 lurb_priv->td_cnt, lurb_priv->length);
1143
1144         if (ed->state != ED_NEW && (!usb_pipeint(lurb_priv->pipe))) {
1145                 invalidate_dcache_ed(ed);
1146                 edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
1147                 edTailP = m32_swap(ed->hwTailP);
1148
1149                 /* unlink eds if they are not busy */
1150                 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1151                         ep_unlink(ohci, ed);
1152         }
1153         return stat;
1154 }
1155
1156 static int dl_done_list(ohci_t *ohci)
1157 {
1158         int stat = 0;
1159         td_t    *td_list = dl_reverse_done_list(ohci);
1160
1161         while (td_list) {
1162                 td_t    *td_next = td_list->next_dl_td;
1163                 stat = takeback_td(ohci, td_list);
1164                 td_list = td_next;
1165         }
1166         return stat;
1167 }
1168
1169 /*-------------------------------------------------------------------------*
1170  * Virtual Root Hub
1171  *-------------------------------------------------------------------------*/
1172
1173 #include <usbroothubdes.h>
1174
1175 /* Hub class-specific descriptor is constructed dynamically */
1176
1177 /*-------------------------------------------------------------------------*/
1178
1179 #define OK(x)                   len = (x); break
1180 #ifdef DEBUG
1181 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x)); ohci_writel((x), \
1182                                                 &ohci->regs->roothub.status); }
1183 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, \
1184         (x)); ohci_writel((x), &ohci->regs->roothub.portstatus[wIndex-1]); }
1185 #else
1186 #define WR_RH_STAT(x)           ohci_writel((x), &ohci->regs->roothub.status)
1187 #define WR_RH_PORTSTAT(x)       ohci_writel((x), \
1188                                     &ohci->regs->roothub.portstatus[wIndex-1])
1189 #endif
1190 #define RD_RH_STAT              roothub_status(ohci)
1191 #define RD_RH_PORTSTAT          roothub_portstatus(ohci, wIndex-1)
1192
1193 /* request to virtual root hub */
1194
1195 int rh_check_port_status(ohci_t *controller)
1196 {
1197         __u32 temp, ndp, i;
1198         int res;
1199
1200         res = -1;
1201         temp = roothub_a(controller);
1202         ndp = (temp & RH_A_NDP);
1203 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1204         ndp = (ndp == 2) ? 1:0;
1205 #endif
1206         for (i = 0; i < ndp; i++) {
1207                 temp = roothub_portstatus(controller, i);
1208                 /* check for a device disconnect */
1209                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1210                         (RH_PS_PESC | RH_PS_CSC)) &&
1211                         ((temp & RH_PS_CCS) == 0)) {
1212                         res = i;
1213                         break;
1214                 }
1215         }
1216         return res;
1217 }
1218
1219 static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev,
1220         unsigned long pipe, void *buffer, int transfer_len,
1221         struct devrequest *cmd)
1222 {
1223         void *data = buffer;
1224         int leni = transfer_len;
1225         int len = 0;
1226         int stat = 0;
1227         __u16 bmRType_bReq;
1228         __u16 wValue;
1229         __u16 wIndex;
1230         __u16 wLength;
1231         ALLOC_ALIGN_BUFFER(__u8, databuf, 16, sizeof(u32));
1232
1233 #ifdef DEBUG
1234 pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len,
1235           cmd, "SUB(rh)", usb_pipein(pipe));
1236 #else
1237         ohci_mdelay(1);
1238 #endif
1239         if (usb_pipeint(pipe)) {
1240                 info("Root-Hub submit IRQ: NOT implemented");
1241                 return 0;
1242         }
1243
1244         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1245         wValue        = le16_to_cpu(cmd->value);
1246         wIndex        = le16_to_cpu(cmd->index);
1247         wLength       = le16_to_cpu(cmd->length);
1248
1249         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1250                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1251
1252         switch (bmRType_bReq) {
1253         /* Request Destination:
1254            without flags: Device,
1255            RH_INTERFACE: interface,
1256            RH_ENDPOINT: endpoint,
1257            RH_CLASS means HUB here,
1258            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1259         */
1260
1261         case RH_GET_STATUS:
1262                 *(u16 *)databuf = cpu_to_le16(1);
1263                 OK(2);
1264         case RH_GET_STATUS | RH_INTERFACE:
1265                 *(u16 *)databuf = cpu_to_le16(0);
1266                 OK(2);
1267         case RH_GET_STATUS | RH_ENDPOINT:
1268                 *(u16 *)databuf = cpu_to_le16(0);
1269                 OK(2);
1270         case RH_GET_STATUS | RH_CLASS:
1271                 *(u32 *)databuf = cpu_to_le32(
1272                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1273                 OK(4);
1274         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1275                 *(u32 *)databuf = cpu_to_le32(RD_RH_PORTSTAT);
1276                 OK(4);
1277
1278         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1279                 switch (wValue) {
1280                 case (RH_ENDPOINT_STALL):
1281                         OK(0);
1282                 }
1283                 break;
1284
1285         case RH_CLEAR_FEATURE | RH_CLASS:
1286                 switch (wValue) {
1287                 case RH_C_HUB_LOCAL_POWER:
1288                         OK(0);
1289                 case (RH_C_HUB_OVER_CURRENT):
1290                         WR_RH_STAT(RH_HS_OCIC);
1291                         OK(0);
1292                 }
1293                 break;
1294
1295         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1296                 switch (wValue) {
1297                 case (RH_PORT_ENABLE):        WR_RH_PORTSTAT(RH_PS_CCS);  OK(0);
1298                 case (RH_PORT_SUSPEND):       WR_RH_PORTSTAT(RH_PS_POCI); OK(0);
1299                 case (RH_PORT_POWER):         WR_RH_PORTSTAT(RH_PS_LSDA); OK(0);
1300                 case (RH_C_PORT_CONNECTION):  WR_RH_PORTSTAT(RH_PS_CSC);  OK(0);
1301                 case (RH_C_PORT_ENABLE):      WR_RH_PORTSTAT(RH_PS_PESC); OK(0);
1302                 case (RH_C_PORT_SUSPEND):     WR_RH_PORTSTAT(RH_PS_PSSC); OK(0);
1303                 case (RH_C_PORT_OVER_CURRENT):WR_RH_PORTSTAT(RH_PS_OCIC); OK(0);
1304                 case (RH_C_PORT_RESET):       WR_RH_PORTSTAT(RH_PS_PRSC); OK(0);
1305                 }
1306                 break;
1307
1308         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1309                 switch (wValue) {
1310                 case (RH_PORT_SUSPEND):
1311                         WR_RH_PORTSTAT(RH_PS_PSS);  OK(0);
1312                 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1313                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1314                                 WR_RH_PORTSTAT(RH_PS_PRS);
1315                         OK(0);
1316                 case (RH_PORT_POWER):
1317                         WR_RH_PORTSTAT(RH_PS_PPS);
1318                         OK(0);
1319                 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1320                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1321                                 WR_RH_PORTSTAT(RH_PS_PES);
1322                         OK(0);
1323                 }
1324                 break;
1325
1326         case RH_SET_ADDRESS:
1327                 ohci->rh.devnum = wValue;
1328                 OK(0);
1329
1330         case RH_GET_DESCRIPTOR:
1331                 switch ((wValue & 0xff00) >> 8) {
1332                 case (0x01): /* device descriptor */
1333                         len = min_t(unsigned int,
1334                                         leni,
1335                                         min_t(unsigned int,
1336                                         sizeof(root_hub_dev_des),
1337                                         wLength));
1338                         databuf = root_hub_dev_des; OK(len);
1339                 case (0x02): /* configuration descriptor */
1340                         len = min_t(unsigned int,
1341                                         leni,
1342                                         min_t(unsigned int,
1343                                         sizeof(root_hub_config_des),
1344                                         wLength));
1345                         databuf = root_hub_config_des; OK(len);
1346                 case (0x03): /* string descriptors */
1347                         if (wValue == 0x0300) {
1348                                 len = min_t(unsigned int,
1349                                                 leni,
1350                                                 min_t(unsigned int,
1351                                                 sizeof(root_hub_str_index0),
1352                                                 wLength));
1353                                 databuf = root_hub_str_index0;
1354                                 OK(len);
1355                         }
1356                         if (wValue == 0x0301) {
1357                                 len = min_t(unsigned int,
1358                                                 leni,
1359                                                 min_t(unsigned int,
1360                                                 sizeof(root_hub_str_index1),
1361                                                 wLength));
1362                                 databuf = root_hub_str_index1;
1363                                 OK(len);
1364                 }
1365                 default:
1366                         stat = USB_ST_STALLED;
1367                 }
1368                 break;
1369
1370         case RH_GET_DESCRIPTOR | RH_CLASS:
1371         {
1372                 __u32 temp = roothub_a(ohci);
1373
1374                 databuf[0] = 9;         /* min length; */
1375                 databuf[1] = 0x29;
1376                 databuf[2] = temp & RH_A_NDP;
1377 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1378                 databuf[2] = (databuf[2] == 2) ? 1 : 0;
1379 #endif
1380                 databuf[3] = 0;
1381                 if (temp & RH_A_PSM)    /* per-port power switching? */
1382                         databuf[3] |= 0x1;
1383                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1384                         databuf[3] |= 0x10;
1385                 else if (temp & RH_A_OCPM)/* per-port overcurrent reporting? */
1386                         databuf[3] |= 0x8;
1387
1388                 databuf[4] = 0;
1389                 databuf[5] = (temp & RH_A_POTPGT) >> 24;
1390                 databuf[6] = 0;
1391                 temp = roothub_b(ohci);
1392                 databuf[7] = temp & RH_B_DR;
1393                 if (databuf[2] < 7) {
1394                         databuf[8] = 0xff;
1395                 } else {
1396                         databuf[0] += 2;
1397                         databuf[8] = (temp & RH_B_DR) >> 8;
1398                         databuf[10] = databuf[9] = 0xff;
1399                 }
1400
1401                 len = min_t(unsigned int, leni,
1402                             min_t(unsigned int, databuf[0], wLength));
1403                 OK(len);
1404         }
1405
1406         case RH_GET_CONFIGURATION:
1407                 databuf[0] = 0x01;
1408                 OK(1);
1409
1410         case RH_SET_CONFIGURATION:
1411                 WR_RH_STAT(0x10000);
1412                 OK(0);
1413
1414         default:
1415                 dbg("unsupported root hub command");
1416                 stat = USB_ST_STALLED;
1417         }
1418
1419 #ifdef  DEBUG
1420         ohci_dump_roothub(ohci, 1);
1421 #else
1422         ohci_mdelay(1);
1423 #endif
1424
1425         len = min_t(int, len, leni);
1426         if (data != databuf)
1427                 memcpy(data, databuf, len);
1428         dev->act_len = len;
1429         dev->status = stat;
1430
1431 #ifdef DEBUG
1432         pkt_print(ohci, NULL, dev, pipe, buffer,
1433                   transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1434 #else
1435         ohci_mdelay(1);
1436 #endif
1437
1438         return stat;
1439 }
1440
1441 /*-------------------------------------------------------------------------*/
1442
1443 static ohci_dev_t *ohci_get_ohci_dev(ohci_t *ohci, int devnum, int intr)
1444 {
1445         int i;
1446
1447         if (!intr)
1448                 return &ohci->ohci_dev;
1449
1450         /* First see if we already have an ohci_dev for this dev. */
1451         for (i = 0; i < NUM_INT_DEVS; i++) {
1452                 if (ohci->int_dev[i].devnum == devnum)
1453                         return &ohci->int_dev[i];
1454         }
1455
1456         /* If not then find a free one. */
1457         for (i = 0; i < NUM_INT_DEVS; i++) {
1458                 if (ohci->int_dev[i].devnum == -1) {
1459                         ohci->int_dev[i].devnum = devnum;
1460                         return &ohci->int_dev[i];
1461                 }
1462         }
1463
1464         printf("ohci: Error out of ohci_devs for interrupt endpoints\n");
1465         return NULL;
1466 }
1467
1468 /* common code for handling submit messages - used for all but root hub */
1469 /* accesses. */
1470 static urb_priv_t *ohci_alloc_urb(struct usb_device *dev, unsigned long pipe,
1471                 void *buffer, int transfer_len, int interval)
1472 {
1473         urb_priv_t *urb;
1474
1475         urb = calloc(1, sizeof(urb_priv_t));
1476         if (!urb) {
1477                 printf("ohci: Error out of memory allocating urb\n");
1478                 return NULL;
1479         }
1480
1481         urb->dev = dev;
1482         urb->pipe = pipe;
1483         urb->transfer_buffer = buffer;
1484         urb->transfer_buffer_length = transfer_len;
1485         urb->interval = interval;
1486
1487         return urb;
1488 }
1489
1490 static int submit_common_msg(ohci_t *ohci, struct usb_device *dev,
1491                 unsigned long pipe, void *buffer, int transfer_len,
1492                 struct devrequest *setup, int interval)
1493 {
1494         int stat = 0;
1495         int maxsize = usb_maxpacket(dev, pipe);
1496         int timeout;
1497         urb_priv_t *urb;
1498         ohci_dev_t *ohci_dev;
1499
1500         urb = ohci_alloc_urb(dev, pipe, buffer, transfer_len, interval);
1501         if (!urb)
1502                 return -ENOMEM;
1503
1504 #ifdef DEBUG
1505         urb->actual_length = 0;
1506         pkt_print(ohci, urb, dev, pipe, buffer, transfer_len,
1507                   setup, "SUB", usb_pipein(pipe));
1508 #else
1509         ohci_mdelay(1);
1510 #endif
1511         if (!maxsize) {
1512                 err("submit_common_message: pipesize for pipe %lx is zero",
1513                         pipe);
1514                 return -1;
1515         }
1516
1517         ohci_dev = ohci_get_ohci_dev(ohci, dev->devnum, usb_pipeint(pipe));
1518         if (!ohci_dev)
1519                 return -ENOMEM;
1520
1521         if (sohci_submit_job(ohci, ohci_dev, urb, setup) < 0) {
1522                 err("sohci_submit_job failed");
1523                 return -1;
1524         }
1525
1526         mdelay(10);
1527         /* ohci_dump_status(ohci); */
1528
1529         timeout = USB_TIMEOUT_MS(pipe);
1530
1531         /* wait for it to complete */
1532         for (;;) {
1533                 /* check whether the controller is done */
1534                 stat = hc_interrupt(ohci);
1535                 if (stat < 0) {
1536                         stat = USB_ST_CRC_ERR;
1537                         break;
1538                 }
1539
1540                 /* NOTE: since we are not interrupt driven in U-Boot and always
1541                  * handle only one URB at a time, we cannot assume the
1542                  * transaction finished on the first successful return from
1543                  * hc_interrupt().. unless the flag for current URB is set,
1544                  * meaning that all TD's to/from device got actually
1545                  * transferred and processed. If the current URB is not
1546                  * finished we need to re-iterate this loop so as
1547                  * hc_interrupt() gets called again as there needs to be some
1548                  * more TD's to process still */
1549                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1550                         /* 0xff is returned for an SF-interrupt */
1551                         break;
1552                 }
1553
1554                 if (--timeout) {
1555                         mdelay(1);
1556                         if (!urb->finished)
1557                                 dbg("*");
1558
1559                 } else {
1560                         if (!usb_pipeint(pipe))
1561                                 err("CTL:TIMEOUT ");
1562                         dbg("submit_common_msg: TO status %x\n", stat);
1563                         urb->finished = 1;
1564                         stat = USB_ST_CRC_ERR;
1565                         break;
1566                 }
1567         }
1568
1569         dev->status = stat;
1570         dev->act_len = urb->actual_length;
1571
1572         if (usb_pipein(pipe) && dev->status == 0 && dev->act_len)
1573                 invalidate_dcache_buffer(buffer, dev->act_len);
1574
1575 #ifdef DEBUG
1576         pkt_print(ohci, urb, dev, pipe, buffer, transfer_len,
1577                   setup, "RET(ctlr)", usb_pipein(pipe));
1578 #else
1579         ohci_mdelay(1);
1580 #endif
1581         urb_free_priv(urb);
1582         return 0;
1583 }
1584
1585 #define MAX_INT_QUEUESIZE 8
1586
1587 struct int_queue {
1588         int queuesize;
1589         int curr_urb;
1590         urb_priv_t *urb[MAX_INT_QUEUESIZE];
1591 };
1592
1593 static struct int_queue *_ohci_create_int_queue(ohci_t *ohci,
1594                 struct usb_device *udev, unsigned long pipe, int queuesize,
1595                 int elementsize, void *buffer, int interval)
1596 {
1597         struct int_queue *queue;
1598         ohci_dev_t *ohci_dev;
1599         int i;
1600
1601         if (queuesize > MAX_INT_QUEUESIZE)
1602                 return NULL;
1603
1604         ohci_dev = ohci_get_ohci_dev(ohci, udev->devnum, 1);
1605         if (!ohci_dev)
1606                 return NULL;
1607
1608         queue = malloc(sizeof(*queue));
1609         if (!queue) {
1610                 printf("ohci: Error out of memory allocating int queue\n");
1611                 return NULL;
1612         }
1613
1614         for (i = 0; i < queuesize; i++) {
1615                 queue->urb[i] = ohci_alloc_urb(udev, pipe,
1616                                                buffer + i * elementsize,
1617                                                elementsize, interval);
1618                 if (!queue->urb[i])
1619                         break;
1620
1621                 if (sohci_submit_job(ohci, ohci_dev, queue->urb[i], NULL)) {
1622                         printf("ohci: Error submitting int queue job\n");
1623                         urb_free_priv(queue->urb[i]);
1624                         break;
1625                 }
1626         }
1627         if (i == 0) {
1628                 /* We did not succeed in submitting even 1 urb */
1629                 free(queue);
1630                 return NULL;
1631         }
1632
1633         queue->queuesize = i;
1634         queue->curr_urb = 0;
1635
1636         return queue;
1637 }
1638
1639 static void *_ohci_poll_int_queue(ohci_t *ohci, struct usb_device *udev,
1640                                   struct int_queue *queue)
1641 {
1642         if (queue->curr_urb == queue->queuesize)
1643                 return NULL; /* Queue depleted */
1644
1645         if (hc_interrupt(ohci) < 0)
1646                 return NULL;
1647
1648         if (queue->urb[queue->curr_urb]->finished) {
1649                 void *ret = queue->urb[queue->curr_urb]->transfer_buffer;
1650                 queue->curr_urb++;
1651                 return ret;
1652         }
1653
1654         return NULL;
1655 }
1656
1657 static int _ohci_destroy_int_queue(ohci_t *ohci, struct usb_device *dev,
1658                                    struct int_queue *queue)
1659 {
1660         int i;
1661
1662         for (i = 0; i < queue->queuesize; i++)
1663                 urb_free_priv(queue->urb[i]);
1664
1665         free(queue);
1666
1667         return 0;
1668 }
1669
1670 #if !CONFIG_IS_ENABLED(DM_USB)
1671 /* submit routines called from usb.c */
1672 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1673                 int transfer_len)
1674 {
1675         info("submit_bulk_msg");
1676         return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len,
1677                                  NULL, 0);
1678 }
1679
1680 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1681                 int transfer_len, int interval, bool nonblock)
1682 {
1683         info("submit_int_msg");
1684         return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len, NULL,
1685                         interval);
1686 }
1687
1688 struct int_queue *create_int_queue(struct usb_device *dev,
1689                 unsigned long pipe, int queuesize, int elementsize,
1690                 void *buffer, int interval)
1691 {
1692         return _ohci_create_int_queue(&gohci, dev, pipe, queuesize,
1693                                       elementsize, buffer, interval);
1694 }
1695
1696 void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1697 {
1698         return _ohci_poll_int_queue(&gohci, dev, queue);
1699 }
1700
1701 int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1702 {
1703         return _ohci_destroy_int_queue(&gohci, dev, queue);
1704 }
1705 #endif
1706
1707 static int _ohci_submit_control_msg(ohci_t *ohci, struct usb_device *dev,
1708         unsigned long pipe, void *buffer, int transfer_len,
1709         struct devrequest *setup)
1710 {
1711         int maxsize = usb_maxpacket(dev, pipe);
1712
1713         info("submit_control_msg");
1714 #ifdef DEBUG
1715         pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len,
1716                   setup, "SUB", usb_pipein(pipe));
1717 #else
1718         ohci_mdelay(1);
1719 #endif
1720         if (!maxsize) {
1721                 err("submit_control_message: pipesize for pipe %lx is zero",
1722                         pipe);
1723                 return -1;
1724         }
1725         if (((pipe >> 8) & 0x7f) == ohci->rh.devnum) {
1726                 ohci->rh.dev = dev;
1727                 /* root hub - redirect */
1728                 return ohci_submit_rh_msg(ohci, dev, pipe, buffer,
1729                                           transfer_len, setup);
1730         }
1731
1732         return submit_common_msg(ohci, dev, pipe, buffer, transfer_len,
1733                                  setup, 0);
1734 }
1735
1736 /*-------------------------------------------------------------------------*
1737  * HC functions
1738  *-------------------------------------------------------------------------*/
1739
1740 /* reset the HC and BUS */
1741
1742 static int hc_reset(ohci_t *ohci)
1743 {
1744 #ifdef CONFIG_PCI_EHCI_DEVNO
1745         pci_dev_t pdev;
1746 #endif
1747         int timeout = 30;
1748         int smm_timeout = 50; /* 0,5 sec */
1749
1750         dbg("%s\n", __FUNCTION__);
1751
1752 #ifdef CONFIG_PCI_EHCI_DEVNO
1753         /*
1754          *  Some multi-function controllers (e.g. ISP1562) allow root hub
1755          * resetting via EHCI registers only.
1756          */
1757         pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVNO);
1758         if (pdev != -1) {
1759                 u32 base;
1760                 int timeout = 1000;
1761
1762                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1763                 base += EHCI_USBCMD_OFF;
1764                 ohci_writel(ohci_readl(base) | EHCI_USBCMD_HCRESET, base);
1765
1766                 while (ohci_readl(base) & EHCI_USBCMD_HCRESET) {
1767                         if (timeout-- <= 0) {
1768                                 printf("USB RootHub reset timed out!");
1769                                 break;
1770                         }
1771                         udelay(1);
1772                 }
1773         } else
1774                 printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
1775 #endif
1776         if (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1777                 /* SMM owns the HC, request ownership */
1778                 ohci_writel(OHCI_OCR, &ohci->regs->cmdstatus);
1779                 info("USB HC TakeOver from SMM");
1780                 while (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1781                         mdelay(10);
1782                         if (--smm_timeout == 0) {
1783                                 err("USB HC TakeOver failed!");
1784                                 return -1;
1785                         }
1786                 }
1787         }
1788
1789         /* Disable HC interrupts */
1790         ohci_writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
1791
1792         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1793                 ohci->slot_name,
1794                 ohci_readl(&ohci->regs->control));
1795
1796         /* Reset USB (needed by some controllers) */
1797         ohci->hc_control = 0;
1798         ohci_writel(ohci->hc_control, &ohci->regs->control);
1799
1800         /* HC Reset requires max 10 us delay */
1801         ohci_writel(OHCI_HCR,  &ohci->regs->cmdstatus);
1802         while ((ohci_readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1803                 if (--timeout == 0) {
1804                         err("USB HC reset timed out!");
1805                         return -1;
1806                 }
1807                 udelay(1);
1808         }
1809         return 0;
1810 }
1811
1812 /*-------------------------------------------------------------------------*/
1813
1814 /* Start an OHCI controller, set the BUS operational
1815  * enable interrupts
1816  * connect the virtual root hub */
1817
1818 static int hc_start(ohci_t *ohci)
1819 {
1820         __u32 mask;
1821         unsigned int fminterval;
1822         int i;
1823
1824         ohci->disabled = 1;
1825         for (i = 0; i < NUM_INT_DEVS; i++)
1826                 ohci->int_dev[i].devnum = -1;
1827
1828         /* Tell the controller where the control and bulk lists are
1829          * The lists are empty now. */
1830
1831         ohci_writel(0, &ohci->regs->ed_controlhead);
1832         ohci_writel(0, &ohci->regs->ed_bulkhead);
1833
1834         ohci_writel((uintptr_t)ohci->hcca,
1835                     &ohci->regs->hcca); /* reset clears this */
1836
1837         fminterval = 0x2edf;
1838         ohci_writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
1839         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1840         ohci_writel(fminterval, &ohci->regs->fminterval);
1841         ohci_writel(0x628, &ohci->regs->lsthresh);
1842
1843         /* start controller operations */
1844         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1845         ohci->disabled = 0;
1846         ohci_writel(ohci->hc_control, &ohci->regs->control);
1847
1848         /* disable all interrupts */
1849         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1850                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1851                         OHCI_INTR_OC | OHCI_INTR_MIE);
1852         ohci_writel(mask, &ohci->regs->intrdisable);
1853         /* clear all interrupts */
1854         mask &= ~OHCI_INTR_MIE;
1855         ohci_writel(mask, &ohci->regs->intrstatus);
1856         /* Choose the interrupts we care about now  - but w/o MIE */
1857         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1858         ohci_writel(mask, &ohci->regs->intrenable);
1859
1860 #ifdef  OHCI_USE_NPS
1861         /* required for AMD-756 and some Mac platforms */
1862         ohci_writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1863                 &ohci->regs->roothub.a);
1864         ohci_writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1865 #endif  /* OHCI_USE_NPS */
1866
1867         /* connect the virtual root hub */
1868         ohci->rh.devnum = 0;
1869
1870         return 0;
1871 }
1872
1873 /*-------------------------------------------------------------------------*/
1874
1875 /* an interrupt happens */
1876
1877 static int hc_interrupt(ohci_t *ohci)
1878 {
1879         struct ohci_regs *regs = ohci->regs;
1880         int ints;
1881         int stat = -1;
1882
1883         invalidate_dcache_hcca(ohci->hcca);
1884
1885         if ((ohci->hcca->done_head != 0) &&
1886                                 !(m32_swap(ohci->hcca->done_head) & 0x01)) {
1887                 ints =  OHCI_INTR_WDH;
1888         } else {
1889                 ints = ohci_readl(&regs->intrstatus);
1890                 if (ints == ~(u32)0) {
1891                         ohci->disabled++;
1892                         err("%s device removed!", ohci->slot_name);
1893                         return -1;
1894                 } else {
1895                         ints &= ohci_readl(&regs->intrenable);
1896                         if (ints == 0) {
1897                                 dbg("hc_interrupt: returning..\n");
1898                                 return 0xff;
1899                         }
1900                 }
1901         }
1902
1903         /* dbg("Interrupt: %x frame: %x", ints,
1904                                         le16_to_cpu(ohci->hcca->frame_no)); */
1905
1906         if (ints & OHCI_INTR_RHSC)
1907                 stat = 0xff;
1908
1909         if (ints & OHCI_INTR_UE) {
1910                 ohci->disabled++;
1911                 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1912                         ohci->slot_name);
1913                 /* e.g. due to PCI Master/Target Abort */
1914
1915 #ifdef  DEBUG
1916                 ohci_dump(ohci, 1);
1917 #else
1918                 ohci_mdelay(1);
1919 #endif
1920                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1921                 /* Make some non-interrupt context restart the controller. */
1922                 /* Count and limit the retries though; either hardware or */
1923                 /* software errors can go forever... */
1924                 hc_reset(ohci);
1925                 return -1;
1926         }
1927
1928         if (ints & OHCI_INTR_WDH) {
1929                 ohci_mdelay(1);
1930                 ohci_writel(OHCI_INTR_WDH, &regs->intrdisable);
1931                 (void)ohci_readl(&regs->intrdisable); /* flush */
1932                 stat = dl_done_list(ohci);
1933                 ohci_writel(OHCI_INTR_WDH, &regs->intrenable);
1934                 (void)ohci_readl(&regs->intrdisable); /* flush */
1935         }
1936
1937         if (ints & OHCI_INTR_SO) {
1938                 dbg("USB Schedule overrun\n");
1939                 ohci_writel(OHCI_INTR_SO, &regs->intrenable);
1940                 stat = -1;
1941         }
1942
1943         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1944         if (ints & OHCI_INTR_SF) {
1945                 unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
1946                 mdelay(1);
1947                 ohci_writel(OHCI_INTR_SF, &regs->intrdisable);
1948                 if (ohci->ed_rm_list[frame] != NULL)
1949                         ohci_writel(OHCI_INTR_SF, &regs->intrenable);
1950                 stat = 0xff;
1951         }
1952
1953         ohci_writel(ints, &regs->intrstatus);
1954         return stat;
1955 }
1956
1957 /*-------------------------------------------------------------------------*/
1958
1959 #if !CONFIG_IS_ENABLED(DM_USB)
1960
1961 /*-------------------------------------------------------------------------*/
1962
1963 /* De-allocate all resources.. */
1964
1965 static void hc_release_ohci(ohci_t *ohci)
1966 {
1967         dbg("USB HC release ohci usb-%s", ohci->slot_name);
1968
1969         if (!ohci->disabled)
1970                 hc_reset(ohci);
1971 }
1972
1973 /*-------------------------------------------------------------------------*/
1974
1975 /*
1976  * low level initalisation routine, called from usb.c
1977  */
1978 static char ohci_inited = 0;
1979
1980 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1981 {
1982         memset(&gohci, 0, sizeof(ohci_t));
1983
1984         /* align the storage */
1985         if ((__u32)&ghcca[0] & 0xff) {
1986                 err("HCCA not aligned!!");
1987                 return -1;
1988         }
1989         gohci.hcca = &ghcca[0];
1990         info("aligned ghcca %p", gohci.hcca);
1991         memset(gohci.hcca, 0, sizeof(struct ohci_hcca));
1992
1993         gohci.disabled = 1;
1994         gohci.sleeping = 0;
1995         gohci.irq = -1;
1996         gohci.regs = (struct ohci_regs *)CFG_SYS_USB_OHCI_REGS_BASE;
1997
1998         gohci.flags = 0;
1999         gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME;
2000
2001         if (hc_reset (&gohci) < 0) {
2002                 hc_release_ohci (&gohci);
2003                 err ("can't reset usb-%s", gohci.slot_name);
2004                 return -1;
2005         }
2006
2007         if (hc_start(&gohci) < 0) {
2008                 err("can't start usb-%s", gohci.slot_name);
2009                 hc_release_ohci(&gohci);
2010                 /* Initialization failed */
2011                 return -1;
2012         }
2013
2014 #ifdef  DEBUG
2015         ohci_dump(&gohci, 1);
2016 #else
2017         ohci_mdelay(1);
2018 #endif
2019         ohci_inited = 1;
2020         return 0;
2021 }
2022
2023 int usb_lowlevel_stop(int index)
2024 {
2025         /* this gets called really early - before the controller has */
2026         /* even been initialized! */
2027         if (!ohci_inited)
2028                 return 0;
2029         /* TODO release any interrupts, etc. */
2030         /* call hc_release_ohci() here ? */
2031         hc_reset(&gohci);
2032
2033         /* This driver is no longer initialised. It needs a new low-level
2034          * init (board/cpu) before it can be used again. */
2035         ohci_inited = 0;
2036         return 0;
2037 }
2038
2039 int submit_control_msg(struct usb_device *dev, unsigned long pipe,
2040         void *buffer, int transfer_len, struct devrequest *setup)
2041 {
2042         return _ohci_submit_control_msg(&gohci, dev, pipe, buffer,
2043                                         transfer_len, setup);
2044 }
2045 #endif
2046
2047 #if CONFIG_IS_ENABLED(DM_USB)
2048 static int ohci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
2049                                    unsigned long pipe, void *buffer, int length,
2050                                    struct devrequest *setup)
2051 {
2052         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2053
2054         return _ohci_submit_control_msg(ohci, udev, pipe, buffer,
2055                                         length, setup);
2056 }
2057
2058 static int ohci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
2059                                 unsigned long pipe, void *buffer, int length)
2060 {
2061         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2062
2063         return submit_common_msg(ohci, udev, pipe, buffer, length, NULL, 0);
2064 }
2065
2066 static int ohci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
2067                                unsigned long pipe, void *buffer, int length,
2068                                int interval, bool nonblock)
2069 {
2070         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2071
2072         return submit_common_msg(ohci, udev, pipe, buffer, length,
2073                                  NULL, interval);
2074 }
2075
2076 static struct int_queue *ohci_create_int_queue(struct udevice *dev,
2077                 struct usb_device *udev, unsigned long pipe, int queuesize,
2078                 int elementsize, void *buffer, int interval)
2079 {
2080         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2081
2082         return _ohci_create_int_queue(ohci, udev, pipe, queuesize, elementsize,
2083                                       buffer, interval);
2084 }
2085
2086 static void *ohci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
2087                                  struct int_queue *queue)
2088 {
2089         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2090
2091         return _ohci_poll_int_queue(ohci, udev, queue);
2092 }
2093
2094 static int ohci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
2095                                   struct int_queue *queue)
2096 {
2097         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2098
2099         return _ohci_destroy_int_queue(ohci, udev, queue);
2100 }
2101
2102 int ohci_register(struct udevice *dev, struct ohci_regs *regs)
2103 {
2104         struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
2105         ohci_t *ohci = dev_get_priv(dev);
2106         u32 reg;
2107
2108         priv->desc_before_addr = true;
2109
2110         ohci->regs = regs;
2111         ohci->hcca = memalign(256, sizeof(struct ohci_hcca));
2112         if (!ohci->hcca)
2113                 return -ENOMEM;
2114         memset(ohci->hcca, 0, sizeof(struct ohci_hcca));
2115         flush_dcache_hcca(ohci->hcca);
2116
2117         if (hc_reset(ohci) < 0)
2118                 return -EIO;
2119
2120         if (hc_start(ohci) < 0)
2121                 return -EIO;
2122
2123         reg = ohci_readl(&regs->revision);
2124         printf("USB OHCI %x.%x\n", (reg >> 4) & 0xf, reg & 0xf);
2125
2126         return 0;
2127 }
2128
2129 int ohci_deregister(struct udevice *dev)
2130 {
2131         ohci_t *ohci = dev_get_priv(dev);
2132
2133         if (hc_reset(ohci) < 0)
2134                 return -EIO;
2135
2136         free(ohci->hcca);
2137
2138         return 0;
2139 }
2140
2141 struct dm_usb_ops ohci_usb_ops = {
2142         .control = ohci_submit_control_msg,
2143         .bulk = ohci_submit_bulk_msg,
2144         .interrupt = ohci_submit_int_msg,
2145         .create_int_queue = ohci_create_int_queue,
2146         .poll_int_queue = ohci_poll_int_queue,
2147         .destroy_int_queue = ohci_destroy_int_queue,
2148 };
2149
2150 #endif