drivers/usb/host/ohci-hcd.c

   1 /*
   2  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
   3  *
   4  * Interrupt support is added. Now, it has been tested
   5  * on ULI1575 chip and works well with USB keyboard.
   6  *
   7  * (C) Copyright 2007
   8  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
   9  *
  10  * (C) Copyright 2003
  11  * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
  12  *
  13  * Note: Much of this code has been derived from Linux 2.4
  14  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  15  * (C) Copyright 2000-2002 David Brownell
  16  *
  17  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  18  * ebenard@eukrea.com - based on s3c24x0's driver
  19  *
  20  * SPDX-License-Identifier:     GPL-2.0+
  21  */
  22 /*
  23  * IMPORTANT NOTES
  24  * 1 - Read doc/README.generic_usb_ohci
  25  * 2 - this driver is intended for use with USB Mass Storage Devices
  26  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
  27  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  28  *     to activate workaround for bug #41 or this driver will NOT work!
  29  */
  30
  31 #include <common.h>
  32 #include <asm/byteorder.h>
  33 #include <dm.h>
  34 #include <errno.h>
  35
  36 #if defined(CONFIG_PCI_OHCI)
  37 # include <pci.h>
  38 #if !defined(CONFIG_PCI_OHCI_DEVNO)
  39 #define CONFIG_PCI_OHCI_DEVNO   0
  40 #endif
  41 #endif
  42
  43 #include <malloc.h>
  44 #include <memalign.h>
  45 #include <usb.h>
  46
  47 #include "ohci.h"
  48
  49 #ifdef CONFIG_AT91RM9200
  50 #include <asm/arch/hardware.h>  /* needed for AT91_USB_HOST_BASE */
  51 #endif
  52
  53 #if defined(CONFIG_CPU_ARM920T) || \
  54     defined(CONFIG_440EP) || \
  55     defined(CONFIG_PCI_OHCI) || \
  56     defined(CONFIG_MPC5200) || \
  57     defined(CONFIG_SYS_OHCI_USE_NPS)
  58 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
  59 #endif
  60
  61 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  62 #undef DEBUG
  63 #undef SHOW_INFO
  64 #undef OHCI_FILL_TRACE
  65
  66 /* For initializing controller (mask in an HCFS mode too) */
  67 #define OHCI_CONTROL_INIT \
  68         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  69
  70 #ifdef CONFIG_PCI_OHCI
  71 static struct pci_device_id ohci_pci_ids[] = {
  72         {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
  73         {0x1033, 0x0035},       /* NEC PCI OHCI module ids */
  74         {0x1131, 0x1561},       /* Philips 1561 PCI OHCI module ids */
  75         /* Please add supported PCI OHCI controller ids here */
  76         {0, 0}
  77 };
  78 #endif
  79
  80 #ifdef CONFIG_PCI_EHCI_DEVNO
  81 static struct pci_device_id ehci_pci_ids[] = {
  82         {0x1131, 0x1562},       /* Philips 1562 PCI EHCI module ids */
  83         /* Please add supported PCI EHCI controller ids here */
  84         {0, 0}
  85 };
  86 #endif
  87
  88 #ifdef DEBUG
  89 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  90 #else
  91 #define dbg(format, arg...) do {} while (0)
  92 #endif /* DEBUG */
  93 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  94 #ifdef SHOW_INFO
  95 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  96 #else
  97 #define info(format, arg...) do {} while (0)
  98 #endif
  99
 100 #ifdef CONFIG_SYS_OHCI_BE_CONTROLLER
 101 # define m16_swap(x) cpu_to_be16(x)
 102 # define m32_swap(x) cpu_to_be32(x)
 103 #else
 104 # define m16_swap(x) cpu_to_le16(x)
 105 # define m32_swap(x) cpu_to_le32(x)
 106 #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
 107
 108 /* We really should do proper cache flushing everywhere */
 109 #define flush_dcache_buffer(addr, size) \
 110         flush_dcache_range((unsigned long)(addr), \
 111                 ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
 112 #define invalidate_dcache_buffer(addr, size) \
 113         invalidate_dcache_range((unsigned long)(addr), \
 114                 ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
 115
 116 /* Do not use sizeof(ed / td) as our ed / td structs contain extra members */
 117 #define flush_dcache_ed(addr) flush_dcache_buffer(addr, 16)
 118 #define flush_dcache_td(addr) flush_dcache_buffer(addr, 16)
 119 #define flush_dcache_iso_td(addr) flush_dcache_buffer(addr, 32)
 120 #define flush_dcache_hcca(addr) flush_dcache_buffer(addr, 256)
 121 #define invalidate_dcache_ed(addr) invalidate_dcache_buffer(addr, 16)
 122 #define invalidate_dcache_td(addr) invalidate_dcache_buffer(addr, 16)
 123 #define invalidate_dcache_iso_td(addr) invalidate_dcache_buffer(addr, 32)
 124 #define invalidate_dcache_hcca(addr) invalidate_dcache_buffer(addr, 256)
 125
 126 #ifdef CONFIG_DM_USB
 127 /*
 128  * The various ohci_mdelay(1) calls in the code seem unnecessary. We keep
 129  * them around when building for older boards not yet converted to the dm
 130  * just in case (to avoid regressions), for dm this turns them into nops.
 131  */
 132 #define ohci_mdelay(x)
 133 #else
 134 #define ohci_mdelay(x) mdelay(x)
 135 #endif
 136
 137 #ifndef CONFIG_DM_USB
 138 /* global ohci_t */
 139 static ohci_t gohci;
 140 /* this must be aligned to a 256 byte boundary */
 141 struct ohci_hcca ghcca[1];
 142 #endif
 143
 144 /* mapping of the OHCI CC status to error codes */
 145 static int cc_to_error[16] = {
 146         /* No  Error  */               0,
 147         /* CRC Error  */               USB_ST_CRC_ERR,
 148         /* Bit Stuff  */               USB_ST_BIT_ERR,
 149         /* Data Togg  */               USB_ST_CRC_ERR,
 150         /* Stall      */               USB_ST_STALLED,
 151         /* DevNotResp */               -1,
 152         /* PIDCheck   */               USB_ST_BIT_ERR,
 153         /* UnExpPID   */               USB_ST_BIT_ERR,
 154         /* DataOver   */               USB_ST_BUF_ERR,
 155         /* DataUnder  */               USB_ST_BUF_ERR,
 156         /* reservd    */               -1,
 157         /* reservd    */               -1,
 158         /* BufferOver */               USB_ST_BUF_ERR,
 159         /* BuffUnder  */               USB_ST_BUF_ERR,
 160         /* Not Access */               -1,
 161         /* Not Access */               -1
 162 };
 163
 164 static const char *cc_to_string[16] = {
 165         "No Error",
 166         "CRC: Last data packet from endpoint contained a CRC error.",
 167         "BITSTUFFING: Last data packet from endpoint contained a bit " \
 168                      "stuffing violation",
 169         "DATATOGGLEMISMATCH: Last packet from endpoint had data toggle PID\n" \
 170                      "that did not match the expected value.",
 171         "STALL: TD was moved to the Done Queue because the endpoint returned" \
 172                      " a STALL PID",
 173         "DEVICENOTRESPONDING: Device did not respond to token (IN) or did\n" \
 174                      "not provide a handshake (OUT)",
 175         "PIDCHECKFAILURE: Check bits on PID from endpoint failed on data PID\n"\
 176                      "(IN) or handshake (OUT)",
 177         "UNEXPECTEDPID: Receive PID was not valid when encountered or PID\n" \
 178                      "value is not defined.",
 179         "DATAOVERRUN: The amount of data returned by the endpoint exceeded\n" \
 180                      "either the size of the maximum data packet allowed\n" \
 181                      "from the endpoint (found in MaximumPacketSize field\n" \
 182                      "of ED) or the remaining buffer size.",
 183         "DATAUNDERRUN: The endpoint returned less than MaximumPacketSize\n" \
 184                      "and that amount was not sufficient to fill the\n" \
 185                      "specified buffer",
 186         "reserved1",
 187         "reserved2",
 188         "BUFFEROVERRUN: During an IN, HC received data from endpoint faster\n" \
 189                      "than it could be written to system memory",
 190         "BUFFERUNDERRUN: During an OUT, HC could not retrieve data from\n" \
 191                      "system memory fast enough to keep up with data USB " \
 192                      "data rate.",
 193         "NOT ACCESSED: This code is set by software before the TD is placed" \
 194                      "on a list to be processed by the HC.(1)",
 195         "NOT ACCESSED: This code is set by software before the TD is placed" \
 196                      "on a list to be processed by the HC.(2)",
 197 };
 198
 199 static inline u32 roothub_a(struct ohci *hc)
 200         { return ohci_readl(&hc->regs->roothub.a); }
 201 static inline u32 roothub_b(struct ohci *hc)
 202         { return ohci_readl(&hc->regs->roothub.b); }
 203 static inline u32 roothub_status(struct ohci *hc)
 204         { return ohci_readl(&hc->regs->roothub.status); }
 205 static inline u32 roothub_portstatus(struct ohci *hc, int i)
 206         { return ohci_readl(&hc->regs->roothub.portstatus[i]); }
 207
 208 /* forward declaration */
 209 static int hc_interrupt(ohci_t *ohci);
 210 static void td_submit_job(ohci_t *ohci, struct usb_device *dev,
 211                           unsigned long pipe, void *buffer, int transfer_len,
 212                           struct devrequest *setup, urb_priv_t *urb,
 213                           int interval);
 214 static int ep_link(ohci_t * ohci, ed_t * ed);
 215 static int ep_unlink(ohci_t * ohci, ed_t * ed);
 216 static ed_t *ep_add_ed(ohci_dev_t *ohci_dev, struct usb_device *usb_dev,
 217                        unsigned long pipe, int interval, int load);
 218
 219 /*-------------------------------------------------------------------------*/
 220
 221 /* TDs ... */
 222 static struct td *td_alloc(ohci_dev_t *ohci_dev, struct usb_device *usb_dev)
 223 {
 224         int i;
 225         struct td *td;
 226
 227         td = NULL;
 228         for (i = 0; i < NUM_TD; i++)
 229         {
 230                 if (ohci_dev->tds[i].usb_dev == NULL)
 231                 {
 232                         td = &ohci_dev->tds[i];
 233                         td->usb_dev = usb_dev;
 234                         break;
 235                 }
 236         }
 237
 238         return td;
 239 }
 240
 241 static inline void ed_free(struct ed *ed)
 242 {
 243         ed->usb_dev = NULL;
 244 }
 245
 246 /*-------------------------------------------------------------------------*
 247  * URB support functions
 248  *-------------------------------------------------------------------------*/
 249
 250 /* free HCD-private data associated with this URB */
 251
 252 static void urb_free_priv(urb_priv_t *urb)
 253 {
 254         int             i;
 255         int             last;
 256         struct td       *td;
 257
 258         last = urb->length - 1;
 259         if (last >= 0) {
 260                 for (i = 0; i <= last; i++) {
 261                         td = urb->td[i];
 262                         if (td) {
 263                                 td->usb_dev = NULL;
 264                                 urb->td[i] = NULL;
 265                         }
 266                 }
 267         }
 268         free(urb);
 269 }
 270
 271 /*-------------------------------------------------------------------------*/
 272
 273 #ifdef DEBUG
 274 static int sohci_get_current_frame_number(ohci_t *ohci);
 275
 276 /* debug| print the main components of an URB
 277  * small: 0) header + data packets 1) just header */
 278
 279 static void pkt_print(ohci_t *ohci, urb_priv_t *purb, struct usb_device *dev,
 280                       unsigned long pipe, void *buffer, int transfer_len,
 281                       struct devrequest *setup, char *str, int small)
 282 {
 283         dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx",
 284                         str,
 285                         sohci_get_current_frame_number(ohci),
 286                         usb_pipedevice(pipe),
 287                         usb_pipeendpoint(pipe),
 288                         usb_pipeout(pipe)? 'O': 'I',
 289                         usb_pipetype(pipe) < 2 ? \
 290                                 (usb_pipeint(pipe)? "INTR": "ISOC"): \
 291                                 (usb_pipecontrol(pipe)? "CTRL": "BULK"),
 292                         (purb ? purb->actual_length : 0),
 293                         transfer_len, dev->status);
 294 #ifdef  OHCI_VERBOSE_DEBUG
 295         if (!small) {
 296                 int i, len;
 297
 298                 if (usb_pipecontrol(pipe)) {
 299                         printf(__FILE__ ": cmd(8):");
 300                         for (i = 0; i < 8 ; i++)
 301                                 printf(" %02x", ((__u8 *) setup) [i]);
 302                         printf("\n");
 303                 }
 304                 if (transfer_len > 0 && buffer) {
 305                         printf(__FILE__ ": data(%d/%d):",
 306                                 (purb ? purb->actual_length : 0),
 307                                 transfer_len);
 308                         len = usb_pipeout(pipe)? transfer_len:
 309                                         (purb ? purb->actual_length : 0);
 310                         for (i = 0; i < 16 && i < len; i++)
 311                                 printf(" %02x", ((__u8 *) buffer) [i]);
 312                         printf("%s\n", i < len? "...": "");
 313                 }
 314         }
 315 #endif
 316 }
 317
 318 /* just for debugging; prints non-empty branches of the int ed tree
 319  * inclusive iso eds */
 320 void ep_print_int_eds(ohci_t *ohci, char *str)
 321 {
 322         int i, j;
 323          __u32 *ed_p;
 324         for (i = 0; i < 32; i++) {
 325                 j = 5;
 326                 ed_p = &(ohci->hcca->int_table [i]);
 327                 if (*ed_p == 0)
 328                     continue;
 329                 invalidate_dcache_ed(ed_p);
 330                 printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
 331                 while (*ed_p != 0 && j--) {
 332                         ed_t *ed = (ed_t *)m32_swap(ed_p);
 333                         invalidate_dcache_ed(ed);
 334                         printf(" ed: %4x;", ed->hwINFO);
 335                         ed_p = &ed->hwNextED;
 336                 }
 337                 printf("\n");
 338         }
 339 }
 340
 341 static void ohci_dump_intr_mask(char *label, __u32 mask)
 342 {
 343         dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
 344                 label,
 345                 mask,
 346                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
 347                 (mask & OHCI_INTR_OC) ? " OC" : "",
 348                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
 349                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
 350                 (mask & OHCI_INTR_UE) ? " UE" : "",
 351                 (mask & OHCI_INTR_RD) ? " RD" : "",
 352                 (mask & OHCI_INTR_SF) ? " SF" : "",
 353                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
 354                 (mask & OHCI_INTR_SO) ? " SO" : ""
 355                 );
 356 }
 357
 358 static void maybe_print_eds(char *label, __u32 value)
 359 {
 360         ed_t *edp = (ed_t *)value;
 361
 362         if (value) {
 363                 dbg("%s %08x", label, value);
 364                 invalidate_dcache_ed(edp);
 365                 dbg("%08x", edp->hwINFO);
 366                 dbg("%08x", edp->hwTailP);
 367                 dbg("%08x", edp->hwHeadP);
 368                 dbg("%08x", edp->hwNextED);
 369         }
 370 }
 371
 372 static char *hcfs2string(int state)
 373 {
 374         switch (state) {
 375         case OHCI_USB_RESET:    return "reset";
 376         case OHCI_USB_RESUME:   return "resume";
 377         case OHCI_USB_OPER:     return "operational";
 378         case OHCI_USB_SUSPEND:  return "suspend";
 379         }
 380         return "?";
 381 }
 382
 383 /* dump control and status registers */
 384 static void ohci_dump_status(ohci_t *controller)
 385 {
 386         struct ohci_regs        *regs = controller->regs;
 387         __u32                   temp;
 388
 389         temp = ohci_readl(&regs->revision) & 0xff;
 390         if (temp != 0x10)
 391                 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
 392
 393         temp = ohci_readl(&regs->control);
 394         dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
 395                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
 396                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
 397                 (temp & OHCI_CTRL_IR) ? " IR" : "",
 398                 hcfs2string(temp & OHCI_CTRL_HCFS),
 399                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
 400                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
 401                 (temp & OHCI_CTRL_IE) ? " IE" : "",
 402                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
 403                 temp & OHCI_CTRL_CBSR
 404                 );
 405
 406         temp = ohci_readl(&regs->cmdstatus);
 407         dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
 408                 (temp & OHCI_SOC) >> 16,
 409                 (temp & OHCI_OCR) ? " OCR" : "",
 410                 (temp & OHCI_BLF) ? " BLF" : "",
 411                 (temp & OHCI_CLF) ? " CLF" : "",
 412                 (temp & OHCI_HCR) ? " HCR" : ""
 413                 );
 414
 415         ohci_dump_intr_mask("intrstatus", ohci_readl(&regs->intrstatus));
 416         ohci_dump_intr_mask("intrenable", ohci_readl(&regs->intrenable));
 417
 418         maybe_print_eds("ed_periodcurrent",
 419                         ohci_readl(&regs->ed_periodcurrent));
 420
 421         maybe_print_eds("ed_controlhead", ohci_readl(&regs->ed_controlhead));
 422         maybe_print_eds("ed_controlcurrent",
 423                         ohci_readl(&regs->ed_controlcurrent));
 424
 425         maybe_print_eds("ed_bulkhead", ohci_readl(&regs->ed_bulkhead));
 426         maybe_print_eds("ed_bulkcurrent", ohci_readl(&regs->ed_bulkcurrent));
 427
 428         maybe_print_eds("donehead", ohci_readl(&regs->donehead));
 429 }
 430
 431 static void ohci_dump_roothub(ohci_t *controller, int verbose)
 432 {
 433         __u32                   temp, ndp, i;
 434
 435         temp = roothub_a(controller);
 436         ndp = (temp & RH_A_NDP);
 437 #ifdef CONFIG_AT91C_PQFP_UHPBUG
 438         ndp = (ndp == 2) ? 1:0;
 439 #endif
 440         if (verbose) {
 441                 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
 442                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
 443                         (temp & RH_A_NOCP) ? " NOCP" : "",
 444                         (temp & RH_A_OCPM) ? " OCPM" : "",
 445                         (temp & RH_A_DT) ? " DT" : "",
 446                         (temp & RH_A_NPS) ? " NPS" : "",
 447                         (temp & RH_A_PSM) ? " PSM" : "",
 448                         ndp
 449                         );
 450                 temp = roothub_b(controller);
 451                 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
 452                         temp,
 453                         (temp & RH_B_PPCM) >> 16,
 454                         (temp & RH_B_DR)
 455                         );
 456                 temp = roothub_status(controller);
 457                 dbg("roothub.status: %08x%s%s%s%s%s%s",
 458                         temp,
 459                         (temp & RH_HS_CRWE) ? " CRWE" : "",
 460                         (temp & RH_HS_OCIC) ? " OCIC" : "",
 461                         (temp & RH_HS_LPSC) ? " LPSC" : "",
 462                         (temp & RH_HS_DRWE) ? " DRWE" : "",
 463                         (temp & RH_HS_OCI) ? " OCI" : "",
 464                         (temp & RH_HS_LPS) ? " LPS" : ""
 465                         );
 466         }
 467
 468         for (i = 0; i < ndp; i++) {
 469                 temp = roothub_portstatus(controller, i);
 470                 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
 471                         i,
 472                         temp,
 473                         (temp & RH_PS_PRSC) ? " PRSC" : "",
 474                         (temp & RH_PS_OCIC) ? " OCIC" : "",
 475                         (temp & RH_PS_PSSC) ? " PSSC" : "",
 476                         (temp & RH_PS_PESC) ? " PESC" : "",
 477                         (temp & RH_PS_CSC) ? " CSC" : "",
 478
 479                         (temp & RH_PS_LSDA) ? " LSDA" : "",
 480                         (temp & RH_PS_PPS) ? " PPS" : "",
 481                         (temp & RH_PS_PRS) ? " PRS" : "",
 482                         (temp & RH_PS_POCI) ? " POCI" : "",
 483                         (temp & RH_PS_PSS) ? " PSS" : "",
 484
 485                         (temp & RH_PS_PES) ? " PES" : "",
 486                         (temp & RH_PS_CCS) ? " CCS" : ""
 487                         );
 488         }
 489 }
 490
 491 static void ohci_dump(ohci_t *controller, int verbose)
 492 {
 493         dbg("OHCI controller usb-%s state", controller->slot_name);
 494
 495         /* dumps some of the state we know about */
 496         ohci_dump_status(controller);
 497         if (verbose)
 498                 ep_print_int_eds(controller, "hcca");
 499         invalidate_dcache_hcca(controller->hcca);
 500         dbg("hcca frame #%04x", controller->hcca->frame_no);
 501         ohci_dump_roothub(controller, 1);
 502 }
 503 #endif /* DEBUG */
 504
 505 /*-------------------------------------------------------------------------*
 506  * Interface functions (URB)
 507  *-------------------------------------------------------------------------*/
 508
 509 /* get a transfer request */
 510
 511 int sohci_submit_job(ohci_t *ohci, ohci_dev_t *ohci_dev, urb_priv_t *urb,
 512                      struct devrequest *setup)
 513 {
 514         ed_t *ed;
 515         urb_priv_t *purb_priv = urb;
 516         int i, size = 0;
 517         struct usb_device *dev = urb->dev;
 518         unsigned long pipe = urb->pipe;
 519         void *buffer = urb->transfer_buffer;
 520         int transfer_len = urb->transfer_buffer_length;
 521         int interval = urb->interval;
 522
 523         /* when controller's hung, permit only roothub cleanup attempts
 524          * such as powering down ports */
 525         if (ohci->disabled) {
 526                 err("sohci_submit_job: EPIPE");
 527                 return -1;
 528         }
 529
 530         /* we're about to begin a new transaction here so mark the
 531          * URB unfinished */
 532         urb->finished = 0;
 533
 534         /* every endpoint has a ed, locate and fill it */
 535         ed = ep_add_ed(ohci_dev, dev, pipe, interval, 1);
 536         if (!ed) {
 537                 err("sohci_submit_job: ENOMEM");
 538                 return -1;
 539         }
 540
 541         /* for the private part of the URB we need the number of TDs (size) */
 542         switch (usb_pipetype(pipe)) {
 543         case PIPE_BULK: /* one TD for every 4096 Byte */
 544                 size = (transfer_len - 1) / 4096 + 1;
 545                 break;
 546         case PIPE_CONTROL:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
 547                 size = (transfer_len == 0)? 2:
 548                                         (transfer_len - 1) / 4096 + 3;
 549                 break;
 550         case PIPE_INTERRUPT: /* 1 TD */
 551                 size = 1;
 552                 break;
 553         }
 554
 555         ed->purb = urb;
 556
 557         if (size >= (N_URB_TD - 1)) {
 558                 err("need %d TDs, only have %d", size, N_URB_TD);
 559                 return -1;
 560         }
 561         purb_priv->pipe = pipe;
 562
 563         /* fill the private part of the URB */
 564         purb_priv->length = size;
 565         purb_priv->ed = ed;
 566         purb_priv->actual_length = 0;
 567
 568         /* allocate the TDs */
 569         /* note that td[0] was allocated in ep_add_ed */
 570         for (i = 0; i < size; i++) {
 571                 purb_priv->td[i] = td_alloc(ohci_dev, dev);
 572                 if (!purb_priv->td[i]) {
 573                         purb_priv->length = i;
 574                         urb_free_priv(purb_priv);
 575                         err("sohci_submit_job: ENOMEM");
 576                         return -1;
 577                 }
 578         }
 579
 580         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
 581                 urb_free_priv(purb_priv);
 582                 err("sohci_submit_job: EINVAL");
 583                 return -1;
 584         }
 585
 586         /* link the ed into a chain if is not already */
 587         if (ed->state != ED_OPER)
 588                 ep_link(ohci, ed);
 589
 590         /* fill the TDs and link it to the ed */
 591         td_submit_job(ohci, dev, pipe, buffer, transfer_len,
 592                       setup, purb_priv, interval);
 593
 594         return 0;
 595 }
 596
 597 /*-------------------------------------------------------------------------*/
 598
 599 #ifdef DEBUG
 600 /* tell us the current USB frame number */
 601 static int sohci_get_current_frame_number(ohci_t *ohci)
 602 {
 603         invalidate_dcache_hcca(ohci->hcca);
 604         return m16_swap(ohci->hcca->frame_no);
 605 }
 606 #endif
 607
 608 /*-------------------------------------------------------------------------*
 609  * ED handling functions
 610  *-------------------------------------------------------------------------*/
 611
 612 /* search for the right branch to insert an interrupt ed into the int tree
 613  * do some load ballancing;
 614  * returns the branch and
 615  * sets the interval to interval = 2^integer (ld (interval)) */
 616
 617 static int ep_int_ballance(ohci_t *ohci, int interval, int load)
 618 {
 619         int i, branch = 0;
 620
 621         /* search for the least loaded interrupt endpoint
 622          * branch of all 32 branches
 623          */
 624         for (i = 0; i < 32; i++)
 625                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
 626                         branch = i;
 627
 628         branch = branch % interval;
 629         for (i = branch; i < 32; i += interval)
 630                 ohci->ohci_int_load [i] += load;
 631
 632         return branch;
 633 }
 634
 635 /*-------------------------------------------------------------------------*/
 636
 637 /*  2^int( ld (inter)) */
 638
 639 static int ep_2_n_interval(int inter)
 640 {
 641         int i;
 642         for (i = 0; ((inter >> i) > 1) && (i < 5); i++);
 643         return 1 << i;
 644 }
 645
 646 /*-------------------------------------------------------------------------*/
 647
 648 /* the int tree is a binary tree
 649  * in order to process it sequentially the indexes of the branches have to
 650  * be mapped the mapping reverses the bits of a word of num_bits length */
 651 static int ep_rev(int num_bits, int word)
 652 {
 653         int i, wout = 0;
 654
 655         for (i = 0; i < num_bits; i++)
 656                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
 657         return wout;
 658 }
 659
 660 /*-------------------------------------------------------------------------*
 661  * ED handling functions
 662  *-------------------------------------------------------------------------*/
 663
 664 /* link an ed into one of the HC chains */
 665
 666 static int ep_link(ohci_t *ohci, ed_t *edi)
 667 {
 668         volatile ed_t *ed = edi;
 669         int int_branch;
 670         int i;
 671         int inter;
 672         int interval;
 673         int load;
 674         __u32 *ed_p;
 675
 676         ed->state = ED_OPER;
 677         ed->int_interval = 0;
 678
 679         switch (ed->type) {
 680         case PIPE_CONTROL:
 681                 ed->hwNextED = 0;
 682                 flush_dcache_ed(ed);
 683                 if (ohci->ed_controltail == NULL)
 684                         ohci_writel((uintptr_t)ed, &ohci->regs->ed_controlhead);
 685                 else
 686                         ohci->ed_controltail->hwNextED =
 687                                                    m32_swap((unsigned long)ed);
 688
 689                 ed->ed_prev = ohci->ed_controltail;
 690                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
 691                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 692                         ohci->hc_control |= OHCI_CTRL_CLE;
 693                         ohci_writel(ohci->hc_control, &ohci->regs->control);
 694                 }
 695                 ohci->ed_controltail = edi;
 696                 break;
 697
 698         case PIPE_BULK:
 699                 ed->hwNextED = 0;
 700                 flush_dcache_ed(ed);
 701                 if (ohci->ed_bulktail == NULL)
 702                         ohci_writel((uintptr_t)ed, &ohci->regs->ed_bulkhead);
 703                 else
 704                         ohci->ed_bulktail->hwNextED =
 705                                                    m32_swap((unsigned long)ed);
 706
 707                 ed->ed_prev = ohci->ed_bulktail;
 708                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
 709                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 710                         ohci->hc_control |= OHCI_CTRL_BLE;
 711                         ohci_writel(ohci->hc_control, &ohci->regs->control);
 712                 }
 713                 ohci->ed_bulktail = edi;
 714                 break;
 715
 716         case PIPE_INTERRUPT:
 717                 load = ed->int_load;
 718                 interval = ep_2_n_interval(ed->int_period);
 719                 ed->int_interval = interval;
 720                 int_branch = ep_int_ballance(ohci, interval, load);
 721                 ed->int_branch = int_branch;
 722
 723                 for (i = 0; i < ep_rev(6, interval); i += inter) {
 724                         inter = 1;
 725                         for (ed_p = &(ohci->hcca->int_table[\
 726                                                 ep_rev(5, i) + int_branch]);
 727                                 (*ed_p != 0) &&
 728                                 (((ed_t *)ed_p)->int_interval >= interval);
 729                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
 730                                         inter = ep_rev(6,
 731                                                  ((ed_t *)ed_p)->int_interval);
 732                         ed->hwNextED = *ed_p;
 733                         flush_dcache_ed(ed);
 734                         *ed_p = m32_swap((unsigned long)ed);
 735                         flush_dcache_hcca(ohci->hcca);
 736                 }
 737                 break;
 738         }
 739         return 0;
 740 }
 741
 742 /*-------------------------------------------------------------------------*/
 743
 744 /* scan the periodic table to find and unlink this ED */
 745 static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,
 746                             unsigned index, unsigned period)
 747 {
 748         __maybe_unused unsigned long aligned_ed_p;
 749
 750         for (; index < NUM_INTS; index += period) {
 751                 __u32   *ed_p = &ohci->hcca->int_table [index];
 752
 753                 /* ED might have been unlinked through another path */
 754                 while (*ed_p != 0) {
 755                         if (((struct ed *)(uintptr_t)
 756                                         m32_swap((unsigned long)ed_p)) == ed) {
 757                                 *ed_p = ed->hwNextED;
 758                                 aligned_ed_p = (unsigned long)ed_p;
 759                                 aligned_ed_p &= ~(ARCH_DMA_MINALIGN - 1);
 760                                 flush_dcache_range(aligned_ed_p,
 761                                         aligned_ed_p + ARCH_DMA_MINALIGN);
 762                                 break;
 763                         }
 764                         ed_p = &(((struct ed *)(uintptr_t)
 765                                      m32_swap((unsigned long)ed_p))->hwNextED);
 766                 }
 767         }
 768 }
 769
 770 /* unlink an ed from one of the HC chains.
 771  * just the link to the ed is unlinked.
 772  * the link from the ed still points to another operational ed or 0
 773  * so the HC can eventually finish the processing of the unlinked ed */
 774
 775 static int ep_unlink(ohci_t *ohci, ed_t *edi)
 776 {
 777         volatile ed_t *ed = edi;
 778         int i;
 779
 780         ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
 781         flush_dcache_ed(ed);
 782
 783         switch (ed->type) {
 784         case PIPE_CONTROL:
 785                 if (ed->ed_prev == NULL) {
 786                         if (!ed->hwNextED) {
 787                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
 788                                 ohci_writel(ohci->hc_control,
 789                                             &ohci->regs->control);
 790                         }
 791                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 792                                 &ohci->regs->ed_controlhead);
 793                 } else {
 794                         ed->ed_prev->hwNextED = ed->hwNextED;
 795                         flush_dcache_ed(ed->ed_prev);
 796                 }
 797                 if (ohci->ed_controltail == ed) {
 798                         ohci->ed_controltail = ed->ed_prev;
 799                 } else {
 800                         ((ed_t *)(uintptr_t)m32_swap(
 801                             *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 802                 }
 803                 break;
 804
 805         case PIPE_BULK:
 806                 if (ed->ed_prev == NULL) {
 807                         if (!ed->hwNextED) {
 808                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
 809                                 ohci_writel(ohci->hc_control,
 810                                             &ohci->regs->control);
 811                         }
 812                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 813                                &ohci->regs->ed_bulkhead);
 814                 } else {
 815                         ed->ed_prev->hwNextED = ed->hwNextED;
 816                         flush_dcache_ed(ed->ed_prev);
 817                 }
 818                 if (ohci->ed_bulktail == ed) {
 819                         ohci->ed_bulktail = ed->ed_prev;
 820                 } else {
 821                         ((ed_t *)(uintptr_t)m32_swap(
 822                              *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 823                 }
 824                 break;
 825
 826         case PIPE_INTERRUPT:
 827                 periodic_unlink(ohci, ed, 0, 1);
 828                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
 829                     ohci->ohci_int_load[i] -= ed->int_load;
 830                 break;
 831         }
 832         ed->state = ED_UNLINK;
 833         return 0;
 834 }
 835
 836 /*-------------------------------------------------------------------------*/
 837
 838 /* add/reinit an endpoint; this should be done once at the
 839  * usb_set_configuration command, but the USB stack is a little bit
 840  * stateless so we do it at every transaction if the state of the ed
 841  * is ED_NEW then a dummy td is added and the state is changed to
 842  * ED_UNLINK in all other cases the state is left unchanged the ed
 843  * info fields are setted anyway even though most of them should not
 844  * change
 845  */
 846 static ed_t *ep_add_ed(ohci_dev_t *ohci_dev, struct usb_device *usb_dev,
 847                        unsigned long pipe, int interval, int load)
 848 {
 849         td_t *td;
 850         ed_t *ed_ret;
 851         volatile ed_t *ed;
 852
 853         ed = ed_ret = &ohci_dev->ed[(usb_pipeendpoint(pipe) << 1) |
 854                         (usb_pipecontrol(pipe)? 0: usb_pipeout(pipe))];
 855
 856         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
 857                 err("ep_add_ed: pending delete");
 858                 /* pending delete request */
 859                 return NULL;
 860         }
 861
 862         if (ed->state == ED_NEW) {
 863                 /* dummy td; end of td list for ed */
 864                 td = td_alloc(ohci_dev, usb_dev);
 865                 ed->hwTailP = m32_swap((unsigned long)td);
 866                 ed->hwHeadP = ed->hwTailP;
 867                 ed->state = ED_UNLINK;
 868                 ed->type = usb_pipetype(pipe);
 869                 ohci_dev->ed_cnt++;
 870         }
 871
 872         ed->hwINFO = m32_swap(usb_pipedevice(pipe)
 873                         | usb_pipeendpoint(pipe) << 7
 874                         | (usb_pipeisoc(pipe)? 0x8000: 0)
 875                         | (usb_pipecontrol(pipe)? 0: \
 876                                            (usb_pipeout(pipe)? 0x800: 0x1000))
 877                         | (usb_dev->speed == USB_SPEED_LOW) << 13
 878                         | usb_maxpacket(usb_dev, pipe) << 16);
 879
 880         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
 881                 ed->int_period = interval;
 882                 ed->int_load = load;
 883         }
 884
 885         flush_dcache_ed(ed);
 886
 887         return ed_ret;
 888 }
 889
 890 /*-------------------------------------------------------------------------*
 891  * TD handling functions
 892  *-------------------------------------------------------------------------*/
 893
 894 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
 895
 896 static void td_fill(ohci_t *ohci, unsigned int info,
 897         void *data, int len,
 898         struct usb_device *dev, int index, urb_priv_t *urb_priv)
 899 {
 900         volatile td_t  *td, *td_pt;
 901 #ifdef OHCI_FILL_TRACE
 902         int i;
 903 #endif
 904
 905         if (index > urb_priv->length) {
 906                 err("index > length");
 907                 return;
 908         }
 909         /* use this td as the next dummy */
 910         td_pt = urb_priv->td [index];
 911         td_pt->hwNextTD = 0;
 912         flush_dcache_td(td_pt);
 913
 914         /* fill the old dummy TD */
 915         td = urb_priv->td [index] =
 916                              (td_t *)(uintptr_t)
 917                              (m32_swap(urb_priv->ed->hwTailP) & ~0xf);
 918
 919         td->ed = urb_priv->ed;
 920         td->next_dl_td = NULL;
 921         td->index = index;
 922         td->data = (uintptr_t)data;
 923 #ifdef OHCI_FILL_TRACE
 924         if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
 925                 for (i = 0; i < len; i++)
 926                 printf("td->data[%d] %#2x ", i, ((unsigned char *)td->data)[i]);
 927                 printf("\n");
 928         }
 929 #endif
 930         if (!len)
 931                 data = 0;
 932
 933         td->hwINFO = m32_swap(info);
 934         td->hwCBP = m32_swap((unsigned long)data);
 935         if (data)
 936                 td->hwBE = m32_swap((unsigned long)(data + len - 1));
 937         else
 938                 td->hwBE = 0;
 939
 940         td->hwNextTD = m32_swap((unsigned long)td_pt);
 941         flush_dcache_td(td);
 942
 943         /* append to queue */
 944         td->ed->hwTailP = td->hwNextTD;
 945         flush_dcache_ed(td->ed);
 946 }
 947
 948 /*-------------------------------------------------------------------------*/
 949
 950 /* prepare all TDs of a transfer */
 951
 952 static void td_submit_job(ohci_t *ohci, struct usb_device *dev,
 953                           unsigned long pipe, void *buffer, int transfer_len,
 954                           struct devrequest *setup, urb_priv_t *urb,
 955                           int interval)
 956 {
 957         int data_len = transfer_len;
 958         void *data;
 959         int cnt = 0;
 960         __u32 info = 0;
 961         unsigned int toggle = 0;
 962
 963         flush_dcache_buffer(buffer, data_len);
 964
 965         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle
 966          * bits for resetting */
 967         if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
 968                 toggle = TD_T_TOGGLE;
 969         } else {
 970                 toggle = TD_T_DATA0;
 971                 usb_settoggle(dev, usb_pipeendpoint(pipe),
 972                                 usb_pipeout(pipe), 1);
 973         }
 974         urb->td_cnt = 0;
 975         if (data_len)
 976                 data = buffer;
 977         else
 978                 data = 0;
 979
 980         switch (usb_pipetype(pipe)) {
 981         case PIPE_BULK:
 982                 info = usb_pipeout(pipe)?
 983                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
 984                 while (data_len > 4096) {
 985                         td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle),
 986                                 data, 4096, dev, cnt, urb);
 987                         data += 4096; data_len -= 4096; cnt++;
 988                 }
 989                 info = usb_pipeout(pipe)?
 990                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
 991                 td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle), data,
 992                         data_len, dev, cnt, urb);
 993                 cnt++;
 994
 995                 if (!ohci->sleeping) {
 996                         /* start bulk list */
 997                         ohci_writel(OHCI_BLF, &ohci->regs->cmdstatus);
 998                 }
 999                 break;
1000
1001         case PIPE_CONTROL:
1002                 /* Setup phase */
1003                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
1004                 flush_dcache_buffer(setup, 8);
1005                 td_fill(ohci, info, setup, 8, dev, cnt++, urb);
1006
1007                 /* Optional Data phase */
1008                 if (data_len > 0) {
1009                         info = usb_pipeout(pipe)?
1010                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
1011                                 TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
1012                         /* NOTE:  mishandles transfers >8K, some >4K */
1013                         td_fill(ohci, info, data, data_len, dev, cnt++, urb);
1014                 }
1015
1016                 /* Status phase */
1017                 info = (usb_pipeout(pipe) || data_len == 0) ?
1018                         TD_CC | TD_DP_IN | TD_T_DATA1:
1019                         TD_CC | TD_DP_OUT | TD_T_DATA1;
1020                 td_fill(ohci, info, data, 0, dev, cnt++, urb);
1021
1022                 if (!ohci->sleeping) {
1023                         /* start Control list */
1024                         ohci_writel(OHCI_CLF, &ohci->regs->cmdstatus);
1025                 }
1026                 break;
1027
1028         case PIPE_INTERRUPT:
1029                 info = usb_pipeout(urb->pipe)?
1030                         TD_CC | TD_DP_OUT | toggle:
1031                         TD_CC | TD_R | TD_DP_IN | toggle;
1032                 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
1033                 break;
1034         }
1035         if (urb->length != cnt)
1036                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
1037 }
1038
1039 /*-------------------------------------------------------------------------*
1040  * Done List handling functions
1041  *-------------------------------------------------------------------------*/
1042
1043 /* calculate the transfer length and update the urb */
1044
1045 static void dl_transfer_length(td_t *td)
1046 {
1047         __u32 tdBE, tdCBP;
1048         urb_priv_t *lurb_priv = td->ed->purb;
1049
1050         tdBE   = m32_swap(td->hwBE);
1051         tdCBP  = m32_swap(td->hwCBP);
1052
1053         if (!(usb_pipecontrol(lurb_priv->pipe) &&
1054             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
1055                 if (tdBE != 0) {
1056                         if (td->hwCBP == 0)
1057                                 lurb_priv->actual_length += tdBE - td->data + 1;
1058                         else
1059                                 lurb_priv->actual_length += tdCBP - td->data;
1060                 }
1061         }
1062 }
1063
1064 /*-------------------------------------------------------------------------*/
1065 static void check_status(td_t *td_list)
1066 {
1067         urb_priv_t *lurb_priv = td_list->ed->purb;
1068         int        urb_len    = lurb_priv->length;
1069         __u32      *phwHeadP  = &td_list->ed->hwHeadP;
1070         int        cc;
1071
1072         cc = TD_CC_GET(m32_swap(td_list->hwINFO));
1073         if (cc) {
1074                 err(" USB-error: %s (%x)", cc_to_string[cc], cc);
1075
1076                 invalidate_dcache_ed(td_list->ed);
1077                 if (*phwHeadP & m32_swap(0x1)) {
1078                         if (lurb_priv &&
1079                             ((td_list->index + 1) < urb_len)) {
1080                                 *phwHeadP =
1081                                         (lurb_priv->td[urb_len - 1]->hwNextTD &\
1082                                                         m32_swap(0xfffffff0)) |
1083                                                    (*phwHeadP & m32_swap(0x2));
1084
1085                                 lurb_priv->td_cnt += urb_len -
1086                                                      td_list->index - 1;
1087                         } else
1088                                 *phwHeadP &= m32_swap(0xfffffff2);
1089                         flush_dcache_ed(td_list->ed);
1090                 }
1091 #ifdef CONFIG_MPC5200
1092                 td_list->hwNextTD = 0;
1093                 flush_dcache_td(td_list);
1094 #endif
1095         }
1096 }
1097
1098 /* replies to the request have to be on a FIFO basis so
1099  * we reverse the reversed done-list */
1100 static td_t *dl_reverse_done_list(ohci_t *ohci)
1101 {
1102         uintptr_t td_list_hc;
1103         td_t *td_rev = NULL;
1104         td_t *td_list = NULL;
1105
1106         invalidate_dcache_hcca(ohci->hcca);
1107         td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
1108         ohci->hcca->done_head = 0;
1109         flush_dcache_hcca(ohci->hcca);
1110
1111         while (td_list_hc) {
1112                 td_list = (td_t *)td_list_hc;
1113                 invalidate_dcache_td(td_list);
1114                 check_status(td_list);
1115                 td_list->next_dl_td = td_rev;
1116                 td_rev = td_list;
1117                 td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
1118         }
1119         return td_list;
1120 }
1121
1122 /*-------------------------------------------------------------------------*/
1123 /*-------------------------------------------------------------------------*/
1124
1125 static void finish_urb(ohci_t *ohci, urb_priv_t *urb, int status)
1126 {
1127         if ((status & (ED_OPER | ED_UNLINK)) && (urb->state != URB_DEL))
1128                 urb->finished = 1;
1129         else
1130                 dbg("finish_urb: strange.., ED state %x, \n", status);
1131 }
1132
1133 /*
1134  * Used to take back a TD from the host controller. This would normally be
1135  * called from within dl_done_list, however it may be called directly if the
1136  * HC no longer sees the TD and it has not appeared on the donelist (after
1137  * two frames).  This bug has been observed on ZF Micro systems.
1138  */
1139 static int takeback_td(ohci_t *ohci, td_t *td_list)
1140 {
1141         ed_t *ed;
1142         int cc;
1143         int stat = 0;
1144         /* urb_t *urb; */
1145         urb_priv_t *lurb_priv;
1146         __u32 tdINFO, edHeadP, edTailP;
1147
1148         invalidate_dcache_td(td_list);
1149         tdINFO = m32_swap(td_list->hwINFO);
1150
1151         ed = td_list->ed;
1152         lurb_priv = ed->purb;
1153
1154         dl_transfer_length(td_list);
1155
1156         lurb_priv->td_cnt++;
1157
1158         /* error code of transfer */
1159         cc = TD_CC_GET(tdINFO);
1160         if (cc) {
1161                 err("USB-error: %s (%x)", cc_to_string[cc], cc);
1162                 stat = cc_to_error[cc];
1163         }
1164
1165         /* see if this done list makes for all TD's of current URB,
1166         * and mark the URB finished if so */
1167         if (lurb_priv->td_cnt == lurb_priv->length)
1168                 finish_urb(ohci, lurb_priv, ed->state);
1169
1170         dbg("dl_done_list: processing TD %x, len %x\n",
1171                 lurb_priv->td_cnt, lurb_priv->length);
1172
1173         if (ed->state != ED_NEW && (!usb_pipeint(lurb_priv->pipe))) {
1174                 invalidate_dcache_ed(ed);
1175                 edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
1176                 edTailP = m32_swap(ed->hwTailP);
1177
1178                 /* unlink eds if they are not busy */
1179                 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1180                         ep_unlink(ohci, ed);
1181         }
1182         return stat;
1183 }
1184
1185 static int dl_done_list(ohci_t *ohci)
1186 {
1187         int stat = 0;
1188         td_t    *td_list = dl_reverse_done_list(ohci);
1189
1190         while (td_list) {
1191                 td_t    *td_next = td_list->next_dl_td;
1192                 stat = takeback_td(ohci, td_list);
1193                 td_list = td_next;
1194         }
1195         return stat;
1196 }
1197
1198 /*-------------------------------------------------------------------------*
1199  * Virtual Root Hub
1200  *-------------------------------------------------------------------------*/
1201
1202 #include <usbroothubdes.h>
1203
1204 /* Hub class-specific descriptor is constructed dynamically */
1205
1206 /*-------------------------------------------------------------------------*/
1207
1208 #define OK(x)                   len = (x); break
1209 #ifdef DEBUG
1210 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x)); ohci_writel((x), \
1211                                                 &ohci->regs->roothub.status); }
1212 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, \
1213         (x)); ohci_writel((x), &ohci->regs->roothub.portstatus[wIndex-1]); }
1214 #else
1215 #define WR_RH_STAT(x)           ohci_writel((x), &ohci->regs->roothub.status)
1216 #define WR_RH_PORTSTAT(x)       ohci_writel((x), \
1217                                     &ohci->regs->roothub.portstatus[wIndex-1])
1218 #endif
1219 #define RD_RH_STAT              roothub_status(ohci)
1220 #define RD_RH_PORTSTAT          roothub_portstatus(ohci, wIndex-1)
1221
1222 /* request to virtual root hub */
1223
1224 int rh_check_port_status(ohci_t *controller)
1225 {
1226         __u32 temp, ndp, i;
1227         int res;
1228
1229         res = -1;
1230         temp = roothub_a(controller);
1231         ndp = (temp & RH_A_NDP);
1232 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1233         ndp = (ndp == 2) ? 1:0;
1234 #endif
1235         for (i = 0; i < ndp; i++) {
1236                 temp = roothub_portstatus(controller, i);
1237                 /* check for a device disconnect */
1238                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1239                         (RH_PS_PESC | RH_PS_CSC)) &&
1240                         ((temp & RH_PS_CCS) == 0)) {
1241                         res = i;
1242                         break;
1243                 }
1244         }
1245         return res;
1246 }
1247
1248 static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev,
1249         unsigned long pipe, void *buffer, int transfer_len,
1250         struct devrequest *cmd)
1251 {
1252         void *data = buffer;
1253         int leni = transfer_len;
1254         int len = 0;
1255         int stat = 0;
1256         __u16 bmRType_bReq;
1257         __u16 wValue;
1258         __u16 wIndex;
1259         __u16 wLength;
1260         ALLOC_ALIGN_BUFFER(__u8, databuf, 16, sizeof(u32));
1261
1262 #ifdef DEBUG
1263 pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len,
1264           cmd, "SUB(rh)", usb_pipein(pipe));
1265 #else
1266         ohci_mdelay(1);
1267 #endif
1268         if (usb_pipeint(pipe)) {
1269                 info("Root-Hub submit IRQ: NOT implemented");
1270                 return 0;
1271         }
1272
1273         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1274         wValue        = le16_to_cpu(cmd->value);
1275         wIndex        = le16_to_cpu(cmd->index);
1276         wLength       = le16_to_cpu(cmd->length);
1277
1278         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1279                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1280
1281         switch (bmRType_bReq) {
1282         /* Request Destination:
1283            without flags: Device,
1284            RH_INTERFACE: interface,
1285            RH_ENDPOINT: endpoint,
1286            RH_CLASS means HUB here,
1287            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1288         */
1289
1290         case RH_GET_STATUS:
1291                 *(u16 *)databuf = cpu_to_le16(1);
1292                 OK(2);
1293         case RH_GET_STATUS | RH_INTERFACE:
1294                 *(u16 *)databuf = cpu_to_le16(0);
1295                 OK(2);
1296         case RH_GET_STATUS | RH_ENDPOINT:
1297                 *(u16 *)databuf = cpu_to_le16(0);
1298                 OK(2);
1299         case RH_GET_STATUS | RH_CLASS:
1300                 *(u32 *)databuf = cpu_to_le32(
1301                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1302                 OK(4);
1303         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1304                 *(u32 *)databuf = cpu_to_le32(RD_RH_PORTSTAT);
1305                 OK(4);
1306
1307         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1308                 switch (wValue) {
1309                 case (RH_ENDPOINT_STALL):
1310                         OK(0);
1311                 }
1312                 break;
1313
1314         case RH_CLEAR_FEATURE | RH_CLASS:
1315                 switch (wValue) {
1316                 case RH_C_HUB_LOCAL_POWER:
1317                         OK(0);
1318                 case (RH_C_HUB_OVER_CURRENT):
1319                         WR_RH_STAT(RH_HS_OCIC);
1320                         OK(0);
1321                 }
1322                 break;
1323
1324         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1325                 switch (wValue) {
1326                 case (RH_PORT_ENABLE):        WR_RH_PORTSTAT(RH_PS_CCS);  OK(0);
1327                 case (RH_PORT_SUSPEND):       WR_RH_PORTSTAT(RH_PS_POCI); OK(0);
1328                 case (RH_PORT_POWER):         WR_RH_PORTSTAT(RH_PS_LSDA); OK(0);
1329                 case (RH_C_PORT_CONNECTION):  WR_RH_PORTSTAT(RH_PS_CSC);  OK(0);
1330                 case (RH_C_PORT_ENABLE):      WR_RH_PORTSTAT(RH_PS_PESC); OK(0);
1331                 case (RH_C_PORT_SUSPEND):     WR_RH_PORTSTAT(RH_PS_PSSC); OK(0);
1332                 case (RH_C_PORT_OVER_CURRENT):WR_RH_PORTSTAT(RH_PS_OCIC); OK(0);
1333                 case (RH_C_PORT_RESET):       WR_RH_PORTSTAT(RH_PS_PRSC); OK(0);
1334                 }
1335                 break;
1336
1337         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1338                 switch (wValue) {
1339                 case (RH_PORT_SUSPEND):
1340                         WR_RH_PORTSTAT(RH_PS_PSS);  OK(0);
1341                 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1342                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1343                                 WR_RH_PORTSTAT(RH_PS_PRS);
1344                         OK(0);
1345                 case (RH_PORT_POWER):
1346                         WR_RH_PORTSTAT(RH_PS_PPS);
1347                         OK(0);
1348                 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1349                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1350                                 WR_RH_PORTSTAT(RH_PS_PES);
1351                         OK(0);
1352                 }
1353                 break;
1354
1355         case RH_SET_ADDRESS:
1356                 ohci->rh.devnum = wValue;
1357                 OK(0);
1358
1359         case RH_GET_DESCRIPTOR:
1360                 switch ((wValue & 0xff00) >> 8) {
1361                 case (0x01): /* device descriptor */
1362                         len = min_t(unsigned int,
1363                                         leni,
1364                                         min_t(unsigned int,
1365                                         sizeof(root_hub_dev_des),
1366                                         wLength));
1367                         databuf = root_hub_dev_des; OK(len);
1368                 case (0x02): /* configuration descriptor */
1369                         len = min_t(unsigned int,
1370                                         leni,
1371                                         min_t(unsigned int,
1372                                         sizeof(root_hub_config_des),
1373                                         wLength));
1374                         databuf = root_hub_config_des; OK(len);
1375                 case (0x03): /* string descriptors */
1376                         if (wValue == 0x0300) {
1377                                 len = min_t(unsigned int,
1378                                                 leni,
1379                                                 min_t(unsigned int,
1380                                                 sizeof(root_hub_str_index0),
1381                                                 wLength));
1382                                 databuf = root_hub_str_index0;
1383                                 OK(len);
1384                         }
1385                         if (wValue == 0x0301) {
1386                                 len = min_t(unsigned int,
1387                                                 leni,
1388                                                 min_t(unsigned int,
1389                                                 sizeof(root_hub_str_index1),
1390                                                 wLength));
1391                                 databuf = root_hub_str_index1;
1392                                 OK(len);
1393                 }
1394                 default:
1395                         stat = USB_ST_STALLED;
1396                 }
1397                 break;
1398
1399         case RH_GET_DESCRIPTOR | RH_CLASS:
1400         {
1401                 __u32 temp = roothub_a(ohci);
1402
1403                 databuf[0] = 9;         /* min length; */
1404                 databuf[1] = 0x29;
1405                 databuf[2] = temp & RH_A_NDP;
1406 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1407                 databuf[2] = (databuf[2] == 2) ? 1 : 0;
1408 #endif
1409                 databuf[3] = 0;
1410                 if (temp & RH_A_PSM)    /* per-port power switching? */
1411                         databuf[3] |= 0x1;
1412                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1413                         databuf[3] |= 0x10;
1414                 else if (temp & RH_A_OCPM)/* per-port overcurrent reporting? */
1415                         databuf[3] |= 0x8;
1416
1417                 databuf[4] = 0;
1418                 databuf[5] = (temp & RH_A_POTPGT) >> 24;
1419                 databuf[6] = 0;
1420                 temp = roothub_b(ohci);
1421                 databuf[7] = temp & RH_B_DR;
1422                 if (databuf[2] < 7) {
1423                         databuf[8] = 0xff;
1424                 } else {
1425                         databuf[0] += 2;
1426                         databuf[8] = (temp & RH_B_DR) >> 8;
1427                         databuf[10] = databuf[9] = 0xff;
1428                 }
1429
1430                 len = min_t(unsigned int, leni,
1431                             min_t(unsigned int, databuf[0], wLength));
1432                 OK(len);
1433         }
1434
1435         case RH_GET_CONFIGURATION:
1436                 databuf[0] = 0x01;
1437                 OK(1);
1438
1439         case RH_SET_CONFIGURATION:
1440                 WR_RH_STAT(0x10000);
1441                 OK(0);
1442
1443         default:
1444                 dbg("unsupported root hub command");
1445                 stat = USB_ST_STALLED;
1446         }
1447
1448 #ifdef  DEBUG
1449         ohci_dump_roothub(ohci, 1);
1450 #else
1451         ohci_mdelay(1);
1452 #endif
1453
1454         len = min_t(int, len, leni);
1455         if (data != databuf)
1456                 memcpy(data, databuf, len);
1457         dev->act_len = len;
1458         dev->status = stat;
1459
1460 #ifdef DEBUG
1461         pkt_print(ohci, NULL, dev, pipe, buffer,
1462                   transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1463 #else
1464         ohci_mdelay(1);
1465 #endif
1466
1467         return stat;
1468 }
1469
1470 /*-------------------------------------------------------------------------*/
1471
1472 static ohci_dev_t *ohci_get_ohci_dev(ohci_t *ohci, int devnum, int intr)
1473 {
1474         int i;
1475
1476         if (!intr)
1477                 return &ohci->ohci_dev;
1478
1479         /* First see if we already have an ohci_dev for this dev. */
1480         for (i = 0; i < NUM_INT_DEVS; i++) {
1481                 if (ohci->int_dev[i].devnum == devnum)
1482                         return &ohci->int_dev[i];
1483         }
1484
1485         /* If not then find a free one. */
1486         for (i = 0; i < NUM_INT_DEVS; i++) {
1487                 if (ohci->int_dev[i].devnum == -1) {
1488                         ohci->int_dev[i].devnum = devnum;
1489                         return &ohci->int_dev[i];
1490                 }
1491         }
1492
1493         printf("ohci: Error out of ohci_devs for interrupt endpoints\n");
1494         return NULL;
1495 }
1496
1497 /* common code for handling submit messages - used for all but root hub */
1498 /* accesses. */
1499 static urb_priv_t *ohci_alloc_urb(struct usb_device *dev, unsigned long pipe,
1500                 void *buffer, int transfer_len, int interval)
1501 {
1502         urb_priv_t *urb;
1503
1504         urb = calloc(1, sizeof(urb_priv_t));
1505         if (!urb) {
1506                 printf("ohci: Error out of memory allocating urb\n");
1507                 return NULL;
1508         }
1509
1510         urb->dev = dev;
1511         urb->pipe = pipe;
1512         urb->transfer_buffer = buffer;
1513         urb->transfer_buffer_length = transfer_len;
1514         urb->interval = interval;
1515
1516         return urb;
1517 }
1518
1519 static int submit_common_msg(ohci_t *ohci, struct usb_device *dev,
1520                 unsigned long pipe, void *buffer, int transfer_len,
1521                 struct devrequest *setup, int interval)
1522 {
1523         int stat = 0;
1524         int maxsize = usb_maxpacket(dev, pipe);
1525         int timeout;
1526         urb_priv_t *urb;
1527         ohci_dev_t *ohci_dev;
1528
1529         urb = ohci_alloc_urb(dev, pipe, buffer, transfer_len, interval);
1530         if (!urb)
1531                 return -ENOMEM;
1532
1533 #ifdef DEBUG
1534         urb->actual_length = 0;
1535         pkt_print(ohci, urb, dev, pipe, buffer, transfer_len,
1536                   setup, "SUB", usb_pipein(pipe));
1537 #else
1538         ohci_mdelay(1);
1539 #endif
1540         if (!maxsize) {
1541                 err("submit_common_message: pipesize for pipe %lx is zero",
1542                         pipe);
1543                 return -1;
1544         }
1545
1546         ohci_dev = ohci_get_ohci_dev(ohci, dev->devnum, usb_pipeint(pipe));
1547         if (!ohci_dev)
1548                 return -ENOMEM;
1549
1550         if (sohci_submit_job(ohci, ohci_dev, urb, setup) < 0) {
1551                 err("sohci_submit_job failed");
1552                 return -1;
1553         }
1554
1555 #if 0
1556         mdelay(10);
1557         /* ohci_dump_status(ohci); */
1558 #endif
1559
1560         timeout = USB_TIMEOUT_MS(pipe);
1561
1562         /* wait for it to complete */
1563         for (;;) {
1564                 /* check whether the controller is done */
1565                 stat = hc_interrupt(ohci);
1566                 if (stat < 0) {
1567                         stat = USB_ST_CRC_ERR;
1568                         break;
1569                 }
1570
1571                 /* NOTE: since we are not interrupt driven in U-Boot and always
1572                  * handle only one URB at a time, we cannot assume the
1573                  * transaction finished on the first successful return from
1574                  * hc_interrupt().. unless the flag for current URB is set,
1575                  * meaning that all TD's to/from device got actually
1576                  * transferred and processed. If the current URB is not
1577                  * finished we need to re-iterate this loop so as
1578                  * hc_interrupt() gets called again as there needs to be some
1579                  * more TD's to process still */
1580                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1581                         /* 0xff is returned for an SF-interrupt */
1582                         break;
1583                 }
1584
1585                 if (--timeout) {
1586                         mdelay(1);
1587                         if (!urb->finished)
1588                                 dbg("*");
1589
1590                 } else {
1591                         if (!usb_pipeint(pipe))
1592                                 err("CTL:TIMEOUT ");
1593                         dbg("submit_common_msg: TO status %x\n", stat);
1594                         urb->finished = 1;
1595                         stat = USB_ST_CRC_ERR;
1596                         break;
1597                 }
1598         }
1599
1600         dev->status = stat;
1601         dev->act_len = urb->actual_length;
1602
1603         if (usb_pipein(pipe) && dev->status == 0 && dev->act_len)
1604                 invalidate_dcache_buffer(buffer, dev->act_len);
1605
1606 #ifdef DEBUG
1607         pkt_print(ohci, urb, dev, pipe, buffer, transfer_len,
1608                   setup, "RET(ctlr)", usb_pipein(pipe));
1609 #else
1610         ohci_mdelay(1);
1611 #endif
1612         urb_free_priv(urb);
1613         return 0;
1614 }
1615
1616 #define MAX_INT_QUEUESIZE 8
1617
1618 struct int_queue {
1619         int queuesize;
1620         int curr_urb;
1621         urb_priv_t *urb[MAX_INT_QUEUESIZE];
1622 };
1623
1624 static struct int_queue *_ohci_create_int_queue(ohci_t *ohci,
1625                 struct usb_device *udev, unsigned long pipe, int queuesize,
1626                 int elementsize, void *buffer, int interval)
1627 {
1628         struct int_queue *queue;
1629         ohci_dev_t *ohci_dev;
1630         int i;
1631
1632         if (queuesize > MAX_INT_QUEUESIZE)
1633                 return NULL;
1634
1635         ohci_dev = ohci_get_ohci_dev(ohci, udev->devnum, 1);
1636         if (!ohci_dev)
1637                 return NULL;
1638
1639         queue = malloc(sizeof(*queue));
1640         if (!queue) {
1641                 printf("ohci: Error out of memory allocating int queue\n");
1642                 return NULL;
1643         }
1644
1645         for (i = 0; i < queuesize; i++) {
1646                 queue->urb[i] = ohci_alloc_urb(udev, pipe,
1647                                                buffer + i * elementsize,
1648                                                elementsize, interval);
1649                 if (!queue->urb[i])
1650                         break;
1651
1652                 if (sohci_submit_job(ohci, ohci_dev, queue->urb[i], NULL)) {
1653                         printf("ohci: Error submitting int queue job\n");
1654                         urb_free_priv(queue->urb[i]);
1655                         break;
1656                 }
1657         }
1658         if (i == 0) {
1659                 /* We did not succeed in submitting even 1 urb */
1660                 free(queue);
1661                 return NULL;
1662         }
1663
1664         queue->queuesize = i;
1665         queue->curr_urb = 0;
1666
1667         return queue;
1668 }
1669
1670 static void *_ohci_poll_int_queue(ohci_t *ohci, struct usb_device *udev,
1671                                   struct int_queue *queue)
1672 {
1673         if (queue->curr_urb == queue->queuesize)
1674                 return NULL; /* Queue depleted */
1675
1676         if (hc_interrupt(ohci) < 0)
1677                 return NULL;
1678
1679         if (queue->urb[queue->curr_urb]->finished) {
1680                 void *ret = queue->urb[queue->curr_urb]->transfer_buffer;
1681                 queue->curr_urb++;
1682                 return ret;
1683         }
1684
1685         return NULL;
1686 }
1687
1688 static int _ohci_destroy_int_queue(ohci_t *ohci, struct usb_device *dev,
1689                                    struct int_queue *queue)
1690 {
1691         int i;
1692
1693         for (i = 0; i < queue->queuesize; i++)
1694                 urb_free_priv(queue->urb[i]);
1695
1696         free(queue);
1697
1698         return 0;
1699 }
1700
1701 #ifndef CONFIG_DM_USB
1702 /* submit routines called from usb.c */
1703 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1704                 int transfer_len)
1705 {
1706         info("submit_bulk_msg");
1707         return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len,
1708                                  NULL, 0);
1709 }
1710
1711 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1712                 int transfer_len, int interval)
1713 {
1714         info("submit_int_msg");
1715         return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len, NULL,
1716                         interval);
1717 }
1718
1719 struct int_queue *create_int_queue(struct usb_device *dev,
1720                 unsigned long pipe, int queuesize, int elementsize,
1721                 void *buffer, int interval)
1722 {
1723         return _ohci_create_int_queue(&gohci, dev, pipe, queuesize,
1724                                       elementsize, buffer, interval);
1725 }
1726
1727 void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1728 {
1729         return _ohci_poll_int_queue(&gohci, dev, queue);
1730 }
1731
1732 int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1733 {
1734         return _ohci_destroy_int_queue(&gohci, dev, queue);
1735 }
1736 #endif
1737
1738 static int _ohci_submit_control_msg(ohci_t *ohci, struct usb_device *dev,
1739         unsigned long pipe, void *buffer, int transfer_len,
1740         struct devrequest *setup)
1741 {
1742         int maxsize = usb_maxpacket(dev, pipe);
1743
1744         info("submit_control_msg");
1745 #ifdef DEBUG
1746         pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len,
1747                   setup, "SUB", usb_pipein(pipe));
1748 #else
1749         ohci_mdelay(1);
1750 #endif
1751         if (!maxsize) {
1752                 err("submit_control_message: pipesize for pipe %lx is zero",
1753                         pipe);
1754                 return -1;
1755         }
1756         if (((pipe >> 8) & 0x7f) == ohci->rh.devnum) {
1757                 ohci->rh.dev = dev;
1758                 /* root hub - redirect */
1759                 return ohci_submit_rh_msg(ohci, dev, pipe, buffer,
1760                                           transfer_len, setup);
1761         }
1762
1763         return submit_common_msg(ohci, dev, pipe, buffer, transfer_len,
1764                                  setup, 0);
1765 }
1766
1767 /*-------------------------------------------------------------------------*
1768  * HC functions
1769  *-------------------------------------------------------------------------*/
1770
1771 /* reset the HC and BUS */
1772
1773 static int hc_reset(ohci_t *ohci)
1774 {
1775 #ifdef CONFIG_PCI_EHCI_DEVNO
1776         pci_dev_t pdev;
1777 #endif
1778         int timeout = 30;
1779         int smm_timeout = 50; /* 0,5 sec */
1780
1781         dbg("%s\n", __FUNCTION__);
1782
1783 #ifdef CONFIG_PCI_EHCI_DEVNO
1784         /*
1785          *  Some multi-function controllers (e.g. ISP1562) allow root hub
1786          * resetting via EHCI registers only.
1787          */
1788         pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVNO);
1789         if (pdev != -1) {
1790                 u32 base;
1791                 int timeout = 1000;
1792
1793                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1794                 base += EHCI_USBCMD_OFF;
1795                 ohci_writel(ohci_readl(base) | EHCI_USBCMD_HCRESET, base);
1796
1797                 while (ohci_readl(base) & EHCI_USBCMD_HCRESET) {
1798                         if (timeout-- <= 0) {
1799                                 printf("USB RootHub reset timed out!");
1800                                 break;
1801                         }
1802                         udelay(1);
1803                 }
1804         } else
1805                 printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
1806 #endif
1807         if (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1808                 /* SMM owns the HC, request ownership */
1809                 ohci_writel(OHCI_OCR, &ohci->regs->cmdstatus);
1810                 info("USB HC TakeOver from SMM");
1811                 while (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1812                         mdelay(10);
1813                         if (--smm_timeout == 0) {
1814                                 err("USB HC TakeOver failed!");
1815                                 return -1;
1816                         }
1817                 }
1818         }
1819
1820         /* Disable HC interrupts */
1821         ohci_writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
1822
1823         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1824                 ohci->slot_name,
1825                 ohci_readl(&ohci->regs->control));
1826
1827         /* Reset USB (needed by some controllers) */
1828         ohci->hc_control = 0;
1829         ohci_writel(ohci->hc_control, &ohci->regs->control);
1830
1831         /* HC Reset requires max 10 us delay */
1832         ohci_writel(OHCI_HCR,  &ohci->regs->cmdstatus);
1833         while ((ohci_readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1834                 if (--timeout == 0) {
1835                         err("USB HC reset timed out!");
1836                         return -1;
1837                 }
1838                 udelay(1);
1839         }
1840         return 0;
1841 }
1842
1843 /*-------------------------------------------------------------------------*/
1844
1845 /* Start an OHCI controller, set the BUS operational
1846  * enable interrupts
1847  * connect the virtual root hub */
1848
1849 static int hc_start(ohci_t *ohci)
1850 {
1851         __u32 mask;
1852         unsigned int fminterval;
1853         int i;
1854
1855         ohci->disabled = 1;
1856         for (i = 0; i < NUM_INT_DEVS; i++)
1857                 ohci->int_dev[i].devnum = -1;
1858
1859         /* Tell the controller where the control and bulk lists are
1860          * The lists are empty now. */
1861
1862         ohci_writel(0, &ohci->regs->ed_controlhead);
1863         ohci_writel(0, &ohci->regs->ed_bulkhead);
1864
1865         ohci_writel((uintptr_t)ohci->hcca,
1866                     &ohci->regs->hcca); /* reset clears this */
1867
1868         fminterval = 0x2edf;
1869         ohci_writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
1870         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1871         ohci_writel(fminterval, &ohci->regs->fminterval);
1872         ohci_writel(0x628, &ohci->regs->lsthresh);
1873
1874         /* start controller operations */
1875         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1876         ohci->disabled = 0;
1877         ohci_writel(ohci->hc_control, &ohci->regs->control);
1878
1879         /* disable all interrupts */
1880         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1881                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1882                         OHCI_INTR_OC | OHCI_INTR_MIE);
1883         ohci_writel(mask, &ohci->regs->intrdisable);
1884         /* clear all interrupts */
1885         mask &= ~OHCI_INTR_MIE;
1886         ohci_writel(mask, &ohci->regs->intrstatus);
1887         /* Choose the interrupts we care about now  - but w/o MIE */
1888         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1889         ohci_writel(mask, &ohci->regs->intrenable);
1890
1891 #ifdef  OHCI_USE_NPS
1892         /* required for AMD-756 and some Mac platforms */
1893         ohci_writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1894                 &ohci->regs->roothub.a);
1895         ohci_writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1896 #endif  /* OHCI_USE_NPS */
1897
1898         /* connect the virtual root hub */
1899         ohci->rh.devnum = 0;
1900
1901         return 0;
1902 }
1903
1904 /*-------------------------------------------------------------------------*/
1905
1906 /* an interrupt happens */
1907
1908 static int hc_interrupt(ohci_t *ohci)
1909 {
1910         struct ohci_regs *regs = ohci->regs;
1911         int ints;
1912         int stat = -1;
1913
1914         invalidate_dcache_hcca(ohci->hcca);
1915
1916         if ((ohci->hcca->done_head != 0) &&
1917                                 !(m32_swap(ohci->hcca->done_head) & 0x01)) {
1918                 ints =  OHCI_INTR_WDH;
1919         } else {
1920                 ints = ohci_readl(&regs->intrstatus);
1921                 if (ints == ~(u32)0) {
1922                         ohci->disabled++;
1923                         err("%s device removed!", ohci->slot_name);
1924                         return -1;
1925                 } else {
1926                         ints &= ohci_readl(&regs->intrenable);
1927                         if (ints == 0) {
1928                                 dbg("hc_interrupt: returning..\n");
1929                                 return 0xff;
1930                         }
1931                 }
1932         }
1933
1934         /* dbg("Interrupt: %x frame: %x", ints,
1935                                         le16_to_cpu(ohci->hcca->frame_no)); */
1936
1937         if (ints & OHCI_INTR_RHSC)
1938                 stat = 0xff;
1939
1940         if (ints & OHCI_INTR_UE) {
1941                 ohci->disabled++;
1942                 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1943                         ohci->slot_name);
1944                 /* e.g. due to PCI Master/Target Abort */
1945
1946 #ifdef  DEBUG
1947                 ohci_dump(ohci, 1);
1948 #else
1949                 ohci_mdelay(1);
1950 #endif
1951                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1952                 /* Make some non-interrupt context restart the controller. */
1953                 /* Count and limit the retries though; either hardware or */
1954                 /* software errors can go forever... */
1955                 hc_reset(ohci);
1956                 return -1;
1957         }
1958
1959         if (ints & OHCI_INTR_WDH) {
1960                 ohci_mdelay(1);
1961                 ohci_writel(OHCI_INTR_WDH, &regs->intrdisable);
1962                 (void)ohci_readl(&regs->intrdisable); /* flush */
1963                 stat = dl_done_list(ohci);
1964                 ohci_writel(OHCI_INTR_WDH, &regs->intrenable);
1965                 (void)ohci_readl(&regs->intrdisable); /* flush */
1966         }
1967
1968         if (ints & OHCI_INTR_SO) {
1969                 dbg("USB Schedule overrun\n");
1970                 ohci_writel(OHCI_INTR_SO, &regs->intrenable);
1971                 stat = -1;
1972         }
1973
1974         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1975         if (ints & OHCI_INTR_SF) {
1976                 unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
1977                 mdelay(1);
1978                 ohci_writel(OHCI_INTR_SF, &regs->intrdisable);
1979                 if (ohci->ed_rm_list[frame] != NULL)
1980                         ohci_writel(OHCI_INTR_SF, &regs->intrenable);
1981                 stat = 0xff;
1982         }
1983
1984         ohci_writel(ints, &regs->intrstatus);
1985         return stat;
1986 }
1987
1988 /*-------------------------------------------------------------------------*/
1989
1990 #ifndef CONFIG_DM_USB
1991
1992 /*-------------------------------------------------------------------------*/
1993
1994 /* De-allocate all resources.. */
1995
1996 static void hc_release_ohci(ohci_t *ohci)
1997 {
1998         dbg("USB HC release ohci usb-%s", ohci->slot_name);
1999
2000         if (!ohci->disabled)
2001                 hc_reset(ohci);
2002 }
2003
2004 /*-------------------------------------------------------------------------*/
2005
2006 /*
2007  * low level initalisation routine, called from usb.c
2008  */
2009 static char ohci_inited = 0;
2010
2011 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
2012 {
2013 #ifdef CONFIG_PCI_OHCI
2014         pci_dev_t pdev;
2015 #endif
2016
2017 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2018         /* cpu dependant init */
2019         if (usb_cpu_init())
2020                 return -1;
2021 #endif
2022
2023 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2024         /*  board dependant init */
2025         if (board_usb_init(index, USB_INIT_HOST))
2026                 return -1;
2027 #endif
2028         memset(&gohci, 0, sizeof(ohci_t));
2029
2030         /* align the storage */
2031         if ((__u32)&ghcca[0] & 0xff) {
2032                 err("HCCA not aligned!!");
2033                 return -1;
2034         }
2035         gohci.hcca = &ghcca[0];
2036         info("aligned ghcca %p", gohci.hcca);
2037         memset(gohci.hcca, 0, sizeof(struct ohci_hcca));
2038
2039         gohci.disabled = 1;
2040         gohci.sleeping = 0;
2041         gohci.irq = -1;
2042 #ifdef CONFIG_PCI_OHCI
2043         pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO);
2044
2045         if (pdev != -1) {
2046                 u16 vid, did;
2047                 u32 base;
2048                 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
2049                 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
2050                 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
2051                                 vid, did, (pdev >> 16) & 0xff,
2052                                 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
2053                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
2054                 printf("OHCI regs address 0x%08x\n", base);
2055                 gohci.regs = (struct ohci_regs *)base;
2056         } else
2057                 return -1;
2058 #else
2059         gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
2060 #endif
2061
2062         gohci.flags = 0;
2063         gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME;
2064
2065         if (hc_reset (&gohci) < 0) {
2066                 hc_release_ohci (&gohci);
2067                 err ("can't reset usb-%s", gohci.slot_name);
2068 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2069                 /* board dependant cleanup */
2070                 board_usb_cleanup(index, USB_INIT_HOST);
2071 #endif
2072
2073 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2074                 /* cpu dependant cleanup */
2075                 usb_cpu_init_fail();
2076 #endif
2077                 return -1;
2078         }
2079
2080         if (hc_start(&gohci) < 0) {
2081                 err("can't start usb-%s", gohci.slot_name);
2082                 hc_release_ohci(&gohci);
2083                 /* Initialization failed */
2084 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2085                 /* board dependant cleanup */
2086                 usb_board_stop();
2087 #endif
2088
2089 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2090                 /* cpu dependant cleanup */
2091                 usb_cpu_stop();
2092 #endif
2093                 return -1;
2094         }
2095
2096 #ifdef  DEBUG
2097         ohci_dump(&gohci, 1);
2098 #else
2099         ohci_mdelay(1);
2100 #endif
2101         ohci_inited = 1;
2102         return 0;
2103 }
2104
2105 int usb_lowlevel_stop(int index)
2106 {
2107         /* this gets called really early - before the controller has */
2108         /* even been initialized! */
2109         if (!ohci_inited)
2110                 return 0;
2111         /* TODO release any interrupts, etc. */
2112         /* call hc_release_ohci() here ? */
2113         hc_reset(&gohci);
2114
2115 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2116         /* board dependant cleanup */
2117         if (usb_board_stop())
2118                 return -1;
2119 #endif
2120
2121 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2122         /* cpu dependant cleanup */
2123         if (usb_cpu_stop())
2124                 return -1;
2125 #endif
2126         /* This driver is no longer initialised. It needs a new low-level
2127          * init (board/cpu) before it can be used again. */
2128         ohci_inited = 0;
2129         return 0;
2130 }
2131
2132 int submit_control_msg(struct usb_device *dev, unsigned long pipe,
2133         void *buffer, int transfer_len, struct devrequest *setup)
2134 {
2135         return _ohci_submit_control_msg(&gohci, dev, pipe, buffer,
2136                                         transfer_len, setup);
2137 }
2138 #endif
2139
2140 #ifdef CONFIG_DM_USB
2141 static int ohci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
2142                                    unsigned long pipe, void *buffer, int length,
2143                                    struct devrequest *setup)
2144 {
2145         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2146
2147         return _ohci_submit_control_msg(ohci, udev, pipe, buffer,
2148                                         length, setup);
2149 }
2150
2151 static int ohci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
2152                                 unsigned long pipe, void *buffer, int length)
2153 {
2154         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2155
2156         return submit_common_msg(ohci, udev, pipe, buffer, length, NULL, 0);
2157 }
2158
2159 static int ohci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
2160                                unsigned long pipe, void *buffer, int length,
2161                                int interval)
2162 {
2163         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2164
2165         return submit_common_msg(ohci, udev, pipe, buffer, length,
2166                                  NULL, interval);
2167 }
2168
2169 static struct int_queue *ohci_create_int_queue(struct udevice *dev,
2170                 struct usb_device *udev, unsigned long pipe, int queuesize,
2171                 int elementsize, void *buffer, int interval)
2172 {
2173         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2174
2175         return _ohci_create_int_queue(ohci, udev, pipe, queuesize, elementsize,
2176                                       buffer, interval);
2177 }
2178
2179 static void *ohci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
2180                                  struct int_queue *queue)
2181 {
2182         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2183
2184         return _ohci_poll_int_queue(ohci, udev, queue);
2185 }
2186
2187 static int ohci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
2188                                   struct int_queue *queue)
2189 {
2190         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2191
2192         return _ohci_destroy_int_queue(ohci, udev, queue);
2193 }
2194
2195 int ohci_register(struct udevice *dev, struct ohci_regs *regs)
2196 {
2197         struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
2198         ohci_t *ohci = dev_get_priv(dev);
2199         u32 reg;
2200
2201         priv->desc_before_addr = true;
2202
2203         ohci->regs = regs;
2204         ohci->hcca = memalign(256, sizeof(struct ohci_hcca));
2205         if (!ohci->hcca)
2206                 return -ENOMEM;
2207         memset(ohci->hcca, 0, sizeof(struct ohci_hcca));
2208         flush_dcache_hcca(ohci->hcca);
2209
2210         if (hc_reset(ohci) < 0)
2211                 return -EIO;
2212
2213         if (hc_start(ohci) < 0)
2214                 return -EIO;
2215
2216         reg = ohci_readl(&regs->revision);
2217         printf("USB OHCI %x.%x\n", (reg >> 4) & 0xf, reg & 0xf);
2218
2219         return 0;
2220 }
2221
2222 int ohci_deregister(struct udevice *dev)
2223 {
2224         ohci_t *ohci = dev_get_priv(dev);
2225
2226         if (hc_reset(ohci) < 0)
2227                 return -EIO;
2228
2229         free(ohci->hcca);
2230
2231         return 0;
2232 }
2233
2234 struct dm_usb_ops ohci_usb_ops = {
2235         .control = ohci_submit_control_msg,
2236         .bulk = ohci_submit_bulk_msg,
2237         .interrupt = ohci_submit_int_msg,
2238         .create_int_queue = ohci_create_int_queue,
2239         .poll_int_queue = ohci_poll_int_queue,
2240         .destroy_int_queue = ohci_destroy_int_queue,
2241 };
2242
2243 #endif