drivers/usb/host/ohci-hcd.c

   1 /*
   2  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
   3  *
   4  * Interrupt support is added. Now, it has been tested
   5  * on ULI1575 chip and works well with USB keyboard.
   6  *
   7  * (C) Copyright 2007
   8  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
   9  *
  10  * (C) Copyright 2003
  11  * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
  12  *
  13  * Note: Much of this code has been derived from Linux 2.4
  14  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  15  * (C) Copyright 2000-2002 David Brownell
  16  *
  17  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  18  * ebenard@eukrea.com - based on s3c24x0's driver
  19  *
  20  * SPDX-License-Identifier:     GPL-2.0+
  21  */
  22 /*
  23  * IMPORTANT NOTES
  24  * 1 - Read doc/README.generic_usb_ohci
  25  * 2 - this driver is intended for use with USB Mass Storage Devices
  26  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
  27  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  28  *     to activate workaround for bug #41 or this driver will NOT work!
  29  */
  30
  31 #include <common.h>
  32 #include <asm/byteorder.h>
  33
  34 #if defined(CONFIG_PCI_OHCI)
  35 # include <pci.h>
  36 #if !defined(CONFIG_PCI_OHCI_DEVNO)
  37 #define CONFIG_PCI_OHCI_DEVNO   0
  38 #endif
  39 #endif
  40
  41 #include <malloc.h>
  42 #include <usb.h>
  43
  44 #include "ohci.h"
  45
  46 #ifdef CONFIG_AT91RM9200
  47 #include <asm/arch/hardware.h>  /* needed for AT91_USB_HOST_BASE */
  48 #endif
  49
  50 #if defined(CONFIG_CPU_ARM920T) || \
  51     defined(CONFIG_S3C24X0) || \
  52     defined(CONFIG_440EP) || \
  53     defined(CONFIG_PCI_OHCI) || \
  54     defined(CONFIG_MPC5200) || \
  55     defined(CONFIG_SYS_OHCI_USE_NPS)
  56 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
  57 #endif
  58
  59 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  60 #undef DEBUG
  61 #undef SHOW_INFO
  62 #undef OHCI_FILL_TRACE
  63
  64 /* For initializing controller (mask in an HCFS mode too) */
  65 #define OHCI_CONTROL_INIT \
  66         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  67
  68 #ifdef CONFIG_PCI_OHCI
  69 static struct pci_device_id ohci_pci_ids[] = {
  70         {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
  71         {0x1033, 0x0035},       /* NEC PCI OHCI module ids */
  72         {0x1131, 0x1561},       /* Philips 1561 PCI OHCI module ids */
  73         /* Please add supported PCI OHCI controller ids here */
  74         {0, 0}
  75 };
  76 #endif
  77
  78 #ifdef CONFIG_PCI_EHCI_DEVNO
  79 static struct pci_device_id ehci_pci_ids[] = {
  80         {0x1131, 0x1562},       /* Philips 1562 PCI EHCI module ids */
  81         /* Please add supported PCI EHCI controller ids here */
  82         {0, 0}
  83 };
  84 #endif
  85
  86 #ifdef DEBUG
  87 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  88 #else
  89 #define dbg(format, arg...) do {} while (0)
  90 #endif /* DEBUG */
  91 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  92 #ifdef SHOW_INFO
  93 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  94 #else
  95 #define info(format, arg...) do {} while (0)
  96 #endif
  97
  98 #ifdef CONFIG_SYS_OHCI_BE_CONTROLLER
  99 # define m16_swap(x) cpu_to_be16(x)
 100 # define m32_swap(x) cpu_to_be32(x)
 101 #else
 102 # define m16_swap(x) cpu_to_le16(x)
 103 # define m32_swap(x) cpu_to_le32(x)
 104 #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
 105
 106 /* global ohci_t */
 107 static ohci_t gohci;
 108 /* this must be aligned to a 256 byte boundary */
 109 struct ohci_hcca ghcca[1];
 110
 111 static inline u32 roothub_a(struct ohci *hc)
 112         { return ohci_readl(&hc->regs->roothub.a); }
 113 static inline u32 roothub_b(struct ohci *hc)
 114         { return ohci_readl(&hc->regs->roothub.b); }
 115 static inline u32 roothub_status(struct ohci *hc)
 116         { return ohci_readl(&hc->regs->roothub.status); }
 117 static inline u32 roothub_portstatus(struct ohci *hc, int i)
 118         { return ohci_readl(&hc->regs->roothub.portstatus[i]); }
 119
 120 /* forward declaration */
 121 static int hc_interrupt(ohci_t *ohci);
 122 static void td_submit_job(ohci_t *ohci, struct usb_device *dev,
 123                           unsigned long pipe, void *buffer, int transfer_len,
 124                           struct devrequest *setup, urb_priv_t *urb,
 125                           int interval);
 126
 127 /*-------------------------------------------------------------------------*
 128  * URB support functions
 129  *-------------------------------------------------------------------------*/
 130
 131 /* free HCD-private data associated with this URB */
 132
 133 static void urb_free_priv(urb_priv_t *urb)
 134 {
 135         int             i;
 136         int             last;
 137         struct td       *td;
 138
 139         last = urb->length - 1;
 140         if (last >= 0) {
 141                 for (i = 0; i <= last; i++) {
 142                         td = urb->td[i];
 143                         if (td) {
 144                                 td->usb_dev = NULL;
 145                                 urb->td[i] = NULL;
 146                         }
 147                 }
 148         }
 149         free(urb);
 150 }
 151
 152 /*-------------------------------------------------------------------------*/
 153
 154 #ifdef DEBUG
 155 static int sohci_get_current_frame_number(ohci_t *ohci);
 156
 157 /* debug| print the main components of an URB
 158  * small: 0) header + data packets 1) just header */
 159
 160 static void pkt_print(ohci_t *ohci, urb_priv_t *purb, struct usb_device *dev,
 161                       unsigned long pipe, void *buffer, int transfer_len,
 162                       struct devrequest *setup, char *str, int small)
 163 {
 164         dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx",
 165                         str,
 166                         sohci_get_current_frame_number(ohci),
 167                         usb_pipedevice(pipe),
 168                         usb_pipeendpoint(pipe),
 169                         usb_pipeout(pipe)? 'O': 'I',
 170                         usb_pipetype(pipe) < 2 ? \
 171                                 (usb_pipeint(pipe)? "INTR": "ISOC"): \
 172                                 (usb_pipecontrol(pipe)? "CTRL": "BULK"),
 173                         (purb ? purb->actual_length : 0),
 174                         transfer_len, dev->status);
 175 #ifdef  OHCI_VERBOSE_DEBUG
 176         if (!small) {
 177                 int i, len;
 178
 179                 if (usb_pipecontrol(pipe)) {
 180                         printf(__FILE__ ": cmd(8):");
 181                         for (i = 0; i < 8 ; i++)
 182                                 printf(" %02x", ((__u8 *) setup) [i]);
 183                         printf("\n");
 184                 }
 185                 if (transfer_len > 0 && buffer) {
 186                         printf(__FILE__ ": data(%d/%d):",
 187                                 (purb ? purb->actual_length : 0),
 188                                 transfer_len);
 189                         len = usb_pipeout(pipe)? transfer_len:
 190                                         (purb ? purb->actual_length : 0);
 191                         for (i = 0; i < 16 && i < len; i++)
 192                                 printf(" %02x", ((__u8 *) buffer) [i]);
 193                         printf("%s\n", i < len? "...": "");
 194                 }
 195         }
 196 #endif
 197 }
 198
 199 /* just for debugging; prints non-empty branches of the int ed tree
 200  * inclusive iso eds */
 201 void ep_print_int_eds(ohci_t *ohci, char *str)
 202 {
 203         int i, j;
 204          __u32 *ed_p;
 205         for (i = 0; i < 32; i++) {
 206                 j = 5;
 207                 ed_p = &(ohci->hcca->int_table [i]);
 208                 if (*ed_p == 0)
 209                     continue;
 210                 printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
 211                 while (*ed_p != 0 && j--) {
 212                         ed_t *ed = (ed_t *)m32_swap(ed_p);
 213                         printf(" ed: %4x;", ed->hwINFO);
 214                         ed_p = &ed->hwNextED;
 215                 }
 216                 printf("\n");
 217         }
 218 }
 219
 220 static void ohci_dump_intr_mask(char *label, __u32 mask)
 221 {
 222         dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
 223                 label,
 224                 mask,
 225                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
 226                 (mask & OHCI_INTR_OC) ? " OC" : "",
 227                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
 228                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
 229                 (mask & OHCI_INTR_UE) ? " UE" : "",
 230                 (mask & OHCI_INTR_RD) ? " RD" : "",
 231                 (mask & OHCI_INTR_SF) ? " SF" : "",
 232                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
 233                 (mask & OHCI_INTR_SO) ? " SO" : ""
 234                 );
 235 }
 236
 237 static void maybe_print_eds(char *label, __u32 value)
 238 {
 239         ed_t *edp = (ed_t *)value;
 240
 241         if (value) {
 242                 dbg("%s %08x", label, value);
 243                 dbg("%08x", edp->hwINFO);
 244                 dbg("%08x", edp->hwTailP);
 245                 dbg("%08x", edp->hwHeadP);
 246                 dbg("%08x", edp->hwNextED);
 247         }
 248 }
 249
 250 static char *hcfs2string(int state)
 251 {
 252         switch (state) {
 253         case OHCI_USB_RESET:    return "reset";
 254         case OHCI_USB_RESUME:   return "resume";
 255         case OHCI_USB_OPER:     return "operational";
 256         case OHCI_USB_SUSPEND:  return "suspend";
 257         }
 258         return "?";
 259 }
 260
 261 /* dump control and status registers */
 262 static void ohci_dump_status(ohci_t *controller)
 263 {
 264         struct ohci_regs        *regs = controller->regs;
 265         __u32                   temp;
 266
 267         temp = ohci_readl(&regs->revision) & 0xff;
 268         if (temp != 0x10)
 269                 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
 270
 271         temp = ohci_readl(&regs->control);
 272         dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
 273                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
 274                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
 275                 (temp & OHCI_CTRL_IR) ? " IR" : "",
 276                 hcfs2string(temp & OHCI_CTRL_HCFS),
 277                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
 278                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
 279                 (temp & OHCI_CTRL_IE) ? " IE" : "",
 280                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
 281                 temp & OHCI_CTRL_CBSR
 282                 );
 283
 284         temp = ohci_readl(&regs->cmdstatus);
 285         dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
 286                 (temp & OHCI_SOC) >> 16,
 287                 (temp & OHCI_OCR) ? " OCR" : "",
 288                 (temp & OHCI_BLF) ? " BLF" : "",
 289                 (temp & OHCI_CLF) ? " CLF" : "",
 290                 (temp & OHCI_HCR) ? " HCR" : ""
 291                 );
 292
 293         ohci_dump_intr_mask("intrstatus", ohci_readl(&regs->intrstatus));
 294         ohci_dump_intr_mask("intrenable", ohci_readl(&regs->intrenable));
 295
 296         maybe_print_eds("ed_periodcurrent",
 297                         ohci_readl(&regs->ed_periodcurrent));
 298
 299         maybe_print_eds("ed_controlhead", ohci_readl(&regs->ed_controlhead));
 300         maybe_print_eds("ed_controlcurrent",
 301                         ohci_readl(&regs->ed_controlcurrent));
 302
 303         maybe_print_eds("ed_bulkhead", ohci_readl(&regs->ed_bulkhead));
 304         maybe_print_eds("ed_bulkcurrent", ohci_readl(&regs->ed_bulkcurrent));
 305
 306         maybe_print_eds("donehead", ohci_readl(&regs->donehead));
 307 }
 308
 309 static void ohci_dump_roothub(ohci_t *controller, int verbose)
 310 {
 311         __u32                   temp, ndp, i;
 312
 313         temp = roothub_a(controller);
 314         ndp = (temp & RH_A_NDP);
 315 #ifdef CONFIG_AT91C_PQFP_UHPBUG
 316         ndp = (ndp == 2) ? 1:0;
 317 #endif
 318         if (verbose) {
 319                 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
 320                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
 321                         (temp & RH_A_NOCP) ? " NOCP" : "",
 322                         (temp & RH_A_OCPM) ? " OCPM" : "",
 323                         (temp & RH_A_DT) ? " DT" : "",
 324                         (temp & RH_A_NPS) ? " NPS" : "",
 325                         (temp & RH_A_PSM) ? " PSM" : "",
 326                         ndp
 327                         );
 328                 temp = roothub_b(controller);
 329                 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
 330                         temp,
 331                         (temp & RH_B_PPCM) >> 16,
 332                         (temp & RH_B_DR)
 333                         );
 334                 temp = roothub_status(controller);
 335                 dbg("roothub.status: %08x%s%s%s%s%s%s",
 336                         temp,
 337                         (temp & RH_HS_CRWE) ? " CRWE" : "",
 338                         (temp & RH_HS_OCIC) ? " OCIC" : "",
 339                         (temp & RH_HS_LPSC) ? " LPSC" : "",
 340                         (temp & RH_HS_DRWE) ? " DRWE" : "",
 341                         (temp & RH_HS_OCI) ? " OCI" : "",
 342                         (temp & RH_HS_LPS) ? " LPS" : ""
 343                         );
 344         }
 345
 346         for (i = 0; i < ndp; i++) {
 347                 temp = roothub_portstatus(controller, i);
 348                 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
 349                         i,
 350                         temp,
 351                         (temp & RH_PS_PRSC) ? " PRSC" : "",
 352                         (temp & RH_PS_OCIC) ? " OCIC" : "",
 353                         (temp & RH_PS_PSSC) ? " PSSC" : "",
 354                         (temp & RH_PS_PESC) ? " PESC" : "",
 355                         (temp & RH_PS_CSC) ? " CSC" : "",
 356
 357                         (temp & RH_PS_LSDA) ? " LSDA" : "",
 358                         (temp & RH_PS_PPS) ? " PPS" : "",
 359                         (temp & RH_PS_PRS) ? " PRS" : "",
 360                         (temp & RH_PS_POCI) ? " POCI" : "",
 361                         (temp & RH_PS_PSS) ? " PSS" : "",
 362
 363                         (temp & RH_PS_PES) ? " PES" : "",
 364                         (temp & RH_PS_CCS) ? " CCS" : ""
 365                         );
 366         }
 367 }
 368
 369 static void ohci_dump(ohci_t *controller, int verbose)
 370 {
 371         dbg("OHCI controller usb-%s state", controller->slot_name);
 372
 373         /* dumps some of the state we know about */
 374         ohci_dump_status(controller);
 375         if (verbose)
 376                 ep_print_int_eds(controller, "hcca");
 377         dbg("hcca frame #%04x", controller->hcca->frame_no);
 378         ohci_dump_roothub(controller, 1);
 379 }
 380 #endif /* DEBUG */
 381
 382 /*-------------------------------------------------------------------------*
 383  * Interface functions (URB)
 384  *-------------------------------------------------------------------------*/
 385
 386 /* get a transfer request */
 387
 388 int sohci_submit_job(ohci_t *ohci, ohci_dev_t *ohci_dev, urb_priv_t *urb,
 389                      struct devrequest *setup)
 390 {
 391         ed_t *ed;
 392         urb_priv_t *purb_priv = urb;
 393         int i, size = 0;
 394         struct usb_device *dev = urb->dev;
 395         unsigned long pipe = urb->pipe;
 396         void *buffer = urb->transfer_buffer;
 397         int transfer_len = urb->transfer_buffer_length;
 398         int interval = urb->interval;
 399
 400         /* when controller's hung, permit only roothub cleanup attempts
 401          * such as powering down ports */
 402         if (ohci->disabled) {
 403                 err("sohci_submit_job: EPIPE");
 404                 return -1;
 405         }
 406
 407         /* we're about to begin a new transaction here so mark the
 408          * URB unfinished */
 409         urb->finished = 0;
 410
 411         /* every endpoint has a ed, locate and fill it */
 412         ed = ep_add_ed(ohci_dev, dev, pipe, interval, 1);
 413         if (!ed) {
 414                 err("sohci_submit_job: ENOMEM");
 415                 return -1;
 416         }
 417
 418         /* for the private part of the URB we need the number of TDs (size) */
 419         switch (usb_pipetype(pipe)) {
 420         case PIPE_BULK: /* one TD for every 4096 Byte */
 421                 size = (transfer_len - 1) / 4096 + 1;
 422                 break;
 423         case PIPE_CONTROL:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
 424                 size = (transfer_len == 0)? 2:
 425                                         (transfer_len - 1) / 4096 + 3;
 426                 break;
 427         case PIPE_INTERRUPT: /* 1 TD */
 428                 size = 1;
 429                 break;
 430         }
 431
 432         ed->purb = urb;
 433
 434         if (size >= (N_URB_TD - 1)) {
 435                 err("need %d TDs, only have %d", size, N_URB_TD);
 436                 return -1;
 437         }
 438         purb_priv->pipe = pipe;
 439
 440         /* fill the private part of the URB */
 441         purb_priv->length = size;
 442         purb_priv->ed = ed;
 443         purb_priv->actual_length = 0;
 444
 445         /* allocate the TDs */
 446         /* note that td[0] was allocated in ep_add_ed */
 447         for (i = 0; i < size; i++) {
 448                 purb_priv->td[i] = td_alloc(ohci_dev, dev);
 449                 if (!purb_priv->td[i]) {
 450                         purb_priv->length = i;
 451                         urb_free_priv(purb_priv);
 452                         err("sohci_submit_job: ENOMEM");
 453                         return -1;
 454                 }
 455         }
 456
 457         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
 458                 urb_free_priv(purb_priv);
 459                 err("sohci_submit_job: EINVAL");
 460                 return -1;
 461         }
 462
 463         /* link the ed into a chain if is not already */
 464         if (ed->state != ED_OPER)
 465                 ep_link(ohci, ed);
 466
 467         /* fill the TDs and link it to the ed */
 468         td_submit_job(ohci, dev, pipe, buffer, transfer_len,
 469                       setup, purb_priv, interval);
 470
 471         return 0;
 472 }
 473
 474 static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
 475 {
 476         struct ohci_regs *regs = hc->regs;
 477
 478         switch (usb_pipetype(urb->pipe)) {
 479         case PIPE_INTERRUPT:
 480                 /* implicitly requeued */
 481                 if (urb->dev->irq_handle &&
 482                                 (urb->dev->irq_act_len = urb->actual_length)) {
 483                         ohci_writel(OHCI_INTR_WDH, &regs->intrenable);
 484                         ohci_readl(&regs->intrenable); /* PCI posting flush */
 485                         urb->dev->irq_handle(urb->dev);
 486                         ohci_writel(OHCI_INTR_WDH, &regs->intrdisable);
 487                         ohci_readl(&regs->intrdisable); /* PCI posting flush */
 488                 }
 489                 urb->actual_length = 0;
 490                 td_submit_job(  hc,
 491                                 urb->dev,
 492                                 urb->pipe,
 493                                 urb->transfer_buffer,
 494                                 urb->transfer_buffer_length,
 495                                 NULL,
 496                                 urb,
 497                                 urb->interval);
 498                 break;
 499         case PIPE_CONTROL:
 500         case PIPE_BULK:
 501                 break;
 502         default:
 503                 return 0;
 504         }
 505         return 1;
 506 }
 507
 508 /*-------------------------------------------------------------------------*/
 509
 510 #ifdef DEBUG
 511 /* tell us the current USB frame number */
 512 static int sohci_get_current_frame_number(ohci_t *ohci)
 513 {
 514         return m16_swap(ohci->hcca->frame_no);
 515 }
 516 #endif
 517
 518 /*-------------------------------------------------------------------------*
 519  * ED handling functions
 520  *-------------------------------------------------------------------------*/
 521
 522 /* search for the right branch to insert an interrupt ed into the int tree
 523  * do some load ballancing;
 524  * returns the branch and
 525  * sets the interval to interval = 2^integer (ld (interval)) */
 526
 527 static int ep_int_ballance(ohci_t *ohci, int interval, int load)
 528 {
 529         int i, branch = 0;
 530
 531         /* search for the least loaded interrupt endpoint
 532          * branch of all 32 branches
 533          */
 534         for (i = 0; i < 32; i++)
 535                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
 536                         branch = i;
 537
 538         branch = branch % interval;
 539         for (i = branch; i < 32; i += interval)
 540                 ohci->ohci_int_load [i] += load;
 541
 542         return branch;
 543 }
 544
 545 /*-------------------------------------------------------------------------*/
 546
 547 /*  2^int( ld (inter)) */
 548
 549 static int ep_2_n_interval(int inter)
 550 {
 551         int i;
 552         for (i = 0; ((inter >> i) > 1) && (i < 5); i++);
 553         return 1 << i;
 554 }
 555
 556 /*-------------------------------------------------------------------------*/
 557
 558 /* the int tree is a binary tree
 559  * in order to process it sequentially the indexes of the branches have to
 560  * be mapped the mapping reverses the bits of a word of num_bits length */
 561 static int ep_rev(int num_bits, int word)
 562 {
 563         int i, wout = 0;
 564
 565         for (i = 0; i < num_bits; i++)
 566                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
 567         return wout;
 568 }
 569
 570 /*-------------------------------------------------------------------------*
 571  * ED handling functions
 572  *-------------------------------------------------------------------------*/
 573
 574 /* link an ed into one of the HC chains */
 575
 576 static int ep_link(ohci_t *ohci, ed_t *edi)
 577 {
 578         volatile ed_t *ed = edi;
 579         int int_branch;
 580         int i;
 581         int inter;
 582         int interval;
 583         int load;
 584         __u32 *ed_p;
 585
 586         ed->state = ED_OPER;
 587         ed->int_interval = 0;
 588
 589         switch (ed->type) {
 590         case PIPE_CONTROL:
 591                 ed->hwNextED = 0;
 592                 if (ohci->ed_controltail == NULL)
 593                         ohci_writel(ed, &ohci->regs->ed_controlhead);
 594                 else
 595                         ohci->ed_controltail->hwNextED =
 596                                                    m32_swap((unsigned long)ed);
 597
 598                 ed->ed_prev = ohci->ed_controltail;
 599                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
 600                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 601                         ohci->hc_control |= OHCI_CTRL_CLE;
 602                         ohci_writel(ohci->hc_control, &ohci->regs->control);
 603                 }
 604                 ohci->ed_controltail = edi;
 605                 break;
 606
 607         case PIPE_BULK:
 608                 ed->hwNextED = 0;
 609                 if (ohci->ed_bulktail == NULL)
 610                         ohci_writel(ed, &ohci->regs->ed_bulkhead);
 611                 else
 612                         ohci->ed_bulktail->hwNextED =
 613                                                    m32_swap((unsigned long)ed);
 614
 615                 ed->ed_prev = ohci->ed_bulktail;
 616                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
 617                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 618                         ohci->hc_control |= OHCI_CTRL_BLE;
 619                         ohci_writel(ohci->hc_control, &ohci->regs->control);
 620                 }
 621                 ohci->ed_bulktail = edi;
 622                 break;
 623
 624         case PIPE_INTERRUPT:
 625                 load = ed->int_load;
 626                 interval = ep_2_n_interval(ed->int_period);
 627                 ed->int_interval = interval;
 628                 int_branch = ep_int_ballance(ohci, interval, load);
 629                 ed->int_branch = int_branch;
 630
 631                 for (i = 0; i < ep_rev(6, interval); i += inter) {
 632                         inter = 1;
 633                         for (ed_p = &(ohci->hcca->int_table[\
 634                                                 ep_rev(5, i) + int_branch]);
 635                                 (*ed_p != 0) &&
 636                                 (((ed_t *)ed_p)->int_interval >= interval);
 637                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
 638                                         inter = ep_rev(6,
 639                                                  ((ed_t *)ed_p)->int_interval);
 640                         ed->hwNextED = *ed_p;
 641                         *ed_p = m32_swap((unsigned long)ed);
 642                 }
 643                 break;
 644         }
 645         return 0;
 646 }
 647
 648 /*-------------------------------------------------------------------------*/
 649
 650 /* scan the periodic table to find and unlink this ED */
 651 static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,
 652                             unsigned index, unsigned period)
 653 {
 654         for (; index < NUM_INTS; index += period) {
 655                 __u32   *ed_p = &ohci->hcca->int_table [index];
 656
 657                 /* ED might have been unlinked through another path */
 658                 while (*ed_p != 0) {
 659                         if (((struct ed *)
 660                                         m32_swap((unsigned long)ed_p)) == ed) {
 661                                 *ed_p = ed->hwNextED;
 662                                 break;
 663                         }
 664                         ed_p = &(((struct ed *)
 665                                      m32_swap((unsigned long)ed_p))->hwNextED);
 666                 }
 667         }
 668 }
 669
 670 /* unlink an ed from one of the HC chains.
 671  * just the link to the ed is unlinked.
 672  * the link from the ed still points to another operational ed or 0
 673  * so the HC can eventually finish the processing of the unlinked ed */
 674
 675 static int ep_unlink(ohci_t *ohci, ed_t *edi)
 676 {
 677         volatile ed_t *ed = edi;
 678         int i;
 679
 680         ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
 681
 682         switch (ed->type) {
 683         case PIPE_CONTROL:
 684                 if (ed->ed_prev == NULL) {
 685                         if (!ed->hwNextED) {
 686                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
 687                                 ohci_writel(ohci->hc_control,
 688                                             &ohci->regs->control);
 689                         }
 690                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 691                                 &ohci->regs->ed_controlhead);
 692                 } else {
 693                         ed->ed_prev->hwNextED = ed->hwNextED;
 694                 }
 695                 if (ohci->ed_controltail == ed) {
 696                         ohci->ed_controltail = ed->ed_prev;
 697                 } else {
 698                         ((ed_t *)m32_swap(
 699                             *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 700                 }
 701                 break;
 702
 703         case PIPE_BULK:
 704                 if (ed->ed_prev == NULL) {
 705                         if (!ed->hwNextED) {
 706                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
 707                                 ohci_writel(ohci->hc_control,
 708                                             &ohci->regs->control);
 709                         }
 710                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 711                                &ohci->regs->ed_bulkhead);
 712                 } else {
 713                         ed->ed_prev->hwNextED = ed->hwNextED;
 714                 }
 715                 if (ohci->ed_bulktail == ed) {
 716                         ohci->ed_bulktail = ed->ed_prev;
 717                 } else {
 718                         ((ed_t *)m32_swap(
 719                              *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 720                 }
 721                 break;
 722
 723         case PIPE_INTERRUPT:
 724                 periodic_unlink(ohci, ed, 0, 1);
 725                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
 726                     ohci->ohci_int_load[i] -= ed->int_load;
 727                 break;
 728         }
 729         ed->state = ED_UNLINK;
 730         return 0;
 731 }
 732
 733 /*-------------------------------------------------------------------------*/
 734
 735 /* add/reinit an endpoint; this should be done once at the
 736  * usb_set_configuration command, but the USB stack is a little bit
 737  * stateless so we do it at every transaction if the state of the ed
 738  * is ED_NEW then a dummy td is added and the state is changed to
 739  * ED_UNLINK in all other cases the state is left unchanged the ed
 740  * info fields are setted anyway even though most of them should not
 741  * change
 742  */
 743 static ed_t *ep_add_ed(ohci_dev_t *ohci_dev, struct usb_device *usb_dev,
 744                        unsigned long pipe, int interval, int load)
 745 {
 746         td_t *td;
 747         ed_t *ed_ret;
 748         volatile ed_t *ed;
 749
 750         ed = ed_ret = &ohci_dev->ed[(usb_pipeendpoint(pipe) << 1) |
 751                         (usb_pipecontrol(pipe)? 0: usb_pipeout(pipe))];
 752
 753         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
 754                 err("ep_add_ed: pending delete");
 755                 /* pending delete request */
 756                 return NULL;
 757         }
 758
 759         if (ed->state == ED_NEW) {
 760                 /* dummy td; end of td list for ed */
 761                 td = td_alloc(ohci_dev, usb_dev);
 762                 ed->hwTailP = m32_swap((unsigned long)td);
 763                 ed->hwHeadP = ed->hwTailP;
 764                 ed->state = ED_UNLINK;
 765                 ed->type = usb_pipetype(pipe);
 766                 ohci_dev->ed_cnt++;
 767         }
 768
 769         ed->hwINFO = m32_swap(usb_pipedevice(pipe)
 770                         | usb_pipeendpoint(pipe) << 7
 771                         | (usb_pipeisoc(pipe)? 0x8000: 0)
 772                         | (usb_pipecontrol(pipe)? 0: \
 773                                            (usb_pipeout(pipe)? 0x800: 0x1000))
 774                         | (usb_dev->speed == USB_SPEED_LOW) << 13
 775                         | usb_maxpacket(usb_dev, pipe) << 16);
 776
 777         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
 778                 ed->int_period = interval;
 779                 ed->int_load = load;
 780         }
 781
 782         return ed_ret;
 783 }
 784
 785 /*-------------------------------------------------------------------------*
 786  * TD handling functions
 787  *-------------------------------------------------------------------------*/
 788
 789 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
 790
 791 static void td_fill(ohci_t *ohci, unsigned int info,
 792         void *data, int len,
 793         struct usb_device *dev, int index, urb_priv_t *urb_priv)
 794 {
 795         volatile td_t  *td, *td_pt;
 796 #ifdef OHCI_FILL_TRACE
 797         int i;
 798 #endif
 799
 800         if (index > urb_priv->length) {
 801                 err("index > length");
 802                 return;
 803         }
 804         /* use this td as the next dummy */
 805         td_pt = urb_priv->td [index];
 806         td_pt->hwNextTD = 0;
 807
 808         /* fill the old dummy TD */
 809         td = urb_priv->td [index] =
 810                              (td_t *)(m32_swap(urb_priv->ed->hwTailP) & ~0xf);
 811
 812         td->ed = urb_priv->ed;
 813         td->next_dl_td = NULL;
 814         td->index = index;
 815         td->data = (__u32)data;
 816 #ifdef OHCI_FILL_TRACE
 817         if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
 818                 for (i = 0; i < len; i++)
 819                 printf("td->data[%d] %#2x ", i, ((unsigned char *)td->data)[i]);
 820                 printf("\n");
 821         }
 822 #endif
 823         if (!len)
 824                 data = 0;
 825
 826         td->hwINFO = m32_swap(info);
 827         td->hwCBP = m32_swap((unsigned long)data);
 828         if (data)
 829                 td->hwBE = m32_swap((unsigned long)(data + len - 1));
 830         else
 831                 td->hwBE = 0;
 832
 833         td->hwNextTD = m32_swap((unsigned long)td_pt);
 834
 835         /* append to queue */
 836         td->ed->hwTailP = td->hwNextTD;
 837 }
 838
 839 /*-------------------------------------------------------------------------*/
 840
 841 /* prepare all TDs of a transfer */
 842
 843 static void td_submit_job(ohci_t *ohci, struct usb_device *dev,
 844                           unsigned long pipe, void *buffer, int transfer_len,
 845                           struct devrequest *setup, urb_priv_t *urb,
 846                           int interval)
 847 {
 848         int data_len = transfer_len;
 849         void *data;
 850         int cnt = 0;
 851         __u32 info = 0;
 852         unsigned int toggle = 0;
 853
 854         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle
 855          * bits for reseting */
 856         if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
 857                 toggle = TD_T_TOGGLE;
 858         } else {
 859                 toggle = TD_T_DATA0;
 860                 usb_settoggle(dev, usb_pipeendpoint(pipe),
 861                                 usb_pipeout(pipe), 1);
 862         }
 863         urb->td_cnt = 0;
 864         if (data_len)
 865                 data = buffer;
 866         else
 867                 data = 0;
 868
 869         switch (usb_pipetype(pipe)) {
 870         case PIPE_BULK:
 871                 info = usb_pipeout(pipe)?
 872                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
 873                 while (data_len > 4096) {
 874                         td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle),
 875                                 data, 4096, dev, cnt, urb);
 876                         data += 4096; data_len -= 4096; cnt++;
 877                 }
 878                 info = usb_pipeout(pipe)?
 879                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
 880                 td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle), data,
 881                         data_len, dev, cnt, urb);
 882                 cnt++;
 883
 884                 if (!ohci->sleeping) {
 885                         /* start bulk list */
 886                         ohci_writel(OHCI_BLF, &ohci->regs->cmdstatus);
 887                 }
 888                 break;
 889
 890         case PIPE_CONTROL:
 891                 /* Setup phase */
 892                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
 893                 td_fill(ohci, info, setup, 8, dev, cnt++, urb);
 894
 895                 /* Optional Data phase */
 896                 if (data_len > 0) {
 897                         info = usb_pipeout(pipe)?
 898                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
 899                                 TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
 900                         /* NOTE:  mishandles transfers >8K, some >4K */
 901                         td_fill(ohci, info, data, data_len, dev, cnt++, urb);
 902                 }
 903
 904                 /* Status phase */
 905                 info = usb_pipeout(pipe)?
 906                         TD_CC | TD_DP_IN | TD_T_DATA1:
 907                         TD_CC | TD_DP_OUT | TD_T_DATA1;
 908                 td_fill(ohci, info, data, 0, dev, cnt++, urb);
 909
 910                 if (!ohci->sleeping) {
 911                         /* start Control list */
 912                         ohci_writel(OHCI_CLF, &ohci->regs->cmdstatus);
 913                 }
 914                 break;
 915
 916         case PIPE_INTERRUPT:
 917                 info = usb_pipeout(urb->pipe)?
 918                         TD_CC | TD_DP_OUT | toggle:
 919                         TD_CC | TD_R | TD_DP_IN | toggle;
 920                 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
 921                 break;
 922         }
 923         if (urb->length != cnt)
 924                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
 925 }
 926
 927 /*-------------------------------------------------------------------------*
 928  * Done List handling functions
 929  *-------------------------------------------------------------------------*/
 930
 931 /* calculate the transfer length and update the urb */
 932
 933 static void dl_transfer_length(td_t *td)
 934 {
 935         __u32 tdBE, tdCBP;
 936         urb_priv_t *lurb_priv = td->ed->purb;
 937
 938         tdBE   = m32_swap(td->hwBE);
 939         tdCBP  = m32_swap(td->hwCBP);
 940
 941         if (!(usb_pipecontrol(lurb_priv->pipe) &&
 942             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
 943                 if (tdBE != 0) {
 944                         if (td->hwCBP == 0)
 945                                 lurb_priv->actual_length += tdBE - td->data + 1;
 946                         else
 947                                 lurb_priv->actual_length += tdCBP - td->data;
 948                 }
 949         }
 950 }
 951
 952 /*-------------------------------------------------------------------------*/
 953 static void check_status(td_t *td_list)
 954 {
 955         urb_priv_t *lurb_priv = td_list->ed->purb;
 956         int        urb_len    = lurb_priv->length;
 957         __u32      *phwHeadP  = &td_list->ed->hwHeadP;
 958         int        cc;
 959
 960         cc = TD_CC_GET(m32_swap(td_list->hwINFO));
 961         if (cc) {
 962                 err(" USB-error: %s (%x)", cc_to_string[cc], cc);
 963
 964                 if (*phwHeadP & m32_swap(0x1)) {
 965                         if (lurb_priv &&
 966                             ((td_list->index + 1) < urb_len)) {
 967                                 *phwHeadP =
 968                                         (lurb_priv->td[urb_len - 1]->hwNextTD &\
 969                                                         m32_swap(0xfffffff0)) |
 970                                                    (*phwHeadP & m32_swap(0x2));
 971
 972                                 lurb_priv->td_cnt += urb_len -
 973                                                      td_list->index - 1;
 974                         } else
 975                                 *phwHeadP &= m32_swap(0xfffffff2);
 976                 }
 977 #ifdef CONFIG_MPC5200
 978                 td_list->hwNextTD = 0;
 979 #endif
 980         }
 981 }
 982
 983 /* replies to the request have to be on a FIFO basis so
 984  * we reverse the reversed done-list */
 985 static td_t *dl_reverse_done_list(ohci_t *ohci)
 986 {
 987         __u32 td_list_hc;
 988         td_t *td_rev = NULL;
 989         td_t *td_list = NULL;
 990
 991         td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
 992         ohci->hcca->done_head = 0;
 993
 994         while (td_list_hc) {
 995                 td_list = (td_t *)td_list_hc;
 996                 check_status(td_list);
 997                 td_list->next_dl_td = td_rev;
 998                 td_rev = td_list;
 999                 td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
1000         }
1001         return td_list;
1002 }
1003
1004 /*-------------------------------------------------------------------------*/
1005 /*-------------------------------------------------------------------------*/
1006
1007 static void finish_urb(ohci_t *ohci, urb_priv_t *urb, int status)
1008 {
1009         if ((status & (ED_OPER | ED_UNLINK)) && (urb->state != URB_DEL))
1010                 urb->finished = sohci_return_job(ohci, urb);
1011         else
1012                 dbg("finish_urb: strange.., ED state %x, \n", status);
1013 }
1014
1015 /*
1016  * Used to take back a TD from the host controller. This would normally be
1017  * called from within dl_done_list, however it may be called directly if the
1018  * HC no longer sees the TD and it has not appeared on the donelist (after
1019  * two frames).  This bug has been observed on ZF Micro systems.
1020  */
1021 static int takeback_td(ohci_t *ohci, td_t *td_list)
1022 {
1023         ed_t *ed;
1024         int cc;
1025         int stat = 0;
1026         /* urb_t *urb; */
1027         urb_priv_t *lurb_priv;
1028         __u32 tdINFO, edHeadP, edTailP;
1029
1030         tdINFO = m32_swap(td_list->hwINFO);
1031
1032         ed = td_list->ed;
1033         lurb_priv = ed->purb;
1034
1035         dl_transfer_length(td_list);
1036
1037         lurb_priv->td_cnt++;
1038
1039         /* error code of transfer */
1040         cc = TD_CC_GET(tdINFO);
1041         if (cc) {
1042                 err("USB-error: %s (%x)", cc_to_string[cc], cc);
1043                 stat = cc_to_error[cc];
1044         }
1045
1046         /* see if this done list makes for all TD's of current URB,
1047         * and mark the URB finished if so */
1048         if (lurb_priv->td_cnt == lurb_priv->length)
1049                 finish_urb(ohci, lurb_priv, ed->state);
1050
1051         dbg("dl_done_list: processing TD %x, len %x\n",
1052                 lurb_priv->td_cnt, lurb_priv->length);
1053
1054         if (ed->state != ED_NEW && (!usb_pipeint(lurb_priv->pipe))) {
1055                 edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
1056                 edTailP = m32_swap(ed->hwTailP);
1057
1058                 /* unlink eds if they are not busy */
1059                 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1060                         ep_unlink(ohci, ed);
1061         }
1062         return stat;
1063 }
1064
1065 static int dl_done_list(ohci_t *ohci)
1066 {
1067         int stat = 0;
1068         td_t    *td_list = dl_reverse_done_list(ohci);
1069
1070         while (td_list) {
1071                 td_t    *td_next = td_list->next_dl_td;
1072                 stat = takeback_td(ohci, td_list);
1073                 td_list = td_next;
1074         }
1075         return stat;
1076 }
1077
1078 /*-------------------------------------------------------------------------*
1079  * Virtual Root Hub
1080  *-------------------------------------------------------------------------*/
1081
1082 #include <usbroothubdes.h>
1083
1084 /* Hub class-specific descriptor is constructed dynamically */
1085
1086 /*-------------------------------------------------------------------------*/
1087
1088 #define OK(x)                   len = (x); break
1089 #ifdef DEBUG
1090 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x)); ohci_writel((x), \
1091                                                 &ohci->regs->roothub.status); }
1092 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, \
1093         (x)); ohci_writel((x), &ohci->regs->roothub.portstatus[wIndex-1]); }
1094 #else
1095 #define WR_RH_STAT(x)           ohci_writel((x), &ohci->regs->roothub.status)
1096 #define WR_RH_PORTSTAT(x)       ohci_writel((x), \
1097                                     &ohci->regs->roothub.portstatus[wIndex-1])
1098 #endif
1099 #define RD_RH_STAT              roothub_status(ohci)
1100 #define RD_RH_PORTSTAT          roothub_portstatus(ohci, wIndex-1)
1101
1102 /* request to virtual root hub */
1103
1104 int rh_check_port_status(ohci_t *controller)
1105 {
1106         __u32 temp, ndp, i;
1107         int res;
1108
1109         res = -1;
1110         temp = roothub_a(controller);
1111         ndp = (temp & RH_A_NDP);
1112 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1113         ndp = (ndp == 2) ? 1:0;
1114 #endif
1115         for (i = 0; i < ndp; i++) {
1116                 temp = roothub_portstatus(controller, i);
1117                 /* check for a device disconnect */
1118                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1119                         (RH_PS_PESC | RH_PS_CSC)) &&
1120                         ((temp & RH_PS_CCS) == 0)) {
1121                         res = i;
1122                         break;
1123                 }
1124         }
1125         return res;
1126 }
1127
1128 static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev,
1129         unsigned long pipe, void *buffer, int transfer_len,
1130         struct devrequest *cmd)
1131 {
1132         void *data = buffer;
1133         int leni = transfer_len;
1134         int len = 0;
1135         int stat = 0;
1136         __u16 bmRType_bReq;
1137         __u16 wValue;
1138         __u16 wIndex;
1139         __u16 wLength;
1140         ALLOC_ALIGN_BUFFER(__u8, databuf, 16, sizeof(u32));
1141
1142 #ifdef DEBUG
1143 pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len,
1144           cmd, "SUB(rh)", usb_pipein(pipe));
1145 #else
1146         mdelay(1);
1147 #endif
1148         if (usb_pipeint(pipe)) {
1149                 info("Root-Hub submit IRQ: NOT implemented");
1150                 return 0;
1151         }
1152
1153         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1154         wValue        = le16_to_cpu(cmd->value);
1155         wIndex        = le16_to_cpu(cmd->index);
1156         wLength       = le16_to_cpu(cmd->length);
1157
1158         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1159                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1160
1161         switch (bmRType_bReq) {
1162         /* Request Destination:
1163            without flags: Device,
1164            RH_INTERFACE: interface,
1165            RH_ENDPOINT: endpoint,
1166            RH_CLASS means HUB here,
1167            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1168         */
1169
1170         case RH_GET_STATUS:
1171                 *(u16 *)databuf = cpu_to_le16(1);
1172                 OK(2);
1173         case RH_GET_STATUS | RH_INTERFACE:
1174                 *(u16 *)databuf = cpu_to_le16(0);
1175                 OK(2);
1176         case RH_GET_STATUS | RH_ENDPOINT:
1177                 *(u16 *)databuf = cpu_to_le16(0);
1178                 OK(2);
1179         case RH_GET_STATUS | RH_CLASS:
1180                 *(u32 *)databuf = cpu_to_le32(
1181                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1182                 OK(4);
1183         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1184                 *(u32 *)databuf = cpu_to_le32(RD_RH_PORTSTAT);
1185                 OK(4);
1186
1187         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1188                 switch (wValue) {
1189                 case (RH_ENDPOINT_STALL):
1190                         OK(0);
1191                 }
1192                 break;
1193
1194         case RH_CLEAR_FEATURE | RH_CLASS:
1195                 switch (wValue) {
1196                 case RH_C_HUB_LOCAL_POWER:
1197                         OK(0);
1198                 case (RH_C_HUB_OVER_CURRENT):
1199                         WR_RH_STAT(RH_HS_OCIC);
1200                         OK(0);
1201                 }
1202                 break;
1203
1204         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1205                 switch (wValue) {
1206                 case (RH_PORT_ENABLE):        WR_RH_PORTSTAT(RH_PS_CCS);  OK(0);
1207                 case (RH_PORT_SUSPEND):       WR_RH_PORTSTAT(RH_PS_POCI); OK(0);
1208                 case (RH_PORT_POWER):         WR_RH_PORTSTAT(RH_PS_LSDA); OK(0);
1209                 case (RH_C_PORT_CONNECTION):  WR_RH_PORTSTAT(RH_PS_CSC);  OK(0);
1210                 case (RH_C_PORT_ENABLE):      WR_RH_PORTSTAT(RH_PS_PESC); OK(0);
1211                 case (RH_C_PORT_SUSPEND):     WR_RH_PORTSTAT(RH_PS_PSSC); OK(0);
1212                 case (RH_C_PORT_OVER_CURRENT):WR_RH_PORTSTAT(RH_PS_OCIC); OK(0);
1213                 case (RH_C_PORT_RESET):       WR_RH_PORTSTAT(RH_PS_PRSC); OK(0);
1214                 }
1215                 break;
1216
1217         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1218                 switch (wValue) {
1219                 case (RH_PORT_SUSPEND):
1220                         WR_RH_PORTSTAT(RH_PS_PSS);  OK(0);
1221                 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1222                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1223                                 WR_RH_PORTSTAT(RH_PS_PRS);
1224                         OK(0);
1225                 case (RH_PORT_POWER):
1226                         WR_RH_PORTSTAT(RH_PS_PPS);
1227                         mdelay(100);
1228                         OK(0);
1229                 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1230                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1231                                 WR_RH_PORTSTAT(RH_PS_PES);
1232                         OK(0);
1233                 }
1234                 break;
1235
1236         case RH_SET_ADDRESS:
1237                 ohci->rh.devnum = wValue;
1238                 OK(0);
1239
1240         case RH_GET_DESCRIPTOR:
1241                 switch ((wValue & 0xff00) >> 8) {
1242                 case (0x01): /* device descriptor */
1243                         len = min_t(unsigned int,
1244                                         leni,
1245                                         min_t(unsigned int,
1246                                         sizeof(root_hub_dev_des),
1247                                         wLength));
1248                         databuf = root_hub_dev_des; OK(len);
1249                 case (0x02): /* configuration descriptor */
1250                         len = min_t(unsigned int,
1251                                         leni,
1252                                         min_t(unsigned int,
1253                                         sizeof(root_hub_config_des),
1254                                         wLength));
1255                         databuf = root_hub_config_des; OK(len);
1256                 case (0x03): /* string descriptors */
1257                         if (wValue == 0x0300) {
1258                                 len = min_t(unsigned int,
1259                                                 leni,
1260                                                 min_t(unsigned int,
1261                                                 sizeof(root_hub_str_index0),
1262                                                 wLength));
1263                                 databuf = root_hub_str_index0;
1264                                 OK(len);
1265                         }
1266                         if (wValue == 0x0301) {
1267                                 len = min_t(unsigned int,
1268                                                 leni,
1269                                                 min_t(unsigned int,
1270                                                 sizeof(root_hub_str_index1),
1271                                                 wLength));
1272                                 databuf = root_hub_str_index1;
1273                                 OK(len);
1274                 }
1275                 default:
1276                         stat = USB_ST_STALLED;
1277                 }
1278                 break;
1279
1280         case RH_GET_DESCRIPTOR | RH_CLASS:
1281         {
1282                 __u32 temp = roothub_a(ohci);
1283
1284                 databuf[0] = 9;         /* min length; */
1285                 databuf[1] = 0x29;
1286                 databuf[2] = temp & RH_A_NDP;
1287 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1288                 databuf[2] = (databuf[2] == 2) ? 1 : 0;
1289 #endif
1290                 databuf[3] = 0;
1291                 if (temp & RH_A_PSM)    /* per-port power switching? */
1292                         databuf[3] |= 0x1;
1293                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1294                         databuf[3] |= 0x10;
1295                 else if (temp & RH_A_OCPM)/* per-port overcurrent reporting? */
1296                         databuf[3] |= 0x8;
1297
1298                 databuf[4] = 0;
1299                 databuf[5] = (temp & RH_A_POTPGT) >> 24;
1300                 databuf[6] = 0;
1301                 temp = roothub_b(ohci);
1302                 databuf[7] = temp & RH_B_DR;
1303                 if (databuf[2] < 7) {
1304                         databuf[8] = 0xff;
1305                 } else {
1306                         databuf[0] += 2;
1307                         databuf[8] = (temp & RH_B_DR) >> 8;
1308                         databuf[10] = databuf[9] = 0xff;
1309                 }
1310
1311                 len = min_t(unsigned int, leni,
1312                             min_t(unsigned int, databuf[0], wLength));
1313                 OK(len);
1314         }
1315
1316         case RH_GET_CONFIGURATION:
1317                 databuf[0] = 0x01;
1318                 OK(1);
1319
1320         case RH_SET_CONFIGURATION:
1321                 WR_RH_STAT(0x10000);
1322                 OK(0);
1323
1324         default:
1325                 dbg("unsupported root hub command");
1326                 stat = USB_ST_STALLED;
1327         }
1328
1329 #ifdef  DEBUG
1330         ohci_dump_roothub(ohci, 1);
1331 #else
1332         mdelay(1);
1333 #endif
1334
1335         len = min_t(int, len, leni);
1336         if (data != databuf)
1337                 memcpy(data, databuf, len);
1338         dev->act_len = len;
1339         dev->status = stat;
1340
1341 #ifdef DEBUG
1342         pkt_print(ohci, NULL, dev, pipe, buffer,
1343                   transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1344 #else
1345         mdelay(1);
1346 #endif
1347
1348         return stat;
1349 }
1350
1351 /*-------------------------------------------------------------------------*/
1352
1353 /* common code for handling submit messages - used for all but root hub */
1354 /* accesses. */
1355 static int submit_common_msg(ohci_t *ohci, struct usb_device *dev,
1356                 unsigned long pipe, void *buffer, int transfer_len,
1357                 struct devrequest *setup, int interval)
1358 {
1359         int stat = 0;
1360         int maxsize = usb_maxpacket(dev, pipe);
1361         int timeout;
1362         urb_priv_t *urb;
1363
1364         urb = malloc(sizeof(urb_priv_t));
1365         memset(urb, 0, sizeof(urb_priv_t));
1366
1367         urb->dev = dev;
1368         urb->pipe = pipe;
1369         urb->transfer_buffer = buffer;
1370         urb->transfer_buffer_length = transfer_len;
1371         urb->interval = interval;
1372
1373 #ifdef DEBUG
1374         urb->actual_length = 0;
1375         pkt_print(ohci, urb, dev, pipe, buffer, transfer_len,
1376                   setup, "SUB", usb_pipein(pipe));
1377 #else
1378         mdelay(1);
1379 #endif
1380         if (!maxsize) {
1381                 err("submit_common_message: pipesize for pipe %lx is zero",
1382                         pipe);
1383                 return -1;
1384         }
1385
1386         if (sohci_submit_job(ohci, &ohci->ohci_dev, urb, setup) < 0) {
1387                 err("sohci_submit_job failed");
1388                 return -1;
1389         }
1390
1391 #if 0
1392         mdelay(10);
1393         /* ohci_dump_status(ohci); */
1394 #endif
1395
1396         timeout = USB_TIMEOUT_MS(pipe);
1397
1398         /* wait for it to complete */
1399         for (;;) {
1400                 /* check whether the controller is done */
1401                 stat = hc_interrupt(ohci);
1402                 if (stat < 0) {
1403                         stat = USB_ST_CRC_ERR;
1404                         break;
1405                 }
1406
1407                 /* NOTE: since we are not interrupt driven in U-Boot and always
1408                  * handle only one URB at a time, we cannot assume the
1409                  * transaction finished on the first successful return from
1410                  * hc_interrupt().. unless the flag for current URB is set,
1411                  * meaning that all TD's to/from device got actually
1412                  * transferred and processed. If the current URB is not
1413                  * finished we need to re-iterate this loop so as
1414                  * hc_interrupt() gets called again as there needs to be some
1415                  * more TD's to process still */
1416                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1417                         /* 0xff is returned for an SF-interrupt */
1418                         break;
1419                 }
1420
1421                 if (--timeout) {
1422                         mdelay(1);
1423                         if (!urb->finished)
1424                                 dbg("*");
1425
1426                 } else {
1427                         err("CTL:TIMEOUT ");
1428                         dbg("submit_common_msg: TO status %x\n", stat);
1429                         urb->finished = 1;
1430                         stat = USB_ST_CRC_ERR;
1431                         break;
1432                 }
1433         }
1434
1435         dev->status = stat;
1436         dev->act_len = urb->actual_length;
1437
1438 #ifdef DEBUG
1439         pkt_print(ohci, urb, dev, pipe, buffer, transfer_len,
1440                   setup, "RET(ctlr)", usb_pipein(pipe));
1441 #else
1442         mdelay(1);
1443 #endif
1444
1445         /* free TDs in urb_priv */
1446         if (!usb_pipeint(pipe))
1447                 urb_free_priv(urb);
1448         return 0;
1449 }
1450
1451 /* submit routines called from usb.c */
1452 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1453                 int transfer_len)
1454 {
1455         info("submit_bulk_msg");
1456         return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len,
1457                                  NULL, 0);
1458 }
1459
1460 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1461                 int transfer_len, int interval)
1462 {
1463         info("submit_int_msg");
1464         return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len, NULL,
1465                         interval);
1466 }
1467
1468 static int _ohci_submit_control_msg(ohci_t *ohci, struct usb_device *dev,
1469         unsigned long pipe, void *buffer, int transfer_len,
1470         struct devrequest *setup)
1471 {
1472         int maxsize = usb_maxpacket(dev, pipe);
1473
1474         info("submit_control_msg");
1475 #ifdef DEBUG
1476         pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len,
1477                   setup, "SUB", usb_pipein(pipe));
1478 #else
1479         mdelay(1);
1480 #endif
1481         if (!maxsize) {
1482                 err("submit_control_message: pipesize for pipe %lx is zero",
1483                         pipe);
1484                 return -1;
1485         }
1486         if (((pipe >> 8) & 0x7f) == ohci->rh.devnum) {
1487                 ohci->rh.dev = dev;
1488                 /* root hub - redirect */
1489                 return ohci_submit_rh_msg(ohci, dev, pipe, buffer,
1490                                           transfer_len, setup);
1491         }
1492
1493         return submit_common_msg(ohci, dev, pipe, buffer, transfer_len,
1494                                  setup, 0);
1495 }
1496
1497 /*-------------------------------------------------------------------------*
1498  * HC functions
1499  *-------------------------------------------------------------------------*/
1500
1501 /* reset the HC and BUS */
1502
1503 static int hc_reset(ohci_t *ohci)
1504 {
1505 #ifdef CONFIG_PCI_EHCI_DEVNO
1506         pci_dev_t pdev;
1507 #endif
1508         int timeout = 30;
1509         int smm_timeout = 50; /* 0,5 sec */
1510
1511         dbg("%s\n", __FUNCTION__);
1512
1513 #ifdef CONFIG_PCI_EHCI_DEVNO
1514         /*
1515          *  Some multi-function controllers (e.g. ISP1562) allow root hub
1516          * resetting via EHCI registers only.
1517          */
1518         pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVNO);
1519         if (pdev != -1) {
1520                 u32 base;
1521                 int timeout = 1000;
1522
1523                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1524                 base += EHCI_USBCMD_OFF;
1525                 ohci_writel(ohci_readl(base) | EHCI_USBCMD_HCRESET, base);
1526
1527                 while (ohci_readl(base) & EHCI_USBCMD_HCRESET) {
1528                         if (timeout-- <= 0) {
1529                                 printf("USB RootHub reset timed out!");
1530                                 break;
1531                         }
1532                         udelay(1);
1533                 }
1534         } else
1535                 printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
1536 #endif
1537         if (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1538                 /* SMM owns the HC, request ownership */
1539                 ohci_writel(OHCI_OCR, &ohci->regs->cmdstatus);
1540                 info("USB HC TakeOver from SMM");
1541                 while (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1542                         mdelay(10);
1543                         if (--smm_timeout == 0) {
1544                                 err("USB HC TakeOver failed!");
1545                                 return -1;
1546                         }
1547                 }
1548         }
1549
1550         /* Disable HC interrupts */
1551         ohci_writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
1552
1553         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1554                 ohci->slot_name,
1555                 ohci_readl(&ohci->regs->control));
1556
1557         /* Reset USB (needed by some controllers) */
1558         ohci->hc_control = 0;
1559         ohci_writel(ohci->hc_control, &ohci->regs->control);
1560
1561         /* HC Reset requires max 10 us delay */
1562         ohci_writel(OHCI_HCR,  &ohci->regs->cmdstatus);
1563         while ((ohci_readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1564                 if (--timeout == 0) {
1565                         err("USB HC reset timed out!");
1566                         return -1;
1567                 }
1568                 udelay(1);
1569         }
1570         return 0;
1571 }
1572
1573 /*-------------------------------------------------------------------------*/
1574
1575 /* Start an OHCI controller, set the BUS operational
1576  * enable interrupts
1577  * connect the virtual root hub */
1578
1579 static int hc_start(ohci_t *ohci)
1580 {
1581         __u32 mask;
1582         unsigned int fminterval;
1583
1584         ohci->disabled = 1;
1585
1586         /* Tell the controller where the control and bulk lists are
1587          * The lists are empty now. */
1588
1589         ohci_writel(0, &ohci->regs->ed_controlhead);
1590         ohci_writel(0, &ohci->regs->ed_bulkhead);
1591
1592         ohci_writel((__u32)ohci->hcca,
1593                     &ohci->regs->hcca); /* reset clears this */
1594
1595         fminterval = 0x2edf;
1596         ohci_writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
1597         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1598         ohci_writel(fminterval, &ohci->regs->fminterval);
1599         ohci_writel(0x628, &ohci->regs->lsthresh);
1600
1601         /* start controller operations */
1602         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1603         ohci->disabled = 0;
1604         ohci_writel(ohci->hc_control, &ohci->regs->control);
1605
1606         /* disable all interrupts */
1607         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1608                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1609                         OHCI_INTR_OC | OHCI_INTR_MIE);
1610         ohci_writel(mask, &ohci->regs->intrdisable);
1611         /* clear all interrupts */
1612         mask &= ~OHCI_INTR_MIE;
1613         ohci_writel(mask, &ohci->regs->intrstatus);
1614         /* Choose the interrupts we care about now  - but w/o MIE */
1615         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1616         ohci_writel(mask, &ohci->regs->intrenable);
1617
1618 #ifdef  OHCI_USE_NPS
1619         /* required for AMD-756 and some Mac platforms */
1620         ohci_writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1621                 &ohci->regs->roothub.a);
1622         ohci_writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1623 #endif  /* OHCI_USE_NPS */
1624
1625         /* POTPGT delay is bits 24-31, in 2 ms units. */
1626         mdelay((roothub_a(ohci) >> 23) & 0x1fe);
1627
1628         /* connect the virtual root hub */
1629         ohci->rh.devnum = 0;
1630
1631         return 0;
1632 }
1633
1634 /*-------------------------------------------------------------------------*/
1635
1636 /* an interrupt happens */
1637
1638 static int hc_interrupt(ohci_t *ohci)
1639 {
1640         struct ohci_regs *regs = ohci->regs;
1641         int ints;
1642         int stat = -1;
1643
1644         if ((ohci->hcca->done_head != 0) &&
1645                                 !(m32_swap(ohci->hcca->done_head) & 0x01)) {
1646                 ints =  OHCI_INTR_WDH;
1647         } else {
1648                 ints = ohci_readl(&regs->intrstatus);
1649                 if (ints == ~(u32)0) {
1650                         ohci->disabled++;
1651                         err("%s device removed!", ohci->slot_name);
1652                         return -1;
1653                 } else {
1654                         ints &= ohci_readl(&regs->intrenable);
1655                         if (ints == 0) {
1656                                 dbg("hc_interrupt: returning..\n");
1657                                 return 0xff;
1658                         }
1659                 }
1660         }
1661
1662         /* dbg("Interrupt: %x frame: %x", ints,
1663                                         le16_to_cpu(ohci->hcca->frame_no)); */
1664
1665         if (ints & OHCI_INTR_RHSC)
1666                 stat = 0xff;
1667
1668         if (ints & OHCI_INTR_UE) {
1669                 ohci->disabled++;
1670                 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1671                         ohci->slot_name);
1672                 /* e.g. due to PCI Master/Target Abort */
1673
1674 #ifdef  DEBUG
1675                 ohci_dump(ohci, 1);
1676 #else
1677                 mdelay(1);
1678 #endif
1679                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1680                 /* Make some non-interrupt context restart the controller. */
1681                 /* Count and limit the retries though; either hardware or */
1682                 /* software errors can go forever... */
1683                 hc_reset(ohci);
1684                 return -1;
1685         }
1686
1687         if (ints & OHCI_INTR_WDH) {
1688                 mdelay(1);
1689                 ohci_writel(OHCI_INTR_WDH, &regs->intrdisable);
1690                 (void)ohci_readl(&regs->intrdisable); /* flush */
1691                 stat = dl_done_list(ohci);
1692                 ohci_writel(OHCI_INTR_WDH, &regs->intrenable);
1693                 (void)ohci_readl(&regs->intrdisable); /* flush */
1694         }
1695
1696         if (ints & OHCI_INTR_SO) {
1697                 dbg("USB Schedule overrun\n");
1698                 ohci_writel(OHCI_INTR_SO, &regs->intrenable);
1699                 stat = -1;
1700         }
1701
1702         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1703         if (ints & OHCI_INTR_SF) {
1704                 unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
1705                 mdelay(1);
1706                 ohci_writel(OHCI_INTR_SF, &regs->intrdisable);
1707                 if (ohci->ed_rm_list[frame] != NULL)
1708                         ohci_writel(OHCI_INTR_SF, &regs->intrenable);
1709                 stat = 0xff;
1710         }
1711
1712         ohci_writel(ints, &regs->intrstatus);
1713         return stat;
1714 }
1715
1716 /*-------------------------------------------------------------------------*/
1717
1718 /*-------------------------------------------------------------------------*/
1719
1720 /* De-allocate all resources.. */
1721
1722 static void hc_release_ohci(ohci_t *ohci)
1723 {
1724         dbg("USB HC release ohci usb-%s", ohci->slot_name);
1725
1726         if (!ohci->disabled)
1727                 hc_reset(ohci);
1728 }
1729
1730 /*-------------------------------------------------------------------------*/
1731
1732 /*
1733  * low level initalisation routine, called from usb.c
1734  */
1735 static char ohci_inited = 0;
1736
1737 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1738 {
1739 #ifdef CONFIG_PCI_OHCI
1740         pci_dev_t pdev;
1741 #endif
1742
1743 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1744         /* cpu dependant init */
1745         if (usb_cpu_init())
1746                 return -1;
1747 #endif
1748
1749 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1750         /*  board dependant init */
1751         if (board_usb_init(index, USB_INIT_HOST))
1752                 return -1;
1753 #endif
1754         memset(&gohci, 0, sizeof(ohci_t));
1755
1756         /* align the storage */
1757         if ((__u32)&ghcca[0] & 0xff) {
1758                 err("HCCA not aligned!!");
1759                 return -1;
1760         }
1761         gohci.hcca = &ghcca[0];
1762         info("aligned ghcca %p", gohci.hcca);
1763         memset(gohci.hcca, 0, sizeof(struct ohci_hcca));
1764
1765         gohci.disabled = 1;
1766         gohci.sleeping = 0;
1767         gohci.irq = -1;
1768 #ifdef CONFIG_PCI_OHCI
1769         pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO);
1770
1771         if (pdev != -1) {
1772                 u16 vid, did;
1773                 u32 base;
1774                 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
1775                 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
1776                 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
1777                                 vid, did, (pdev >> 16) & 0xff,
1778                                 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
1779                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1780                 printf("OHCI regs address 0x%08x\n", base);
1781                 gohci.regs = (struct ohci_regs *)base;
1782         } else
1783                 return -1;
1784 #else
1785         gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
1786 #endif
1787
1788         gohci.flags = 0;
1789         gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME;
1790
1791         if (hc_reset (&gohci) < 0) {
1792                 hc_release_ohci (&gohci);
1793                 err ("can't reset usb-%s", gohci.slot_name);
1794 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1795                 /* board dependant cleanup */
1796                 board_usb_cleanup(index, USB_INIT_HOST);
1797 #endif
1798
1799 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1800                 /* cpu dependant cleanup */
1801                 usb_cpu_init_fail();
1802 #endif
1803                 return -1;
1804         }
1805
1806         if (hc_start(&gohci) < 0) {
1807                 err("can't start usb-%s", gohci.slot_name);
1808                 hc_release_ohci(&gohci);
1809                 /* Initialization failed */
1810 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1811                 /* board dependant cleanup */
1812                 usb_board_stop();
1813 #endif
1814
1815 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1816                 /* cpu dependant cleanup */
1817                 usb_cpu_stop();
1818 #endif
1819                 return -1;
1820         }
1821
1822 #ifdef  DEBUG
1823         ohci_dump(&gohci, 1);
1824 #else
1825         mdelay(1);
1826 #endif
1827         ohci_inited = 1;
1828         return 0;
1829 }
1830
1831 int usb_lowlevel_stop(int index)
1832 {
1833         /* this gets called really early - before the controller has */
1834         /* even been initialized! */
1835         if (!ohci_inited)
1836                 return 0;
1837         /* TODO release any interrupts, etc. */
1838         /* call hc_release_ohci() here ? */
1839         hc_reset(&gohci);
1840
1841 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1842         /* board dependant cleanup */
1843         if (usb_board_stop())
1844                 return -1;
1845 #endif
1846
1847 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1848         /* cpu dependant cleanup */
1849         if (usb_cpu_stop())
1850                 return -1;
1851 #endif
1852         /* This driver is no longer initialised. It needs a new low-level
1853          * init (board/cpu) before it can be used again. */
1854         ohci_inited = 0;
1855         return 0;
1856 }
1857
1858 int submit_control_msg(struct usb_device *dev, unsigned long pipe,
1859         void *buffer, int transfer_len, struct devrequest *setup)
1860 {
1861         return _ohci_submit_control_msg(&gohci, dev, pipe, buffer,
1862                                         transfer_len, setup);
1863 }