drivers/usb/host/ohci-hcd.c

   1 /*
   2  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
   3  *
   4  * Interrupt support is added. Now, it has been tested
   5  * on ULI1575 chip and works well with USB keyboard.
   6  *
   7  * (C) Copyright 2007
   8  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
   9  *
  10  * (C) Copyright 2003
  11  * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
  12  *
  13  * Note: Much of this code has been derived from Linux 2.4
  14  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  15  * (C) Copyright 2000-2002 David Brownell
  16  *
  17  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  18  * ebenard@eukrea.com - based on s3c24x0's driver
  19  *
  20  * SPDX-License-Identifier:     GPL-2.0+
  21  */
  22 /*
  23  * IMPORTANT NOTES
  24  * 1 - Read doc/README.generic_usb_ohci
  25  * 2 - this driver is intended for use with USB Mass Storage Devices
  26  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
  27  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  28  *     to activate workaround for bug #41 or this driver will NOT work!
  29  */
  30
  31 #include <common.h>
  32 #include <asm/byteorder.h>
  33 #include <dm.h>
  34 #include <errno.h>
  35
  36 #if defined(CONFIG_PCI_OHCI)
  37 # include <pci.h>
  38 #if !defined(CONFIG_PCI_OHCI_DEVNO)
  39 #define CONFIG_PCI_OHCI_DEVNO   0
  40 #endif
  41 #endif
  42
  43 #include <malloc.h>
  44 #include <memalign.h>
  45 #include <usb.h>
  46
  47 #include "ohci.h"
  48
  49 #ifdef CONFIG_AT91RM9200
  50 #include <asm/arch/hardware.h>  /* needed for AT91_USB_HOST_BASE */
  51 #endif
  52
  53 #if defined(CONFIG_CPU_ARM920T) || \
  54     defined(CONFIG_S3C24X0) || \
  55     defined(CONFIG_440EP) || \
  56     defined(CONFIG_PCI_OHCI) || \
  57     defined(CONFIG_MPC5200) || \
  58     defined(CONFIG_SYS_OHCI_USE_NPS)
  59 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
  60 #endif
  61
  62 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  63 #undef DEBUG
  64 #undef SHOW_INFO
  65 #undef OHCI_FILL_TRACE
  66
  67 /* For initializing controller (mask in an HCFS mode too) */
  68 #define OHCI_CONTROL_INIT \
  69         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  70
  71 #ifdef CONFIG_PCI_OHCI
  72 static struct pci_device_id ohci_pci_ids[] = {
  73         {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
  74         {0x1033, 0x0035},       /* NEC PCI OHCI module ids */
  75         {0x1131, 0x1561},       /* Philips 1561 PCI OHCI module ids */
  76         /* Please add supported PCI OHCI controller ids here */
  77         {0, 0}
  78 };
  79 #endif
  80
  81 #ifdef CONFIG_PCI_EHCI_DEVNO
  82 static struct pci_device_id ehci_pci_ids[] = {
  83         {0x1131, 0x1562},       /* Philips 1562 PCI EHCI module ids */
  84         /* Please add supported PCI EHCI controller ids here */
  85         {0, 0}
  86 };
  87 #endif
  88
  89 #ifdef DEBUG
  90 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  91 #else
  92 #define dbg(format, arg...) do {} while (0)
  93 #endif /* DEBUG */
  94 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  95 #ifdef SHOW_INFO
  96 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  97 #else
  98 #define info(format, arg...) do {} while (0)
  99 #endif
 100
 101 #ifdef CONFIG_SYS_OHCI_BE_CONTROLLER
 102 # define m16_swap(x) cpu_to_be16(x)
 103 # define m32_swap(x) cpu_to_be32(x)
 104 #else
 105 # define m16_swap(x) cpu_to_le16(x)
 106 # define m32_swap(x) cpu_to_le32(x)
 107 #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
 108
 109 /* We really should do proper cache flushing everywhere */
 110 #define flush_dcache_buffer(addr, size) \
 111         flush_dcache_range((unsigned long)(addr), \
 112                 ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
 113 #define invalidate_dcache_buffer(addr, size) \
 114         invalidate_dcache_range((unsigned long)(addr), \
 115                 ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
 116
 117 /* Do not use sizeof(ed / td) as our ed / td structs contain extra members */
 118 #define flush_dcache_ed(addr) flush_dcache_buffer(addr, 16)
 119 #define flush_dcache_td(addr) flush_dcache_buffer(addr, 16)
 120 #define flush_dcache_iso_td(addr) flush_dcache_buffer(addr, 32)
 121 #define flush_dcache_hcca(addr) flush_dcache_buffer(addr, 256)
 122 #define invalidate_dcache_ed(addr) invalidate_dcache_buffer(addr, 16)
 123 #define invalidate_dcache_td(addr) invalidate_dcache_buffer(addr, 16)
 124 #define invalidate_dcache_iso_td(addr) invalidate_dcache_buffer(addr, 32)
 125 #define invalidate_dcache_hcca(addr) invalidate_dcache_buffer(addr, 256)
 126
 127 #ifdef CONFIG_DM_USB
 128 /*
 129  * The various ohci_mdelay(1) calls in the code seem unnecessary. We keep
 130  * them around when building for older boards not yet converted to the dm
 131  * just in case (to avoid regressions), for dm this turns them into nops.
 132  */
 133 #define ohci_mdelay(x)
 134 #else
 135 #define ohci_mdelay(x) mdelay(x)
 136 #endif
 137
 138 #ifndef CONFIG_DM_USB
 139 /* global ohci_t */
 140 static ohci_t gohci;
 141 /* this must be aligned to a 256 byte boundary */
 142 struct ohci_hcca ghcca[1];
 143 #endif
 144
 145 /* mapping of the OHCI CC status to error codes */
 146 static int cc_to_error[16] = {
 147         /* No  Error  */               0,
 148         /* CRC Error  */               USB_ST_CRC_ERR,
 149         /* Bit Stuff  */               USB_ST_BIT_ERR,
 150         /* Data Togg  */               USB_ST_CRC_ERR,
 151         /* Stall      */               USB_ST_STALLED,
 152         /* DevNotResp */               -1,
 153         /* PIDCheck   */               USB_ST_BIT_ERR,
 154         /* UnExpPID   */               USB_ST_BIT_ERR,
 155         /* DataOver   */               USB_ST_BUF_ERR,
 156         /* DataUnder  */               USB_ST_BUF_ERR,
 157         /* reservd    */               -1,
 158         /* reservd    */               -1,
 159         /* BufferOver */               USB_ST_BUF_ERR,
 160         /* BuffUnder  */               USB_ST_BUF_ERR,
 161         /* Not Access */               -1,
 162         /* Not Access */               -1
 163 };
 164
 165 static const char *cc_to_string[16] = {
 166         "No Error",
 167         "CRC: Last data packet from endpoint contained a CRC error.",
 168         "BITSTUFFING: Last data packet from endpoint contained a bit " \
 169                      "stuffing violation",
 170         "DATATOGGLEMISMATCH: Last packet from endpoint had data toggle PID\n" \
 171                      "that did not match the expected value.",
 172         "STALL: TD was moved to the Done Queue because the endpoint returned" \
 173                      " a STALL PID",
 174         "DEVICENOTRESPONDING: Device did not respond to token (IN) or did\n" \
 175                      "not provide a handshake (OUT)",
 176         "PIDCHECKFAILURE: Check bits on PID from endpoint failed on data PID\n"\
 177                      "(IN) or handshake (OUT)",
 178         "UNEXPECTEDPID: Receive PID was not valid when encountered or PID\n" \
 179                      "value is not defined.",
 180         "DATAOVERRUN: The amount of data returned by the endpoint exceeded\n" \
 181                      "either the size of the maximum data packet allowed\n" \
 182                      "from the endpoint (found in MaximumPacketSize field\n" \
 183                      "of ED) or the remaining buffer size.",
 184         "DATAUNDERRUN: The endpoint returned less than MaximumPacketSize\n" \
 185                      "and that amount was not sufficient to fill the\n" \
 186                      "specified buffer",
 187         "reserved1",
 188         "reserved2",
 189         "BUFFEROVERRUN: During an IN, HC received data from endpoint faster\n" \
 190                      "than it could be written to system memory",
 191         "BUFFERUNDERRUN: During an OUT, HC could not retrieve data from\n" \
 192                      "system memory fast enough to keep up with data USB " \
 193                      "data rate.",
 194         "NOT ACCESSED: This code is set by software before the TD is placed" \
 195                      "on a list to be processed by the HC.(1)",
 196         "NOT ACCESSED: This code is set by software before the TD is placed" \
 197                      "on a list to be processed by the HC.(2)",
 198 };
 199
 200 static inline u32 roothub_a(struct ohci *hc)
 201         { return ohci_readl(&hc->regs->roothub.a); }
 202 static inline u32 roothub_b(struct ohci *hc)
 203         { return ohci_readl(&hc->regs->roothub.b); }
 204 static inline u32 roothub_status(struct ohci *hc)
 205         { return ohci_readl(&hc->regs->roothub.status); }
 206 static inline u32 roothub_portstatus(struct ohci *hc, int i)
 207         { return ohci_readl(&hc->regs->roothub.portstatus[i]); }
 208
 209 /* forward declaration */
 210 static int hc_interrupt(ohci_t *ohci);
 211 static void td_submit_job(ohci_t *ohci, struct usb_device *dev,
 212                           unsigned long pipe, void *buffer, int transfer_len,
 213                           struct devrequest *setup, urb_priv_t *urb,
 214                           int interval);
 215 static int ep_link(ohci_t * ohci, ed_t * ed);
 216 static int ep_unlink(ohci_t * ohci, ed_t * ed);
 217 static ed_t *ep_add_ed(ohci_dev_t *ohci_dev, struct usb_device *usb_dev,
 218                        unsigned long pipe, int interval, int load);
 219
 220 /*-------------------------------------------------------------------------*/
 221
 222 /* TDs ... */
 223 static struct td *td_alloc(ohci_dev_t *ohci_dev, struct usb_device *usb_dev)
 224 {
 225         int i;
 226         struct td *td;
 227
 228         td = NULL;
 229         for (i = 0; i < NUM_TD; i++)
 230         {
 231                 if (ohci_dev->tds[i].usb_dev == NULL)
 232                 {
 233                         td = &ohci_dev->tds[i];
 234                         td->usb_dev = usb_dev;
 235                         break;
 236                 }
 237         }
 238
 239         return td;
 240 }
 241
 242 static inline void ed_free(struct ed *ed)
 243 {
 244         ed->usb_dev = NULL;
 245 }
 246
 247 /*-------------------------------------------------------------------------*
 248  * URB support functions
 249  *-------------------------------------------------------------------------*/
 250
 251 /* free HCD-private data associated with this URB */
 252
 253 static void urb_free_priv(urb_priv_t *urb)
 254 {
 255         int             i;
 256         int             last;
 257         struct td       *td;
 258
 259         last = urb->length - 1;
 260         if (last >= 0) {
 261                 for (i = 0; i <= last; i++) {
 262                         td = urb->td[i];
 263                         if (td) {
 264                                 td->usb_dev = NULL;
 265                                 urb->td[i] = NULL;
 266                         }
 267                 }
 268         }
 269         free(urb);
 270 }
 271
 272 /*-------------------------------------------------------------------------*/
 273
 274 #ifdef DEBUG
 275 static int sohci_get_current_frame_number(ohci_t *ohci);
 276
 277 /* debug| print the main components of an URB
 278  * small: 0) header + data packets 1) just header */
 279
 280 static void pkt_print(ohci_t *ohci, urb_priv_t *purb, struct usb_device *dev,
 281                       unsigned long pipe, void *buffer, int transfer_len,
 282                       struct devrequest *setup, char *str, int small)
 283 {
 284         dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx",
 285                         str,
 286                         sohci_get_current_frame_number(ohci),
 287                         usb_pipedevice(pipe),
 288                         usb_pipeendpoint(pipe),
 289                         usb_pipeout(pipe)? 'O': 'I',
 290                         usb_pipetype(pipe) < 2 ? \
 291                                 (usb_pipeint(pipe)? "INTR": "ISOC"): \
 292                                 (usb_pipecontrol(pipe)? "CTRL": "BULK"),
 293                         (purb ? purb->actual_length : 0),
 294                         transfer_len, dev->status);
 295 #ifdef  OHCI_VERBOSE_DEBUG
 296         if (!small) {
 297                 int i, len;
 298
 299                 if (usb_pipecontrol(pipe)) {
 300                         printf(__FILE__ ": cmd(8):");
 301                         for (i = 0; i < 8 ; i++)
 302                                 printf(" %02x", ((__u8 *) setup) [i]);
 303                         printf("\n");
 304                 }
 305                 if (transfer_len > 0 && buffer) {
 306                         printf(__FILE__ ": data(%d/%d):",
 307                                 (purb ? purb->actual_length : 0),
 308                                 transfer_len);
 309                         len = usb_pipeout(pipe)? transfer_len:
 310                                         (purb ? purb->actual_length : 0);
 311                         for (i = 0; i < 16 && i < len; i++)
 312                                 printf(" %02x", ((__u8 *) buffer) [i]);
 313                         printf("%s\n", i < len? "...": "");
 314                 }
 315         }
 316 #endif
 317 }
 318
 319 /* just for debugging; prints non-empty branches of the int ed tree
 320  * inclusive iso eds */
 321 void ep_print_int_eds(ohci_t *ohci, char *str)
 322 {
 323         int i, j;
 324          __u32 *ed_p;
 325         for (i = 0; i < 32; i++) {
 326                 j = 5;
 327                 ed_p = &(ohci->hcca->int_table [i]);
 328                 if (*ed_p == 0)
 329                     continue;
 330                 invalidate_dcache_ed(ed_p);
 331                 printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
 332                 while (*ed_p != 0 && j--) {
 333                         ed_t *ed = (ed_t *)m32_swap(ed_p);
 334                         invalidate_dcache_ed(ed);
 335                         printf(" ed: %4x;", ed->hwINFO);
 336                         ed_p = &ed->hwNextED;
 337                 }
 338                 printf("\n");
 339         }
 340 }
 341
 342 static void ohci_dump_intr_mask(char *label, __u32 mask)
 343 {
 344         dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
 345                 label,
 346                 mask,
 347                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
 348                 (mask & OHCI_INTR_OC) ? " OC" : "",
 349                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
 350                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
 351                 (mask & OHCI_INTR_UE) ? " UE" : "",
 352                 (mask & OHCI_INTR_RD) ? " RD" : "",
 353                 (mask & OHCI_INTR_SF) ? " SF" : "",
 354                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
 355                 (mask & OHCI_INTR_SO) ? " SO" : ""
 356                 );
 357 }
 358
 359 static void maybe_print_eds(char *label, __u32 value)
 360 {
 361         ed_t *edp = (ed_t *)value;
 362
 363         if (value) {
 364                 dbg("%s %08x", label, value);
 365                 invalidate_dcache_ed(edp);
 366                 dbg("%08x", edp->hwINFO);
 367                 dbg("%08x", edp->hwTailP);
 368                 dbg("%08x", edp->hwHeadP);
 369                 dbg("%08x", edp->hwNextED);
 370         }
 371 }
 372
 373 static char *hcfs2string(int state)
 374 {
 375         switch (state) {
 376         case OHCI_USB_RESET:    return "reset";
 377         case OHCI_USB_RESUME:   return "resume";
 378         case OHCI_USB_OPER:     return "operational";
 379         case OHCI_USB_SUSPEND:  return "suspend";
 380         }
 381         return "?";
 382 }
 383
 384 /* dump control and status registers */
 385 static void ohci_dump_status(ohci_t *controller)
 386 {
 387         struct ohci_regs        *regs = controller->regs;
 388         __u32                   temp;
 389
 390         temp = ohci_readl(&regs->revision) & 0xff;
 391         if (temp != 0x10)
 392                 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
 393
 394         temp = ohci_readl(&regs->control);
 395         dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
 396                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
 397                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
 398                 (temp & OHCI_CTRL_IR) ? " IR" : "",
 399                 hcfs2string(temp & OHCI_CTRL_HCFS),
 400                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
 401                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
 402                 (temp & OHCI_CTRL_IE) ? " IE" : "",
 403                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
 404                 temp & OHCI_CTRL_CBSR
 405                 );
 406
 407         temp = ohci_readl(&regs->cmdstatus);
 408         dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
 409                 (temp & OHCI_SOC) >> 16,
 410                 (temp & OHCI_OCR) ? " OCR" : "",
 411                 (temp & OHCI_BLF) ? " BLF" : "",
 412                 (temp & OHCI_CLF) ? " CLF" : "",
 413                 (temp & OHCI_HCR) ? " HCR" : ""
 414                 );
 415
 416         ohci_dump_intr_mask("intrstatus", ohci_readl(&regs->intrstatus));
 417         ohci_dump_intr_mask("intrenable", ohci_readl(&regs->intrenable));
 418
 419         maybe_print_eds("ed_periodcurrent",
 420                         ohci_readl(&regs->ed_periodcurrent));
 421
 422         maybe_print_eds("ed_controlhead", ohci_readl(&regs->ed_controlhead));
 423         maybe_print_eds("ed_controlcurrent",
 424                         ohci_readl(&regs->ed_controlcurrent));
 425
 426         maybe_print_eds("ed_bulkhead", ohci_readl(&regs->ed_bulkhead));
 427         maybe_print_eds("ed_bulkcurrent", ohci_readl(&regs->ed_bulkcurrent));
 428
 429         maybe_print_eds("donehead", ohci_readl(&regs->donehead));
 430 }
 431
 432 static void ohci_dump_roothub(ohci_t *controller, int verbose)
 433 {
 434         __u32                   temp, ndp, i;
 435
 436         temp = roothub_a(controller);
 437         ndp = (temp & RH_A_NDP);
 438 #ifdef CONFIG_AT91C_PQFP_UHPBUG
 439         ndp = (ndp == 2) ? 1:0;
 440 #endif
 441         if (verbose) {
 442                 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
 443                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
 444                         (temp & RH_A_NOCP) ? " NOCP" : "",
 445                         (temp & RH_A_OCPM) ? " OCPM" : "",
 446                         (temp & RH_A_DT) ? " DT" : "",
 447                         (temp & RH_A_NPS) ? " NPS" : "",
 448                         (temp & RH_A_PSM) ? " PSM" : "",
 449                         ndp
 450                         );
 451                 temp = roothub_b(controller);
 452                 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
 453                         temp,
 454                         (temp & RH_B_PPCM) >> 16,
 455                         (temp & RH_B_DR)
 456                         );
 457                 temp = roothub_status(controller);
 458                 dbg("roothub.status: %08x%s%s%s%s%s%s",
 459                         temp,
 460                         (temp & RH_HS_CRWE) ? " CRWE" : "",
 461                         (temp & RH_HS_OCIC) ? " OCIC" : "",
 462                         (temp & RH_HS_LPSC) ? " LPSC" : "",
 463                         (temp & RH_HS_DRWE) ? " DRWE" : "",
 464                         (temp & RH_HS_OCI) ? " OCI" : "",
 465                         (temp & RH_HS_LPS) ? " LPS" : ""
 466                         );
 467         }
 468
 469         for (i = 0; i < ndp; i++) {
 470                 temp = roothub_portstatus(controller, i);
 471                 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
 472                         i,
 473                         temp,
 474                         (temp & RH_PS_PRSC) ? " PRSC" : "",
 475                         (temp & RH_PS_OCIC) ? " OCIC" : "",
 476                         (temp & RH_PS_PSSC) ? " PSSC" : "",
 477                         (temp & RH_PS_PESC) ? " PESC" : "",
 478                         (temp & RH_PS_CSC) ? " CSC" : "",
 479
 480                         (temp & RH_PS_LSDA) ? " LSDA" : "",
 481                         (temp & RH_PS_PPS) ? " PPS" : "",
 482                         (temp & RH_PS_PRS) ? " PRS" : "",
 483                         (temp & RH_PS_POCI) ? " POCI" : "",
 484                         (temp & RH_PS_PSS) ? " PSS" : "",
 485
 486                         (temp & RH_PS_PES) ? " PES" : "",
 487                         (temp & RH_PS_CCS) ? " CCS" : ""
 488                         );
 489         }
 490 }
 491
 492 static void ohci_dump(ohci_t *controller, int verbose)
 493 {
 494         dbg("OHCI controller usb-%s state", controller->slot_name);
 495
 496         /* dumps some of the state we know about */
 497         ohci_dump_status(controller);
 498         if (verbose)
 499                 ep_print_int_eds(controller, "hcca");
 500         invalidate_dcache_hcca(controller->hcca);
 501         dbg("hcca frame #%04x", controller->hcca->frame_no);
 502         ohci_dump_roothub(controller, 1);
 503 }
 504 #endif /* DEBUG */
 505
 506 /*-------------------------------------------------------------------------*
 507  * Interface functions (URB)
 508  *-------------------------------------------------------------------------*/
 509
 510 /* get a transfer request */
 511
 512 int sohci_submit_job(ohci_t *ohci, ohci_dev_t *ohci_dev, urb_priv_t *urb,
 513                      struct devrequest *setup)
 514 {
 515         ed_t *ed;
 516         urb_priv_t *purb_priv = urb;
 517         int i, size = 0;
 518         struct usb_device *dev = urb->dev;
 519         unsigned long pipe = urb->pipe;
 520         void *buffer = urb->transfer_buffer;
 521         int transfer_len = urb->transfer_buffer_length;
 522         int interval = urb->interval;
 523
 524         /* when controller's hung, permit only roothub cleanup attempts
 525          * such as powering down ports */
 526         if (ohci->disabled) {
 527                 err("sohci_submit_job: EPIPE");
 528                 return -1;
 529         }
 530
 531         /* we're about to begin a new transaction here so mark the
 532          * URB unfinished */
 533         urb->finished = 0;
 534
 535         /* every endpoint has a ed, locate and fill it */
 536         ed = ep_add_ed(ohci_dev, dev, pipe, interval, 1);
 537         if (!ed) {
 538                 err("sohci_submit_job: ENOMEM");
 539                 return -1;
 540         }
 541
 542         /* for the private part of the URB we need the number of TDs (size) */
 543         switch (usb_pipetype(pipe)) {
 544         case PIPE_BULK: /* one TD for every 4096 Byte */
 545                 size = (transfer_len - 1) / 4096 + 1;
 546                 break;
 547         case PIPE_CONTROL:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
 548                 size = (transfer_len == 0)? 2:
 549                                         (transfer_len - 1) / 4096 + 3;
 550                 break;
 551         case PIPE_INTERRUPT: /* 1 TD */
 552                 size = 1;
 553                 break;
 554         }
 555
 556         ed->purb = urb;
 557
 558         if (size >= (N_URB_TD - 1)) {
 559                 err("need %d TDs, only have %d", size, N_URB_TD);
 560                 return -1;
 561         }
 562         purb_priv->pipe = pipe;
 563
 564         /* fill the private part of the URB */
 565         purb_priv->length = size;
 566         purb_priv->ed = ed;
 567         purb_priv->actual_length = 0;
 568
 569         /* allocate the TDs */
 570         /* note that td[0] was allocated in ep_add_ed */
 571         for (i = 0; i < size; i++) {
 572                 purb_priv->td[i] = td_alloc(ohci_dev, dev);
 573                 if (!purb_priv->td[i]) {
 574                         purb_priv->length = i;
 575                         urb_free_priv(purb_priv);
 576                         err("sohci_submit_job: ENOMEM");
 577                         return -1;
 578                 }
 579         }
 580
 581         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
 582                 urb_free_priv(purb_priv);
 583                 err("sohci_submit_job: EINVAL");
 584                 return -1;
 585         }
 586
 587         /* link the ed into a chain if is not already */
 588         if (ed->state != ED_OPER)
 589                 ep_link(ohci, ed);
 590
 591         /* fill the TDs and link it to the ed */
 592         td_submit_job(ohci, dev, pipe, buffer, transfer_len,
 593                       setup, purb_priv, interval);
 594
 595         return 0;
 596 }
 597
 598 /*-------------------------------------------------------------------------*/
 599
 600 #ifdef DEBUG
 601 /* tell us the current USB frame number */
 602 static int sohci_get_current_frame_number(ohci_t *ohci)
 603 {
 604         invalidate_dcache_hcca(ohci->hcca);
 605         return m16_swap(ohci->hcca->frame_no);
 606 }
 607 #endif
 608
 609 /*-------------------------------------------------------------------------*
 610  * ED handling functions
 611  *-------------------------------------------------------------------------*/
 612
 613 /* search for the right branch to insert an interrupt ed into the int tree
 614  * do some load ballancing;
 615  * returns the branch and
 616  * sets the interval to interval = 2^integer (ld (interval)) */
 617
 618 static int ep_int_ballance(ohci_t *ohci, int interval, int load)
 619 {
 620         int i, branch = 0;
 621
 622         /* search for the least loaded interrupt endpoint
 623          * branch of all 32 branches
 624          */
 625         for (i = 0; i < 32; i++)
 626                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
 627                         branch = i;
 628
 629         branch = branch % interval;
 630         for (i = branch; i < 32; i += interval)
 631                 ohci->ohci_int_load [i] += load;
 632
 633         return branch;
 634 }
 635
 636 /*-------------------------------------------------------------------------*/
 637
 638 /*  2^int( ld (inter)) */
 639
 640 static int ep_2_n_interval(int inter)
 641 {
 642         int i;
 643         for (i = 0; ((inter >> i) > 1) && (i < 5); i++);
 644         return 1 << i;
 645 }
 646
 647 /*-------------------------------------------------------------------------*/
 648
 649 /* the int tree is a binary tree
 650  * in order to process it sequentially the indexes of the branches have to
 651  * be mapped the mapping reverses the bits of a word of num_bits length */
 652 static int ep_rev(int num_bits, int word)
 653 {
 654         int i, wout = 0;
 655
 656         for (i = 0; i < num_bits; i++)
 657                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
 658         return wout;
 659 }
 660
 661 /*-------------------------------------------------------------------------*
 662  * ED handling functions
 663  *-------------------------------------------------------------------------*/
 664
 665 /* link an ed into one of the HC chains */
 666
 667 static int ep_link(ohci_t *ohci, ed_t *edi)
 668 {
 669         volatile ed_t *ed = edi;
 670         int int_branch;
 671         int i;
 672         int inter;
 673         int interval;
 674         int load;
 675         __u32 *ed_p;
 676
 677         ed->state = ED_OPER;
 678         ed->int_interval = 0;
 679
 680         switch (ed->type) {
 681         case PIPE_CONTROL:
 682                 ed->hwNextED = 0;
 683                 flush_dcache_ed(ed);
 684                 if (ohci->ed_controltail == NULL)
 685                         ohci_writel((uintptr_t)ed, &ohci->regs->ed_controlhead);
 686                 else
 687                         ohci->ed_controltail->hwNextED =
 688                                                    m32_swap((unsigned long)ed);
 689
 690                 ed->ed_prev = ohci->ed_controltail;
 691                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
 692                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 693                         ohci->hc_control |= OHCI_CTRL_CLE;
 694                         ohci_writel(ohci->hc_control, &ohci->regs->control);
 695                 }
 696                 ohci->ed_controltail = edi;
 697                 break;
 698
 699         case PIPE_BULK:
 700                 ed->hwNextED = 0;
 701                 flush_dcache_ed(ed);
 702                 if (ohci->ed_bulktail == NULL)
 703                         ohci_writel((uintptr_t)ed, &ohci->regs->ed_bulkhead);
 704                 else
 705                         ohci->ed_bulktail->hwNextED =
 706                                                    m32_swap((unsigned long)ed);
 707
 708                 ed->ed_prev = ohci->ed_bulktail;
 709                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
 710                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 711                         ohci->hc_control |= OHCI_CTRL_BLE;
 712                         ohci_writel(ohci->hc_control, &ohci->regs->control);
 713                 }
 714                 ohci->ed_bulktail = edi;
 715                 break;
 716
 717         case PIPE_INTERRUPT:
 718                 load = ed->int_load;
 719                 interval = ep_2_n_interval(ed->int_period);
 720                 ed->int_interval = interval;
 721                 int_branch = ep_int_ballance(ohci, interval, load);
 722                 ed->int_branch = int_branch;
 723
 724                 for (i = 0; i < ep_rev(6, interval); i += inter) {
 725                         inter = 1;
 726                         for (ed_p = &(ohci->hcca->int_table[\
 727                                                 ep_rev(5, i) + int_branch]);
 728                                 (*ed_p != 0) &&
 729                                 (((ed_t *)ed_p)->int_interval >= interval);
 730                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
 731                                         inter = ep_rev(6,
 732                                                  ((ed_t *)ed_p)->int_interval);
 733                         ed->hwNextED = *ed_p;
 734                         flush_dcache_ed(ed);
 735                         *ed_p = m32_swap((unsigned long)ed);
 736                         flush_dcache_hcca(ohci->hcca);
 737                 }
 738                 break;
 739         }
 740         return 0;
 741 }
 742
 743 /*-------------------------------------------------------------------------*/
 744
 745 /* scan the periodic table to find and unlink this ED */
 746 static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,
 747                             unsigned index, unsigned period)
 748 {
 749         __maybe_unused unsigned long aligned_ed_p;
 750
 751         for (; index < NUM_INTS; index += period) {
 752                 __u32   *ed_p = &ohci->hcca->int_table [index];
 753
 754                 /* ED might have been unlinked through another path */
 755                 while (*ed_p != 0) {
 756                         if (((struct ed *)(uintptr_t)
 757                                         m32_swap((unsigned long)ed_p)) == ed) {
 758                                 *ed_p = ed->hwNextED;
 759                                 aligned_ed_p = (unsigned long)ed_p;
 760                                 aligned_ed_p &= ~(ARCH_DMA_MINALIGN - 1);
 761                                 flush_dcache_range(aligned_ed_p,
 762                                         aligned_ed_p + ARCH_DMA_MINALIGN);
 763                                 break;
 764                         }
 765                         ed_p = &(((struct ed *)(uintptr_t)
 766                                      m32_swap((unsigned long)ed_p))->hwNextED);
 767                 }
 768         }
 769 }
 770
 771 /* unlink an ed from one of the HC chains.
 772  * just the link to the ed is unlinked.
 773  * the link from the ed still points to another operational ed or 0
 774  * so the HC can eventually finish the processing of the unlinked ed */
 775
 776 static int ep_unlink(ohci_t *ohci, ed_t *edi)
 777 {
 778         volatile ed_t *ed = edi;
 779         int i;
 780
 781         ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
 782         flush_dcache_ed(ed);
 783
 784         switch (ed->type) {
 785         case PIPE_CONTROL:
 786                 if (ed->ed_prev == NULL) {
 787                         if (!ed->hwNextED) {
 788                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
 789                                 ohci_writel(ohci->hc_control,
 790                                             &ohci->regs->control);
 791                         }
 792                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 793                                 &ohci->regs->ed_controlhead);
 794                 } else {
 795                         ed->ed_prev->hwNextED = ed->hwNextED;
 796                         flush_dcache_ed(ed->ed_prev);
 797                 }
 798                 if (ohci->ed_controltail == ed) {
 799                         ohci->ed_controltail = ed->ed_prev;
 800                 } else {
 801                         ((ed_t *)(uintptr_t)m32_swap(
 802                             *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 803                 }
 804                 break;
 805
 806         case PIPE_BULK:
 807                 if (ed->ed_prev == NULL) {
 808                         if (!ed->hwNextED) {
 809                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
 810                                 ohci_writel(ohci->hc_control,
 811                                             &ohci->regs->control);
 812                         }
 813                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 814                                &ohci->regs->ed_bulkhead);
 815                 } else {
 816                         ed->ed_prev->hwNextED = ed->hwNextED;
 817                         flush_dcache_ed(ed->ed_prev);
 818                 }
 819                 if (ohci->ed_bulktail == ed) {
 820                         ohci->ed_bulktail = ed->ed_prev;
 821                 } else {
 822                         ((ed_t *)(uintptr_t)m32_swap(
 823                              *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 824                 }
 825                 break;
 826
 827         case PIPE_INTERRUPT:
 828                 periodic_unlink(ohci, ed, 0, 1);
 829                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
 830                     ohci->ohci_int_load[i] -= ed->int_load;
 831                 break;
 832         }
 833         ed->state = ED_UNLINK;
 834         return 0;
 835 }
 836
 837 /*-------------------------------------------------------------------------*/
 838
 839 /* add/reinit an endpoint; this should be done once at the
 840  * usb_set_configuration command, but the USB stack is a little bit
 841  * stateless so we do it at every transaction if the state of the ed
 842  * is ED_NEW then a dummy td is added and the state is changed to
 843  * ED_UNLINK in all other cases the state is left unchanged the ed
 844  * info fields are setted anyway even though most of them should not
 845  * change
 846  */
 847 static ed_t *ep_add_ed(ohci_dev_t *ohci_dev, struct usb_device *usb_dev,
 848                        unsigned long pipe, int interval, int load)
 849 {
 850         td_t *td;
 851         ed_t *ed_ret;
 852         volatile ed_t *ed;
 853
 854         ed = ed_ret = &ohci_dev->ed[(usb_pipeendpoint(pipe) << 1) |
 855                         (usb_pipecontrol(pipe)? 0: usb_pipeout(pipe))];
 856
 857         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
 858                 err("ep_add_ed: pending delete");
 859                 /* pending delete request */
 860                 return NULL;
 861         }
 862
 863         if (ed->state == ED_NEW) {
 864                 /* dummy td; end of td list for ed */
 865                 td = td_alloc(ohci_dev, usb_dev);
 866                 ed->hwTailP = m32_swap((unsigned long)td);
 867                 ed->hwHeadP = ed->hwTailP;
 868                 ed->state = ED_UNLINK;
 869                 ed->type = usb_pipetype(pipe);
 870                 ohci_dev->ed_cnt++;
 871         }
 872
 873         ed->hwINFO = m32_swap(usb_pipedevice(pipe)
 874                         | usb_pipeendpoint(pipe) << 7
 875                         | (usb_pipeisoc(pipe)? 0x8000: 0)
 876                         | (usb_pipecontrol(pipe)? 0: \
 877                                            (usb_pipeout(pipe)? 0x800: 0x1000))
 878                         | (usb_dev->speed == USB_SPEED_LOW) << 13
 879                         | usb_maxpacket(usb_dev, pipe) << 16);
 880
 881         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
 882                 ed->int_period = interval;
 883                 ed->int_load = load;
 884         }
 885
 886         flush_dcache_ed(ed);
 887
 888         return ed_ret;
 889 }
 890
 891 /*-------------------------------------------------------------------------*
 892  * TD handling functions
 893  *-------------------------------------------------------------------------*/
 894
 895 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
 896
 897 static void td_fill(ohci_t *ohci, unsigned int info,
 898         void *data, int len,
 899         struct usb_device *dev, int index, urb_priv_t *urb_priv)
 900 {
 901         volatile td_t  *td, *td_pt;
 902 #ifdef OHCI_FILL_TRACE
 903         int i;
 904 #endif
 905
 906         if (index > urb_priv->length) {
 907                 err("index > length");
 908                 return;
 909         }
 910         /* use this td as the next dummy */
 911         td_pt = urb_priv->td [index];
 912         td_pt->hwNextTD = 0;
 913         flush_dcache_td(td_pt);
 914
 915         /* fill the old dummy TD */
 916         td = urb_priv->td [index] =
 917                              (td_t *)(uintptr_t)
 918                              (m32_swap(urb_priv->ed->hwTailP) & ~0xf);
 919
 920         td->ed = urb_priv->ed;
 921         td->next_dl_td = NULL;
 922         td->index = index;
 923         td->data = (uintptr_t)data;
 924 #ifdef OHCI_FILL_TRACE
 925         if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
 926                 for (i = 0; i < len; i++)
 927                 printf("td->data[%d] %#2x ", i, ((unsigned char *)td->data)[i]);
 928                 printf("\n");
 929         }
 930 #endif
 931         if (!len)
 932                 data = 0;
 933
 934         td->hwINFO = m32_swap(info);
 935         td->hwCBP = m32_swap((unsigned long)data);
 936         if (data)
 937                 td->hwBE = m32_swap((unsigned long)(data + len - 1));
 938         else
 939                 td->hwBE = 0;
 940
 941         td->hwNextTD = m32_swap((unsigned long)td_pt);
 942         flush_dcache_td(td);
 943
 944         /* append to queue */
 945         td->ed->hwTailP = td->hwNextTD;
 946         flush_dcache_ed(td->ed);
 947 }
 948
 949 /*-------------------------------------------------------------------------*/
 950
 951 /* prepare all TDs of a transfer */
 952
 953 static void td_submit_job(ohci_t *ohci, struct usb_device *dev,
 954                           unsigned long pipe, void *buffer, int transfer_len,
 955                           struct devrequest *setup, urb_priv_t *urb,
 956                           int interval)
 957 {
 958         int data_len = transfer_len;
 959         void *data;
 960         int cnt = 0;
 961         __u32 info = 0;
 962         unsigned int toggle = 0;
 963
 964         flush_dcache_buffer(buffer, data_len);
 965
 966         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle
 967          * bits for resetting */
 968         if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
 969                 toggle = TD_T_TOGGLE;
 970         } else {
 971                 toggle = TD_T_DATA0;
 972                 usb_settoggle(dev, usb_pipeendpoint(pipe),
 973                                 usb_pipeout(pipe), 1);
 974         }
 975         urb->td_cnt = 0;
 976         if (data_len)
 977                 data = buffer;
 978         else
 979                 data = 0;
 980
 981         switch (usb_pipetype(pipe)) {
 982         case PIPE_BULK:
 983                 info = usb_pipeout(pipe)?
 984                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
 985                 while (data_len > 4096) {
 986                         td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle),
 987                                 data, 4096, dev, cnt, urb);
 988                         data += 4096; data_len -= 4096; cnt++;
 989                 }
 990                 info = usb_pipeout(pipe)?
 991                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
 992                 td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle), data,
 993                         data_len, dev, cnt, urb);
 994                 cnt++;
 995
 996                 if (!ohci->sleeping) {
 997                         /* start bulk list */
 998                         ohci_writel(OHCI_BLF, &ohci->regs->cmdstatus);
 999                 }
1000                 break;
1001
1002         case PIPE_CONTROL:
1003                 /* Setup phase */
1004                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
1005                 flush_dcache_buffer(setup, 8);
1006                 td_fill(ohci, info, setup, 8, dev, cnt++, urb);
1007
1008                 /* Optional Data phase */
1009                 if (data_len > 0) {
1010                         info = usb_pipeout(pipe)?
1011                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
1012                                 TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
1013                         /* NOTE:  mishandles transfers >8K, some >4K */
1014                         td_fill(ohci, info, data, data_len, dev, cnt++, urb);
1015                 }
1016
1017                 /* Status phase */
1018                 info = (usb_pipeout(pipe) || data_len == 0) ?
1019                         TD_CC | TD_DP_IN | TD_T_DATA1:
1020                         TD_CC | TD_DP_OUT | TD_T_DATA1;
1021                 td_fill(ohci, info, data, 0, dev, cnt++, urb);
1022
1023                 if (!ohci->sleeping) {
1024                         /* start Control list */
1025                         ohci_writel(OHCI_CLF, &ohci->regs->cmdstatus);
1026                 }
1027                 break;
1028
1029         case PIPE_INTERRUPT:
1030                 info = usb_pipeout(urb->pipe)?
1031                         TD_CC | TD_DP_OUT | toggle:
1032                         TD_CC | TD_R | TD_DP_IN | toggle;
1033                 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
1034                 break;
1035         }
1036         if (urb->length != cnt)
1037                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
1038 }
1039
1040 /*-------------------------------------------------------------------------*
1041  * Done List handling functions
1042  *-------------------------------------------------------------------------*/
1043
1044 /* calculate the transfer length and update the urb */
1045
1046 static void dl_transfer_length(td_t *td)
1047 {
1048         __u32 tdBE, tdCBP;
1049         urb_priv_t *lurb_priv = td->ed->purb;
1050
1051         tdBE   = m32_swap(td->hwBE);
1052         tdCBP  = m32_swap(td->hwCBP);
1053
1054         if (!(usb_pipecontrol(lurb_priv->pipe) &&
1055             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
1056                 if (tdBE != 0) {
1057                         if (td->hwCBP == 0)
1058                                 lurb_priv->actual_length += tdBE - td->data + 1;
1059                         else
1060                                 lurb_priv->actual_length += tdCBP - td->data;
1061                 }
1062         }
1063 }
1064
1065 /*-------------------------------------------------------------------------*/
1066 static void check_status(td_t *td_list)
1067 {
1068         urb_priv_t *lurb_priv = td_list->ed->purb;
1069         int        urb_len    = lurb_priv->length;
1070         __u32      *phwHeadP  = &td_list->ed->hwHeadP;
1071         int        cc;
1072
1073         cc = TD_CC_GET(m32_swap(td_list->hwINFO));
1074         if (cc) {
1075                 err(" USB-error: %s (%x)", cc_to_string[cc], cc);
1076
1077                 invalidate_dcache_ed(td_list->ed);
1078                 if (*phwHeadP & m32_swap(0x1)) {
1079                         if (lurb_priv &&
1080                             ((td_list->index + 1) < urb_len)) {
1081                                 *phwHeadP =
1082                                         (lurb_priv->td[urb_len - 1]->hwNextTD &\
1083                                                         m32_swap(0xfffffff0)) |
1084                                                    (*phwHeadP & m32_swap(0x2));
1085
1086                                 lurb_priv->td_cnt += urb_len -
1087                                                      td_list->index - 1;
1088                         } else
1089                                 *phwHeadP &= m32_swap(0xfffffff2);
1090                         flush_dcache_ed(td_list->ed);
1091                 }
1092 #ifdef CONFIG_MPC5200
1093                 td_list->hwNextTD = 0;
1094                 flush_dcache_td(td_list);
1095 #endif
1096         }
1097 }
1098
1099 /* replies to the request have to be on a FIFO basis so
1100  * we reverse the reversed done-list */
1101 static td_t *dl_reverse_done_list(ohci_t *ohci)
1102 {
1103         uintptr_t td_list_hc;
1104         td_t *td_rev = NULL;
1105         td_t *td_list = NULL;
1106
1107         invalidate_dcache_hcca(ohci->hcca);
1108         td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
1109         ohci->hcca->done_head = 0;
1110         flush_dcache_hcca(ohci->hcca);
1111
1112         while (td_list_hc) {
1113                 td_list = (td_t *)td_list_hc;
1114                 invalidate_dcache_td(td_list);
1115                 check_status(td_list);
1116                 td_list->next_dl_td = td_rev;
1117                 td_rev = td_list;
1118                 td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
1119         }
1120         return td_list;
1121 }
1122
1123 /*-------------------------------------------------------------------------*/
1124 /*-------------------------------------------------------------------------*/
1125
1126 static void finish_urb(ohci_t *ohci, urb_priv_t *urb, int status)
1127 {
1128         if ((status & (ED_OPER | ED_UNLINK)) && (urb->state != URB_DEL))
1129                 urb->finished = 1;
1130         else
1131                 dbg("finish_urb: strange.., ED state %x, \n", status);
1132 }
1133
1134 /*
1135  * Used to take back a TD from the host controller. This would normally be
1136  * called from within dl_done_list, however it may be called directly if the
1137  * HC no longer sees the TD and it has not appeared on the donelist (after
1138  * two frames).  This bug has been observed on ZF Micro systems.
1139  */
1140 static int takeback_td(ohci_t *ohci, td_t *td_list)
1141 {
1142         ed_t *ed;
1143         int cc;
1144         int stat = 0;
1145         /* urb_t *urb; */
1146         urb_priv_t *lurb_priv;
1147         __u32 tdINFO, edHeadP, edTailP;
1148
1149         invalidate_dcache_td(td_list);
1150         tdINFO = m32_swap(td_list->hwINFO);
1151
1152         ed = td_list->ed;
1153         lurb_priv = ed->purb;
1154
1155         dl_transfer_length(td_list);
1156
1157         lurb_priv->td_cnt++;
1158
1159         /* error code of transfer */
1160         cc = TD_CC_GET(tdINFO);
1161         if (cc) {
1162                 err("USB-error: %s (%x)", cc_to_string[cc], cc);
1163                 stat = cc_to_error[cc];
1164         }
1165
1166         /* see if this done list makes for all TD's of current URB,
1167         * and mark the URB finished if so */
1168         if (lurb_priv->td_cnt == lurb_priv->length)
1169                 finish_urb(ohci, lurb_priv, ed->state);
1170
1171         dbg("dl_done_list: processing TD %x, len %x\n",
1172                 lurb_priv->td_cnt, lurb_priv->length);
1173
1174         if (ed->state != ED_NEW && (!usb_pipeint(lurb_priv->pipe))) {
1175                 invalidate_dcache_ed(ed);
1176                 edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
1177                 edTailP = m32_swap(ed->hwTailP);
1178
1179                 /* unlink eds if they are not busy */
1180                 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1181                         ep_unlink(ohci, ed);
1182         }
1183         return stat;
1184 }
1185
1186 static int dl_done_list(ohci_t *ohci)
1187 {
1188         int stat = 0;
1189         td_t    *td_list = dl_reverse_done_list(ohci);
1190
1191         while (td_list) {
1192                 td_t    *td_next = td_list->next_dl_td;
1193                 stat = takeback_td(ohci, td_list);
1194                 td_list = td_next;
1195         }
1196         return stat;
1197 }
1198
1199 /*-------------------------------------------------------------------------*
1200  * Virtual Root Hub
1201  *-------------------------------------------------------------------------*/
1202
1203 #include <usbroothubdes.h>
1204
1205 /* Hub class-specific descriptor is constructed dynamically */
1206
1207 /*-------------------------------------------------------------------------*/
1208
1209 #define OK(x)                   len = (x); break
1210 #ifdef DEBUG
1211 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x)); ohci_writel((x), \
1212                                                 &ohci->regs->roothub.status); }
1213 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, \
1214         (x)); ohci_writel((x), &ohci->regs->roothub.portstatus[wIndex-1]); }
1215 #else
1216 #define WR_RH_STAT(x)           ohci_writel((x), &ohci->regs->roothub.status)
1217 #define WR_RH_PORTSTAT(x)       ohci_writel((x), \
1218                                     &ohci->regs->roothub.portstatus[wIndex-1])
1219 #endif
1220 #define RD_RH_STAT              roothub_status(ohci)
1221 #define RD_RH_PORTSTAT          roothub_portstatus(ohci, wIndex-1)
1222
1223 /* request to virtual root hub */
1224
1225 int rh_check_port_status(ohci_t *controller)
1226 {
1227         __u32 temp, ndp, i;
1228         int res;
1229
1230         res = -1;
1231         temp = roothub_a(controller);
1232         ndp = (temp & RH_A_NDP);
1233 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1234         ndp = (ndp == 2) ? 1:0;
1235 #endif
1236         for (i = 0; i < ndp; i++) {
1237                 temp = roothub_portstatus(controller, i);
1238                 /* check for a device disconnect */
1239                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1240                         (RH_PS_PESC | RH_PS_CSC)) &&
1241                         ((temp & RH_PS_CCS) == 0)) {
1242                         res = i;
1243                         break;
1244                 }
1245         }
1246         return res;
1247 }
1248
1249 static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev,
1250         unsigned long pipe, void *buffer, int transfer_len,
1251         struct devrequest *cmd)
1252 {
1253         void *data = buffer;
1254         int leni = transfer_len;
1255         int len = 0;
1256         int stat = 0;
1257         __u16 bmRType_bReq;
1258         __u16 wValue;
1259         __u16 wIndex;
1260         __u16 wLength;
1261         ALLOC_ALIGN_BUFFER(__u8, databuf, 16, sizeof(u32));
1262
1263 #ifdef DEBUG
1264 pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len,
1265           cmd, "SUB(rh)", usb_pipein(pipe));
1266 #else
1267         ohci_mdelay(1);
1268 #endif
1269         if (usb_pipeint(pipe)) {
1270                 info("Root-Hub submit IRQ: NOT implemented");
1271                 return 0;
1272         }
1273
1274         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1275         wValue        = le16_to_cpu(cmd->value);
1276         wIndex        = le16_to_cpu(cmd->index);
1277         wLength       = le16_to_cpu(cmd->length);
1278
1279         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1280                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1281
1282         switch (bmRType_bReq) {
1283         /* Request Destination:
1284            without flags: Device,
1285            RH_INTERFACE: interface,
1286            RH_ENDPOINT: endpoint,
1287            RH_CLASS means HUB here,
1288            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1289         */
1290
1291         case RH_GET_STATUS:
1292                 *(u16 *)databuf = cpu_to_le16(1);
1293                 OK(2);
1294         case RH_GET_STATUS | RH_INTERFACE:
1295                 *(u16 *)databuf = cpu_to_le16(0);
1296                 OK(2);
1297         case RH_GET_STATUS | RH_ENDPOINT:
1298                 *(u16 *)databuf = cpu_to_le16(0);
1299                 OK(2);
1300         case RH_GET_STATUS | RH_CLASS:
1301                 *(u32 *)databuf = cpu_to_le32(
1302                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1303                 OK(4);
1304         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1305                 *(u32 *)databuf = cpu_to_le32(RD_RH_PORTSTAT);
1306                 OK(4);
1307
1308         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1309                 switch (wValue) {
1310                 case (RH_ENDPOINT_STALL):
1311                         OK(0);
1312                 }
1313                 break;
1314
1315         case RH_CLEAR_FEATURE | RH_CLASS:
1316                 switch (wValue) {
1317                 case RH_C_HUB_LOCAL_POWER:
1318                         OK(0);
1319                 case (RH_C_HUB_OVER_CURRENT):
1320                         WR_RH_STAT(RH_HS_OCIC);
1321                         OK(0);
1322                 }
1323                 break;
1324
1325         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1326                 switch (wValue) {
1327                 case (RH_PORT_ENABLE):        WR_RH_PORTSTAT(RH_PS_CCS);  OK(0);
1328                 case (RH_PORT_SUSPEND):       WR_RH_PORTSTAT(RH_PS_POCI); OK(0);
1329                 case (RH_PORT_POWER):         WR_RH_PORTSTAT(RH_PS_LSDA); OK(0);
1330                 case (RH_C_PORT_CONNECTION):  WR_RH_PORTSTAT(RH_PS_CSC);  OK(0);
1331                 case (RH_C_PORT_ENABLE):      WR_RH_PORTSTAT(RH_PS_PESC); OK(0);
1332                 case (RH_C_PORT_SUSPEND):     WR_RH_PORTSTAT(RH_PS_PSSC); OK(0);
1333                 case (RH_C_PORT_OVER_CURRENT):WR_RH_PORTSTAT(RH_PS_OCIC); OK(0);
1334                 case (RH_C_PORT_RESET):       WR_RH_PORTSTAT(RH_PS_PRSC); OK(0);
1335                 }
1336                 break;
1337
1338         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1339                 switch (wValue) {
1340                 case (RH_PORT_SUSPEND):
1341                         WR_RH_PORTSTAT(RH_PS_PSS);  OK(0);
1342                 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1343                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1344                                 WR_RH_PORTSTAT(RH_PS_PRS);
1345                         OK(0);
1346                 case (RH_PORT_POWER):
1347                         WR_RH_PORTSTAT(RH_PS_PPS);
1348                         OK(0);
1349                 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1350                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1351                                 WR_RH_PORTSTAT(RH_PS_PES);
1352                         OK(0);
1353                 }
1354                 break;
1355
1356         case RH_SET_ADDRESS:
1357                 ohci->rh.devnum = wValue;
1358                 OK(0);
1359
1360         case RH_GET_DESCRIPTOR:
1361                 switch ((wValue & 0xff00) >> 8) {
1362                 case (0x01): /* device descriptor */
1363                         len = min_t(unsigned int,
1364                                         leni,
1365                                         min_t(unsigned int,
1366                                         sizeof(root_hub_dev_des),
1367                                         wLength));
1368                         databuf = root_hub_dev_des; OK(len);
1369                 case (0x02): /* configuration descriptor */
1370                         len = min_t(unsigned int,
1371                                         leni,
1372                                         min_t(unsigned int,
1373                                         sizeof(root_hub_config_des),
1374                                         wLength));
1375                         databuf = root_hub_config_des; OK(len);
1376                 case (0x03): /* string descriptors */
1377                         if (wValue == 0x0300) {
1378                                 len = min_t(unsigned int,
1379                                                 leni,
1380                                                 min_t(unsigned int,
1381                                                 sizeof(root_hub_str_index0),
1382                                                 wLength));
1383                                 databuf = root_hub_str_index0;
1384                                 OK(len);
1385                         }
1386                         if (wValue == 0x0301) {
1387                                 len = min_t(unsigned int,
1388                                                 leni,
1389                                                 min_t(unsigned int,
1390                                                 sizeof(root_hub_str_index1),
1391                                                 wLength));
1392                                 databuf = root_hub_str_index1;
1393                                 OK(len);
1394                 }
1395                 default:
1396                         stat = USB_ST_STALLED;
1397                 }
1398                 break;
1399
1400         case RH_GET_DESCRIPTOR | RH_CLASS:
1401         {
1402                 __u32 temp = roothub_a(ohci);
1403
1404                 databuf[0] = 9;         /* min length; */
1405                 databuf[1] = 0x29;
1406                 databuf[2] = temp & RH_A_NDP;
1407 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1408                 databuf[2] = (databuf[2] == 2) ? 1 : 0;
1409 #endif
1410                 databuf[3] = 0;
1411                 if (temp & RH_A_PSM)    /* per-port power switching? */
1412                         databuf[3] |= 0x1;
1413                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1414                         databuf[3] |= 0x10;
1415                 else if (temp & RH_A_OCPM)/* per-port overcurrent reporting? */
1416                         databuf[3] |= 0x8;
1417
1418                 databuf[4] = 0;
1419                 databuf[5] = (temp & RH_A_POTPGT) >> 24;
1420                 databuf[6] = 0;
1421                 temp = roothub_b(ohci);
1422                 databuf[7] = temp & RH_B_DR;
1423                 if (databuf[2] < 7) {
1424                         databuf[8] = 0xff;
1425                 } else {
1426                         databuf[0] += 2;
1427                         databuf[8] = (temp & RH_B_DR) >> 8;
1428                         databuf[10] = databuf[9] = 0xff;
1429                 }
1430
1431                 len = min_t(unsigned int, leni,
1432                             min_t(unsigned int, databuf[0], wLength));
1433                 OK(len);
1434         }
1435
1436         case RH_GET_CONFIGURATION:
1437                 databuf[0] = 0x01;
1438                 OK(1);
1439
1440         case RH_SET_CONFIGURATION:
1441                 WR_RH_STAT(0x10000);
1442                 OK(0);
1443
1444         default:
1445                 dbg("unsupported root hub command");
1446                 stat = USB_ST_STALLED;
1447         }
1448
1449 #ifdef  DEBUG
1450         ohci_dump_roothub(ohci, 1);
1451 #else
1452         ohci_mdelay(1);
1453 #endif
1454
1455         len = min_t(int, len, leni);
1456         if (data != databuf)
1457                 memcpy(data, databuf, len);
1458         dev->act_len = len;
1459         dev->status = stat;
1460
1461 #ifdef DEBUG
1462         pkt_print(ohci, NULL, dev, pipe, buffer,
1463                   transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1464 #else
1465         ohci_mdelay(1);
1466 #endif
1467
1468         return stat;
1469 }
1470
1471 /*-------------------------------------------------------------------------*/
1472
1473 static ohci_dev_t *ohci_get_ohci_dev(ohci_t *ohci, int devnum, int intr)
1474 {
1475         int i;
1476
1477         if (!intr)
1478                 return &ohci->ohci_dev;
1479
1480         /* First see if we already have an ohci_dev for this dev. */
1481         for (i = 0; i < NUM_INT_DEVS; i++) {
1482                 if (ohci->int_dev[i].devnum == devnum)
1483                         return &ohci->int_dev[i];
1484         }
1485
1486         /* If not then find a free one. */
1487         for (i = 0; i < NUM_INT_DEVS; i++) {
1488                 if (ohci->int_dev[i].devnum == -1) {
1489                         ohci->int_dev[i].devnum = devnum;
1490                         return &ohci->int_dev[i];
1491                 }
1492         }
1493
1494         printf("ohci: Error out of ohci_devs for interrupt endpoints\n");
1495         return NULL;
1496 }
1497
1498 /* common code for handling submit messages - used for all but root hub */
1499 /* accesses. */
1500 static urb_priv_t *ohci_alloc_urb(struct usb_device *dev, unsigned long pipe,
1501                 void *buffer, int transfer_len, int interval)
1502 {
1503         urb_priv_t *urb;
1504
1505         urb = calloc(1, sizeof(urb_priv_t));
1506         if (!urb) {
1507                 printf("ohci: Error out of memory allocating urb\n");
1508                 return NULL;
1509         }
1510
1511         urb->dev = dev;
1512         urb->pipe = pipe;
1513         urb->transfer_buffer = buffer;
1514         urb->transfer_buffer_length = transfer_len;
1515         urb->interval = interval;
1516
1517         return urb;
1518 }
1519
1520 static int submit_common_msg(ohci_t *ohci, struct usb_device *dev,
1521                 unsigned long pipe, void *buffer, int transfer_len,
1522                 struct devrequest *setup, int interval)
1523 {
1524         int stat = 0;
1525         int maxsize = usb_maxpacket(dev, pipe);
1526         int timeout;
1527         urb_priv_t *urb;
1528         ohci_dev_t *ohci_dev;
1529
1530         urb = ohci_alloc_urb(dev, pipe, buffer, transfer_len, interval);
1531         if (!urb)
1532                 return -ENOMEM;
1533
1534 #ifdef DEBUG
1535         urb->actual_length = 0;
1536         pkt_print(ohci, urb, dev, pipe, buffer, transfer_len,
1537                   setup, "SUB", usb_pipein(pipe));
1538 #else
1539         ohci_mdelay(1);
1540 #endif
1541         if (!maxsize) {
1542                 err("submit_common_message: pipesize for pipe %lx is zero",
1543                         pipe);
1544                 return -1;
1545         }
1546
1547         ohci_dev = ohci_get_ohci_dev(ohci, dev->devnum, usb_pipeint(pipe));
1548         if (!ohci_dev)
1549                 return -ENOMEM;
1550
1551         if (sohci_submit_job(ohci, ohci_dev, urb, setup) < 0) {
1552                 err("sohci_submit_job failed");
1553                 return -1;
1554         }
1555
1556 #if 0
1557         mdelay(10);
1558         /* ohci_dump_status(ohci); */
1559 #endif
1560
1561         timeout = USB_TIMEOUT_MS(pipe);
1562
1563         /* wait for it to complete */
1564         for (;;) {
1565                 /* check whether the controller is done */
1566                 stat = hc_interrupt(ohci);
1567                 if (stat < 0) {
1568                         stat = USB_ST_CRC_ERR;
1569                         break;
1570                 }
1571
1572                 /* NOTE: since we are not interrupt driven in U-Boot and always
1573                  * handle only one URB at a time, we cannot assume the
1574                  * transaction finished on the first successful return from
1575                  * hc_interrupt().. unless the flag for current URB is set,
1576                  * meaning that all TD's to/from device got actually
1577                  * transferred and processed. If the current URB is not
1578                  * finished we need to re-iterate this loop so as
1579                  * hc_interrupt() gets called again as there needs to be some
1580                  * more TD's to process still */
1581                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1582                         /* 0xff is returned for an SF-interrupt */
1583                         break;
1584                 }
1585
1586                 if (--timeout) {
1587                         mdelay(1);
1588                         if (!urb->finished)
1589                                 dbg("*");
1590
1591                 } else {
1592                         if (!usb_pipeint(pipe))
1593                                 err("CTL:TIMEOUT ");
1594                         dbg("submit_common_msg: TO status %x\n", stat);
1595                         urb->finished = 1;
1596                         stat = USB_ST_CRC_ERR;
1597                         break;
1598                 }
1599         }
1600
1601         dev->status = stat;
1602         dev->act_len = urb->actual_length;
1603
1604         if (usb_pipein(pipe) && dev->status == 0 && dev->act_len)
1605                 invalidate_dcache_buffer(buffer, dev->act_len);
1606
1607 #ifdef DEBUG
1608         pkt_print(ohci, urb, dev, pipe, buffer, transfer_len,
1609                   setup, "RET(ctlr)", usb_pipein(pipe));
1610 #else
1611         ohci_mdelay(1);
1612 #endif
1613         urb_free_priv(urb);
1614         return 0;
1615 }
1616
1617 #define MAX_INT_QUEUESIZE 8
1618
1619 struct int_queue {
1620         int queuesize;
1621         int curr_urb;
1622         urb_priv_t *urb[MAX_INT_QUEUESIZE];
1623 };
1624
1625 static struct int_queue *_ohci_create_int_queue(ohci_t *ohci,
1626                 struct usb_device *udev, unsigned long pipe, int queuesize,
1627                 int elementsize, void *buffer, int interval)
1628 {
1629         struct int_queue *queue;
1630         ohci_dev_t *ohci_dev;
1631         int i;
1632
1633         if (queuesize > MAX_INT_QUEUESIZE)
1634                 return NULL;
1635
1636         ohci_dev = ohci_get_ohci_dev(ohci, udev->devnum, 1);
1637         if (!ohci_dev)
1638                 return NULL;
1639
1640         queue = malloc(sizeof(*queue));
1641         if (!queue) {
1642                 printf("ohci: Error out of memory allocating int queue\n");
1643                 return NULL;
1644         }
1645
1646         for (i = 0; i < queuesize; i++) {
1647                 queue->urb[i] = ohci_alloc_urb(udev, pipe,
1648                                                buffer + i * elementsize,
1649                                                elementsize, interval);
1650                 if (!queue->urb[i])
1651                         break;
1652
1653                 if (sohci_submit_job(ohci, ohci_dev, queue->urb[i], NULL)) {
1654                         printf("ohci: Error submitting int queue job\n");
1655                         urb_free_priv(queue->urb[i]);
1656                         break;
1657                 }
1658         }
1659         if (i == 0) {
1660                 /* We did not succeed in submitting even 1 urb */
1661                 free(queue);
1662                 return NULL;
1663         }
1664
1665         queue->queuesize = i;
1666         queue->curr_urb = 0;
1667
1668         return queue;
1669 }
1670
1671 static void *_ohci_poll_int_queue(ohci_t *ohci, struct usb_device *udev,
1672                                   struct int_queue *queue)
1673 {
1674         if (queue->curr_urb == queue->queuesize)
1675                 return NULL; /* Queue depleted */
1676
1677         if (hc_interrupt(ohci) < 0)
1678                 return NULL;
1679
1680         if (queue->urb[queue->curr_urb]->finished) {
1681                 void *ret = queue->urb[queue->curr_urb]->transfer_buffer;
1682                 queue->curr_urb++;
1683                 return ret;
1684         }
1685
1686         return NULL;
1687 }
1688
1689 static int _ohci_destroy_int_queue(ohci_t *ohci, struct usb_device *dev,
1690                                    struct int_queue *queue)
1691 {
1692         int i;
1693
1694         for (i = 0; i < queue->queuesize; i++)
1695                 urb_free_priv(queue->urb[i]);
1696
1697         free(queue);
1698
1699         return 0;
1700 }
1701
1702 #ifndef CONFIG_DM_USB
1703 /* submit routines called from usb.c */
1704 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1705                 int transfer_len)
1706 {
1707         info("submit_bulk_msg");
1708         return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len,
1709                                  NULL, 0);
1710 }
1711
1712 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1713                 int transfer_len, int interval)
1714 {
1715         info("submit_int_msg");
1716         return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len, NULL,
1717                         interval);
1718 }
1719
1720 struct int_queue *create_int_queue(struct usb_device *dev,
1721                 unsigned long pipe, int queuesize, int elementsize,
1722                 void *buffer, int interval)
1723 {
1724         return _ohci_create_int_queue(&gohci, dev, pipe, queuesize,
1725                                       elementsize, buffer, interval);
1726 }
1727
1728 void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1729 {
1730         return _ohci_poll_int_queue(&gohci, dev, queue);
1731 }
1732
1733 int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1734 {
1735         return _ohci_destroy_int_queue(&gohci, dev, queue);
1736 }
1737 #endif
1738
1739 static int _ohci_submit_control_msg(ohci_t *ohci, struct usb_device *dev,
1740         unsigned long pipe, void *buffer, int transfer_len,
1741         struct devrequest *setup)
1742 {
1743         int maxsize = usb_maxpacket(dev, pipe);
1744
1745         info("submit_control_msg");
1746 #ifdef DEBUG
1747         pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len,
1748                   setup, "SUB", usb_pipein(pipe));
1749 #else
1750         ohci_mdelay(1);
1751 #endif
1752         if (!maxsize) {
1753                 err("submit_control_message: pipesize for pipe %lx is zero",
1754                         pipe);
1755                 return -1;
1756         }
1757         if (((pipe >> 8) & 0x7f) == ohci->rh.devnum) {
1758                 ohci->rh.dev = dev;
1759                 /* root hub - redirect */
1760                 return ohci_submit_rh_msg(ohci, dev, pipe, buffer,
1761                                           transfer_len, setup);
1762         }
1763
1764         return submit_common_msg(ohci, dev, pipe, buffer, transfer_len,
1765                                  setup, 0);
1766 }
1767
1768 /*-------------------------------------------------------------------------*
1769  * HC functions
1770  *-------------------------------------------------------------------------*/
1771
1772 /* reset the HC and BUS */
1773
1774 static int hc_reset(ohci_t *ohci)
1775 {
1776 #ifdef CONFIG_PCI_EHCI_DEVNO
1777         pci_dev_t pdev;
1778 #endif
1779         int timeout = 30;
1780         int smm_timeout = 50; /* 0,5 sec */
1781
1782         dbg("%s\n", __FUNCTION__);
1783
1784 #ifdef CONFIG_PCI_EHCI_DEVNO
1785         /*
1786          *  Some multi-function controllers (e.g. ISP1562) allow root hub
1787          * resetting via EHCI registers only.
1788          */
1789         pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVNO);
1790         if (pdev != -1) {
1791                 u32 base;
1792                 int timeout = 1000;
1793
1794                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1795                 base += EHCI_USBCMD_OFF;
1796                 ohci_writel(ohci_readl(base) | EHCI_USBCMD_HCRESET, base);
1797
1798                 while (ohci_readl(base) & EHCI_USBCMD_HCRESET) {
1799                         if (timeout-- <= 0) {
1800                                 printf("USB RootHub reset timed out!");
1801                                 break;
1802                         }
1803                         udelay(1);
1804                 }
1805         } else
1806                 printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
1807 #endif
1808         if (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1809                 /* SMM owns the HC, request ownership */
1810                 ohci_writel(OHCI_OCR, &ohci->regs->cmdstatus);
1811                 info("USB HC TakeOver from SMM");
1812                 while (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1813                         mdelay(10);
1814                         if (--smm_timeout == 0) {
1815                                 err("USB HC TakeOver failed!");
1816                                 return -1;
1817                         }
1818                 }
1819         }
1820
1821         /* Disable HC interrupts */
1822         ohci_writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
1823
1824         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1825                 ohci->slot_name,
1826                 ohci_readl(&ohci->regs->control));
1827
1828         /* Reset USB (needed by some controllers) */
1829         ohci->hc_control = 0;
1830         ohci_writel(ohci->hc_control, &ohci->regs->control);
1831
1832         /* HC Reset requires max 10 us delay */
1833         ohci_writel(OHCI_HCR,  &ohci->regs->cmdstatus);
1834         while ((ohci_readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1835                 if (--timeout == 0) {
1836                         err("USB HC reset timed out!");
1837                         return -1;
1838                 }
1839                 udelay(1);
1840         }
1841         return 0;
1842 }
1843
1844 /*-------------------------------------------------------------------------*/
1845
1846 /* Start an OHCI controller, set the BUS operational
1847  * enable interrupts
1848  * connect the virtual root hub */
1849
1850 static int hc_start(ohci_t *ohci)
1851 {
1852         __u32 mask;
1853         unsigned int fminterval;
1854         int i;
1855
1856         ohci->disabled = 1;
1857         for (i = 0; i < NUM_INT_DEVS; i++)
1858                 ohci->int_dev[i].devnum = -1;
1859
1860         /* Tell the controller where the control and bulk lists are
1861          * The lists are empty now. */
1862
1863         ohci_writel(0, &ohci->regs->ed_controlhead);
1864         ohci_writel(0, &ohci->regs->ed_bulkhead);
1865
1866         ohci_writel((uintptr_t)ohci->hcca,
1867                     &ohci->regs->hcca); /* reset clears this */
1868
1869         fminterval = 0x2edf;
1870         ohci_writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
1871         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1872         ohci_writel(fminterval, &ohci->regs->fminterval);
1873         ohci_writel(0x628, &ohci->regs->lsthresh);
1874
1875         /* start controller operations */
1876         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1877         ohci->disabled = 0;
1878         ohci_writel(ohci->hc_control, &ohci->regs->control);
1879
1880         /* disable all interrupts */
1881         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1882                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1883                         OHCI_INTR_OC | OHCI_INTR_MIE);
1884         ohci_writel(mask, &ohci->regs->intrdisable);
1885         /* clear all interrupts */
1886         mask &= ~OHCI_INTR_MIE;
1887         ohci_writel(mask, &ohci->regs->intrstatus);
1888         /* Choose the interrupts we care about now  - but w/o MIE */
1889         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1890         ohci_writel(mask, &ohci->regs->intrenable);
1891
1892 #ifdef  OHCI_USE_NPS
1893         /* required for AMD-756 and some Mac platforms */
1894         ohci_writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1895                 &ohci->regs->roothub.a);
1896         ohci_writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1897 #endif  /* OHCI_USE_NPS */
1898
1899         /* connect the virtual root hub */
1900         ohci->rh.devnum = 0;
1901
1902         return 0;
1903 }
1904
1905 /*-------------------------------------------------------------------------*/
1906
1907 /* an interrupt happens */
1908
1909 static int hc_interrupt(ohci_t *ohci)
1910 {
1911         struct ohci_regs *regs = ohci->regs;
1912         int ints;
1913         int stat = -1;
1914
1915         invalidate_dcache_hcca(ohci->hcca);
1916
1917         if ((ohci->hcca->done_head != 0) &&
1918                                 !(m32_swap(ohci->hcca->done_head) & 0x01)) {
1919                 ints =  OHCI_INTR_WDH;
1920         } else {
1921                 ints = ohci_readl(&regs->intrstatus);
1922                 if (ints == ~(u32)0) {
1923                         ohci->disabled++;
1924                         err("%s device removed!", ohci->slot_name);
1925                         return -1;
1926                 } else {
1927                         ints &= ohci_readl(&regs->intrenable);
1928                         if (ints == 0) {
1929                                 dbg("hc_interrupt: returning..\n");
1930                                 return 0xff;
1931                         }
1932                 }
1933         }
1934
1935         /* dbg("Interrupt: %x frame: %x", ints,
1936                                         le16_to_cpu(ohci->hcca->frame_no)); */
1937
1938         if (ints & OHCI_INTR_RHSC)
1939                 stat = 0xff;
1940
1941         if (ints & OHCI_INTR_UE) {
1942                 ohci->disabled++;
1943                 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1944                         ohci->slot_name);
1945                 /* e.g. due to PCI Master/Target Abort */
1946
1947 #ifdef  DEBUG
1948                 ohci_dump(ohci, 1);
1949 #else
1950                 ohci_mdelay(1);
1951 #endif
1952                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1953                 /* Make some non-interrupt context restart the controller. */
1954                 /* Count and limit the retries though; either hardware or */
1955                 /* software errors can go forever... */
1956                 hc_reset(ohci);
1957                 return -1;
1958         }
1959
1960         if (ints & OHCI_INTR_WDH) {
1961                 ohci_mdelay(1);
1962                 ohci_writel(OHCI_INTR_WDH, &regs->intrdisable);
1963                 (void)ohci_readl(&regs->intrdisable); /* flush */
1964                 stat = dl_done_list(ohci);
1965                 ohci_writel(OHCI_INTR_WDH, &regs->intrenable);
1966                 (void)ohci_readl(&regs->intrdisable); /* flush */
1967         }
1968
1969         if (ints & OHCI_INTR_SO) {
1970                 dbg("USB Schedule overrun\n");
1971                 ohci_writel(OHCI_INTR_SO, &regs->intrenable);
1972                 stat = -1;
1973         }
1974
1975         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1976         if (ints & OHCI_INTR_SF) {
1977                 unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
1978                 mdelay(1);
1979                 ohci_writel(OHCI_INTR_SF, &regs->intrdisable);
1980                 if (ohci->ed_rm_list[frame] != NULL)
1981                         ohci_writel(OHCI_INTR_SF, &regs->intrenable);
1982                 stat = 0xff;
1983         }
1984
1985         ohci_writel(ints, &regs->intrstatus);
1986         return stat;
1987 }
1988
1989 /*-------------------------------------------------------------------------*/
1990
1991 #ifndef CONFIG_DM_USB
1992
1993 /*-------------------------------------------------------------------------*/
1994
1995 /* De-allocate all resources.. */
1996
1997 static void hc_release_ohci(ohci_t *ohci)
1998 {
1999         dbg("USB HC release ohci usb-%s", ohci->slot_name);
2000
2001         if (!ohci->disabled)
2002                 hc_reset(ohci);
2003 }
2004
2005 /*-------------------------------------------------------------------------*/
2006
2007 /*
2008  * low level initalisation routine, called from usb.c
2009  */
2010 static char ohci_inited = 0;
2011
2012 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
2013 {
2014 #ifdef CONFIG_PCI_OHCI
2015         pci_dev_t pdev;
2016 #endif
2017
2018 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2019         /* cpu dependant init */
2020         if (usb_cpu_init())
2021                 return -1;
2022 #endif
2023
2024 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2025         /*  board dependant init */
2026         if (board_usb_init(index, USB_INIT_HOST))
2027                 return -1;
2028 #endif
2029         memset(&gohci, 0, sizeof(ohci_t));
2030
2031         /* align the storage */
2032         if ((__u32)&ghcca[0] & 0xff) {
2033                 err("HCCA not aligned!!");
2034                 return -1;
2035         }
2036         gohci.hcca = &ghcca[0];
2037         info("aligned ghcca %p", gohci.hcca);
2038         memset(gohci.hcca, 0, sizeof(struct ohci_hcca));
2039
2040         gohci.disabled = 1;
2041         gohci.sleeping = 0;
2042         gohci.irq = -1;
2043 #ifdef CONFIG_PCI_OHCI
2044         pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO);
2045
2046         if (pdev != -1) {
2047                 u16 vid, did;
2048                 u32 base;
2049                 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
2050                 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
2051                 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
2052                                 vid, did, (pdev >> 16) & 0xff,
2053                                 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
2054                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
2055                 printf("OHCI regs address 0x%08x\n", base);
2056                 gohci.regs = (struct ohci_regs *)base;
2057         } else
2058                 return -1;
2059 #else
2060         gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
2061 #endif
2062
2063         gohci.flags = 0;
2064         gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME;
2065
2066         if (hc_reset (&gohci) < 0) {
2067                 hc_release_ohci (&gohci);
2068                 err ("can't reset usb-%s", gohci.slot_name);
2069 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2070                 /* board dependant cleanup */
2071                 board_usb_cleanup(index, USB_INIT_HOST);
2072 #endif
2073
2074 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2075                 /* cpu dependant cleanup */
2076                 usb_cpu_init_fail();
2077 #endif
2078                 return -1;
2079         }
2080
2081         if (hc_start(&gohci) < 0) {
2082                 err("can't start usb-%s", gohci.slot_name);
2083                 hc_release_ohci(&gohci);
2084                 /* Initialization failed */
2085 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2086                 /* board dependant cleanup */
2087                 usb_board_stop();
2088 #endif
2089
2090 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2091                 /* cpu dependant cleanup */
2092                 usb_cpu_stop();
2093 #endif
2094                 return -1;
2095         }
2096
2097 #ifdef  DEBUG
2098         ohci_dump(&gohci, 1);
2099 #else
2100         ohci_mdelay(1);
2101 #endif
2102         ohci_inited = 1;
2103         return 0;
2104 }
2105
2106 int usb_lowlevel_stop(int index)
2107 {
2108         /* this gets called really early - before the controller has */
2109         /* even been initialized! */
2110         if (!ohci_inited)
2111                 return 0;
2112         /* TODO release any interrupts, etc. */
2113         /* call hc_release_ohci() here ? */
2114         hc_reset(&gohci);
2115
2116 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2117         /* board dependant cleanup */
2118         if (usb_board_stop())
2119                 return -1;
2120 #endif
2121
2122 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2123         /* cpu dependant cleanup */
2124         if (usb_cpu_stop())
2125                 return -1;
2126 #endif
2127         /* This driver is no longer initialised. It needs a new low-level
2128          * init (board/cpu) before it can be used again. */
2129         ohci_inited = 0;
2130         return 0;
2131 }
2132
2133 int submit_control_msg(struct usb_device *dev, unsigned long pipe,
2134         void *buffer, int transfer_len, struct devrequest *setup)
2135 {
2136         return _ohci_submit_control_msg(&gohci, dev, pipe, buffer,
2137                                         transfer_len, setup);
2138 }
2139 #endif
2140
2141 #ifdef CONFIG_DM_USB
2142 static int ohci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
2143                                    unsigned long pipe, void *buffer, int length,
2144                                    struct devrequest *setup)
2145 {
2146         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2147
2148         return _ohci_submit_control_msg(ohci, udev, pipe, buffer,
2149                                         length, setup);
2150 }
2151
2152 static int ohci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
2153                                 unsigned long pipe, void *buffer, int length)
2154 {
2155         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2156
2157         return submit_common_msg(ohci, udev, pipe, buffer, length, NULL, 0);
2158 }
2159
2160 static int ohci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
2161                                unsigned long pipe, void *buffer, int length,
2162                                int interval)
2163 {
2164         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2165
2166         return submit_common_msg(ohci, udev, pipe, buffer, length,
2167                                  NULL, interval);
2168 }
2169
2170 static struct int_queue *ohci_create_int_queue(struct udevice *dev,
2171                 struct usb_device *udev, unsigned long pipe, int queuesize,
2172                 int elementsize, void *buffer, int interval)
2173 {
2174         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2175
2176         return _ohci_create_int_queue(ohci, udev, pipe, queuesize, elementsize,
2177                                       buffer, interval);
2178 }
2179
2180 static void *ohci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
2181                                  struct int_queue *queue)
2182 {
2183         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2184
2185         return _ohci_poll_int_queue(ohci, udev, queue);
2186 }
2187
2188 static int ohci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
2189                                   struct int_queue *queue)
2190 {
2191         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2192
2193         return _ohci_destroy_int_queue(ohci, udev, queue);
2194 }
2195
2196 int ohci_register(struct udevice *dev, struct ohci_regs *regs)
2197 {
2198         struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
2199         ohci_t *ohci = dev_get_priv(dev);
2200         u32 reg;
2201
2202         priv->desc_before_addr = true;
2203
2204         ohci->regs = regs;
2205         ohci->hcca = memalign(256, sizeof(struct ohci_hcca));
2206         if (!ohci->hcca)
2207                 return -ENOMEM;
2208         memset(ohci->hcca, 0, sizeof(struct ohci_hcca));
2209         flush_dcache_hcca(ohci->hcca);
2210
2211         if (hc_reset(ohci) < 0)
2212                 return -EIO;
2213
2214         if (hc_start(ohci) < 0)
2215                 return -EIO;
2216
2217         reg = ohci_readl(&regs->revision);
2218         printf("USB OHCI %x.%x\n", (reg >> 4) & 0xf, reg & 0xf);
2219
2220         return 0;
2221 }
2222
2223 int ohci_deregister(struct udevice *dev)
2224 {
2225         ohci_t *ohci = dev_get_priv(dev);
2226
2227         if (hc_reset(ohci) < 0)
2228                 return -EIO;
2229
2230         free(ohci->hcca);
2231
2232         return 0;
2233 }
2234
2235 struct dm_usb_ops ohci_usb_ops = {
2236         .control = ohci_submit_control_msg,
2237         .bulk = ohci_submit_bulk_msg,
2238         .interrupt = ohci_submit_int_msg,
2239         .create_int_queue = ohci_create_int_queue,
2240         .poll_int_queue = ohci_poll_int_queue,
2241         .destroy_int_queue = ohci_destroy_int_queue,
2242 };
2243
2244 #endif