1 // SPDX-License-Identifier: GPL-2.0+
3 * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
5 * Interrupt support is added. Now, it has been tested
6 * on ULI1575 chip and works well with USB keyboard.
9 * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
12 * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
14 * Note: Much of this code has been derived from Linux 2.4
15 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
16 * (C) Copyright 2000-2002 David Brownell
18 * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
19 * ebenard@eukrea.com - based on s3c24x0's driver
23 * 1 - Read doc/README.generic_usb_ohci
24 * 2 - this driver is intended for use with USB Mass Storage Devices
25 * (BBB) and USB keyboard. There is NO support for Isochronous pipes!
26 * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
27 * to activate workaround for bug #41 or this driver will NOT work!
32 #include <asm/byteorder.h>
35 #include <asm/cache.h>
36 #include <linux/delay.h>
44 #ifdef CONFIG_AT91RM9200
45 #include <asm/arch/hardware.h> /* needed for AT91_USB_HOST_BASE */
48 #if defined(CONFIG_CPU_ARM920T) || \
49 defined(CONFIG_PCI) || \
50 defined(CONFIG_SYS_OHCI_USE_NPS)
51 # define OHCI_USE_NPS /* force NoPowerSwitching mode */
54 #undef OHCI_VERBOSE_DEBUG /* not always helpful */
57 #undef OHCI_FILL_TRACE
59 /* For initializing controller (mask in an HCFS mode too) */
60 #define OHCI_CONTROL_INIT \
61 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
64 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
66 #define dbg(format, arg...) do {} while (0)
68 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
70 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
72 #define info(format, arg...) do {} while (0)
75 #ifdef CONFIG_SYS_OHCI_BE_CONTROLLER
76 # define m16_swap(x) cpu_to_be16(x)
77 # define m32_swap(x) cpu_to_be32(x)
79 # define m16_swap(x) cpu_to_le16(x)
80 # define m32_swap(x) cpu_to_le32(x)
81 #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
83 /* We really should do proper cache flushing everywhere */
84 #define flush_dcache_buffer(addr, size) \
85 flush_dcache_range((unsigned long)(addr), \
86 ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
87 #define invalidate_dcache_buffer(addr, size) \
88 invalidate_dcache_range((unsigned long)(addr), \
89 ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
91 /* Do not use sizeof(ed / td) as our ed / td structs contain extra members */
92 #define flush_dcache_ed(addr) flush_dcache_buffer(addr, 16)
93 #define flush_dcache_td(addr) flush_dcache_buffer(addr, 16)
94 #define flush_dcache_iso_td(addr) flush_dcache_buffer(addr, 32)
95 #define flush_dcache_hcca(addr) flush_dcache_buffer(addr, 256)
96 #define invalidate_dcache_ed(addr) invalidate_dcache_buffer(addr, 16)
97 #define invalidate_dcache_td(addr) invalidate_dcache_buffer(addr, 16)
98 #define invalidate_dcache_iso_td(addr) invalidate_dcache_buffer(addr, 32)
99 #define invalidate_dcache_hcca(addr) invalidate_dcache_buffer(addr, 256)
101 #if CONFIG_IS_ENABLED(DM_USB)
103 * The various ohci_mdelay(1) calls in the code seem unnecessary. We keep
104 * them around when building for older boards not yet converted to the dm
105 * just in case (to avoid regressions), for dm this turns them into nops.
107 #define ohci_mdelay(x)
109 #define ohci_mdelay(x) mdelay(x)
112 #if !CONFIG_IS_ENABLED(DM_USB)
115 /* this must be aligned to a 256 byte boundary */
116 struct ohci_hcca ghcca[1];
119 /* mapping of the OHCI CC status to error codes */
120 static int cc_to_error[16] = {
122 /* CRC Error */ USB_ST_CRC_ERR,
123 /* Bit Stuff */ USB_ST_BIT_ERR,
124 /* Data Togg */ USB_ST_CRC_ERR,
125 /* Stall */ USB_ST_STALLED,
127 /* PIDCheck */ USB_ST_BIT_ERR,
128 /* UnExpPID */ USB_ST_BIT_ERR,
129 /* DataOver */ USB_ST_BUF_ERR,
130 /* DataUnder */ USB_ST_BUF_ERR,
133 /* BufferOver */ USB_ST_BUF_ERR,
134 /* BuffUnder */ USB_ST_BUF_ERR,
139 static const char *cc_to_string[16] = {
141 "CRC: Last data packet from endpoint contained a CRC error.",
142 "BITSTUFFING: Last data packet from endpoint contained a bit " \
143 "stuffing violation",
144 "DATATOGGLEMISMATCH: Last packet from endpoint had data toggle PID\n" \
145 "that did not match the expected value.",
146 "STALL: TD was moved to the Done Queue because the endpoint returned" \
148 "DEVICENOTRESPONDING: Device did not respond to token (IN) or did\n" \
149 "not provide a handshake (OUT)",
150 "PIDCHECKFAILURE: Check bits on PID from endpoint failed on data PID\n"\
151 "(IN) or handshake (OUT)",
152 "UNEXPECTEDPID: Receive PID was not valid when encountered or PID\n" \
153 "value is not defined.",
154 "DATAOVERRUN: The amount of data returned by the endpoint exceeded\n" \
155 "either the size of the maximum data packet allowed\n" \
156 "from the endpoint (found in MaximumPacketSize field\n" \
157 "of ED) or the remaining buffer size.",
158 "DATAUNDERRUN: The endpoint returned less than MaximumPacketSize\n" \
159 "and that amount was not sufficient to fill the\n" \
163 "BUFFEROVERRUN: During an IN, HC received data from endpoint faster\n" \
164 "than it could be written to system memory",
165 "BUFFERUNDERRUN: During an OUT, HC could not retrieve data from\n" \
166 "system memory fast enough to keep up with data USB " \
168 "NOT ACCESSED: This code is set by software before the TD is placed" \
169 "on a list to be processed by the HC.(1)",
170 "NOT ACCESSED: This code is set by software before the TD is placed" \
171 "on a list to be processed by the HC.(2)",
174 static inline u32 roothub_a(struct ohci *hc)
175 { return ohci_readl(&hc->regs->roothub.a); }
176 static inline u32 roothub_b(struct ohci *hc)
177 { return ohci_readl(&hc->regs->roothub.b); }
178 static inline u32 roothub_status(struct ohci *hc)
179 { return ohci_readl(&hc->regs->roothub.status); }
180 static inline u32 roothub_portstatus(struct ohci *hc, int i)
181 { return ohci_readl(&hc->regs->roothub.portstatus[i]); }
183 /* forward declaration */
184 static int hc_interrupt(ohci_t *ohci);
185 static void td_submit_job(ohci_t *ohci, struct usb_device *dev,
186 unsigned long pipe, void *buffer, int transfer_len,
187 struct devrequest *setup, urb_priv_t *urb,
189 static int ep_link(ohci_t * ohci, ed_t * ed);
190 static int ep_unlink(ohci_t * ohci, ed_t * ed);
191 static ed_t *ep_add_ed(ohci_dev_t *ohci_dev, struct usb_device *usb_dev,
192 unsigned long pipe, int interval, int load);
194 /*-------------------------------------------------------------------------*/
197 static struct td *td_alloc(ohci_dev_t *ohci_dev, struct usb_device *usb_dev)
203 for (i = 0; i < NUM_TD; i++)
205 if (ohci_dev->tds[i].usb_dev == NULL)
207 td = &ohci_dev->tds[i];
208 td->usb_dev = usb_dev;
216 static inline void ed_free(struct ed *ed)
221 /*-------------------------------------------------------------------------*
222 * URB support functions
223 *-------------------------------------------------------------------------*/
225 /* free HCD-private data associated with this URB */
227 static void urb_free_priv(urb_priv_t *urb)
233 last = urb->length - 1;
235 for (i = 0; i <= last; i++) {
246 /*-------------------------------------------------------------------------*/
249 static int sohci_get_current_frame_number(ohci_t *ohci);
251 /* debug| print the main components of an URB
252 * small: 0) header + data packets 1) just header */
254 static void pkt_print(ohci_t *ohci, urb_priv_t *purb, struct usb_device *dev,
255 unsigned long pipe, void *buffer, int transfer_len,
256 struct devrequest *setup, char *str, int small)
258 dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx",
260 sohci_get_current_frame_number(ohci),
261 usb_pipedevice(pipe),
262 usb_pipeendpoint(pipe),
263 usb_pipeout(pipe)? 'O': 'I',
264 usb_pipetype(pipe) < 2 ? \
265 (usb_pipeint(pipe)? "INTR": "ISOC"): \
266 (usb_pipecontrol(pipe)? "CTRL": "BULK"),
267 (purb ? purb->actual_length : 0),
268 transfer_len, dev->status);
269 #ifdef OHCI_VERBOSE_DEBUG
273 if (usb_pipecontrol(pipe)) {
274 printf(__FILE__ ": cmd(8):");
275 for (i = 0; i < 8 ; i++)
276 printf(" %02x", ((__u8 *) setup) [i]);
279 if (transfer_len > 0 && buffer) {
280 printf(__FILE__ ": data(%d/%d):",
281 (purb ? purb->actual_length : 0),
283 len = usb_pipeout(pipe)? transfer_len:
284 (purb ? purb->actual_length : 0);
285 for (i = 0; i < 16 && i < len; i++)
286 printf(" %02x", ((__u8 *) buffer) [i]);
287 printf("%s\n", i < len? "...": "");
293 /* just for debugging; prints non-empty branches of the int ed tree
294 * inclusive iso eds */
295 void ep_print_int_eds(ohci_t *ohci, char *str)
299 for (i = 0; i < 32; i++) {
301 ed_p = &(ohci->hcca->int_table [i]);
304 invalidate_dcache_ed(ed_p);
305 printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
306 while (*ed_p != 0 && j--) {
307 ed_t *ed = (ed_t *)m32_swap(ed_p);
308 invalidate_dcache_ed(ed);
309 printf(" ed: %4x;", ed->hwINFO);
310 ed_p = &ed->hwNextED;
316 static void ohci_dump_intr_mask(char *label, __u32 mask)
318 dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
321 (mask & OHCI_INTR_MIE) ? " MIE" : "",
322 (mask & OHCI_INTR_OC) ? " OC" : "",
323 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
324 (mask & OHCI_INTR_FNO) ? " FNO" : "",
325 (mask & OHCI_INTR_UE) ? " UE" : "",
326 (mask & OHCI_INTR_RD) ? " RD" : "",
327 (mask & OHCI_INTR_SF) ? " SF" : "",
328 (mask & OHCI_INTR_WDH) ? " WDH" : "",
329 (mask & OHCI_INTR_SO) ? " SO" : ""
333 static void maybe_print_eds(char *label, __u32 value)
335 ed_t *edp = (ed_t *)value;
338 dbg("%s %08x", label, value);
339 invalidate_dcache_ed(edp);
340 dbg("%08x", edp->hwINFO);
341 dbg("%08x", edp->hwTailP);
342 dbg("%08x", edp->hwHeadP);
343 dbg("%08x", edp->hwNextED);
347 static char *hcfs2string(int state)
350 case OHCI_USB_RESET: return "reset";
351 case OHCI_USB_RESUME: return "resume";
352 case OHCI_USB_OPER: return "operational";
353 case OHCI_USB_SUSPEND: return "suspend";
358 /* dump control and status registers */
359 static void ohci_dump_status(ohci_t *controller)
361 struct ohci_regs *regs = controller->regs;
364 temp = ohci_readl(®s->revision) & 0xff;
366 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
368 temp = ohci_readl(®s->control);
369 dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
370 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
371 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
372 (temp & OHCI_CTRL_IR) ? " IR" : "",
373 hcfs2string(temp & OHCI_CTRL_HCFS),
374 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
375 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
376 (temp & OHCI_CTRL_IE) ? " IE" : "",
377 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
378 temp & OHCI_CTRL_CBSR
381 temp = ohci_readl(®s->cmdstatus);
382 dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
383 (temp & OHCI_SOC) >> 16,
384 (temp & OHCI_OCR) ? " OCR" : "",
385 (temp & OHCI_BLF) ? " BLF" : "",
386 (temp & OHCI_CLF) ? " CLF" : "",
387 (temp & OHCI_HCR) ? " HCR" : ""
390 ohci_dump_intr_mask("intrstatus", ohci_readl(®s->intrstatus));
391 ohci_dump_intr_mask("intrenable", ohci_readl(®s->intrenable));
393 maybe_print_eds("ed_periodcurrent",
394 ohci_readl(®s->ed_periodcurrent));
396 maybe_print_eds("ed_controlhead", ohci_readl(®s->ed_controlhead));
397 maybe_print_eds("ed_controlcurrent",
398 ohci_readl(®s->ed_controlcurrent));
400 maybe_print_eds("ed_bulkhead", ohci_readl(®s->ed_bulkhead));
401 maybe_print_eds("ed_bulkcurrent", ohci_readl(®s->ed_bulkcurrent));
403 maybe_print_eds("donehead", ohci_readl(®s->donehead));
406 static void ohci_dump_roothub(ohci_t *controller, int verbose)
410 temp = roothub_a(controller);
411 ndp = (temp & RH_A_NDP);
412 #ifdef CONFIG_AT91C_PQFP_UHPBUG
413 ndp = (ndp == 2) ? 1:0;
416 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
417 ((temp & RH_A_POTPGT) >> 24) & 0xff,
418 (temp & RH_A_NOCP) ? " NOCP" : "",
419 (temp & RH_A_OCPM) ? " OCPM" : "",
420 (temp & RH_A_DT) ? " DT" : "",
421 (temp & RH_A_NPS) ? " NPS" : "",
422 (temp & RH_A_PSM) ? " PSM" : "",
425 temp = roothub_b(controller);
426 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
428 (temp & RH_B_PPCM) >> 16,
431 temp = roothub_status(controller);
432 dbg("roothub.status: %08x%s%s%s%s%s%s",
434 (temp & RH_HS_CRWE) ? " CRWE" : "",
435 (temp & RH_HS_OCIC) ? " OCIC" : "",
436 (temp & RH_HS_LPSC) ? " LPSC" : "",
437 (temp & RH_HS_DRWE) ? " DRWE" : "",
438 (temp & RH_HS_OCI) ? " OCI" : "",
439 (temp & RH_HS_LPS) ? " LPS" : ""
443 for (i = 0; i < ndp; i++) {
444 temp = roothub_portstatus(controller, i);
445 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
448 (temp & RH_PS_PRSC) ? " PRSC" : "",
449 (temp & RH_PS_OCIC) ? " OCIC" : "",
450 (temp & RH_PS_PSSC) ? " PSSC" : "",
451 (temp & RH_PS_PESC) ? " PESC" : "",
452 (temp & RH_PS_CSC) ? " CSC" : "",
454 (temp & RH_PS_LSDA) ? " LSDA" : "",
455 (temp & RH_PS_PPS) ? " PPS" : "",
456 (temp & RH_PS_PRS) ? " PRS" : "",
457 (temp & RH_PS_POCI) ? " POCI" : "",
458 (temp & RH_PS_PSS) ? " PSS" : "",
460 (temp & RH_PS_PES) ? " PES" : "",
461 (temp & RH_PS_CCS) ? " CCS" : ""
466 static void ohci_dump(ohci_t *controller, int verbose)
468 dbg("OHCI controller usb-%s state", controller->slot_name);
470 /* dumps some of the state we know about */
471 ohci_dump_status(controller);
473 ep_print_int_eds(controller, "hcca");
474 invalidate_dcache_hcca(controller->hcca);
475 dbg("hcca frame #%04x", controller->hcca->frame_no);
476 ohci_dump_roothub(controller, 1);
480 /*-------------------------------------------------------------------------*
481 * Interface functions (URB)
482 *-------------------------------------------------------------------------*/
484 /* get a transfer request */
486 int sohci_submit_job(ohci_t *ohci, ohci_dev_t *ohci_dev, urb_priv_t *urb,
487 struct devrequest *setup)
490 urb_priv_t *purb_priv = urb;
492 struct usb_device *dev = urb->dev;
493 unsigned long pipe = urb->pipe;
494 void *buffer = urb->transfer_buffer;
495 int transfer_len = urb->transfer_buffer_length;
496 int interval = urb->interval;
498 /* when controller's hung, permit only roothub cleanup attempts
499 * such as powering down ports */
500 if (ohci->disabled) {
501 err("sohci_submit_job: EPIPE");
505 /* we're about to begin a new transaction here so mark the
509 /* every endpoint has a ed, locate and fill it */
510 ed = ep_add_ed(ohci_dev, dev, pipe, interval, 1);
512 err("sohci_submit_job: ENOMEM");
516 /* for the private part of the URB we need the number of TDs (size) */
517 switch (usb_pipetype(pipe)) {
518 case PIPE_BULK: /* one TD for every 4096 Byte */
519 size = (transfer_len - 1) / 4096 + 1;
521 case PIPE_CONTROL:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
522 size = (transfer_len == 0)? 2:
523 (transfer_len - 1) / 4096 + 3;
525 case PIPE_INTERRUPT: /* 1 TD */
532 if (size >= (N_URB_TD - 1)) {
533 err("need %d TDs, only have %d", size, N_URB_TD);
536 purb_priv->pipe = pipe;
538 /* fill the private part of the URB */
539 purb_priv->length = size;
541 purb_priv->actual_length = 0;
543 /* allocate the TDs */
544 /* note that td[0] was allocated in ep_add_ed */
545 for (i = 0; i < size; i++) {
546 purb_priv->td[i] = td_alloc(ohci_dev, dev);
547 if (!purb_priv->td[i]) {
548 purb_priv->length = i;
549 urb_free_priv(purb_priv);
550 err("sohci_submit_job: ENOMEM");
555 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
556 urb_free_priv(purb_priv);
557 err("sohci_submit_job: EINVAL");
561 /* link the ed into a chain if is not already */
562 if (ed->state != ED_OPER)
565 /* fill the TDs and link it to the ed */
566 td_submit_job(ohci, dev, pipe, buffer, transfer_len,
567 setup, purb_priv, interval);
572 /*-------------------------------------------------------------------------*/
575 /* tell us the current USB frame number */
576 static int sohci_get_current_frame_number(ohci_t *ohci)
578 invalidate_dcache_hcca(ohci->hcca);
579 return m16_swap(ohci->hcca->frame_no);
583 /*-------------------------------------------------------------------------*
584 * ED handling functions
585 *-------------------------------------------------------------------------*/
587 /* search for the right branch to insert an interrupt ed into the int tree
588 * do some load ballancing;
589 * returns the branch and
590 * sets the interval to interval = 2^integer (ld (interval)) */
592 static int ep_int_ballance(ohci_t *ohci, int interval, int load)
596 /* search for the least loaded interrupt endpoint
597 * branch of all 32 branches
599 for (i = 0; i < 32; i++)
600 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
603 branch = branch % interval;
604 for (i = branch; i < 32; i += interval)
605 ohci->ohci_int_load [i] += load;
610 /*-------------------------------------------------------------------------*/
612 /* 2^int( ld (inter)) */
614 static int ep_2_n_interval(int inter)
617 for (i = 0; ((inter >> i) > 1) && (i < 5); i++);
621 /*-------------------------------------------------------------------------*/
623 /* the int tree is a binary tree
624 * in order to process it sequentially the indexes of the branches have to
625 * be mapped the mapping reverses the bits of a word of num_bits length */
626 static int ep_rev(int num_bits, int word)
630 for (i = 0; i < num_bits; i++)
631 wout |= (((word >> i) & 1) << (num_bits - i - 1));
635 /*-------------------------------------------------------------------------*
636 * ED handling functions
637 *-------------------------------------------------------------------------*/
639 /* link an ed into one of the HC chains */
641 static int ep_link(ohci_t *ohci, ed_t *edi)
643 volatile ed_t *ed = edi;
652 ed->int_interval = 0;
658 if (ohci->ed_controltail == NULL)
659 ohci_writel((uintptr_t)ed, &ohci->regs->ed_controlhead);
661 ohci->ed_controltail->hwNextED =
662 m32_swap((unsigned long)ed);
664 ed->ed_prev = ohci->ed_controltail;
665 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
666 !ohci->ed_rm_list[1] && !ohci->sleeping) {
667 ohci->hc_control |= OHCI_CTRL_CLE;
668 ohci_writel(ohci->hc_control, &ohci->regs->control);
670 ohci->ed_controltail = edi;
676 if (ohci->ed_bulktail == NULL)
677 ohci_writel((uintptr_t)ed, &ohci->regs->ed_bulkhead);
679 ohci->ed_bulktail->hwNextED =
680 m32_swap((unsigned long)ed);
682 ed->ed_prev = ohci->ed_bulktail;
683 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
684 !ohci->ed_rm_list[1] && !ohci->sleeping) {
685 ohci->hc_control |= OHCI_CTRL_BLE;
686 ohci_writel(ohci->hc_control, &ohci->regs->control);
688 ohci->ed_bulktail = edi;
693 interval = ep_2_n_interval(ed->int_period);
694 ed->int_interval = interval;
695 int_branch = ep_int_ballance(ohci, interval, load);
696 ed->int_branch = int_branch;
698 for (i = 0; i < ep_rev(6, interval); i += inter) {
700 for (ed_p = &(ohci->hcca->int_table[\
701 ep_rev(5, i) + int_branch]);
703 (((ed_t *)ed_p)->int_interval >= interval);
704 ed_p = &(((ed_t *)ed_p)->hwNextED))
706 ((ed_t *)ed_p)->int_interval);
707 ed->hwNextED = *ed_p;
709 *ed_p = m32_swap((unsigned long)ed);
710 flush_dcache_hcca(ohci->hcca);
717 /*-------------------------------------------------------------------------*/
719 /* scan the periodic table to find and unlink this ED */
720 static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,
721 unsigned index, unsigned period)
723 __maybe_unused unsigned long aligned_ed_p;
725 for (; index < NUM_INTS; index += period) {
726 __u32 *ed_p = &ohci->hcca->int_table [index];
728 /* ED might have been unlinked through another path */
730 if (((struct ed *)(uintptr_t)
731 m32_swap((unsigned long)ed_p)) == ed) {
732 *ed_p = ed->hwNextED;
733 aligned_ed_p = (unsigned long)ed_p;
734 aligned_ed_p &= ~(ARCH_DMA_MINALIGN - 1);
735 flush_dcache_range(aligned_ed_p,
736 aligned_ed_p + ARCH_DMA_MINALIGN);
739 ed_p = &(((struct ed *)(uintptr_t)
740 m32_swap((unsigned long)ed_p))->hwNextED);
745 /* unlink an ed from one of the HC chains.
746 * just the link to the ed is unlinked.
747 * the link from the ed still points to another operational ed or 0
748 * so the HC can eventually finish the processing of the unlinked ed */
750 static int ep_unlink(ohci_t *ohci, ed_t *edi)
752 volatile ed_t *ed = edi;
755 ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
760 if (ed->ed_prev == NULL) {
762 ohci->hc_control &= ~OHCI_CTRL_CLE;
763 ohci_writel(ohci->hc_control,
764 &ohci->regs->control);
766 ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
767 &ohci->regs->ed_controlhead);
769 ed->ed_prev->hwNextED = ed->hwNextED;
770 flush_dcache_ed(ed->ed_prev);
772 if (ohci->ed_controltail == ed) {
773 ohci->ed_controltail = ed->ed_prev;
775 ((ed_t *)(uintptr_t)m32_swap(
776 *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
781 if (ed->ed_prev == NULL) {
783 ohci->hc_control &= ~OHCI_CTRL_BLE;
784 ohci_writel(ohci->hc_control,
785 &ohci->regs->control);
787 ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
788 &ohci->regs->ed_bulkhead);
790 ed->ed_prev->hwNextED = ed->hwNextED;
791 flush_dcache_ed(ed->ed_prev);
793 if (ohci->ed_bulktail == ed) {
794 ohci->ed_bulktail = ed->ed_prev;
796 ((ed_t *)(uintptr_t)m32_swap(
797 *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
802 periodic_unlink(ohci, ed, 0, 1);
803 for (i = ed->int_branch; i < 32; i += ed->int_interval)
804 ohci->ohci_int_load[i] -= ed->int_load;
807 ed->state = ED_UNLINK;
811 /*-------------------------------------------------------------------------*/
813 /* add/reinit an endpoint; this should be done once at the
814 * usb_set_configuration command, but the USB stack is a little bit
815 * stateless so we do it at every transaction if the state of the ed
816 * is ED_NEW then a dummy td is added and the state is changed to
817 * ED_UNLINK in all other cases the state is left unchanged the ed
818 * info fields are setted anyway even though most of them should not
821 static ed_t *ep_add_ed(ohci_dev_t *ohci_dev, struct usb_device *usb_dev,
822 unsigned long pipe, int interval, int load)
828 ed = ed_ret = &ohci_dev->ed[(usb_pipeendpoint(pipe) << 1) |
829 (usb_pipecontrol(pipe)? 0: usb_pipeout(pipe))];
831 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
832 err("ep_add_ed: pending delete");
833 /* pending delete request */
837 if (ed->state == ED_NEW) {
838 /* dummy td; end of td list for ed */
839 td = td_alloc(ohci_dev, usb_dev);
840 ed->hwTailP = m32_swap((unsigned long)td);
841 ed->hwHeadP = ed->hwTailP;
842 ed->state = ED_UNLINK;
843 ed->type = usb_pipetype(pipe);
847 ed->hwINFO = m32_swap(usb_pipedevice(pipe)
848 | usb_pipeendpoint(pipe) << 7
849 | (usb_pipeisoc(pipe)? 0x8000: 0)
850 | (usb_pipecontrol(pipe)? 0: \
851 (usb_pipeout(pipe)? 0x800: 0x1000))
852 | (usb_dev->speed == USB_SPEED_LOW) << 13
853 | usb_maxpacket(usb_dev, pipe) << 16);
855 if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
856 ed->int_period = interval;
865 /*-------------------------------------------------------------------------*
866 * TD handling functions
867 *-------------------------------------------------------------------------*/
869 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
871 static void td_fill(ohci_t *ohci, unsigned int info,
873 struct usb_device *dev, int index, urb_priv_t *urb_priv)
875 volatile td_t *td, *td_pt;
876 #ifdef OHCI_FILL_TRACE
880 if (index > urb_priv->length) {
881 err("index > length");
884 /* use this td as the next dummy */
885 td_pt = urb_priv->td [index];
887 flush_dcache_td(td_pt);
889 /* fill the old dummy TD */
890 td = urb_priv->td [index] =
892 (m32_swap(urb_priv->ed->hwTailP) & ~0xf);
894 td->ed = urb_priv->ed;
895 td->next_dl_td = NULL;
897 td->data = (uintptr_t)data;
898 #ifdef OHCI_FILL_TRACE
899 if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
900 for (i = 0; i < len; i++)
901 printf("td->data[%d] %#2x ", i, ((unsigned char *)td->data)[i]);
908 td->hwINFO = m32_swap(info);
909 td->hwCBP = m32_swap((unsigned long)data);
911 td->hwBE = m32_swap((unsigned long)(data + len - 1));
915 td->hwNextTD = m32_swap((unsigned long)td_pt);
918 /* append to queue */
919 td->ed->hwTailP = td->hwNextTD;
920 flush_dcache_ed(td->ed);
923 /*-------------------------------------------------------------------------*/
925 /* prepare all TDs of a transfer */
927 static void td_submit_job(ohci_t *ohci, struct usb_device *dev,
928 unsigned long pipe, void *buffer, int transfer_len,
929 struct devrequest *setup, urb_priv_t *urb,
932 int data_len = transfer_len;
936 unsigned int toggle = 0;
938 flush_dcache_buffer(buffer, data_len);
940 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle
941 * bits for resetting */
942 if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
943 toggle = TD_T_TOGGLE;
946 usb_settoggle(dev, usb_pipeendpoint(pipe),
947 usb_pipeout(pipe), 1);
955 switch (usb_pipetype(pipe)) {
957 info = usb_pipeout(pipe)?
958 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
959 while (data_len > 4096) {
960 td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle),
961 data, 4096, dev, cnt, urb);
962 data += 4096; data_len -= 4096; cnt++;
964 info = usb_pipeout(pipe)?
965 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
966 td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle), data,
967 data_len, dev, cnt, urb);
970 if (!ohci->sleeping) {
971 /* start bulk list */
972 ohci_writel(OHCI_BLF, &ohci->regs->cmdstatus);
978 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
979 flush_dcache_buffer(setup, 8);
980 td_fill(ohci, info, setup, 8, dev, cnt++, urb);
982 /* Optional Data phase */
984 info = usb_pipeout(pipe)?
985 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
986 TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
987 /* NOTE: mishandles transfers >8K, some >4K */
988 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
992 info = (usb_pipeout(pipe) || data_len == 0) ?
993 TD_CC | TD_DP_IN | TD_T_DATA1:
994 TD_CC | TD_DP_OUT | TD_T_DATA1;
995 td_fill(ohci, info, data, 0, dev, cnt++, urb);
997 if (!ohci->sleeping) {
998 /* start Control list */
999 ohci_writel(OHCI_CLF, &ohci->regs->cmdstatus);
1003 case PIPE_INTERRUPT:
1004 info = usb_pipeout(urb->pipe)?
1005 TD_CC | TD_DP_OUT | toggle:
1006 TD_CC | TD_R | TD_DP_IN | toggle;
1007 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
1010 if (urb->length != cnt)
1011 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
1014 /*-------------------------------------------------------------------------*
1015 * Done List handling functions
1016 *-------------------------------------------------------------------------*/
1018 /* calculate the transfer length and update the urb */
1020 static void dl_transfer_length(td_t *td)
1023 urb_priv_t *lurb_priv = td->ed->purb;
1025 tdBE = m32_swap(td->hwBE);
1026 tdCBP = m32_swap(td->hwCBP);
1028 if (!(usb_pipecontrol(lurb_priv->pipe) &&
1029 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
1032 lurb_priv->actual_length += tdBE - td->data + 1;
1034 lurb_priv->actual_length += tdCBP - td->data;
1039 /*-------------------------------------------------------------------------*/
1040 static void check_status(td_t *td_list)
1042 urb_priv_t *lurb_priv = td_list->ed->purb;
1043 int urb_len = lurb_priv->length;
1044 __u32 *phwHeadP = &td_list->ed->hwHeadP;
1047 cc = TD_CC_GET(m32_swap(td_list->hwINFO));
1049 err(" USB-error: %s (%x)", cc_to_string[cc], cc);
1051 invalidate_dcache_ed(td_list->ed);
1052 if (*phwHeadP & m32_swap(0x1)) {
1054 ((td_list->index + 1) < urb_len)) {
1056 (lurb_priv->td[urb_len - 1]->hwNextTD &\
1057 m32_swap(0xfffffff0)) |
1058 (*phwHeadP & m32_swap(0x2));
1060 lurb_priv->td_cnt += urb_len -
1063 *phwHeadP &= m32_swap(0xfffffff2);
1064 flush_dcache_ed(td_list->ed);
1069 /* replies to the request have to be on a FIFO basis so
1070 * we reverse the reversed done-list */
1071 static td_t *dl_reverse_done_list(ohci_t *ohci)
1073 uintptr_t td_list_hc;
1074 td_t *td_rev = NULL;
1075 td_t *td_list = NULL;
1077 invalidate_dcache_hcca(ohci->hcca);
1078 td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
1079 ohci->hcca->done_head = 0;
1080 flush_dcache_hcca(ohci->hcca);
1082 while (td_list_hc) {
1083 td_list = (td_t *)td_list_hc;
1084 invalidate_dcache_td(td_list);
1085 check_status(td_list);
1086 td_list->next_dl_td = td_rev;
1088 td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
1093 /*-------------------------------------------------------------------------*/
1094 /*-------------------------------------------------------------------------*/
1096 static void finish_urb(ohci_t *ohci, urb_priv_t *urb, int status)
1098 if ((status & (ED_OPER | ED_UNLINK)) && (urb->state != URB_DEL))
1101 dbg("finish_urb: strange.., ED state %x, \n", status);
1105 * Used to take back a TD from the host controller. This would normally be
1106 * called from within dl_done_list, however it may be called directly if the
1107 * HC no longer sees the TD and it has not appeared on the donelist (after
1108 * two frames). This bug has been observed on ZF Micro systems.
1110 static int takeback_td(ohci_t *ohci, td_t *td_list)
1116 urb_priv_t *lurb_priv;
1117 __u32 tdINFO, edHeadP, edTailP;
1119 invalidate_dcache_td(td_list);
1120 tdINFO = m32_swap(td_list->hwINFO);
1123 lurb_priv = ed->purb;
1125 dl_transfer_length(td_list);
1127 lurb_priv->td_cnt++;
1129 /* error code of transfer */
1130 cc = TD_CC_GET(tdINFO);
1132 err("USB-error: %s (%x)", cc_to_string[cc], cc);
1133 stat = cc_to_error[cc];
1136 /* see if this done list makes for all TD's of current URB,
1137 * and mark the URB finished if so */
1138 if (lurb_priv->td_cnt == lurb_priv->length)
1139 finish_urb(ohci, lurb_priv, ed->state);
1141 dbg("dl_done_list: processing TD %x, len %x\n",
1142 lurb_priv->td_cnt, lurb_priv->length);
1144 if (ed->state != ED_NEW && (!usb_pipeint(lurb_priv->pipe))) {
1145 invalidate_dcache_ed(ed);
1146 edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
1147 edTailP = m32_swap(ed->hwTailP);
1149 /* unlink eds if they are not busy */
1150 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1151 ep_unlink(ohci, ed);
1156 static int dl_done_list(ohci_t *ohci)
1159 td_t *td_list = dl_reverse_done_list(ohci);
1162 td_t *td_next = td_list->next_dl_td;
1163 stat = takeback_td(ohci, td_list);
1169 /*-------------------------------------------------------------------------*
1171 *-------------------------------------------------------------------------*/
1173 #include <usbroothubdes.h>
1175 /* Hub class-specific descriptor is constructed dynamically */
1177 /*-------------------------------------------------------------------------*/
1179 #define OK(x) len = (x); break
1181 #define WR_RH_STAT(x) {info("WR:status %#8x", (x)); ohci_writel((x), \
1182 &ohci->regs->roothub.status); }
1183 #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, \
1184 (x)); ohci_writel((x), &ohci->regs->roothub.portstatus[wIndex-1]); }
1186 #define WR_RH_STAT(x) ohci_writel((x), &ohci->regs->roothub.status)
1187 #define WR_RH_PORTSTAT(x) ohci_writel((x), \
1188 &ohci->regs->roothub.portstatus[wIndex-1])
1190 #define RD_RH_STAT roothub_status(ohci)
1191 #define RD_RH_PORTSTAT roothub_portstatus(ohci, wIndex-1)
1193 /* request to virtual root hub */
1195 int rh_check_port_status(ohci_t *controller)
1201 temp = roothub_a(controller);
1202 ndp = (temp & RH_A_NDP);
1203 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1204 ndp = (ndp == 2) ? 1:0;
1206 for (i = 0; i < ndp; i++) {
1207 temp = roothub_portstatus(controller, i);
1208 /* check for a device disconnect */
1209 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1210 (RH_PS_PESC | RH_PS_CSC)) &&
1211 ((temp & RH_PS_CCS) == 0)) {
1219 static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev,
1220 unsigned long pipe, void *buffer, int transfer_len,
1221 struct devrequest *cmd)
1223 void *data = buffer;
1224 int leni = transfer_len;
1231 ALLOC_ALIGN_BUFFER(__u8, databuf, 16, sizeof(u32));
1234 pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len,
1235 cmd, "SUB(rh)", usb_pipein(pipe));
1239 if (usb_pipeint(pipe)) {
1240 info("Root-Hub submit IRQ: NOT implemented");
1244 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1245 wValue = le16_to_cpu(cmd->value);
1246 wIndex = le16_to_cpu(cmd->index);
1247 wLength = le16_to_cpu(cmd->length);
1249 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1250 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1252 switch (bmRType_bReq) {
1253 /* Request Destination:
1254 without flags: Device,
1255 RH_INTERFACE: interface,
1256 RH_ENDPOINT: endpoint,
1257 RH_CLASS means HUB here,
1258 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1262 *(u16 *)databuf = cpu_to_le16(1);
1264 case RH_GET_STATUS | RH_INTERFACE:
1265 *(u16 *)databuf = cpu_to_le16(0);
1267 case RH_GET_STATUS | RH_ENDPOINT:
1268 *(u16 *)databuf = cpu_to_le16(0);
1270 case RH_GET_STATUS | RH_CLASS:
1271 *(u32 *)databuf = cpu_to_le32(
1272 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1274 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1275 *(u32 *)databuf = cpu_to_le32(RD_RH_PORTSTAT);
1278 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1280 case (RH_ENDPOINT_STALL):
1285 case RH_CLEAR_FEATURE | RH_CLASS:
1287 case RH_C_HUB_LOCAL_POWER:
1289 case (RH_C_HUB_OVER_CURRENT):
1290 WR_RH_STAT(RH_HS_OCIC);
1295 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1297 case (RH_PORT_ENABLE): WR_RH_PORTSTAT(RH_PS_CCS); OK(0);
1298 case (RH_PORT_SUSPEND): WR_RH_PORTSTAT(RH_PS_POCI); OK(0);
1299 case (RH_PORT_POWER): WR_RH_PORTSTAT(RH_PS_LSDA); OK(0);
1300 case (RH_C_PORT_CONNECTION): WR_RH_PORTSTAT(RH_PS_CSC); OK(0);
1301 case (RH_C_PORT_ENABLE): WR_RH_PORTSTAT(RH_PS_PESC); OK(0);
1302 case (RH_C_PORT_SUSPEND): WR_RH_PORTSTAT(RH_PS_PSSC); OK(0);
1303 case (RH_C_PORT_OVER_CURRENT):WR_RH_PORTSTAT(RH_PS_OCIC); OK(0);
1304 case (RH_C_PORT_RESET): WR_RH_PORTSTAT(RH_PS_PRSC); OK(0);
1308 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1310 case (RH_PORT_SUSPEND):
1311 WR_RH_PORTSTAT(RH_PS_PSS); OK(0);
1312 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1313 if (RD_RH_PORTSTAT & RH_PS_CCS)
1314 WR_RH_PORTSTAT(RH_PS_PRS);
1316 case (RH_PORT_POWER):
1317 WR_RH_PORTSTAT(RH_PS_PPS);
1319 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1320 if (RD_RH_PORTSTAT & RH_PS_CCS)
1321 WR_RH_PORTSTAT(RH_PS_PES);
1326 case RH_SET_ADDRESS:
1327 ohci->rh.devnum = wValue;
1330 case RH_GET_DESCRIPTOR:
1331 switch ((wValue & 0xff00) >> 8) {
1332 case (0x01): /* device descriptor */
1333 len = min_t(unsigned int,
1336 sizeof(root_hub_dev_des),
1338 databuf = root_hub_dev_des; OK(len);
1339 case (0x02): /* configuration descriptor */
1340 len = min_t(unsigned int,
1343 sizeof(root_hub_config_des),
1345 databuf = root_hub_config_des; OK(len);
1346 case (0x03): /* string descriptors */
1347 if (wValue == 0x0300) {
1348 len = min_t(unsigned int,
1351 sizeof(root_hub_str_index0),
1353 databuf = root_hub_str_index0;
1356 if (wValue == 0x0301) {
1357 len = min_t(unsigned int,
1360 sizeof(root_hub_str_index1),
1362 databuf = root_hub_str_index1;
1366 stat = USB_ST_STALLED;
1370 case RH_GET_DESCRIPTOR | RH_CLASS:
1372 __u32 temp = roothub_a(ohci);
1374 databuf[0] = 9; /* min length; */
1376 databuf[2] = temp & RH_A_NDP;
1377 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1378 databuf[2] = (databuf[2] == 2) ? 1 : 0;
1381 if (temp & RH_A_PSM) /* per-port power switching? */
1383 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1385 else if (temp & RH_A_OCPM)/* per-port overcurrent reporting? */
1389 databuf[5] = (temp & RH_A_POTPGT) >> 24;
1391 temp = roothub_b(ohci);
1392 databuf[7] = temp & RH_B_DR;
1393 if (databuf[2] < 7) {
1397 databuf[8] = (temp & RH_B_DR) >> 8;
1398 databuf[10] = databuf[9] = 0xff;
1401 len = min_t(unsigned int, leni,
1402 min_t(unsigned int, databuf[0], wLength));
1406 case RH_GET_CONFIGURATION:
1410 case RH_SET_CONFIGURATION:
1411 WR_RH_STAT(0x10000);
1415 dbg("unsupported root hub command");
1416 stat = USB_ST_STALLED;
1420 ohci_dump_roothub(ohci, 1);
1425 len = min_t(int, len, leni);
1426 if (data != databuf)
1427 memcpy(data, databuf, len);
1432 pkt_print(ohci, NULL, dev, pipe, buffer,
1433 transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1441 /*-------------------------------------------------------------------------*/
1443 static ohci_dev_t *ohci_get_ohci_dev(ohci_t *ohci, int devnum, int intr)
1448 return &ohci->ohci_dev;
1450 /* First see if we already have an ohci_dev for this dev. */
1451 for (i = 0; i < NUM_INT_DEVS; i++) {
1452 if (ohci->int_dev[i].devnum == devnum)
1453 return &ohci->int_dev[i];
1456 /* If not then find a free one. */
1457 for (i = 0; i < NUM_INT_DEVS; i++) {
1458 if (ohci->int_dev[i].devnum == -1) {
1459 ohci->int_dev[i].devnum = devnum;
1460 return &ohci->int_dev[i];
1464 printf("ohci: Error out of ohci_devs for interrupt endpoints\n");
1468 /* common code for handling submit messages - used for all but root hub */
1470 static urb_priv_t *ohci_alloc_urb(struct usb_device *dev, unsigned long pipe,
1471 void *buffer, int transfer_len, int interval)
1475 urb = calloc(1, sizeof(urb_priv_t));
1477 printf("ohci: Error out of memory allocating urb\n");
1483 urb->transfer_buffer = buffer;
1484 urb->transfer_buffer_length = transfer_len;
1485 urb->interval = interval;
1490 static int submit_common_msg(ohci_t *ohci, struct usb_device *dev,
1491 unsigned long pipe, void *buffer, int transfer_len,
1492 struct devrequest *setup, int interval)
1495 int maxsize = usb_maxpacket(dev, pipe);
1498 ohci_dev_t *ohci_dev;
1500 urb = ohci_alloc_urb(dev, pipe, buffer, transfer_len, interval);
1505 urb->actual_length = 0;
1506 pkt_print(ohci, urb, dev, pipe, buffer, transfer_len,
1507 setup, "SUB", usb_pipein(pipe));
1512 err("submit_common_message: pipesize for pipe %lx is zero",
1517 ohci_dev = ohci_get_ohci_dev(ohci, dev->devnum, usb_pipeint(pipe));
1521 if (sohci_submit_job(ohci, ohci_dev, urb, setup) < 0) {
1522 err("sohci_submit_job failed");
1527 /* ohci_dump_status(ohci); */
1529 timeout = USB_TIMEOUT_MS(pipe);
1531 /* wait for it to complete */
1533 /* check whether the controller is done */
1534 stat = hc_interrupt(ohci);
1536 stat = USB_ST_CRC_ERR;
1540 /* NOTE: since we are not interrupt driven in U-Boot and always
1541 * handle only one URB at a time, we cannot assume the
1542 * transaction finished on the first successful return from
1543 * hc_interrupt().. unless the flag for current URB is set,
1544 * meaning that all TD's to/from device got actually
1545 * transferred and processed. If the current URB is not
1546 * finished we need to re-iterate this loop so as
1547 * hc_interrupt() gets called again as there needs to be some
1548 * more TD's to process still */
1549 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1550 /* 0xff is returned for an SF-interrupt */
1560 if (!usb_pipeint(pipe))
1561 err("CTL:TIMEOUT ");
1562 dbg("submit_common_msg: TO status %x\n", stat);
1564 stat = USB_ST_CRC_ERR;
1570 dev->act_len = urb->actual_length;
1572 if (usb_pipein(pipe) && dev->status == 0 && dev->act_len)
1573 invalidate_dcache_buffer(buffer, dev->act_len);
1576 pkt_print(ohci, urb, dev, pipe, buffer, transfer_len,
1577 setup, "RET(ctlr)", usb_pipein(pipe));
1585 #define MAX_INT_QUEUESIZE 8
1590 urb_priv_t *urb[MAX_INT_QUEUESIZE];
1593 static struct int_queue *_ohci_create_int_queue(ohci_t *ohci,
1594 struct usb_device *udev, unsigned long pipe, int queuesize,
1595 int elementsize, void *buffer, int interval)
1597 struct int_queue *queue;
1598 ohci_dev_t *ohci_dev;
1601 if (queuesize > MAX_INT_QUEUESIZE)
1604 ohci_dev = ohci_get_ohci_dev(ohci, udev->devnum, 1);
1608 queue = malloc(sizeof(*queue));
1610 printf("ohci: Error out of memory allocating int queue\n");
1614 for (i = 0; i < queuesize; i++) {
1615 queue->urb[i] = ohci_alloc_urb(udev, pipe,
1616 buffer + i * elementsize,
1617 elementsize, interval);
1621 if (sohci_submit_job(ohci, ohci_dev, queue->urb[i], NULL)) {
1622 printf("ohci: Error submitting int queue job\n");
1623 urb_free_priv(queue->urb[i]);
1628 /* We did not succeed in submitting even 1 urb */
1633 queue->queuesize = i;
1634 queue->curr_urb = 0;
1639 static void *_ohci_poll_int_queue(ohci_t *ohci, struct usb_device *udev,
1640 struct int_queue *queue)
1642 if (queue->curr_urb == queue->queuesize)
1643 return NULL; /* Queue depleted */
1645 if (hc_interrupt(ohci) < 0)
1648 if (queue->urb[queue->curr_urb]->finished) {
1649 void *ret = queue->urb[queue->curr_urb]->transfer_buffer;
1657 static int _ohci_destroy_int_queue(ohci_t *ohci, struct usb_device *dev,
1658 struct int_queue *queue)
1662 for (i = 0; i < queue->queuesize; i++)
1663 urb_free_priv(queue->urb[i]);
1670 #if !CONFIG_IS_ENABLED(DM_USB)
1671 /* submit routines called from usb.c */
1672 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1675 info("submit_bulk_msg");
1676 return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len,
1680 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1681 int transfer_len, int interval, bool nonblock)
1683 info("submit_int_msg");
1684 return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len, NULL,
1688 struct int_queue *create_int_queue(struct usb_device *dev,
1689 unsigned long pipe, int queuesize, int elementsize,
1690 void *buffer, int interval)
1692 return _ohci_create_int_queue(&gohci, dev, pipe, queuesize,
1693 elementsize, buffer, interval);
1696 void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1698 return _ohci_poll_int_queue(&gohci, dev, queue);
1701 int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1703 return _ohci_destroy_int_queue(&gohci, dev, queue);
1707 static int _ohci_submit_control_msg(ohci_t *ohci, struct usb_device *dev,
1708 unsigned long pipe, void *buffer, int transfer_len,
1709 struct devrequest *setup)
1711 int maxsize = usb_maxpacket(dev, pipe);
1713 info("submit_control_msg");
1715 pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len,
1716 setup, "SUB", usb_pipein(pipe));
1721 err("submit_control_message: pipesize for pipe %lx is zero",
1725 if (((pipe >> 8) & 0x7f) == ohci->rh.devnum) {
1727 /* root hub - redirect */
1728 return ohci_submit_rh_msg(ohci, dev, pipe, buffer,
1729 transfer_len, setup);
1732 return submit_common_msg(ohci, dev, pipe, buffer, transfer_len,
1736 /*-------------------------------------------------------------------------*
1738 *-------------------------------------------------------------------------*/
1740 /* reset the HC and BUS */
1742 static int hc_reset(ohci_t *ohci)
1744 #ifdef CONFIG_PCI_EHCI_DEVNO
1748 int smm_timeout = 50; /* 0,5 sec */
1750 dbg("%s\n", __FUNCTION__);
1752 #ifdef CONFIG_PCI_EHCI_DEVNO
1754 * Some multi-function controllers (e.g. ISP1562) allow root hub
1755 * resetting via EHCI registers only.
1757 pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVNO);
1762 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1763 base += EHCI_USBCMD_OFF;
1764 ohci_writel(ohci_readl(base) | EHCI_USBCMD_HCRESET, base);
1766 while (ohci_readl(base) & EHCI_USBCMD_HCRESET) {
1767 if (timeout-- <= 0) {
1768 printf("USB RootHub reset timed out!");
1774 printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
1776 if (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1777 /* SMM owns the HC, request ownership */
1778 ohci_writel(OHCI_OCR, &ohci->regs->cmdstatus);
1779 info("USB HC TakeOver from SMM");
1780 while (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1782 if (--smm_timeout == 0) {
1783 err("USB HC TakeOver failed!");
1789 /* Disable HC interrupts */
1790 ohci_writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
1792 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1794 ohci_readl(&ohci->regs->control));
1796 /* Reset USB (needed by some controllers) */
1797 ohci->hc_control = 0;
1798 ohci_writel(ohci->hc_control, &ohci->regs->control);
1800 /* HC Reset requires max 10 us delay */
1801 ohci_writel(OHCI_HCR, &ohci->regs->cmdstatus);
1802 while ((ohci_readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1803 if (--timeout == 0) {
1804 err("USB HC reset timed out!");
1812 /*-------------------------------------------------------------------------*/
1814 /* Start an OHCI controller, set the BUS operational
1816 * connect the virtual root hub */
1818 static int hc_start(ohci_t *ohci)
1821 unsigned int fminterval;
1825 for (i = 0; i < NUM_INT_DEVS; i++)
1826 ohci->int_dev[i].devnum = -1;
1828 /* Tell the controller where the control and bulk lists are
1829 * The lists are empty now. */
1831 ohci_writel(0, &ohci->regs->ed_controlhead);
1832 ohci_writel(0, &ohci->regs->ed_bulkhead);
1834 ohci_writel((uintptr_t)ohci->hcca,
1835 &ohci->regs->hcca); /* reset clears this */
1837 fminterval = 0x2edf;
1838 ohci_writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
1839 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1840 ohci_writel(fminterval, &ohci->regs->fminterval);
1841 ohci_writel(0x628, &ohci->regs->lsthresh);
1843 /* start controller operations */
1844 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1846 ohci_writel(ohci->hc_control, &ohci->regs->control);
1848 /* disable all interrupts */
1849 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1850 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1851 OHCI_INTR_OC | OHCI_INTR_MIE);
1852 ohci_writel(mask, &ohci->regs->intrdisable);
1853 /* clear all interrupts */
1854 mask &= ~OHCI_INTR_MIE;
1855 ohci_writel(mask, &ohci->regs->intrstatus);
1856 /* Choose the interrupts we care about now - but w/o MIE */
1857 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1858 ohci_writel(mask, &ohci->regs->intrenable);
1861 /* required for AMD-756 and some Mac platforms */
1862 ohci_writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1863 &ohci->regs->roothub.a);
1864 ohci_writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1865 #endif /* OHCI_USE_NPS */
1867 /* connect the virtual root hub */
1868 ohci->rh.devnum = 0;
1873 /*-------------------------------------------------------------------------*/
1875 /* an interrupt happens */
1877 static int hc_interrupt(ohci_t *ohci)
1879 struct ohci_regs *regs = ohci->regs;
1883 invalidate_dcache_hcca(ohci->hcca);
1885 if ((ohci->hcca->done_head != 0) &&
1886 !(m32_swap(ohci->hcca->done_head) & 0x01)) {
1887 ints = OHCI_INTR_WDH;
1889 ints = ohci_readl(®s->intrstatus);
1890 if (ints == ~(u32)0) {
1892 err("%s device removed!", ohci->slot_name);
1895 ints &= ohci_readl(®s->intrenable);
1897 dbg("hc_interrupt: returning..\n");
1903 /* dbg("Interrupt: %x frame: %x", ints,
1904 le16_to_cpu(ohci->hcca->frame_no)); */
1906 if (ints & OHCI_INTR_RHSC)
1909 if (ints & OHCI_INTR_UE) {
1911 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1913 /* e.g. due to PCI Master/Target Abort */
1920 /* FIXME: be optimistic, hope that bug won't repeat often. */
1921 /* Make some non-interrupt context restart the controller. */
1922 /* Count and limit the retries though; either hardware or */
1923 /* software errors can go forever... */
1928 if (ints & OHCI_INTR_WDH) {
1930 ohci_writel(OHCI_INTR_WDH, ®s->intrdisable);
1931 (void)ohci_readl(®s->intrdisable); /* flush */
1932 stat = dl_done_list(ohci);
1933 ohci_writel(OHCI_INTR_WDH, ®s->intrenable);
1934 (void)ohci_readl(®s->intrdisable); /* flush */
1937 if (ints & OHCI_INTR_SO) {
1938 dbg("USB Schedule overrun\n");
1939 ohci_writel(OHCI_INTR_SO, ®s->intrenable);
1943 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1944 if (ints & OHCI_INTR_SF) {
1945 unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
1947 ohci_writel(OHCI_INTR_SF, ®s->intrdisable);
1948 if (ohci->ed_rm_list[frame] != NULL)
1949 ohci_writel(OHCI_INTR_SF, ®s->intrenable);
1953 ohci_writel(ints, ®s->intrstatus);
1957 /*-------------------------------------------------------------------------*/
1959 #if !CONFIG_IS_ENABLED(DM_USB)
1961 /*-------------------------------------------------------------------------*/
1963 /* De-allocate all resources.. */
1965 static void hc_release_ohci(ohci_t *ohci)
1967 dbg("USB HC release ohci usb-%s", ohci->slot_name);
1969 if (!ohci->disabled)
1973 /*-------------------------------------------------------------------------*/
1976 * low level initalisation routine, called from usb.c
1978 static char ohci_inited = 0;
1980 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1982 memset(&gohci, 0, sizeof(ohci_t));
1984 /* align the storage */
1985 if ((__u32)&ghcca[0] & 0xff) {
1986 err("HCCA not aligned!!");
1989 gohci.hcca = &ghcca[0];
1990 info("aligned ghcca %p", gohci.hcca);
1991 memset(gohci.hcca, 0, sizeof(struct ohci_hcca));
1996 gohci.regs = (struct ohci_regs *)CFG_SYS_USB_OHCI_REGS_BASE;
1999 gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME;
2001 if (hc_reset (&gohci) < 0) {
2002 hc_release_ohci (&gohci);
2003 err ("can't reset usb-%s", gohci.slot_name);
2007 if (hc_start(&gohci) < 0) {
2008 err("can't start usb-%s", gohci.slot_name);
2009 hc_release_ohci(&gohci);
2010 /* Initialization failed */
2015 ohci_dump(&gohci, 1);
2023 int usb_lowlevel_stop(int index)
2025 /* this gets called really early - before the controller has */
2026 /* even been initialized! */
2029 /* TODO release any interrupts, etc. */
2030 /* call hc_release_ohci() here ? */
2033 /* This driver is no longer initialised. It needs a new low-level
2034 * init (board/cpu) before it can be used again. */
2039 int submit_control_msg(struct usb_device *dev, unsigned long pipe,
2040 void *buffer, int transfer_len, struct devrequest *setup)
2042 return _ohci_submit_control_msg(&gohci, dev, pipe, buffer,
2043 transfer_len, setup);
2047 #if CONFIG_IS_ENABLED(DM_USB)
2048 static int ohci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
2049 unsigned long pipe, void *buffer, int length,
2050 struct devrequest *setup)
2052 ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2054 return _ohci_submit_control_msg(ohci, udev, pipe, buffer,
2058 static int ohci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
2059 unsigned long pipe, void *buffer, int length)
2061 ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2063 return submit_common_msg(ohci, udev, pipe, buffer, length, NULL, 0);
2066 static int ohci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
2067 unsigned long pipe, void *buffer, int length,
2068 int interval, bool nonblock)
2070 ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2072 return submit_common_msg(ohci, udev, pipe, buffer, length,
2076 static struct int_queue *ohci_create_int_queue(struct udevice *dev,
2077 struct usb_device *udev, unsigned long pipe, int queuesize,
2078 int elementsize, void *buffer, int interval)
2080 ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2082 return _ohci_create_int_queue(ohci, udev, pipe, queuesize, elementsize,
2086 static void *ohci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
2087 struct int_queue *queue)
2089 ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2091 return _ohci_poll_int_queue(ohci, udev, queue);
2094 static int ohci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
2095 struct int_queue *queue)
2097 ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2099 return _ohci_destroy_int_queue(ohci, udev, queue);
2102 int ohci_register(struct udevice *dev, struct ohci_regs *regs)
2104 struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
2105 ohci_t *ohci = dev_get_priv(dev);
2108 priv->desc_before_addr = true;
2111 ohci->hcca = memalign(256, sizeof(struct ohci_hcca));
2114 memset(ohci->hcca, 0, sizeof(struct ohci_hcca));
2115 flush_dcache_hcca(ohci->hcca);
2117 if (hc_reset(ohci) < 0)
2120 if (hc_start(ohci) < 0)
2123 reg = ohci_readl(®s->revision);
2124 printf("USB OHCI %x.%x\n", (reg >> 4) & 0xf, reg & 0xf);
2129 int ohci_deregister(struct udevice *dev)
2131 ohci_t *ohci = dev_get_priv(dev);
2133 if (hc_reset(ohci) < 0)
2141 struct dm_usb_ops ohci_usb_ops = {
2142 .control = ohci_submit_control_msg,
2143 .bulk = ohci_submit_bulk_msg,
2144 .interrupt = ohci_submit_int_msg,
2145 .create_int_queue = ohci_create_int_queue,
2146 .poll_int_queue = ohci_poll_int_queue,
2147 .destroy_int_queue = ohci_destroy_int_queue,