drivers/usb/host/ohci-hcd.c

   1 /*
   2  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
   3  *
   4  * Interrupt support is added. Now, it has been tested
   5  * on ULI1575 chip and works well with USB keyboard.
   6  *
   7  * (C) Copyright 2007
   8  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
   9  *
  10  * (C) Copyright 2003
  11  * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
  12  *
  13  * Note: Much of this code has been derived from Linux 2.4
  14  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  15  * (C) Copyright 2000-2002 David Brownell
  16  *
  17  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  18  * ebenard@eukrea.com - based on s3c24x0's driver
  19  *
  20  * SPDX-License-Identifier:     GPL-2.0+
  21  */
  22 /*
  23  * IMPORTANT NOTES
  24  * 1 - Read doc/README.generic_usb_ohci
  25  * 2 - this driver is intended for use with USB Mass Storage Devices
  26  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
  27  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  28  *     to activate workaround for bug #41 or this driver will NOT work!
  29  */
  30
  31 #include <common.h>
  32 #include <asm/byteorder.h>
  33
  34 #if defined(CONFIG_PCI_OHCI)
  35 # include <pci.h>
  36 #if !defined(CONFIG_PCI_OHCI_DEVNO)
  37 #define CONFIG_PCI_OHCI_DEVNO   0
  38 #endif
  39 #endif
  40
  41 #include <malloc.h>
  42 #include <usb.h>
  43
  44 #include "ohci.h"
  45
  46 #ifdef CONFIG_AT91RM9200
  47 #include <asm/arch/hardware.h>  /* needed for AT91_USB_HOST_BASE */
  48 #endif
  49
  50 #if defined(CONFIG_CPU_ARM920T) || \
  51     defined(CONFIG_S3C24X0) || \
  52     defined(CONFIG_440EP) || \
  53     defined(CONFIG_PCI_OHCI) || \
  54     defined(CONFIG_MPC5200) || \
  55     defined(CONFIG_SYS_OHCI_USE_NPS)
  56 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
  57 #endif
  58
  59 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  60 #undef DEBUG
  61 #undef SHOW_INFO
  62 #undef OHCI_FILL_TRACE
  63
  64 /* For initializing controller (mask in an HCFS mode too) */
  65 #define OHCI_CONTROL_INIT \
  66         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  67
  68 #ifdef CONFIG_PCI_OHCI
  69 static struct pci_device_id ohci_pci_ids[] = {
  70         {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
  71         {0x1033, 0x0035},       /* NEC PCI OHCI module ids */
  72         {0x1131, 0x1561},       /* Philips 1561 PCI OHCI module ids */
  73         /* Please add supported PCI OHCI controller ids here */
  74         {0, 0}
  75 };
  76 #endif
  77
  78 #ifdef CONFIG_PCI_EHCI_DEVNO
  79 static struct pci_device_id ehci_pci_ids[] = {
  80         {0x1131, 0x1562},       /* Philips 1562 PCI EHCI module ids */
  81         /* Please add supported PCI EHCI controller ids here */
  82         {0, 0}
  83 };
  84 #endif
  85
  86 #ifdef DEBUG
  87 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  88 #else
  89 #define dbg(format, arg...) do {} while (0)
  90 #endif /* DEBUG */
  91 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  92 #ifdef SHOW_INFO
  93 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  94 #else
  95 #define info(format, arg...) do {} while (0)
  96 #endif
  97
  98 #ifdef CONFIG_SYS_OHCI_BE_CONTROLLER
  99 # define m16_swap(x) cpu_to_be16(x)
 100 # define m32_swap(x) cpu_to_be32(x)
 101 #else
 102 # define m16_swap(x) cpu_to_le16(x)
 103 # define m32_swap(x) cpu_to_le32(x)
 104 #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
 105
 106 /* global ohci_t */
 107 static ohci_t gohci;
 108 /* this must be aligned to a 256 byte boundary */
 109 struct ohci_hcca ghcca[1];
 110
 111 /* mapping of the OHCI CC status to error codes */
 112 static int cc_to_error[16] = {
 113         /* No  Error  */               0,
 114         /* CRC Error  */               USB_ST_CRC_ERR,
 115         /* Bit Stuff  */               USB_ST_BIT_ERR,
 116         /* Data Togg  */               USB_ST_CRC_ERR,
 117         /* Stall      */               USB_ST_STALLED,
 118         /* DevNotResp */               -1,
 119         /* PIDCheck   */               USB_ST_BIT_ERR,
 120         /* UnExpPID   */               USB_ST_BIT_ERR,
 121         /* DataOver   */               USB_ST_BUF_ERR,
 122         /* DataUnder  */               USB_ST_BUF_ERR,
 123         /* reservd    */               -1,
 124         /* reservd    */               -1,
 125         /* BufferOver */               USB_ST_BUF_ERR,
 126         /* BuffUnder  */               USB_ST_BUF_ERR,
 127         /* Not Access */               -1,
 128         /* Not Access */               -1
 129 };
 130
 131 static const char *cc_to_string[16] = {
 132         "No Error",
 133         "CRC: Last data packet from endpoint contained a CRC error.",
 134         "BITSTUFFING: Last data packet from endpoint contained a bit " \
 135                      "stuffing violation",
 136         "DATATOGGLEMISMATCH: Last packet from endpoint had data toggle PID\n" \
 137                      "that did not match the expected value.",
 138         "STALL: TD was moved to the Done Queue because the endpoint returned" \
 139                      " a STALL PID",
 140         "DEVICENOTRESPONDING: Device did not respond to token (IN) or did\n" \
 141                      "not provide a handshake (OUT)",
 142         "PIDCHECKFAILURE: Check bits on PID from endpoint failed on data PID\n"\
 143                      "(IN) or handshake (OUT)",
 144         "UNEXPECTEDPID: Receive PID was not valid when encountered or PID\n" \
 145                      "value is not defined.",
 146         "DATAOVERRUN: The amount of data returned by the endpoint exceeded\n" \
 147                      "either the size of the maximum data packet allowed\n" \
 148                      "from the endpoint (found in MaximumPacketSize field\n" \
 149                      "of ED) or the remaining buffer size.",
 150         "DATAUNDERRUN: The endpoint returned less than MaximumPacketSize\n" \
 151                      "and that amount was not sufficient to fill the\n" \
 152                      "specified buffer",
 153         "reserved1",
 154         "reserved2",
 155         "BUFFEROVERRUN: During an IN, HC received data from endpoint faster\n" \
 156                      "than it could be written to system memory",
 157         "BUFFERUNDERRUN: During an OUT, HC could not retrieve data from\n" \
 158                      "system memory fast enough to keep up with data USB " \
 159                      "data rate.",
 160         "NOT ACCESSED: This code is set by software before the TD is placed" \
 161                      "on a list to be processed by the HC.(1)",
 162         "NOT ACCESSED: This code is set by software before the TD is placed" \
 163                      "on a list to be processed by the HC.(2)",
 164 };
 165
 166 static inline u32 roothub_a(struct ohci *hc)
 167         { return ohci_readl(&hc->regs->roothub.a); }
 168 static inline u32 roothub_b(struct ohci *hc)
 169         { return ohci_readl(&hc->regs->roothub.b); }
 170 static inline u32 roothub_status(struct ohci *hc)
 171         { return ohci_readl(&hc->regs->roothub.status); }
 172 static inline u32 roothub_portstatus(struct ohci *hc, int i)
 173         { return ohci_readl(&hc->regs->roothub.portstatus[i]); }
 174
 175 /* forward declaration */
 176 static int hc_interrupt(ohci_t *ohci);
 177 static void td_submit_job(ohci_t *ohci, struct usb_device *dev,
 178                           unsigned long pipe, void *buffer, int transfer_len,
 179                           struct devrequest *setup, urb_priv_t *urb,
 180                           int interval);
 181 static int ep_link(ohci_t * ohci, ed_t * ed);
 182 static int ep_unlink(ohci_t * ohci, ed_t * ed);
 183 static ed_t *ep_add_ed(ohci_dev_t *ohci_dev, struct usb_device *usb_dev,
 184                        unsigned long pipe, int interval, int load);
 185
 186 /*-------------------------------------------------------------------------*/
 187
 188 /* TDs ... */
 189 static struct td *td_alloc(ohci_dev_t *ohci_dev, struct usb_device *usb_dev)
 190 {
 191         int i;
 192         struct td *td;
 193
 194         td = NULL;
 195         for (i = 0; i < NUM_TD; i++)
 196         {
 197                 if (ohci_dev->tds[i].usb_dev == NULL)
 198                 {
 199                         td = &ohci_dev->tds[i];
 200                         td->usb_dev = usb_dev;
 201                         break;
 202                 }
 203         }
 204
 205         return td;
 206 }
 207
 208 static inline void ed_free(struct ed *ed)
 209 {
 210         ed->usb_dev = NULL;
 211 }
 212
 213 /*-------------------------------------------------------------------------*
 214  * URB support functions
 215  *-------------------------------------------------------------------------*/
 216
 217 /* free HCD-private data associated with this URB */
 218
 219 static void urb_free_priv(urb_priv_t *urb)
 220 {
 221         int             i;
 222         int             last;
 223         struct td       *td;
 224
 225         last = urb->length - 1;
 226         if (last >= 0) {
 227                 for (i = 0; i <= last; i++) {
 228                         td = urb->td[i];
 229                         if (td) {
 230                                 td->usb_dev = NULL;
 231                                 urb->td[i] = NULL;
 232                         }
 233                 }
 234         }
 235         free(urb);
 236 }
 237
 238 /*-------------------------------------------------------------------------*/
 239
 240 #ifdef DEBUG
 241 static int sohci_get_current_frame_number(ohci_t *ohci);
 242
 243 /* debug| print the main components of an URB
 244  * small: 0) header + data packets 1) just header */
 245
 246 static void pkt_print(ohci_t *ohci, urb_priv_t *purb, struct usb_device *dev,
 247                       unsigned long pipe, void *buffer, int transfer_len,
 248                       struct devrequest *setup, char *str, int small)
 249 {
 250         dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx",
 251                         str,
 252                         sohci_get_current_frame_number(ohci),
 253                         usb_pipedevice(pipe),
 254                         usb_pipeendpoint(pipe),
 255                         usb_pipeout(pipe)? 'O': 'I',
 256                         usb_pipetype(pipe) < 2 ? \
 257                                 (usb_pipeint(pipe)? "INTR": "ISOC"): \
 258                                 (usb_pipecontrol(pipe)? "CTRL": "BULK"),
 259                         (purb ? purb->actual_length : 0),
 260                         transfer_len, dev->status);
 261 #ifdef  OHCI_VERBOSE_DEBUG
 262         if (!small) {
 263                 int i, len;
 264
 265                 if (usb_pipecontrol(pipe)) {
 266                         printf(__FILE__ ": cmd(8):");
 267                         for (i = 0; i < 8 ; i++)
 268                                 printf(" %02x", ((__u8 *) setup) [i]);
 269                         printf("\n");
 270                 }
 271                 if (transfer_len > 0 && buffer) {
 272                         printf(__FILE__ ": data(%d/%d):",
 273                                 (purb ? purb->actual_length : 0),
 274                                 transfer_len);
 275                         len = usb_pipeout(pipe)? transfer_len:
 276                                         (purb ? purb->actual_length : 0);
 277                         for (i = 0; i < 16 && i < len; i++)
 278                                 printf(" %02x", ((__u8 *) buffer) [i]);
 279                         printf("%s\n", i < len? "...": "");
 280                 }
 281         }
 282 #endif
 283 }
 284
 285 /* just for debugging; prints non-empty branches of the int ed tree
 286  * inclusive iso eds */
 287 void ep_print_int_eds(ohci_t *ohci, char *str)
 288 {
 289         int i, j;
 290          __u32 *ed_p;
 291         for (i = 0; i < 32; i++) {
 292                 j = 5;
 293                 ed_p = &(ohci->hcca->int_table [i]);
 294                 if (*ed_p == 0)
 295                     continue;
 296                 printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
 297                 while (*ed_p != 0 && j--) {
 298                         ed_t *ed = (ed_t *)m32_swap(ed_p);
 299                         printf(" ed: %4x;", ed->hwINFO);
 300                         ed_p = &ed->hwNextED;
 301                 }
 302                 printf("\n");
 303         }
 304 }
 305
 306 static void ohci_dump_intr_mask(char *label, __u32 mask)
 307 {
 308         dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
 309                 label,
 310                 mask,
 311                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
 312                 (mask & OHCI_INTR_OC) ? " OC" : "",
 313                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
 314                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
 315                 (mask & OHCI_INTR_UE) ? " UE" : "",
 316                 (mask & OHCI_INTR_RD) ? " RD" : "",
 317                 (mask & OHCI_INTR_SF) ? " SF" : "",
 318                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
 319                 (mask & OHCI_INTR_SO) ? " SO" : ""
 320                 );
 321 }
 322
 323 static void maybe_print_eds(char *label, __u32 value)
 324 {
 325         ed_t *edp = (ed_t *)value;
 326
 327         if (value) {
 328                 dbg("%s %08x", label, value);
 329                 dbg("%08x", edp->hwINFO);
 330                 dbg("%08x", edp->hwTailP);
 331                 dbg("%08x", edp->hwHeadP);
 332                 dbg("%08x", edp->hwNextED);
 333         }
 334 }
 335
 336 static char *hcfs2string(int state)
 337 {
 338         switch (state) {
 339         case OHCI_USB_RESET:    return "reset";
 340         case OHCI_USB_RESUME:   return "resume";
 341         case OHCI_USB_OPER:     return "operational";
 342         case OHCI_USB_SUSPEND:  return "suspend";
 343         }
 344         return "?";
 345 }
 346
 347 /* dump control and status registers */
 348 static void ohci_dump_status(ohci_t *controller)
 349 {
 350         struct ohci_regs        *regs = controller->regs;
 351         __u32                   temp;
 352
 353         temp = ohci_readl(&regs->revision) & 0xff;
 354         if (temp != 0x10)
 355                 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
 356
 357         temp = ohci_readl(&regs->control);
 358         dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
 359                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
 360                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
 361                 (temp & OHCI_CTRL_IR) ? " IR" : "",
 362                 hcfs2string(temp & OHCI_CTRL_HCFS),
 363                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
 364                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
 365                 (temp & OHCI_CTRL_IE) ? " IE" : "",
 366                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
 367                 temp & OHCI_CTRL_CBSR
 368                 );
 369
 370         temp = ohci_readl(&regs->cmdstatus);
 371         dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
 372                 (temp & OHCI_SOC) >> 16,
 373                 (temp & OHCI_OCR) ? " OCR" : "",
 374                 (temp & OHCI_BLF) ? " BLF" : "",
 375                 (temp & OHCI_CLF) ? " CLF" : "",
 376                 (temp & OHCI_HCR) ? " HCR" : ""
 377                 );
 378
 379         ohci_dump_intr_mask("intrstatus", ohci_readl(&regs->intrstatus));
 380         ohci_dump_intr_mask("intrenable", ohci_readl(&regs->intrenable));
 381
 382         maybe_print_eds("ed_periodcurrent",
 383                         ohci_readl(&regs->ed_periodcurrent));
 384
 385         maybe_print_eds("ed_controlhead", ohci_readl(&regs->ed_controlhead));
 386         maybe_print_eds("ed_controlcurrent",
 387                         ohci_readl(&regs->ed_controlcurrent));
 388
 389         maybe_print_eds("ed_bulkhead", ohci_readl(&regs->ed_bulkhead));
 390         maybe_print_eds("ed_bulkcurrent", ohci_readl(&regs->ed_bulkcurrent));
 391
 392         maybe_print_eds("donehead", ohci_readl(&regs->donehead));
 393 }
 394
 395 static void ohci_dump_roothub(ohci_t *controller, int verbose)
 396 {
 397         __u32                   temp, ndp, i;
 398
 399         temp = roothub_a(controller);
 400         ndp = (temp & RH_A_NDP);
 401 #ifdef CONFIG_AT91C_PQFP_UHPBUG
 402         ndp = (ndp == 2) ? 1:0;
 403 #endif
 404         if (verbose) {
 405                 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
 406                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
 407                         (temp & RH_A_NOCP) ? " NOCP" : "",
 408                         (temp & RH_A_OCPM) ? " OCPM" : "",
 409                         (temp & RH_A_DT) ? " DT" : "",
 410                         (temp & RH_A_NPS) ? " NPS" : "",
 411                         (temp & RH_A_PSM) ? " PSM" : "",
 412                         ndp
 413                         );
 414                 temp = roothub_b(controller);
 415                 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
 416                         temp,
 417                         (temp & RH_B_PPCM) >> 16,
 418                         (temp & RH_B_DR)
 419                         );
 420                 temp = roothub_status(controller);
 421                 dbg("roothub.status: %08x%s%s%s%s%s%s",
 422                         temp,
 423                         (temp & RH_HS_CRWE) ? " CRWE" : "",
 424                         (temp & RH_HS_OCIC) ? " OCIC" : "",
 425                         (temp & RH_HS_LPSC) ? " LPSC" : "",
 426                         (temp & RH_HS_DRWE) ? " DRWE" : "",
 427                         (temp & RH_HS_OCI) ? " OCI" : "",
 428                         (temp & RH_HS_LPS) ? " LPS" : ""
 429                         );
 430         }
 431
 432         for (i = 0; i < ndp; i++) {
 433                 temp = roothub_portstatus(controller, i);
 434                 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
 435                         i,
 436                         temp,
 437                         (temp & RH_PS_PRSC) ? " PRSC" : "",
 438                         (temp & RH_PS_OCIC) ? " OCIC" : "",
 439                         (temp & RH_PS_PSSC) ? " PSSC" : "",
 440                         (temp & RH_PS_PESC) ? " PESC" : "",
 441                         (temp & RH_PS_CSC) ? " CSC" : "",
 442
 443                         (temp & RH_PS_LSDA) ? " LSDA" : "",
 444                         (temp & RH_PS_PPS) ? " PPS" : "",
 445                         (temp & RH_PS_PRS) ? " PRS" : "",
 446                         (temp & RH_PS_POCI) ? " POCI" : "",
 447                         (temp & RH_PS_PSS) ? " PSS" : "",
 448
 449                         (temp & RH_PS_PES) ? " PES" : "",
 450                         (temp & RH_PS_CCS) ? " CCS" : ""
 451                         );
 452         }
 453 }
 454
 455 static void ohci_dump(ohci_t *controller, int verbose)
 456 {
 457         dbg("OHCI controller usb-%s state", controller->slot_name);
 458
 459         /* dumps some of the state we know about */
 460         ohci_dump_status(controller);
 461         if (verbose)
 462                 ep_print_int_eds(controller, "hcca");
 463         dbg("hcca frame #%04x", controller->hcca->frame_no);
 464         ohci_dump_roothub(controller, 1);
 465 }
 466 #endif /* DEBUG */
 467
 468 /*-------------------------------------------------------------------------*
 469  * Interface functions (URB)
 470  *-------------------------------------------------------------------------*/
 471
 472 /* get a transfer request */
 473
 474 int sohci_submit_job(ohci_t *ohci, ohci_dev_t *ohci_dev, urb_priv_t *urb,
 475                      struct devrequest *setup)
 476 {
 477         ed_t *ed;
 478         urb_priv_t *purb_priv = urb;
 479         int i, size = 0;
 480         struct usb_device *dev = urb->dev;
 481         unsigned long pipe = urb->pipe;
 482         void *buffer = urb->transfer_buffer;
 483         int transfer_len = urb->transfer_buffer_length;
 484         int interval = urb->interval;
 485
 486         /* when controller's hung, permit only roothub cleanup attempts
 487          * such as powering down ports */
 488         if (ohci->disabled) {
 489                 err("sohci_submit_job: EPIPE");
 490                 return -1;
 491         }
 492
 493         /* we're about to begin a new transaction here so mark the
 494          * URB unfinished */
 495         urb->finished = 0;
 496
 497         /* every endpoint has a ed, locate and fill it */
 498         ed = ep_add_ed(ohci_dev, dev, pipe, interval, 1);
 499         if (!ed) {
 500                 err("sohci_submit_job: ENOMEM");
 501                 return -1;
 502         }
 503
 504         /* for the private part of the URB we need the number of TDs (size) */
 505         switch (usb_pipetype(pipe)) {
 506         case PIPE_BULK: /* one TD for every 4096 Byte */
 507                 size = (transfer_len - 1) / 4096 + 1;
 508                 break;
 509         case PIPE_CONTROL:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
 510                 size = (transfer_len == 0)? 2:
 511                                         (transfer_len - 1) / 4096 + 3;
 512                 break;
 513         case PIPE_INTERRUPT: /* 1 TD */
 514                 size = 1;
 515                 break;
 516         }
 517
 518         ed->purb = urb;
 519
 520         if (size >= (N_URB_TD - 1)) {
 521                 err("need %d TDs, only have %d", size, N_URB_TD);
 522                 return -1;
 523         }
 524         purb_priv->pipe = pipe;
 525
 526         /* fill the private part of the URB */
 527         purb_priv->length = size;
 528         purb_priv->ed = ed;
 529         purb_priv->actual_length = 0;
 530
 531         /* allocate the TDs */
 532         /* note that td[0] was allocated in ep_add_ed */
 533         for (i = 0; i < size; i++) {
 534                 purb_priv->td[i] = td_alloc(ohci_dev, dev);
 535                 if (!purb_priv->td[i]) {
 536                         purb_priv->length = i;
 537                         urb_free_priv(purb_priv);
 538                         err("sohci_submit_job: ENOMEM");
 539                         return -1;
 540                 }
 541         }
 542
 543         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
 544                 urb_free_priv(purb_priv);
 545                 err("sohci_submit_job: EINVAL");
 546                 return -1;
 547         }
 548
 549         /* link the ed into a chain if is not already */
 550         if (ed->state != ED_OPER)
 551                 ep_link(ohci, ed);
 552
 553         /* fill the TDs and link it to the ed */
 554         td_submit_job(ohci, dev, pipe, buffer, transfer_len,
 555                       setup, purb_priv, interval);
 556
 557         return 0;
 558 }
 559
 560 static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
 561 {
 562         struct ohci_regs *regs = hc->regs;
 563
 564         switch (usb_pipetype(urb->pipe)) {
 565         case PIPE_INTERRUPT:
 566                 /* implicitly requeued */
 567                 if (urb->dev->irq_handle &&
 568                                 (urb->dev->irq_act_len = urb->actual_length)) {
 569                         ohci_writel(OHCI_INTR_WDH, &regs->intrenable);
 570                         ohci_readl(&regs->intrenable); /* PCI posting flush */
 571                         urb->dev->irq_handle(urb->dev);
 572                         ohci_writel(OHCI_INTR_WDH, &regs->intrdisable);
 573                         ohci_readl(&regs->intrdisable); /* PCI posting flush */
 574                 }
 575                 urb->actual_length = 0;
 576                 td_submit_job(  hc,
 577                                 urb->dev,
 578                                 urb->pipe,
 579                                 urb->transfer_buffer,
 580                                 urb->transfer_buffer_length,
 581                                 NULL,
 582                                 urb,
 583                                 urb->interval);
 584                 break;
 585         case PIPE_CONTROL:
 586         case PIPE_BULK:
 587                 break;
 588         default:
 589                 return 0;
 590         }
 591         return 1;
 592 }
 593
 594 /*-------------------------------------------------------------------------*/
 595
 596 #ifdef DEBUG
 597 /* tell us the current USB frame number */
 598 static int sohci_get_current_frame_number(ohci_t *ohci)
 599 {
 600         return m16_swap(ohci->hcca->frame_no);
 601 }
 602 #endif
 603
 604 /*-------------------------------------------------------------------------*
 605  * ED handling functions
 606  *-------------------------------------------------------------------------*/
 607
 608 /* search for the right branch to insert an interrupt ed into the int tree
 609  * do some load ballancing;
 610  * returns the branch and
 611  * sets the interval to interval = 2^integer (ld (interval)) */
 612
 613 static int ep_int_ballance(ohci_t *ohci, int interval, int load)
 614 {
 615         int i, branch = 0;
 616
 617         /* search for the least loaded interrupt endpoint
 618          * branch of all 32 branches
 619          */
 620         for (i = 0; i < 32; i++)
 621                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
 622                         branch = i;
 623
 624         branch = branch % interval;
 625         for (i = branch; i < 32; i += interval)
 626                 ohci->ohci_int_load [i] += load;
 627
 628         return branch;
 629 }
 630
 631 /*-------------------------------------------------------------------------*/
 632
 633 /*  2^int( ld (inter)) */
 634
 635 static int ep_2_n_interval(int inter)
 636 {
 637         int i;
 638         for (i = 0; ((inter >> i) > 1) && (i < 5); i++);
 639         return 1 << i;
 640 }
 641
 642 /*-------------------------------------------------------------------------*/
 643
 644 /* the int tree is a binary tree
 645  * in order to process it sequentially the indexes of the branches have to
 646  * be mapped the mapping reverses the bits of a word of num_bits length */
 647 static int ep_rev(int num_bits, int word)
 648 {
 649         int i, wout = 0;
 650
 651         for (i = 0; i < num_bits; i++)
 652                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
 653         return wout;
 654 }
 655
 656 /*-------------------------------------------------------------------------*
 657  * ED handling functions
 658  *-------------------------------------------------------------------------*/
 659
 660 /* link an ed into one of the HC chains */
 661
 662 static int ep_link(ohci_t *ohci, ed_t *edi)
 663 {
 664         volatile ed_t *ed = edi;
 665         int int_branch;
 666         int i;
 667         int inter;
 668         int interval;
 669         int load;
 670         __u32 *ed_p;
 671
 672         ed->state = ED_OPER;
 673         ed->int_interval = 0;
 674
 675         switch (ed->type) {
 676         case PIPE_CONTROL:
 677                 ed->hwNextED = 0;
 678                 if (ohci->ed_controltail == NULL)
 679                         ohci_writel(ed, &ohci->regs->ed_controlhead);
 680                 else
 681                         ohci->ed_controltail->hwNextED =
 682                                                    m32_swap((unsigned long)ed);
 683
 684                 ed->ed_prev = ohci->ed_controltail;
 685                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
 686                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 687                         ohci->hc_control |= OHCI_CTRL_CLE;
 688                         ohci_writel(ohci->hc_control, &ohci->regs->control);
 689                 }
 690                 ohci->ed_controltail = edi;
 691                 break;
 692
 693         case PIPE_BULK:
 694                 ed->hwNextED = 0;
 695                 if (ohci->ed_bulktail == NULL)
 696                         ohci_writel(ed, &ohci->regs->ed_bulkhead);
 697                 else
 698                         ohci->ed_bulktail->hwNextED =
 699                                                    m32_swap((unsigned long)ed);
 700
 701                 ed->ed_prev = ohci->ed_bulktail;
 702                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
 703                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 704                         ohci->hc_control |= OHCI_CTRL_BLE;
 705                         ohci_writel(ohci->hc_control, &ohci->regs->control);
 706                 }
 707                 ohci->ed_bulktail = edi;
 708                 break;
 709
 710         case PIPE_INTERRUPT:
 711                 load = ed->int_load;
 712                 interval = ep_2_n_interval(ed->int_period);
 713                 ed->int_interval = interval;
 714                 int_branch = ep_int_ballance(ohci, interval, load);
 715                 ed->int_branch = int_branch;
 716
 717                 for (i = 0; i < ep_rev(6, interval); i += inter) {
 718                         inter = 1;
 719                         for (ed_p = &(ohci->hcca->int_table[\
 720                                                 ep_rev(5, i) + int_branch]);
 721                                 (*ed_p != 0) &&
 722                                 (((ed_t *)ed_p)->int_interval >= interval);
 723                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
 724                                         inter = ep_rev(6,
 725                                                  ((ed_t *)ed_p)->int_interval);
 726                         ed->hwNextED = *ed_p;
 727                         *ed_p = m32_swap((unsigned long)ed);
 728                 }
 729                 break;
 730         }
 731         return 0;
 732 }
 733
 734 /*-------------------------------------------------------------------------*/
 735
 736 /* scan the periodic table to find and unlink this ED */
 737 static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,
 738                             unsigned index, unsigned period)
 739 {
 740         for (; index < NUM_INTS; index += period) {
 741                 __u32   *ed_p = &ohci->hcca->int_table [index];
 742
 743                 /* ED might have been unlinked through another path */
 744                 while (*ed_p != 0) {
 745                         if (((struct ed *)
 746                                         m32_swap((unsigned long)ed_p)) == ed) {
 747                                 *ed_p = ed->hwNextED;
 748                                 break;
 749                         }
 750                         ed_p = &(((struct ed *)
 751                                      m32_swap((unsigned long)ed_p))->hwNextED);
 752                 }
 753         }
 754 }
 755
 756 /* unlink an ed from one of the HC chains.
 757  * just the link to the ed is unlinked.
 758  * the link from the ed still points to another operational ed or 0
 759  * so the HC can eventually finish the processing of the unlinked ed */
 760
 761 static int ep_unlink(ohci_t *ohci, ed_t *edi)
 762 {
 763         volatile ed_t *ed = edi;
 764         int i;
 765
 766         ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
 767
 768         switch (ed->type) {
 769         case PIPE_CONTROL:
 770                 if (ed->ed_prev == NULL) {
 771                         if (!ed->hwNextED) {
 772                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
 773                                 ohci_writel(ohci->hc_control,
 774                                             &ohci->regs->control);
 775                         }
 776                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 777                                 &ohci->regs->ed_controlhead);
 778                 } else {
 779                         ed->ed_prev->hwNextED = ed->hwNextED;
 780                 }
 781                 if (ohci->ed_controltail == ed) {
 782                         ohci->ed_controltail = ed->ed_prev;
 783                 } else {
 784                         ((ed_t *)m32_swap(
 785                             *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 786                 }
 787                 break;
 788
 789         case PIPE_BULK:
 790                 if (ed->ed_prev == NULL) {
 791                         if (!ed->hwNextED) {
 792                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
 793                                 ohci_writel(ohci->hc_control,
 794                                             &ohci->regs->control);
 795                         }
 796                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 797                                &ohci->regs->ed_bulkhead);
 798                 } else {
 799                         ed->ed_prev->hwNextED = ed->hwNextED;
 800                 }
 801                 if (ohci->ed_bulktail == ed) {
 802                         ohci->ed_bulktail = ed->ed_prev;
 803                 } else {
 804                         ((ed_t *)m32_swap(
 805                              *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 806                 }
 807                 break;
 808
 809         case PIPE_INTERRUPT:
 810                 periodic_unlink(ohci, ed, 0, 1);
 811                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
 812                     ohci->ohci_int_load[i] -= ed->int_load;
 813                 break;
 814         }
 815         ed->state = ED_UNLINK;
 816         return 0;
 817 }
 818
 819 /*-------------------------------------------------------------------------*/
 820
 821 /* add/reinit an endpoint; this should be done once at the
 822  * usb_set_configuration command, but the USB stack is a little bit
 823  * stateless so we do it at every transaction if the state of the ed
 824  * is ED_NEW then a dummy td is added and the state is changed to
 825  * ED_UNLINK in all other cases the state is left unchanged the ed
 826  * info fields are setted anyway even though most of them should not
 827  * change
 828  */
 829 static ed_t *ep_add_ed(ohci_dev_t *ohci_dev, struct usb_device *usb_dev,
 830                        unsigned long pipe, int interval, int load)
 831 {
 832         td_t *td;
 833         ed_t *ed_ret;
 834         volatile ed_t *ed;
 835
 836         ed = ed_ret = &ohci_dev->ed[(usb_pipeendpoint(pipe) << 1) |
 837                         (usb_pipecontrol(pipe)? 0: usb_pipeout(pipe))];
 838
 839         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
 840                 err("ep_add_ed: pending delete");
 841                 /* pending delete request */
 842                 return NULL;
 843         }
 844
 845         if (ed->state == ED_NEW) {
 846                 /* dummy td; end of td list for ed */
 847                 td = td_alloc(ohci_dev, usb_dev);
 848                 ed->hwTailP = m32_swap((unsigned long)td);
 849                 ed->hwHeadP = ed->hwTailP;
 850                 ed->state = ED_UNLINK;
 851                 ed->type = usb_pipetype(pipe);
 852                 ohci_dev->ed_cnt++;
 853         }
 854
 855         ed->hwINFO = m32_swap(usb_pipedevice(pipe)
 856                         | usb_pipeendpoint(pipe) << 7
 857                         | (usb_pipeisoc(pipe)? 0x8000: 0)
 858                         | (usb_pipecontrol(pipe)? 0: \
 859                                            (usb_pipeout(pipe)? 0x800: 0x1000))
 860                         | (usb_dev->speed == USB_SPEED_LOW) << 13
 861                         | usb_maxpacket(usb_dev, pipe) << 16);
 862
 863         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
 864                 ed->int_period = interval;
 865                 ed->int_load = load;
 866         }
 867
 868         return ed_ret;
 869 }
 870
 871 /*-------------------------------------------------------------------------*
 872  * TD handling functions
 873  *-------------------------------------------------------------------------*/
 874
 875 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
 876
 877 static void td_fill(ohci_t *ohci, unsigned int info,
 878         void *data, int len,
 879         struct usb_device *dev, int index, urb_priv_t *urb_priv)
 880 {
 881         volatile td_t  *td, *td_pt;
 882 #ifdef OHCI_FILL_TRACE
 883         int i;
 884 #endif
 885
 886         if (index > urb_priv->length) {
 887                 err("index > length");
 888                 return;
 889         }
 890         /* use this td as the next dummy */
 891         td_pt = urb_priv->td [index];
 892         td_pt->hwNextTD = 0;
 893
 894         /* fill the old dummy TD */
 895         td = urb_priv->td [index] =
 896                              (td_t *)(m32_swap(urb_priv->ed->hwTailP) & ~0xf);
 897
 898         td->ed = urb_priv->ed;
 899         td->next_dl_td = NULL;
 900         td->index = index;
 901         td->data = (__u32)data;
 902 #ifdef OHCI_FILL_TRACE
 903         if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
 904                 for (i = 0; i < len; i++)
 905                 printf("td->data[%d] %#2x ", i, ((unsigned char *)td->data)[i]);
 906                 printf("\n");
 907         }
 908 #endif
 909         if (!len)
 910                 data = 0;
 911
 912         td->hwINFO = m32_swap(info);
 913         td->hwCBP = m32_swap((unsigned long)data);
 914         if (data)
 915                 td->hwBE = m32_swap((unsigned long)(data + len - 1));
 916         else
 917                 td->hwBE = 0;
 918
 919         td->hwNextTD = m32_swap((unsigned long)td_pt);
 920
 921         /* append to queue */
 922         td->ed->hwTailP = td->hwNextTD;
 923 }
 924
 925 /*-------------------------------------------------------------------------*/
 926
 927 /* prepare all TDs of a transfer */
 928
 929 static void td_submit_job(ohci_t *ohci, struct usb_device *dev,
 930                           unsigned long pipe, void *buffer, int transfer_len,
 931                           struct devrequest *setup, urb_priv_t *urb,
 932                           int interval)
 933 {
 934         int data_len = transfer_len;
 935         void *data;
 936         int cnt = 0;
 937         __u32 info = 0;
 938         unsigned int toggle = 0;
 939
 940         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle
 941          * bits for reseting */
 942         if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
 943                 toggle = TD_T_TOGGLE;
 944         } else {
 945                 toggle = TD_T_DATA0;
 946                 usb_settoggle(dev, usb_pipeendpoint(pipe),
 947                                 usb_pipeout(pipe), 1);
 948         }
 949         urb->td_cnt = 0;
 950         if (data_len)
 951                 data = buffer;
 952         else
 953                 data = 0;
 954
 955         switch (usb_pipetype(pipe)) {
 956         case PIPE_BULK:
 957                 info = usb_pipeout(pipe)?
 958                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
 959                 while (data_len > 4096) {
 960                         td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle),
 961                                 data, 4096, dev, cnt, urb);
 962                         data += 4096; data_len -= 4096; cnt++;
 963                 }
 964                 info = usb_pipeout(pipe)?
 965                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
 966                 td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle), data,
 967                         data_len, dev, cnt, urb);
 968                 cnt++;
 969
 970                 if (!ohci->sleeping) {
 971                         /* start bulk list */
 972                         ohci_writel(OHCI_BLF, &ohci->regs->cmdstatus);
 973                 }
 974                 break;
 975
 976         case PIPE_CONTROL:
 977                 /* Setup phase */
 978                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
 979                 td_fill(ohci, info, setup, 8, dev, cnt++, urb);
 980
 981                 /* Optional Data phase */
 982                 if (data_len > 0) {
 983                         info = usb_pipeout(pipe)?
 984                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
 985                                 TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
 986                         /* NOTE:  mishandles transfers >8K, some >4K */
 987                         td_fill(ohci, info, data, data_len, dev, cnt++, urb);
 988                 }
 989
 990                 /* Status phase */
 991                 info = usb_pipeout(pipe)?
 992                         TD_CC | TD_DP_IN | TD_T_DATA1:
 993                         TD_CC | TD_DP_OUT | TD_T_DATA1;
 994                 td_fill(ohci, info, data, 0, dev, cnt++, urb);
 995
 996                 if (!ohci->sleeping) {
 997                         /* start Control list */
 998                         ohci_writel(OHCI_CLF, &ohci->regs->cmdstatus);
 999                 }
1000                 break;
1001
1002         case PIPE_INTERRUPT:
1003                 info = usb_pipeout(urb->pipe)?
1004                         TD_CC | TD_DP_OUT | toggle:
1005                         TD_CC | TD_R | TD_DP_IN | toggle;
1006                 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
1007                 break;
1008         }
1009         if (urb->length != cnt)
1010                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
1011 }
1012
1013 /*-------------------------------------------------------------------------*
1014  * Done List handling functions
1015  *-------------------------------------------------------------------------*/
1016
1017 /* calculate the transfer length and update the urb */
1018
1019 static void dl_transfer_length(td_t *td)
1020 {
1021         __u32 tdBE, tdCBP;
1022         urb_priv_t *lurb_priv = td->ed->purb;
1023
1024         tdBE   = m32_swap(td->hwBE);
1025         tdCBP  = m32_swap(td->hwCBP);
1026
1027         if (!(usb_pipecontrol(lurb_priv->pipe) &&
1028             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
1029                 if (tdBE != 0) {
1030                         if (td->hwCBP == 0)
1031                                 lurb_priv->actual_length += tdBE - td->data + 1;
1032                         else
1033                                 lurb_priv->actual_length += tdCBP - td->data;
1034                 }
1035         }
1036 }
1037
1038 /*-------------------------------------------------------------------------*/
1039 static void check_status(td_t *td_list)
1040 {
1041         urb_priv_t *lurb_priv = td_list->ed->purb;
1042         int        urb_len    = lurb_priv->length;
1043         __u32      *phwHeadP  = &td_list->ed->hwHeadP;
1044         int        cc;
1045
1046         cc = TD_CC_GET(m32_swap(td_list->hwINFO));
1047         if (cc) {
1048                 err(" USB-error: %s (%x)", cc_to_string[cc], cc);
1049
1050                 if (*phwHeadP & m32_swap(0x1)) {
1051                         if (lurb_priv &&
1052                             ((td_list->index + 1) < urb_len)) {
1053                                 *phwHeadP =
1054                                         (lurb_priv->td[urb_len - 1]->hwNextTD &\
1055                                                         m32_swap(0xfffffff0)) |
1056                                                    (*phwHeadP & m32_swap(0x2));
1057
1058                                 lurb_priv->td_cnt += urb_len -
1059                                                      td_list->index - 1;
1060                         } else
1061                                 *phwHeadP &= m32_swap(0xfffffff2);
1062                 }
1063 #ifdef CONFIG_MPC5200
1064                 td_list->hwNextTD = 0;
1065 #endif
1066         }
1067 }
1068
1069 /* replies to the request have to be on a FIFO basis so
1070  * we reverse the reversed done-list */
1071 static td_t *dl_reverse_done_list(ohci_t *ohci)
1072 {
1073         __u32 td_list_hc;
1074         td_t *td_rev = NULL;
1075         td_t *td_list = NULL;
1076
1077         td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
1078         ohci->hcca->done_head = 0;
1079
1080         while (td_list_hc) {
1081                 td_list = (td_t *)td_list_hc;
1082                 check_status(td_list);
1083                 td_list->next_dl_td = td_rev;
1084                 td_rev = td_list;
1085                 td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
1086         }
1087         return td_list;
1088 }
1089
1090 /*-------------------------------------------------------------------------*/
1091 /*-------------------------------------------------------------------------*/
1092
1093 static void finish_urb(ohci_t *ohci, urb_priv_t *urb, int status)
1094 {
1095         if ((status & (ED_OPER | ED_UNLINK)) && (urb->state != URB_DEL))
1096                 urb->finished = sohci_return_job(ohci, urb);
1097         else
1098                 dbg("finish_urb: strange.., ED state %x, \n", status);
1099 }
1100
1101 /*
1102  * Used to take back a TD from the host controller. This would normally be
1103  * called from within dl_done_list, however it may be called directly if the
1104  * HC no longer sees the TD and it has not appeared on the donelist (after
1105  * two frames).  This bug has been observed on ZF Micro systems.
1106  */
1107 static int takeback_td(ohci_t *ohci, td_t *td_list)
1108 {
1109         ed_t *ed;
1110         int cc;
1111         int stat = 0;
1112         /* urb_t *urb; */
1113         urb_priv_t *lurb_priv;
1114         __u32 tdINFO, edHeadP, edTailP;
1115
1116         tdINFO = m32_swap(td_list->hwINFO);
1117
1118         ed = td_list->ed;
1119         lurb_priv = ed->purb;
1120
1121         dl_transfer_length(td_list);
1122
1123         lurb_priv->td_cnt++;
1124
1125         /* error code of transfer */
1126         cc = TD_CC_GET(tdINFO);
1127         if (cc) {
1128                 err("USB-error: %s (%x)", cc_to_string[cc], cc);
1129                 stat = cc_to_error[cc];
1130         }
1131
1132         /* see if this done list makes for all TD's of current URB,
1133         * and mark the URB finished if so */
1134         if (lurb_priv->td_cnt == lurb_priv->length)
1135                 finish_urb(ohci, lurb_priv, ed->state);
1136
1137         dbg("dl_done_list: processing TD %x, len %x\n",
1138                 lurb_priv->td_cnt, lurb_priv->length);
1139
1140         if (ed->state != ED_NEW && (!usb_pipeint(lurb_priv->pipe))) {
1141                 edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
1142                 edTailP = m32_swap(ed->hwTailP);
1143
1144                 /* unlink eds if they are not busy */
1145                 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1146                         ep_unlink(ohci, ed);
1147         }
1148         return stat;
1149 }
1150
1151 static int dl_done_list(ohci_t *ohci)
1152 {
1153         int stat = 0;
1154         td_t    *td_list = dl_reverse_done_list(ohci);
1155
1156         while (td_list) {
1157                 td_t    *td_next = td_list->next_dl_td;
1158                 stat = takeback_td(ohci, td_list);
1159                 td_list = td_next;
1160         }
1161         return stat;
1162 }
1163
1164 /*-------------------------------------------------------------------------*
1165  * Virtual Root Hub
1166  *-------------------------------------------------------------------------*/
1167
1168 #include <usbroothubdes.h>
1169
1170 /* Hub class-specific descriptor is constructed dynamically */
1171
1172 /*-------------------------------------------------------------------------*/
1173
1174 #define OK(x)                   len = (x); break
1175 #ifdef DEBUG
1176 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x)); ohci_writel((x), \
1177                                                 &ohci->regs->roothub.status); }
1178 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, \
1179         (x)); ohci_writel((x), &ohci->regs->roothub.portstatus[wIndex-1]); }
1180 #else
1181 #define WR_RH_STAT(x)           ohci_writel((x), &ohci->regs->roothub.status)
1182 #define WR_RH_PORTSTAT(x)       ohci_writel((x), \
1183                                     &ohci->regs->roothub.portstatus[wIndex-1])
1184 #endif
1185 #define RD_RH_STAT              roothub_status(ohci)
1186 #define RD_RH_PORTSTAT          roothub_portstatus(ohci, wIndex-1)
1187
1188 /* request to virtual root hub */
1189
1190 int rh_check_port_status(ohci_t *controller)
1191 {
1192         __u32 temp, ndp, i;
1193         int res;
1194
1195         res = -1;
1196         temp = roothub_a(controller);
1197         ndp = (temp & RH_A_NDP);
1198 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1199         ndp = (ndp == 2) ? 1:0;
1200 #endif
1201         for (i = 0; i < ndp; i++) {
1202                 temp = roothub_portstatus(controller, i);
1203                 /* check for a device disconnect */
1204                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1205                         (RH_PS_PESC | RH_PS_CSC)) &&
1206                         ((temp & RH_PS_CCS) == 0)) {
1207                         res = i;
1208                         break;
1209                 }
1210         }
1211         return res;
1212 }
1213
1214 static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev,
1215         unsigned long pipe, void *buffer, int transfer_len,
1216         struct devrequest *cmd)
1217 {
1218         void *data = buffer;
1219         int leni = transfer_len;
1220         int len = 0;
1221         int stat = 0;
1222         __u16 bmRType_bReq;
1223         __u16 wValue;
1224         __u16 wIndex;
1225         __u16 wLength;
1226         ALLOC_ALIGN_BUFFER(__u8, databuf, 16, sizeof(u32));
1227
1228 #ifdef DEBUG
1229 pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len,
1230           cmd, "SUB(rh)", usb_pipein(pipe));
1231 #else
1232         mdelay(1);
1233 #endif
1234         if (usb_pipeint(pipe)) {
1235                 info("Root-Hub submit IRQ: NOT implemented");
1236                 return 0;
1237         }
1238
1239         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1240         wValue        = le16_to_cpu(cmd->value);
1241         wIndex        = le16_to_cpu(cmd->index);
1242         wLength       = le16_to_cpu(cmd->length);
1243
1244         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1245                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1246
1247         switch (bmRType_bReq) {
1248         /* Request Destination:
1249            without flags: Device,
1250            RH_INTERFACE: interface,
1251            RH_ENDPOINT: endpoint,
1252            RH_CLASS means HUB here,
1253            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1254         */
1255
1256         case RH_GET_STATUS:
1257                 *(u16 *)databuf = cpu_to_le16(1);
1258                 OK(2);
1259         case RH_GET_STATUS | RH_INTERFACE:
1260                 *(u16 *)databuf = cpu_to_le16(0);
1261                 OK(2);
1262         case RH_GET_STATUS | RH_ENDPOINT:
1263                 *(u16 *)databuf = cpu_to_le16(0);
1264                 OK(2);
1265         case RH_GET_STATUS | RH_CLASS:
1266                 *(u32 *)databuf = cpu_to_le32(
1267                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1268                 OK(4);
1269         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1270                 *(u32 *)databuf = cpu_to_le32(RD_RH_PORTSTAT);
1271                 OK(4);
1272
1273         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1274                 switch (wValue) {
1275                 case (RH_ENDPOINT_STALL):
1276                         OK(0);
1277                 }
1278                 break;
1279
1280         case RH_CLEAR_FEATURE | RH_CLASS:
1281                 switch (wValue) {
1282                 case RH_C_HUB_LOCAL_POWER:
1283                         OK(0);
1284                 case (RH_C_HUB_OVER_CURRENT):
1285                         WR_RH_STAT(RH_HS_OCIC);
1286                         OK(0);
1287                 }
1288                 break;
1289
1290         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1291                 switch (wValue) {
1292                 case (RH_PORT_ENABLE):        WR_RH_PORTSTAT(RH_PS_CCS);  OK(0);
1293                 case (RH_PORT_SUSPEND):       WR_RH_PORTSTAT(RH_PS_POCI); OK(0);
1294                 case (RH_PORT_POWER):         WR_RH_PORTSTAT(RH_PS_LSDA); OK(0);
1295                 case (RH_C_PORT_CONNECTION):  WR_RH_PORTSTAT(RH_PS_CSC);  OK(0);
1296                 case (RH_C_PORT_ENABLE):      WR_RH_PORTSTAT(RH_PS_PESC); OK(0);
1297                 case (RH_C_PORT_SUSPEND):     WR_RH_PORTSTAT(RH_PS_PSSC); OK(0);
1298                 case (RH_C_PORT_OVER_CURRENT):WR_RH_PORTSTAT(RH_PS_OCIC); OK(0);
1299                 case (RH_C_PORT_RESET):       WR_RH_PORTSTAT(RH_PS_PRSC); OK(0);
1300                 }
1301                 break;
1302
1303         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1304                 switch (wValue) {
1305                 case (RH_PORT_SUSPEND):
1306                         WR_RH_PORTSTAT(RH_PS_PSS);  OK(0);
1307                 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1308                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1309                                 WR_RH_PORTSTAT(RH_PS_PRS);
1310                         OK(0);
1311                 case (RH_PORT_POWER):
1312                         WR_RH_PORTSTAT(RH_PS_PPS);
1313                         mdelay(100);
1314                         OK(0);
1315                 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1316                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1317                                 WR_RH_PORTSTAT(RH_PS_PES);
1318                         OK(0);
1319                 }
1320                 break;
1321
1322         case RH_SET_ADDRESS:
1323                 ohci->rh.devnum = wValue;
1324                 OK(0);
1325
1326         case RH_GET_DESCRIPTOR:
1327                 switch ((wValue & 0xff00) >> 8) {
1328                 case (0x01): /* device descriptor */
1329                         len = min_t(unsigned int,
1330                                         leni,
1331                                         min_t(unsigned int,
1332                                         sizeof(root_hub_dev_des),
1333                                         wLength));
1334                         databuf = root_hub_dev_des; OK(len);
1335                 case (0x02): /* configuration descriptor */
1336                         len = min_t(unsigned int,
1337                                         leni,
1338                                         min_t(unsigned int,
1339                                         sizeof(root_hub_config_des),
1340                                         wLength));
1341                         databuf = root_hub_config_des; OK(len);
1342                 case (0x03): /* string descriptors */
1343                         if (wValue == 0x0300) {
1344                                 len = min_t(unsigned int,
1345                                                 leni,
1346                                                 min_t(unsigned int,
1347                                                 sizeof(root_hub_str_index0),
1348                                                 wLength));
1349                                 databuf = root_hub_str_index0;
1350                                 OK(len);
1351                         }
1352                         if (wValue == 0x0301) {
1353                                 len = min_t(unsigned int,
1354                                                 leni,
1355                                                 min_t(unsigned int,
1356                                                 sizeof(root_hub_str_index1),
1357                                                 wLength));
1358                                 databuf = root_hub_str_index1;
1359                                 OK(len);
1360                 }
1361                 default:
1362                         stat = USB_ST_STALLED;
1363                 }
1364                 break;
1365
1366         case RH_GET_DESCRIPTOR | RH_CLASS:
1367         {
1368                 __u32 temp = roothub_a(ohci);
1369
1370                 databuf[0] = 9;         /* min length; */
1371                 databuf[1] = 0x29;
1372                 databuf[2] = temp & RH_A_NDP;
1373 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1374                 databuf[2] = (databuf[2] == 2) ? 1 : 0;
1375 #endif
1376                 databuf[3] = 0;
1377                 if (temp & RH_A_PSM)    /* per-port power switching? */
1378                         databuf[3] |= 0x1;
1379                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1380                         databuf[3] |= 0x10;
1381                 else if (temp & RH_A_OCPM)/* per-port overcurrent reporting? */
1382                         databuf[3] |= 0x8;
1383
1384                 databuf[4] = 0;
1385                 databuf[5] = (temp & RH_A_POTPGT) >> 24;
1386                 databuf[6] = 0;
1387                 temp = roothub_b(ohci);
1388                 databuf[7] = temp & RH_B_DR;
1389                 if (databuf[2] < 7) {
1390                         databuf[8] = 0xff;
1391                 } else {
1392                         databuf[0] += 2;
1393                         databuf[8] = (temp & RH_B_DR) >> 8;
1394                         databuf[10] = databuf[9] = 0xff;
1395                 }
1396
1397                 len = min_t(unsigned int, leni,
1398                             min_t(unsigned int, databuf[0], wLength));
1399                 OK(len);
1400         }
1401
1402         case RH_GET_CONFIGURATION:
1403                 databuf[0] = 0x01;
1404                 OK(1);
1405
1406         case RH_SET_CONFIGURATION:
1407                 WR_RH_STAT(0x10000);
1408                 OK(0);
1409
1410         default:
1411                 dbg("unsupported root hub command");
1412                 stat = USB_ST_STALLED;
1413         }
1414
1415 #ifdef  DEBUG
1416         ohci_dump_roothub(ohci, 1);
1417 #else
1418         mdelay(1);
1419 #endif
1420
1421         len = min_t(int, len, leni);
1422         if (data != databuf)
1423                 memcpy(data, databuf, len);
1424         dev->act_len = len;
1425         dev->status = stat;
1426
1427 #ifdef DEBUG
1428         pkt_print(ohci, NULL, dev, pipe, buffer,
1429                   transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1430 #else
1431         mdelay(1);
1432 #endif
1433
1434         return stat;
1435 }
1436
1437 /*-------------------------------------------------------------------------*/
1438
1439 /* common code for handling submit messages - used for all but root hub */
1440 /* accesses. */
1441 static int submit_common_msg(ohci_t *ohci, struct usb_device *dev,
1442                 unsigned long pipe, void *buffer, int transfer_len,
1443                 struct devrequest *setup, int interval)
1444 {
1445         int stat = 0;
1446         int maxsize = usb_maxpacket(dev, pipe);
1447         int timeout;
1448         urb_priv_t *urb;
1449
1450         urb = malloc(sizeof(urb_priv_t));
1451         memset(urb, 0, sizeof(urb_priv_t));
1452
1453         urb->dev = dev;
1454         urb->pipe = pipe;
1455         urb->transfer_buffer = buffer;
1456         urb->transfer_buffer_length = transfer_len;
1457         urb->interval = interval;
1458
1459 #ifdef DEBUG
1460         urb->actual_length = 0;
1461         pkt_print(ohci, urb, dev, pipe, buffer, transfer_len,
1462                   setup, "SUB", usb_pipein(pipe));
1463 #else
1464         mdelay(1);
1465 #endif
1466         if (!maxsize) {
1467                 err("submit_common_message: pipesize for pipe %lx is zero",
1468                         pipe);
1469                 return -1;
1470         }
1471
1472         if (sohci_submit_job(ohci, &ohci->ohci_dev, urb, setup) < 0) {
1473                 err("sohci_submit_job failed");
1474                 return -1;
1475         }
1476
1477 #if 0
1478         mdelay(10);
1479         /* ohci_dump_status(ohci); */
1480 #endif
1481
1482         timeout = USB_TIMEOUT_MS(pipe);
1483
1484         /* wait for it to complete */
1485         for (;;) {
1486                 /* check whether the controller is done */
1487                 stat = hc_interrupt(ohci);
1488                 if (stat < 0) {
1489                         stat = USB_ST_CRC_ERR;
1490                         break;
1491                 }
1492
1493                 /* NOTE: since we are not interrupt driven in U-Boot and always
1494                  * handle only one URB at a time, we cannot assume the
1495                  * transaction finished on the first successful return from
1496                  * hc_interrupt().. unless the flag for current URB is set,
1497                  * meaning that all TD's to/from device got actually
1498                  * transferred and processed. If the current URB is not
1499                  * finished we need to re-iterate this loop so as
1500                  * hc_interrupt() gets called again as there needs to be some
1501                  * more TD's to process still */
1502                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1503                         /* 0xff is returned for an SF-interrupt */
1504                         break;
1505                 }
1506
1507                 if (--timeout) {
1508                         mdelay(1);
1509                         if (!urb->finished)
1510                                 dbg("*");
1511
1512                 } else {
1513                         err("CTL:TIMEOUT ");
1514                         dbg("submit_common_msg: TO status %x\n", stat);
1515                         urb->finished = 1;
1516                         stat = USB_ST_CRC_ERR;
1517                         break;
1518                 }
1519         }
1520
1521         dev->status = stat;
1522         dev->act_len = urb->actual_length;
1523
1524 #ifdef DEBUG
1525         pkt_print(ohci, urb, dev, pipe, buffer, transfer_len,
1526                   setup, "RET(ctlr)", usb_pipein(pipe));
1527 #else
1528         mdelay(1);
1529 #endif
1530
1531         /* free TDs in urb_priv */
1532         if (!usb_pipeint(pipe))
1533                 urb_free_priv(urb);
1534         return 0;
1535 }
1536
1537 /* submit routines called from usb.c */
1538 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1539                 int transfer_len)
1540 {
1541         info("submit_bulk_msg");
1542         return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len,
1543                                  NULL, 0);
1544 }
1545
1546 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1547                 int transfer_len, int interval)
1548 {
1549         info("submit_int_msg");
1550         return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len, NULL,
1551                         interval);
1552 }
1553
1554 static int _ohci_submit_control_msg(ohci_t *ohci, struct usb_device *dev,
1555         unsigned long pipe, void *buffer, int transfer_len,
1556         struct devrequest *setup)
1557 {
1558         int maxsize = usb_maxpacket(dev, pipe);
1559
1560         info("submit_control_msg");
1561 #ifdef DEBUG
1562         pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len,
1563                   setup, "SUB", usb_pipein(pipe));
1564 #else
1565         mdelay(1);
1566 #endif
1567         if (!maxsize) {
1568                 err("submit_control_message: pipesize for pipe %lx is zero",
1569                         pipe);
1570                 return -1;
1571         }
1572         if (((pipe >> 8) & 0x7f) == ohci->rh.devnum) {
1573                 ohci->rh.dev = dev;
1574                 /* root hub - redirect */
1575                 return ohci_submit_rh_msg(ohci, dev, pipe, buffer,
1576                                           transfer_len, setup);
1577         }
1578
1579         return submit_common_msg(ohci, dev, pipe, buffer, transfer_len,
1580                                  setup, 0);
1581 }
1582
1583 /*-------------------------------------------------------------------------*
1584  * HC functions
1585  *-------------------------------------------------------------------------*/
1586
1587 /* reset the HC and BUS */
1588
1589 static int hc_reset(ohci_t *ohci)
1590 {
1591 #ifdef CONFIG_PCI_EHCI_DEVNO
1592         pci_dev_t pdev;
1593 #endif
1594         int timeout = 30;
1595         int smm_timeout = 50; /* 0,5 sec */
1596
1597         dbg("%s\n", __FUNCTION__);
1598
1599 #ifdef CONFIG_PCI_EHCI_DEVNO
1600         /*
1601          *  Some multi-function controllers (e.g. ISP1562) allow root hub
1602          * resetting via EHCI registers only.
1603          */
1604         pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVNO);
1605         if (pdev != -1) {
1606                 u32 base;
1607                 int timeout = 1000;
1608
1609                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1610                 base += EHCI_USBCMD_OFF;
1611                 ohci_writel(ohci_readl(base) | EHCI_USBCMD_HCRESET, base);
1612
1613                 while (ohci_readl(base) & EHCI_USBCMD_HCRESET) {
1614                         if (timeout-- <= 0) {
1615                                 printf("USB RootHub reset timed out!");
1616                                 break;
1617                         }
1618                         udelay(1);
1619                 }
1620         } else
1621                 printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
1622 #endif
1623         if (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1624                 /* SMM owns the HC, request ownership */
1625                 ohci_writel(OHCI_OCR, &ohci->regs->cmdstatus);
1626                 info("USB HC TakeOver from SMM");
1627                 while (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1628                         mdelay(10);
1629                         if (--smm_timeout == 0) {
1630                                 err("USB HC TakeOver failed!");
1631                                 return -1;
1632                         }
1633                 }
1634         }
1635
1636         /* Disable HC interrupts */
1637         ohci_writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
1638
1639         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1640                 ohci->slot_name,
1641                 ohci_readl(&ohci->regs->control));
1642
1643         /* Reset USB (needed by some controllers) */
1644         ohci->hc_control = 0;
1645         ohci_writel(ohci->hc_control, &ohci->regs->control);
1646
1647         /* HC Reset requires max 10 us delay */
1648         ohci_writel(OHCI_HCR,  &ohci->regs->cmdstatus);
1649         while ((ohci_readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1650                 if (--timeout == 0) {
1651                         err("USB HC reset timed out!");
1652                         return -1;
1653                 }
1654                 udelay(1);
1655         }
1656         return 0;
1657 }
1658
1659 /*-------------------------------------------------------------------------*/
1660
1661 /* Start an OHCI controller, set the BUS operational
1662  * enable interrupts
1663  * connect the virtual root hub */
1664
1665 static int hc_start(ohci_t *ohci)
1666 {
1667         __u32 mask;
1668         unsigned int fminterval;
1669
1670         ohci->disabled = 1;
1671
1672         /* Tell the controller where the control and bulk lists are
1673          * The lists are empty now. */
1674
1675         ohci_writel(0, &ohci->regs->ed_controlhead);
1676         ohci_writel(0, &ohci->regs->ed_bulkhead);
1677
1678         ohci_writel((__u32)ohci->hcca,
1679                     &ohci->regs->hcca); /* reset clears this */
1680
1681         fminterval = 0x2edf;
1682         ohci_writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
1683         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1684         ohci_writel(fminterval, &ohci->regs->fminterval);
1685         ohci_writel(0x628, &ohci->regs->lsthresh);
1686
1687         /* start controller operations */
1688         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1689         ohci->disabled = 0;
1690         ohci_writel(ohci->hc_control, &ohci->regs->control);
1691
1692         /* disable all interrupts */
1693         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1694                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1695                         OHCI_INTR_OC | OHCI_INTR_MIE);
1696         ohci_writel(mask, &ohci->regs->intrdisable);
1697         /* clear all interrupts */
1698         mask &= ~OHCI_INTR_MIE;
1699         ohci_writel(mask, &ohci->regs->intrstatus);
1700         /* Choose the interrupts we care about now  - but w/o MIE */
1701         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1702         ohci_writel(mask, &ohci->regs->intrenable);
1703
1704 #ifdef  OHCI_USE_NPS
1705         /* required for AMD-756 and some Mac platforms */
1706         ohci_writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1707                 &ohci->regs->roothub.a);
1708         ohci_writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1709 #endif  /* OHCI_USE_NPS */
1710
1711         /* POTPGT delay is bits 24-31, in 2 ms units. */
1712         mdelay((roothub_a(ohci) >> 23) & 0x1fe);
1713
1714         /* connect the virtual root hub */
1715         ohci->rh.devnum = 0;
1716
1717         return 0;
1718 }
1719
1720 /*-------------------------------------------------------------------------*/
1721
1722 /* an interrupt happens */
1723
1724 static int hc_interrupt(ohci_t *ohci)
1725 {
1726         struct ohci_regs *regs = ohci->regs;
1727         int ints;
1728         int stat = -1;
1729
1730         if ((ohci->hcca->done_head != 0) &&
1731                                 !(m32_swap(ohci->hcca->done_head) & 0x01)) {
1732                 ints =  OHCI_INTR_WDH;
1733         } else {
1734                 ints = ohci_readl(&regs->intrstatus);
1735                 if (ints == ~(u32)0) {
1736                         ohci->disabled++;
1737                         err("%s device removed!", ohci->slot_name);
1738                         return -1;
1739                 } else {
1740                         ints &= ohci_readl(&regs->intrenable);
1741                         if (ints == 0) {
1742                                 dbg("hc_interrupt: returning..\n");
1743                                 return 0xff;
1744                         }
1745                 }
1746         }
1747
1748         /* dbg("Interrupt: %x frame: %x", ints,
1749                                         le16_to_cpu(ohci->hcca->frame_no)); */
1750
1751         if (ints & OHCI_INTR_RHSC)
1752                 stat = 0xff;
1753
1754         if (ints & OHCI_INTR_UE) {
1755                 ohci->disabled++;
1756                 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1757                         ohci->slot_name);
1758                 /* e.g. due to PCI Master/Target Abort */
1759
1760 #ifdef  DEBUG
1761                 ohci_dump(ohci, 1);
1762 #else
1763                 mdelay(1);
1764 #endif
1765                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1766                 /* Make some non-interrupt context restart the controller. */
1767                 /* Count and limit the retries though; either hardware or */
1768                 /* software errors can go forever... */
1769                 hc_reset(ohci);
1770                 return -1;
1771         }
1772
1773         if (ints & OHCI_INTR_WDH) {
1774                 mdelay(1);
1775                 ohci_writel(OHCI_INTR_WDH, &regs->intrdisable);
1776                 (void)ohci_readl(&regs->intrdisable); /* flush */
1777                 stat = dl_done_list(ohci);
1778                 ohci_writel(OHCI_INTR_WDH, &regs->intrenable);
1779                 (void)ohci_readl(&regs->intrdisable); /* flush */
1780         }
1781
1782         if (ints & OHCI_INTR_SO) {
1783                 dbg("USB Schedule overrun\n");
1784                 ohci_writel(OHCI_INTR_SO, &regs->intrenable);
1785                 stat = -1;
1786         }
1787
1788         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1789         if (ints & OHCI_INTR_SF) {
1790                 unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
1791                 mdelay(1);
1792                 ohci_writel(OHCI_INTR_SF, &regs->intrdisable);
1793                 if (ohci->ed_rm_list[frame] != NULL)
1794                         ohci_writel(OHCI_INTR_SF, &regs->intrenable);
1795                 stat = 0xff;
1796         }
1797
1798         ohci_writel(ints, &regs->intrstatus);
1799         return stat;
1800 }
1801
1802 /*-------------------------------------------------------------------------*/
1803
1804 /*-------------------------------------------------------------------------*/
1805
1806 /* De-allocate all resources.. */
1807
1808 static void hc_release_ohci(ohci_t *ohci)
1809 {
1810         dbg("USB HC release ohci usb-%s", ohci->slot_name);
1811
1812         if (!ohci->disabled)
1813                 hc_reset(ohci);
1814 }
1815
1816 /*-------------------------------------------------------------------------*/
1817
1818 /*
1819  * low level initalisation routine, called from usb.c
1820  */
1821 static char ohci_inited = 0;
1822
1823 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1824 {
1825 #ifdef CONFIG_PCI_OHCI
1826         pci_dev_t pdev;
1827 #endif
1828
1829 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1830         /* cpu dependant init */
1831         if (usb_cpu_init())
1832                 return -1;
1833 #endif
1834
1835 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1836         /*  board dependant init */
1837         if (board_usb_init(index, USB_INIT_HOST))
1838                 return -1;
1839 #endif
1840         memset(&gohci, 0, sizeof(ohci_t));
1841
1842         /* align the storage */
1843         if ((__u32)&ghcca[0] & 0xff) {
1844                 err("HCCA not aligned!!");
1845                 return -1;
1846         }
1847         gohci.hcca = &ghcca[0];
1848         info("aligned ghcca %p", gohci.hcca);
1849         memset(gohci.hcca, 0, sizeof(struct ohci_hcca));
1850
1851         gohci.disabled = 1;
1852         gohci.sleeping = 0;
1853         gohci.irq = -1;
1854 #ifdef CONFIG_PCI_OHCI
1855         pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO);
1856
1857         if (pdev != -1) {
1858                 u16 vid, did;
1859                 u32 base;
1860                 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
1861                 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
1862                 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
1863                                 vid, did, (pdev >> 16) & 0xff,
1864                                 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
1865                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1866                 printf("OHCI regs address 0x%08x\n", base);
1867                 gohci.regs = (struct ohci_regs *)base;
1868         } else
1869                 return -1;
1870 #else
1871         gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
1872 #endif
1873
1874         gohci.flags = 0;
1875         gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME;
1876
1877         if (hc_reset (&gohci) < 0) {
1878                 hc_release_ohci (&gohci);
1879                 err ("can't reset usb-%s", gohci.slot_name);
1880 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1881                 /* board dependant cleanup */
1882                 board_usb_cleanup(index, USB_INIT_HOST);
1883 #endif
1884
1885 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1886                 /* cpu dependant cleanup */
1887                 usb_cpu_init_fail();
1888 #endif
1889                 return -1;
1890         }
1891
1892         if (hc_start(&gohci) < 0) {
1893                 err("can't start usb-%s", gohci.slot_name);
1894                 hc_release_ohci(&gohci);
1895                 /* Initialization failed */
1896 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1897                 /* board dependant cleanup */
1898                 usb_board_stop();
1899 #endif
1900
1901 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1902                 /* cpu dependant cleanup */
1903                 usb_cpu_stop();
1904 #endif
1905                 return -1;
1906         }
1907
1908 #ifdef  DEBUG
1909         ohci_dump(&gohci, 1);
1910 #else
1911         mdelay(1);
1912 #endif
1913         ohci_inited = 1;
1914         return 0;
1915 }
1916
1917 int usb_lowlevel_stop(int index)
1918 {
1919         /* this gets called really early - before the controller has */
1920         /* even been initialized! */
1921         if (!ohci_inited)
1922                 return 0;
1923         /* TODO release any interrupts, etc. */
1924         /* call hc_release_ohci() here ? */
1925         hc_reset(&gohci);
1926
1927 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1928         /* board dependant cleanup */
1929         if (usb_board_stop())
1930                 return -1;
1931 #endif
1932
1933 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1934         /* cpu dependant cleanup */
1935         if (usb_cpu_stop())
1936                 return -1;
1937 #endif
1938         /* This driver is no longer initialised. It needs a new low-level
1939          * init (board/cpu) before it can be used again. */
1940         ohci_inited = 0;
1941         return 0;
1942 }
1943
1944 int submit_control_msg(struct usb_device *dev, unsigned long pipe,
1945         void *buffer, int transfer_len, struct devrequest *setup)
1946 {
1947         return _ohci_submit_control_msg(&gohci, dev, pipe, buffer,
1948                                         transfer_len, setup);
1949 }