drivers/usb/host/ehci-hcd.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*-
   3  * Copyright (c) 2007-2008, Juniper Networks, Inc.
   4  * Copyright (c) 2008, Excito Elektronik i Skåne AB
   5  * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
   6  *
   7  * All rights reserved.
   8  */
   9 #include <common.h>
  10 #include <dm.h>
  11 #include <errno.h>
  12 #include <asm/byteorder.h>
  13 #include <asm/unaligned.h>
  14 #include <usb.h>
  15 #include <asm/io.h>
  16 #include <malloc.h>
  17 #include <memalign.h>
  18 #include <watchdog.h>
  19 #include <linux/compiler.h>
  20
  21 #include "ehci.h"
  22
  23 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
  24 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
  25 #endif
  26
  27 /*
  28  * EHCI spec page 20 says that the HC may take up to 16 uFrames (= 4ms) to halt.
  29  * Let's time out after 8 to have a little safety margin on top of that.
  30  */
  31 #define HCHALT_TIMEOUT (8 * 1000)
  32
  33 #if !CONFIG_IS_ENABLED(DM_USB)
  34 static struct ehci_ctrl ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
  35 #endif
  36
  37 #define ALIGN_END_ADDR(type, ptr, size)                 \
  38         ((unsigned long)(ptr) + roundup((size) * sizeof(type), USB_DMA_MINALIGN))
  39
  40 static struct descriptor {
  41         struct usb_hub_descriptor hub;
  42         struct usb_device_descriptor device;
  43         struct usb_linux_config_descriptor config;
  44         struct usb_linux_interface_descriptor interface;
  45         struct usb_endpoint_descriptor endpoint;
  46 }  __attribute__ ((packed)) descriptor = {
  47         {
  48                 0x8,            /* bDescLength */
  49                 0x29,           /* bDescriptorType: hub descriptor */
  50                 2,              /* bNrPorts -- runtime modified */
  51                 0,              /* wHubCharacteristics */
  52                 10,             /* bPwrOn2PwrGood */
  53                 0,              /* bHubCntrCurrent */
  54                 {               /* Device removable */
  55                 }               /* at most 7 ports! XXX */
  56         },
  57         {
  58                 0x12,           /* bLength */
  59                 1,              /* bDescriptorType: UDESC_DEVICE */
  60                 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
  61                 9,              /* bDeviceClass: UDCLASS_HUB */
  62                 0,              /* bDeviceSubClass: UDSUBCLASS_HUB */
  63                 1,              /* bDeviceProtocol: UDPROTO_HSHUBSTT */
  64                 64,             /* bMaxPacketSize: 64 bytes */
  65                 0x0000,         /* idVendor */
  66                 0x0000,         /* idProduct */
  67                 cpu_to_le16(0x0100), /* bcdDevice */
  68                 1,              /* iManufacturer */
  69                 2,              /* iProduct */
  70                 0,              /* iSerialNumber */
  71                 1               /* bNumConfigurations: 1 */
  72         },
  73         {
  74                 0x9,
  75                 2,              /* bDescriptorType: UDESC_CONFIG */
  76                 cpu_to_le16(0x19),
  77                 1,              /* bNumInterface */
  78                 1,              /* bConfigurationValue */
  79                 0,              /* iConfiguration */
  80                 0x40,           /* bmAttributes: UC_SELF_POWER */
  81                 0               /* bMaxPower */
  82         },
  83         {
  84                 0x9,            /* bLength */
  85                 4,              /* bDescriptorType: UDESC_INTERFACE */
  86                 0,              /* bInterfaceNumber */
  87                 0,              /* bAlternateSetting */
  88                 1,              /* bNumEndpoints */
  89                 9,              /* bInterfaceClass: UICLASS_HUB */
  90                 0,              /* bInterfaceSubClass: UISUBCLASS_HUB */
  91                 0,              /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
  92                 0               /* iInterface */
  93         },
  94         {
  95                 0x7,            /* bLength */
  96                 5,              /* bDescriptorType: UDESC_ENDPOINT */
  97                 0x81,           /* bEndpointAddress:
  98                                  * UE_DIR_IN | EHCI_INTR_ENDPT
  99                                  */
 100                 3,              /* bmAttributes: UE_INTERRUPT */
 101                 8,              /* wMaxPacketSize */
 102                 255             /* bInterval */
 103         },
 104 };
 105
 106 #if defined(CONFIG_EHCI_IS_TDI)
 107 #define ehci_is_TDI()   (1)
 108 #else
 109 #define ehci_is_TDI()   (0)
 110 #endif
 111
 112 static struct ehci_ctrl *ehci_get_ctrl(struct usb_device *udev)
 113 {
 114 #if CONFIG_IS_ENABLED(DM_USB)
 115         return dev_get_priv(usb_get_bus(udev->dev));
 116 #else
 117         return udev->controller;
 118 #endif
 119 }
 120
 121 static int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
 122 {
 123         return PORTSC_PSPD(reg);
 124 }
 125
 126 static void ehci_set_usbmode(struct ehci_ctrl *ctrl)
 127 {
 128         uint32_t tmp;
 129         uint32_t *reg_ptr;
 130
 131         reg_ptr = (uint32_t *)((u8 *)&ctrl->hcor->or_usbcmd + USBMODE);
 132         tmp = ehci_readl(reg_ptr);
 133         tmp |= USBMODE_CM_HC;
 134 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
 135         tmp |= USBMODE_BE;
 136 #else
 137         tmp &= ~USBMODE_BE;
 138 #endif
 139         ehci_writel(reg_ptr, tmp);
 140 }
 141
 142 static void ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,
 143                                uint32_t *reg)
 144 {
 145         mdelay(50);
 146 }
 147
 148 static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)
 149 {
 150         int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 151
 152         if (port < 0 || port >= max_ports) {
 153                 /* Printing the message would cause a scan failure! */
 154                 debug("The request port(%u) exceeds maximum port number\n",
 155                       port);
 156                 return NULL;
 157         }
 158
 159         return (uint32_t *)&ctrl->hcor->or_portsc[port];
 160 }
 161
 162 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
 163 {
 164         uint32_t result;
 165         do {
 166                 result = ehci_readl(ptr);
 167                 udelay(5);
 168                 if (result == ~(uint32_t)0)
 169                         return -1;
 170                 result &= mask;
 171                 if (result == done)
 172                         return 0;
 173                 usec--;
 174         } while (usec > 0);
 175         return -1;
 176 }
 177
 178 static int ehci_reset(struct ehci_ctrl *ctrl)
 179 {
 180         uint32_t cmd;
 181         int ret = 0;
 182
 183         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 184         cmd = (cmd & ~CMD_RUN) | CMD_RESET;
 185         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 186         ret = handshake((uint32_t *)&ctrl->hcor->or_usbcmd,
 187                         CMD_RESET, 0, 250 * 1000);
 188         if (ret < 0) {
 189                 printf("EHCI fail to reset\n");
 190                 goto out;
 191         }
 192
 193         if (ehci_is_TDI())
 194                 ctrl->ops.set_usb_mode(ctrl);
 195
 196 #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
 197         cmd = ehci_readl(&ctrl->hcor->or_txfilltuning);
 198         cmd &= ~TXFIFO_THRESH_MASK;
 199         cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
 200         ehci_writel(&ctrl->hcor->or_txfilltuning, cmd);
 201 #endif
 202 out:
 203         return ret;
 204 }
 205
 206 static int ehci_shutdown(struct ehci_ctrl *ctrl)
 207 {
 208         int i, ret = 0;
 209         uint32_t cmd, reg;
 210         int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 211
 212         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 213         /* If not run, directly return */
 214         if (!(cmd & CMD_RUN))
 215                 return 0;
 216         cmd &= ~(CMD_PSE | CMD_ASE);
 217         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 218         ret = handshake(&ctrl->hcor->or_usbsts, STS_ASS | STS_PSS, 0,
 219                 100 * 1000);
 220
 221         if (!ret) {
 222                 for (i = 0; i < max_ports; i++) {
 223                         reg = ehci_readl(&ctrl->hcor->or_portsc[i]);
 224                         reg |= EHCI_PS_SUSP;
 225                         ehci_writel(&ctrl->hcor->or_portsc[i], reg);
 226                 }
 227
 228                 cmd &= ~CMD_RUN;
 229                 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 230                 ret = handshake(&ctrl->hcor->or_usbsts, STS_HALT, STS_HALT,
 231                         HCHALT_TIMEOUT);
 232         }
 233
 234         if (ret)
 235                 puts("EHCI failed to shut down host controller.\n");
 236
 237         return ret;
 238 }
 239
 240 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
 241 {
 242         uint32_t delta, next;
 243         unsigned long addr = (unsigned long)buf;
 244         int idx;
 245
 246         if (addr != ALIGN(addr, ARCH_DMA_MINALIGN))
 247                 debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
 248
 249         flush_dcache_range(addr, ALIGN(addr + sz, ARCH_DMA_MINALIGN));
 250
 251         idx = 0;
 252         while (idx < QT_BUFFER_CNT) {
 253                 td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr));
 254                 td->qt_buffer_hi[idx] = 0;
 255                 next = (addr + EHCI_PAGE_SIZE) & ~(EHCI_PAGE_SIZE - 1);
 256                 delta = next - addr;
 257                 if (delta >= sz)
 258                         break;
 259                 sz -= delta;
 260                 addr = next;
 261                 idx++;
 262         }
 263
 264         if (idx == QT_BUFFER_CNT) {
 265                 printf("out of buffer pointers (%zu bytes left)\n", sz);
 266                 return -1;
 267         }
 268
 269         return 0;
 270 }
 271
 272 static inline u8 ehci_encode_speed(enum usb_device_speed speed)
 273 {
 274         #define QH_HIGH_SPEED   2
 275         #define QH_FULL_SPEED   0
 276         #define QH_LOW_SPEED    1
 277         if (speed == USB_SPEED_HIGH)
 278                 return QH_HIGH_SPEED;
 279         if (speed == USB_SPEED_LOW)
 280                 return QH_LOW_SPEED;
 281         return QH_FULL_SPEED;
 282 }
 283
 284 static void ehci_update_endpt2_dev_n_port(struct usb_device *udev,
 285                                           struct QH *qh)
 286 {
 287         uint8_t portnr = 0;
 288         uint8_t hubaddr = 0;
 289
 290         if (udev->speed != USB_SPEED_LOW && udev->speed != USB_SPEED_FULL)
 291                 return;
 292
 293         usb_find_usb2_hub_address_port(udev, &hubaddr, &portnr);
 294
 295         qh->qh_endpt2 |= cpu_to_hc32(QH_ENDPT2_PORTNUM(portnr) |
 296                                      QH_ENDPT2_HUBADDR(hubaddr));
 297 }
 298
 299 static int
 300 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 301                    int length, struct devrequest *req)
 302 {
 303         ALLOC_ALIGN_BUFFER(struct QH, qh, 1, USB_DMA_MINALIGN);
 304         struct qTD *qtd;
 305         int qtd_count = 0;
 306         int qtd_counter = 0;
 307         volatile struct qTD *vtd;
 308         unsigned long ts;
 309         uint32_t *tdp;
 310         uint32_t endpt, maxpacket, token, usbsts, qhtoken;
 311         uint32_t c, toggle;
 312         uint32_t cmd;
 313         int timeout;
 314         int ret = 0;
 315         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
 316
 317         debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
 318               buffer, length, req);
 319         if (req != NULL)
 320                 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
 321                       req->request, req->request,
 322                       req->requesttype, req->requesttype,
 323                       le16_to_cpu(req->value), le16_to_cpu(req->value),
 324                       le16_to_cpu(req->index));
 325
 326 #define PKT_ALIGN       512
 327         /*
 328          * The USB transfer is split into qTD transfers. Eeach qTD transfer is
 329          * described by a transfer descriptor (the qTD). The qTDs form a linked
 330          * list with a queue head (QH).
 331          *
 332          * Each qTD transfer starts with a new USB packet, i.e. a packet cannot
 333          * have its beginning in a qTD transfer and its end in the following
 334          * one, so the qTD transfer lengths have to be chosen accordingly.
 335          *
 336          * Each qTD transfer uses up to QT_BUFFER_CNT data buffers, mapped to
 337          * single pages. The first data buffer can start at any offset within a
 338          * page (not considering the cache-line alignment issues), while the
 339          * following buffers must be page-aligned. There is no alignment
 340          * constraint on the size of a qTD transfer.
 341          */
 342         if (req != NULL)
 343                 /* 1 qTD will be needed for SETUP, and 1 for ACK. */
 344                 qtd_count += 1 + 1;
 345         if (length > 0 || req == NULL) {
 346                 /*
 347                  * Determine the qTD transfer size that will be used for the
 348                  * data payload (not considering the first qTD transfer, which
 349                  * may be longer or shorter, and the final one, which may be
 350                  * shorter).
 351                  *
 352                  * In order to keep each packet within a qTD transfer, the qTD
 353                  * transfer size is aligned to PKT_ALIGN, which is a multiple of
 354                  * wMaxPacketSize (except in some cases for interrupt transfers,
 355                  * see comment in submit_int_msg()).
 356                  *
 357                  * By default, i.e. if the input buffer is aligned to PKT_ALIGN,
 358                  * QT_BUFFER_CNT full pages will be used.
 359                  */
 360                 int xfr_sz = QT_BUFFER_CNT;
 361                 /*
 362                  * However, if the input buffer is not aligned to PKT_ALIGN, the
 363                  * qTD transfer size will be one page shorter, and the first qTD
 364                  * data buffer of each transfer will be page-unaligned.
 365                  */
 366                 if ((unsigned long)buffer & (PKT_ALIGN - 1))
 367                         xfr_sz--;
 368                 /* Convert the qTD transfer size to bytes. */
 369                 xfr_sz *= EHCI_PAGE_SIZE;
 370                 /*
 371                  * Approximate by excess the number of qTDs that will be
 372                  * required for the data payload. The exact formula is way more
 373                  * complicated and saves at most 2 qTDs, i.e. a total of 128
 374                  * bytes.
 375                  */
 376                 qtd_count += 2 + length / xfr_sz;
 377         }
 378 /*
 379  * Threshold value based on the worst-case total size of the allocated qTDs for
 380  * a mass-storage transfer of 65535 blocks of 512 bytes.
 381  */
 382 #if CONFIG_SYS_MALLOC_LEN <= 64 + 128 * 1024
 383 #warning CONFIG_SYS_MALLOC_LEN may be too small for EHCI
 384 #endif
 385         qtd = memalign(USB_DMA_MINALIGN, qtd_count * sizeof(struct qTD));
 386         if (qtd == NULL) {
 387                 printf("unable to allocate TDs\n");
 388                 return -1;
 389         }
 390
 391         memset(qh, 0, sizeof(struct QH));
 392         memset(qtd, 0, qtd_count * sizeof(*qtd));
 393
 394         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
 395
 396         /*
 397          * Setup QH (3.6 in ehci-r10.pdf)
 398          *
 399          *   qh_link ................. 03-00 H
 400          *   qh_endpt1 ............... 07-04 H
 401          *   qh_endpt2 ............... 0B-08 H
 402          * - qh_curtd
 403          *   qh_overlay.qt_next ...... 13-10 H
 404          * - qh_overlay.qt_altnext
 405          */
 406         qh->qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
 407         c = (dev->speed != USB_SPEED_HIGH) && !usb_pipeendpoint(pipe);
 408         maxpacket = usb_maxpacket(dev, pipe);
 409         endpt = QH_ENDPT1_RL(8) | QH_ENDPT1_C(c) |
 410                 QH_ENDPT1_MAXPKTLEN(maxpacket) | QH_ENDPT1_H(0) |
 411                 QH_ENDPT1_DTC(QH_ENDPT1_DTC_DT_FROM_QTD) |
 412                 QH_ENDPT1_ENDPT(usb_pipeendpoint(pipe)) | QH_ENDPT1_I(0) |
 413                 QH_ENDPT1_DEVADDR(usb_pipedevice(pipe));
 414
 415         /* Force FS for fsl HS quirk */
 416         if (!ctrl->has_fsl_erratum_a005275)
 417                 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(dev->speed));
 418         else
 419                 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(QH_FULL_SPEED));
 420
 421         qh->qh_endpt1 = cpu_to_hc32(endpt);
 422         endpt = QH_ENDPT2_MULT(1) | QH_ENDPT2_UFCMASK(0) | QH_ENDPT2_UFSMASK(0);
 423         qh->qh_endpt2 = cpu_to_hc32(endpt);
 424         ehci_update_endpt2_dev_n_port(dev, qh);
 425         qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 426         qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 427
 428         tdp = &qh->qh_overlay.qt_next;
 429         if (req != NULL) {
 430                 /*
 431                  * Setup request qTD (3.5 in ehci-r10.pdf)
 432                  *
 433                  *   qt_next ................ 03-00 H
 434                  *   qt_altnext ............. 07-04 H
 435                  *   qt_token ............... 0B-08 H
 436                  *
 437                  *   [ buffer, buffer_hi ] loaded with "req".
 438                  */
 439                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 440                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 441                 token = QT_TOKEN_DT(0) | QT_TOKEN_TOTALBYTES(sizeof(*req)) |
 442                         QT_TOKEN_IOC(0) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
 443                         QT_TOKEN_PID(QT_TOKEN_PID_SETUP) |
 444                         QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 445                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 446                 if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req))) {
 447                         printf("unable to construct SETUP TD\n");
 448                         goto fail;
 449                 }
 450                 /* Update previous qTD! */
 451                 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 452                 tdp = &qtd[qtd_counter++].qt_next;
 453                 toggle = 1;
 454         }
 455
 456         if (length > 0 || req == NULL) {
 457                 uint8_t *buf_ptr = buffer;
 458                 int left_length = length;
 459
 460                 do {
 461                         /*
 462                          * Determine the size of this qTD transfer. By default,
 463                          * QT_BUFFER_CNT full pages can be used.
 464                          */
 465                         int xfr_bytes = QT_BUFFER_CNT * EHCI_PAGE_SIZE;
 466                         /*
 467                          * However, if the input buffer is not page-aligned, the
 468                          * portion of the first page before the buffer start
 469                          * offset within that page is unusable.
 470                          */
 471                         xfr_bytes -= (unsigned long)buf_ptr & (EHCI_PAGE_SIZE - 1);
 472                         /*
 473                          * In order to keep each packet within a qTD transfer,
 474                          * align the qTD transfer size to PKT_ALIGN.
 475                          */
 476                         xfr_bytes &= ~(PKT_ALIGN - 1);
 477                         /*
 478                          * This transfer may be shorter than the available qTD
 479                          * transfer size that has just been computed.
 480                          */
 481                         xfr_bytes = min(xfr_bytes, left_length);
 482
 483                         /*
 484                          * Setup request qTD (3.5 in ehci-r10.pdf)
 485                          *
 486                          *   qt_next ................ 03-00 H
 487                          *   qt_altnext ............. 07-04 H
 488                          *   qt_token ............... 0B-08 H
 489                          *
 490                          *   [ buffer, buffer_hi ] loaded with "buffer".
 491                          */
 492                         qtd[qtd_counter].qt_next =
 493                                         cpu_to_hc32(QT_NEXT_TERMINATE);
 494                         qtd[qtd_counter].qt_altnext =
 495                                         cpu_to_hc32(QT_NEXT_TERMINATE);
 496                         token = QT_TOKEN_DT(toggle) |
 497                                 QT_TOKEN_TOTALBYTES(xfr_bytes) |
 498                                 QT_TOKEN_IOC(req == NULL) | QT_TOKEN_CPAGE(0) |
 499                                 QT_TOKEN_CERR(3) |
 500                                 QT_TOKEN_PID(usb_pipein(pipe) ?
 501                                         QT_TOKEN_PID_IN : QT_TOKEN_PID_OUT) |
 502                                 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 503                         qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 504                         if (ehci_td_buffer(&qtd[qtd_counter], buf_ptr,
 505                                                 xfr_bytes)) {
 506                                 printf("unable to construct DATA TD\n");
 507                                 goto fail;
 508                         }
 509                         /* Update previous qTD! */
 510                         *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 511                         tdp = &qtd[qtd_counter++].qt_next;
 512                         /*
 513                          * Data toggle has to be adjusted since the qTD transfer
 514                          * size is not always an even multiple of
 515                          * wMaxPacketSize.
 516                          */
 517                         if ((xfr_bytes / maxpacket) & 1)
 518                                 toggle ^= 1;
 519                         buf_ptr += xfr_bytes;
 520                         left_length -= xfr_bytes;
 521                 } while (left_length > 0);
 522         }
 523
 524         if (req != NULL) {
 525                 /*
 526                  * Setup request qTD (3.5 in ehci-r10.pdf)
 527                  *
 528                  *   qt_next ................ 03-00 H
 529                  *   qt_altnext ............. 07-04 H
 530                  *   qt_token ............... 0B-08 H
 531                  */
 532                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 533                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 534                 token = QT_TOKEN_DT(1) | QT_TOKEN_TOTALBYTES(0) |
 535                         QT_TOKEN_IOC(1) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
 536                         QT_TOKEN_PID(usb_pipein(pipe) ?
 537                                 QT_TOKEN_PID_OUT : QT_TOKEN_PID_IN) |
 538                         QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 539                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 540                 /* Update previous qTD! */
 541                 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 542                 tdp = &qtd[qtd_counter++].qt_next;
 543         }
 544
 545         ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(qh) | QH_LINK_TYPE_QH);
 546
 547         /* Flush dcache */
 548         flush_dcache_range((unsigned long)&ctrl->qh_list,
 549                 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 550         flush_dcache_range((unsigned long)qh, ALIGN_END_ADDR(struct QH, qh, 1));
 551         flush_dcache_range((unsigned long)qtd,
 552                            ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 553
 554         usbsts = ehci_readl(&ctrl->hcor->or_usbsts);
 555         ehci_writel(&ctrl->hcor->or_usbsts, (usbsts & 0x3f));
 556
 557         /* Enable async. schedule. */
 558         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 559         if (!(cmd & CMD_ASE)) {
 560                 cmd |= CMD_ASE;
 561                 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 562
 563                 ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, STS_ASS,
 564                                 100 * 1000);
 565                 if (ret < 0) {
 566                         printf("EHCI fail timeout STS_ASS set\n");
 567                         goto fail;
 568                 }
 569         }
 570
 571         /* Wait for TDs to be processed. */
 572         ts = get_timer(0);
 573         vtd = &qtd[qtd_counter - 1];
 574         timeout = USB_TIMEOUT_MS(pipe);
 575         do {
 576                 /* Invalidate dcache */
 577                 invalidate_dcache_range((unsigned long)&ctrl->qh_list,
 578                         ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 579                 invalidate_dcache_range((unsigned long)qh,
 580                         ALIGN_END_ADDR(struct QH, qh, 1));
 581                 invalidate_dcache_range((unsigned long)qtd,
 582                         ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 583
 584                 token = hc32_to_cpu(vtd->qt_token);
 585                 if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE))
 586                         break;
 587                 WATCHDOG_RESET();
 588         } while (get_timer(ts) < timeout);
 589         qhtoken = hc32_to_cpu(qh->qh_overlay.qt_token);
 590
 591         ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
 592         flush_dcache_range((unsigned long)&ctrl->qh_list,
 593                 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 594
 595         /*
 596          * Invalidate the memory area occupied by buffer
 597          * Don't try to fix the buffer alignment, if it isn't properly
 598          * aligned it's upper layer's fault so let invalidate_dcache_range()
 599          * vow about it. But we have to fix the length as it's actual
 600          * transfer length and can be unaligned. This is potentially
 601          * dangerous operation, it's responsibility of the calling
 602          * code to make sure enough space is reserved.
 603          */
 604         if (buffer != NULL && length > 0)
 605                 invalidate_dcache_range((unsigned long)buffer,
 606                         ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN));
 607
 608         /* Check that the TD processing happened */
 609         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)
 610                 printf("EHCI timed out on TD - token=%#x\n", token);
 611
 612         if (!(QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_ACTIVE)) {
 613                 debug("TOKEN=%#x\n", qhtoken);
 614                 switch (QT_TOKEN_GET_STATUS(qhtoken) &
 615                         ~(QT_TOKEN_STATUS_SPLITXSTATE | QT_TOKEN_STATUS_PERR)) {
 616                 case 0:
 617                         toggle = QT_TOKEN_GET_DT(qhtoken);
 618                         usb_settoggle(dev, usb_pipeendpoint(pipe),
 619                                        usb_pipeout(pipe), toggle);
 620                         dev->status = 0;
 621                         break;
 622                 case QT_TOKEN_STATUS_HALTED:
 623                         dev->status = USB_ST_STALLED;
 624                         break;
 625                 case QT_TOKEN_STATUS_ACTIVE | QT_TOKEN_STATUS_DATBUFERR:
 626                 case QT_TOKEN_STATUS_DATBUFERR:
 627                         dev->status = USB_ST_BUF_ERR;
 628                         break;
 629                 case QT_TOKEN_STATUS_HALTED | QT_TOKEN_STATUS_BABBLEDET:
 630                 case QT_TOKEN_STATUS_BABBLEDET:
 631                         dev->status = USB_ST_BABBLE_DET;
 632                         break;
 633                 default:
 634                         dev->status = USB_ST_CRC_ERR;
 635                         if (QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_HALTED)
 636                                 dev->status |= USB_ST_STALLED;
 637                         break;
 638                 }
 639                 dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(qhtoken);
 640         } else {
 641                 dev->act_len = 0;
 642 #ifndef CONFIG_USB_EHCI_FARADAY
 643                 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
 644                       dev->devnum, ehci_readl(&ctrl->hcor->or_usbsts),
 645                       ehci_readl(&ctrl->hcor->or_portsc[0]),
 646                       ehci_readl(&ctrl->hcor->or_portsc[1]));
 647 #endif
 648         }
 649
 650         free(qtd);
 651         return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
 652
 653 fail:
 654         free(qtd);
 655         return -1;
 656 }
 657
 658 static int ehci_submit_root(struct usb_device *dev, unsigned long pipe,
 659                             void *buffer, int length, struct devrequest *req)
 660 {
 661         uint8_t tmpbuf[4];
 662         u16 typeReq;
 663         void *srcptr = NULL;
 664         int len, srclen;
 665         uint32_t reg;
 666         uint32_t *status_reg;
 667         int port = le16_to_cpu(req->index) & 0xff;
 668         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
 669
 670         srclen = 0;
 671
 672         debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
 673               req->request, req->request,
 674               req->requesttype, req->requesttype,
 675               le16_to_cpu(req->value), le16_to_cpu(req->index));
 676
 677         typeReq = req->request | req->requesttype << 8;
 678
 679         switch (typeReq) {
 680         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 681         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 682         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 683                 status_reg = ctrl->ops.get_portsc_register(ctrl, port - 1);
 684                 if (!status_reg)
 685                         return -1;
 686                 break;
 687         default:
 688                 status_reg = NULL;
 689                 break;
 690         }
 691
 692         switch (typeReq) {
 693         case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
 694                 switch (le16_to_cpu(req->value) >> 8) {
 695                 case USB_DT_DEVICE:
 696                         debug("USB_DT_DEVICE request\n");
 697                         srcptr = &descriptor.device;
 698                         srclen = descriptor.device.bLength;
 699                         break;
 700                 case USB_DT_CONFIG:
 701                         debug("USB_DT_CONFIG config\n");
 702                         srcptr = &descriptor.config;
 703                         srclen = descriptor.config.bLength +
 704                                         descriptor.interface.bLength +
 705                                         descriptor.endpoint.bLength;
 706                         break;
 707                 case USB_DT_STRING:
 708                         debug("USB_DT_STRING config\n");
 709                         switch (le16_to_cpu(req->value) & 0xff) {
 710                         case 0: /* Language */
 711                                 srcptr = "\4\3\1\0";
 712                                 srclen = 4;
 713                                 break;
 714                         case 1: /* Vendor */
 715                                 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
 716                                 srclen = 14;
 717                                 break;
 718                         case 2: /* Product */
 719                                 srcptr = "\52\3E\0H\0C\0I\0 "
 720                                          "\0H\0o\0s\0t\0 "
 721                                          "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
 722                                 srclen = 42;
 723                                 break;
 724                         default:
 725                                 debug("unknown value DT_STRING %x\n",
 726                                         le16_to_cpu(req->value));
 727                                 goto unknown;
 728                         }
 729                         break;
 730                 default:
 731                         debug("unknown value %x\n", le16_to_cpu(req->value));
 732                         goto unknown;
 733                 }
 734                 break;
 735         case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
 736                 switch (le16_to_cpu(req->value) >> 8) {
 737                 case USB_DT_HUB:
 738                         debug("USB_DT_HUB config\n");
 739                         srcptr = &descriptor.hub;
 740                         srclen = descriptor.hub.bLength;
 741                         break;
 742                 default:
 743                         debug("unknown value %x\n", le16_to_cpu(req->value));
 744                         goto unknown;
 745                 }
 746                 break;
 747         case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
 748                 debug("USB_REQ_SET_ADDRESS\n");
 749                 ctrl->rootdev = le16_to_cpu(req->value);
 750                 break;
 751         case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
 752                 debug("USB_REQ_SET_CONFIGURATION\n");
 753                 /* Nothing to do */
 754                 break;
 755         case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
 756                 tmpbuf[0] = 1;  /* USB_STATUS_SELFPOWERED */
 757                 tmpbuf[1] = 0;
 758                 srcptr = tmpbuf;
 759                 srclen = 2;
 760                 break;
 761         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 762                 memset(tmpbuf, 0, 4);
 763                 reg = ehci_readl(status_reg);
 764                 if (reg & EHCI_PS_CS)
 765                         tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
 766                 if (reg & EHCI_PS_PE)
 767                         tmpbuf[0] |= USB_PORT_STAT_ENABLE;
 768                 if (reg & EHCI_PS_SUSP)
 769                         tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
 770                 if (reg & EHCI_PS_OCA)
 771                         tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
 772                 if (reg & EHCI_PS_PR)
 773                         tmpbuf[0] |= USB_PORT_STAT_RESET;
 774                 if (reg & EHCI_PS_PP)
 775                         tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
 776
 777                 if (ehci_is_TDI()) {
 778                         switch (ctrl->ops.get_port_speed(ctrl, reg)) {
 779                         case PORTSC_PSPD_FS:
 780                                 break;
 781                         case PORTSC_PSPD_LS:
 782                                 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
 783                                 break;
 784                         case PORTSC_PSPD_HS:
 785                         default:
 786                                 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 787                                 break;
 788                         }
 789                 } else {
 790                         tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 791                 }
 792
 793                 if (reg & EHCI_PS_CSC)
 794                         tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
 795                 if (reg & EHCI_PS_PEC)
 796                         tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
 797                 if (reg & EHCI_PS_OCC)
 798                         tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
 799                 if (ctrl->portreset & (1 << port))
 800                         tmpbuf[2] |= USB_PORT_STAT_C_RESET;
 801
 802                 srcptr = tmpbuf;
 803                 srclen = 4;
 804                 break;
 805         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 806                 reg = ehci_readl(status_reg);
 807                 reg &= ~EHCI_PS_CLEAR;
 808                 switch (le16_to_cpu(req->value)) {
 809                 case USB_PORT_FEAT_ENABLE:
 810                         reg |= EHCI_PS_PE;
 811                         ehci_writel(status_reg, reg);
 812                         break;
 813                 case USB_PORT_FEAT_POWER:
 814                         if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) {
 815                                 reg |= EHCI_PS_PP;
 816                                 ehci_writel(status_reg, reg);
 817                         }
 818                         break;
 819                 case USB_PORT_FEAT_RESET:
 820                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
 821                             !ehci_is_TDI() &&
 822                             EHCI_PS_IS_LOWSPEED(reg)) {
 823                                 /* Low speed device, give up ownership. */
 824                                 debug("port %d low speed --> companion\n",
 825                                       port - 1);
 826                                 reg |= EHCI_PS_PO;
 827                                 ehci_writel(status_reg, reg);
 828                                 return -ENXIO;
 829                         } else {
 830                                 int ret;
 831
 832                                 /* Disable chirp for HS erratum */
 833                                 if (ctrl->has_fsl_erratum_a005275)
 834                                         reg |= PORTSC_FSL_PFSC;
 835
 836                                 reg |= EHCI_PS_PR;
 837                                 reg &= ~EHCI_PS_PE;
 838                                 ehci_writel(status_reg, reg);
 839                                 /*
 840                                  * caller must wait, then call GetPortStatus
 841                                  * usb 2.0 specification say 50 ms resets on
 842                                  * root
 843                                  */
 844                                 ctrl->ops.powerup_fixup(ctrl, status_reg, &reg);
 845
 846                                 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
 847                                 /*
 848                                  * A host controller must terminate the reset
 849                                  * and stabilize the state of the port within
 850                                  * 2 milliseconds
 851                                  */
 852                                 ret = handshake(status_reg, EHCI_PS_PR, 0,
 853                                                 2 * 1000);
 854                                 if (!ret) {
 855                                         reg = ehci_readl(status_reg);
 856                                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS))
 857                                             == EHCI_PS_CS && !ehci_is_TDI()) {
 858                                                 debug("port %d full speed --> companion\n", port - 1);
 859                                                 reg &= ~EHCI_PS_CLEAR;
 860                                                 reg |= EHCI_PS_PO;
 861                                                 ehci_writel(status_reg, reg);
 862                                                 return -ENXIO;
 863                                         } else {
 864                                                 ctrl->portreset |= 1 << port;
 865                                         }
 866                                 } else {
 867                                         printf("port(%d) reset error\n",
 868                                                port - 1);
 869                                 }
 870                         }
 871                         break;
 872                 case USB_PORT_FEAT_TEST:
 873                         ehci_shutdown(ctrl);
 874                         reg &= ~(0xf << 16);
 875                         reg |= ((le16_to_cpu(req->index) >> 8) & 0xf) << 16;
 876                         ehci_writel(status_reg, reg);
 877                         break;
 878                 default:
 879                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 880                         goto unknown;
 881                 }
 882                 /* unblock posted writes */
 883                 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
 884                 break;
 885         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 886                 reg = ehci_readl(status_reg);
 887                 reg &= ~EHCI_PS_CLEAR;
 888                 switch (le16_to_cpu(req->value)) {
 889                 case USB_PORT_FEAT_ENABLE:
 890                         reg &= ~EHCI_PS_PE;
 891                         break;
 892                 case USB_PORT_FEAT_C_ENABLE:
 893                         reg |= EHCI_PS_PE;
 894                         break;
 895                 case USB_PORT_FEAT_POWER:
 896                         if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams)))
 897                                 reg &= ~EHCI_PS_PP;
 898                         break;
 899                 case USB_PORT_FEAT_C_CONNECTION:
 900                         reg |= EHCI_PS_CSC;
 901                         break;
 902                 case USB_PORT_FEAT_OVER_CURRENT:
 903                         reg |= EHCI_PS_OCC;
 904                         break;
 905                 case USB_PORT_FEAT_C_RESET:
 906                         ctrl->portreset &= ~(1 << port);
 907                         break;
 908                 default:
 909                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 910                         goto unknown;
 911                 }
 912                 ehci_writel(status_reg, reg);
 913                 /* unblock posted write */
 914                 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
 915                 break;
 916         default:
 917                 debug("Unknown request\n");
 918                 goto unknown;
 919         }
 920
 921         mdelay(1);
 922         len = min3(srclen, (int)le16_to_cpu(req->length), length);
 923         if (srcptr != NULL && len > 0)
 924                 memcpy(buffer, srcptr, len);
 925         else
 926                 debug("Len is 0\n");
 927
 928         dev->act_len = len;
 929         dev->status = 0;
 930         return 0;
 931
 932 unknown:
 933         debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
 934               req->requesttype, req->request, le16_to_cpu(req->value),
 935               le16_to_cpu(req->index), le16_to_cpu(req->length));
 936
 937         dev->act_len = 0;
 938         dev->status = USB_ST_STALLED;
 939         return -1;
 940 }
 941
 942 static const struct ehci_ops default_ehci_ops = {
 943         .set_usb_mode           = ehci_set_usbmode,
 944         .get_port_speed         = ehci_get_port_speed,
 945         .powerup_fixup          = ehci_powerup_fixup,
 946         .get_portsc_register    = ehci_get_portsc_register,
 947 };
 948
 949 static void ehci_setup_ops(struct ehci_ctrl *ctrl, const struct ehci_ops *ops)
 950 {
 951         if (!ops) {
 952                 ctrl->ops = default_ehci_ops;
 953         } else {
 954                 ctrl->ops = *ops;
 955                 if (!ctrl->ops.set_usb_mode)
 956                         ctrl->ops.set_usb_mode = ehci_set_usbmode;
 957                 if (!ctrl->ops.get_port_speed)
 958                         ctrl->ops.get_port_speed = ehci_get_port_speed;
 959                 if (!ctrl->ops.powerup_fixup)
 960                         ctrl->ops.powerup_fixup = ehci_powerup_fixup;
 961                 if (!ctrl->ops.get_portsc_register)
 962                         ctrl->ops.get_portsc_register =
 963                                         ehci_get_portsc_register;
 964         }
 965 }
 966
 967 #if !CONFIG_IS_ENABLED(DM_USB)
 968 void ehci_set_controller_priv(int index, void *priv, const struct ehci_ops *ops)
 969 {
 970         struct ehci_ctrl *ctrl = &ehcic[index];
 971
 972         ctrl->priv = priv;
 973         ehci_setup_ops(ctrl, ops);
 974 }
 975
 976 void *ehci_get_controller_priv(int index)
 977 {
 978         return ehcic[index].priv;
 979 }
 980 #endif
 981
 982 static int ehci_common_init(struct ehci_ctrl *ctrl, uint tweaks)
 983 {
 984         struct QH *qh_list;
 985         struct QH *periodic;
 986         uint32_t reg;
 987         uint32_t cmd;
 988         int i;
 989
 990         /* Set the high address word (aka segment) for 64-bit controller */
 991         if (ehci_readl(&ctrl->hccr->cr_hccparams) & 1)
 992                 ehci_writel(&ctrl->hcor->or_ctrldssegment, 0);
 993
 994         qh_list = &ctrl->qh_list;
 995
 996         /* Set head of reclaim list */
 997         memset(qh_list, 0, sizeof(*qh_list));
 998         qh_list->qh_link = cpu_to_hc32(virt_to_phys(qh_list) | QH_LINK_TYPE_QH);
 999         qh_list->qh_endpt1 = cpu_to_hc32(QH_ENDPT1_H(1) |
1000                                                 QH_ENDPT1_EPS(USB_SPEED_HIGH));
1001         qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1002         qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1003         qh_list->qh_overlay.qt_token =
1004                         cpu_to_hc32(QT_TOKEN_STATUS(QT_TOKEN_STATUS_HALTED));
1005
1006         flush_dcache_range((unsigned long)qh_list,
1007                            ALIGN_END_ADDR(struct QH, qh_list, 1));
1008
1009         /* Set async. queue head pointer. */
1010         ehci_writel(&ctrl->hcor->or_asynclistaddr, virt_to_phys(qh_list));
1011
1012         /*
1013          * Set up periodic list
1014          * Step 1: Parent QH for all periodic transfers.
1015          */
1016         ctrl->periodic_schedules = 0;
1017         periodic = &ctrl->periodic_queue;
1018         memset(periodic, 0, sizeof(*periodic));
1019         periodic->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1020         periodic->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1021         periodic->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1022
1023         flush_dcache_range((unsigned long)periodic,
1024                            ALIGN_END_ADDR(struct QH, periodic, 1));
1025
1026         /*
1027          * Step 2: Setup frame-list: Every microframe, USB tries the same list.
1028          *         In particular, device specifications on polling frequency
1029          *         are disregarded. Keyboards seem to send NAK/NYet reliably
1030          *         when polled with an empty buffer.
1031          *
1032          *         Split Transactions will be spread across microframes using
1033          *         S-mask and C-mask.
1034          */
1035         if (ctrl->periodic_list == NULL)
1036                 ctrl->periodic_list = memalign(4096, 1024 * 4);
1037
1038         if (!ctrl->periodic_list)
1039                 return -ENOMEM;
1040         for (i = 0; i < 1024; i++) {
1041                 ctrl->periodic_list[i] = cpu_to_hc32((unsigned long)periodic
1042                                                 | QH_LINK_TYPE_QH);
1043         }
1044
1045         flush_dcache_range((unsigned long)ctrl->periodic_list,
1046                            ALIGN_END_ADDR(uint32_t, ctrl->periodic_list,
1047                                           1024));
1048
1049         /* Set periodic list base address */
1050         ehci_writel(&ctrl->hcor->or_periodiclistbase,
1051                 (unsigned long)ctrl->periodic_list);
1052
1053         reg = ehci_readl(&ctrl->hccr->cr_hcsparams);
1054         descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
1055         debug("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
1056         /* Port Indicators */
1057         if (HCS_INDICATOR(reg))
1058                 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1059                                 | 0x80, &descriptor.hub.wHubCharacteristics);
1060         /* Port Power Control */
1061         if (HCS_PPC(reg))
1062                 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1063                                 | 0x01, &descriptor.hub.wHubCharacteristics);
1064
1065         /* Start the host controller. */
1066         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1067         /*
1068          * Philips, Intel, and maybe others need CMD_RUN before the
1069          * root hub will detect new devices (why?); NEC doesn't
1070          */
1071         cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
1072         cmd |= CMD_RUN;
1073         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
1074
1075         if (!(tweaks & EHCI_TWEAK_NO_INIT_CF)) {
1076                 /* take control over the ports */
1077                 cmd = ehci_readl(&ctrl->hcor->or_configflag);
1078                 cmd |= FLAG_CF;
1079                 ehci_writel(&ctrl->hcor->or_configflag, cmd);
1080         }
1081
1082         /* unblock posted write */
1083         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1084         mdelay(5);
1085         reg = HC_VERSION(ehci_readl(&ctrl->hccr->cr_capbase));
1086         printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
1087
1088         return 0;
1089 }
1090
1091 #if !CONFIG_IS_ENABLED(DM_USB)
1092 int usb_lowlevel_stop(int index)
1093 {
1094         ehci_shutdown(&ehcic[index]);
1095         return ehci_hcd_stop(index);
1096 }
1097
1098 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1099 {
1100         struct ehci_ctrl *ctrl = &ehcic[index];
1101         uint tweaks = 0;
1102         int rc;
1103
1104         /**
1105          * Set ops to default_ehci_ops, ehci_hcd_init should call
1106          * ehci_set_controller_priv to change any of these function pointers.
1107          */
1108         ctrl->ops = default_ehci_ops;
1109
1110         rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1111         if (rc)
1112                 return rc;
1113         if (!ctrl->hccr || !ctrl->hcor)
1114                 return -1;
1115         if (init == USB_INIT_DEVICE)
1116                 goto done;
1117
1118         /* EHCI spec section 4.1 */
1119         if (ehci_reset(ctrl))
1120                 return -1;
1121
1122 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
1123         rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1124         if (rc)
1125                 return rc;
1126 #endif
1127 #ifdef CONFIG_USB_EHCI_FARADAY
1128         tweaks |= EHCI_TWEAK_NO_INIT_CF;
1129 #endif
1130         rc = ehci_common_init(ctrl, tweaks);
1131         if (rc)
1132                 return rc;
1133
1134         ctrl->rootdev = 0;
1135 done:
1136         *controller = &ehcic[index];
1137         return 0;
1138 }
1139 #endif
1140
1141 static int _ehci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1142                                  void *buffer, int length)
1143 {
1144
1145         if (usb_pipetype(pipe) != PIPE_BULK) {
1146                 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
1147                 return -1;
1148         }
1149         return ehci_submit_async(dev, pipe, buffer, length, NULL);
1150 }
1151
1152 static int _ehci_submit_control_msg(struct usb_device *dev, unsigned long pipe,
1153                                     void *buffer, int length,
1154                                     struct devrequest *setup)
1155 {
1156         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1157
1158         if (usb_pipetype(pipe) != PIPE_CONTROL) {
1159                 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
1160                 return -1;
1161         }
1162
1163         if (usb_pipedevice(pipe) == ctrl->rootdev) {
1164                 if (!ctrl->rootdev)
1165                         dev->speed = USB_SPEED_HIGH;
1166                 return ehci_submit_root(dev, pipe, buffer, length, setup);
1167         }
1168         return ehci_submit_async(dev, pipe, buffer, length, setup);
1169 }
1170
1171 struct int_queue {
1172         int elementsize;
1173         unsigned long pipe;
1174         struct QH *first;
1175         struct QH *current;
1176         struct QH *last;
1177         struct qTD *tds;
1178 };
1179
1180 #define NEXT_QH(qh) (struct QH *)((unsigned long)hc32_to_cpu((qh)->qh_link) & ~0x1f)
1181
1182 static int
1183 enable_periodic(struct ehci_ctrl *ctrl)
1184 {
1185         uint32_t cmd;
1186         struct ehci_hcor *hcor = ctrl->hcor;
1187         int ret;
1188
1189         cmd = ehci_readl(&hcor->or_usbcmd);
1190         cmd |= CMD_PSE;
1191         ehci_writel(&hcor->or_usbcmd, cmd);
1192
1193         ret = handshake((uint32_t *)&hcor->or_usbsts,
1194                         STS_PSS, STS_PSS, 100 * 1000);
1195         if (ret < 0) {
1196                 printf("EHCI failed: timeout when enabling periodic list\n");
1197                 return -ETIMEDOUT;
1198         }
1199         udelay(1000);
1200         return 0;
1201 }
1202
1203 static int
1204 disable_periodic(struct ehci_ctrl *ctrl)
1205 {
1206         uint32_t cmd;
1207         struct ehci_hcor *hcor = ctrl->hcor;
1208         int ret;
1209
1210         cmd = ehci_readl(&hcor->or_usbcmd);
1211         cmd &= ~CMD_PSE;
1212         ehci_writel(&hcor->or_usbcmd, cmd);
1213
1214         ret = handshake((uint32_t *)&hcor->or_usbsts,
1215                         STS_PSS, 0, 100 * 1000);
1216         if (ret < 0) {
1217                 printf("EHCI failed: timeout when disabling periodic list\n");
1218                 return -ETIMEDOUT;
1219         }
1220         return 0;
1221 }
1222
1223 static struct int_queue *_ehci_create_int_queue(struct usb_device *dev,
1224                         unsigned long pipe, int queuesize, int elementsize,
1225                         void *buffer, int interval)
1226 {
1227         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1228         struct int_queue *result = NULL;
1229         uint32_t i, toggle;
1230
1231         /*
1232          * Interrupt transfers requiring several transactions are not supported
1233          * because bInterval is ignored.
1234          *
1235          * Also, ehci_submit_async() relies on wMaxPacketSize being a power of 2
1236          * <= PKT_ALIGN if several qTDs are required, while the USB
1237          * specification does not constrain this for interrupt transfers. That
1238          * means that ehci_submit_async() would support interrupt transfers
1239          * requiring several transactions only as long as the transfer size does
1240          * not require more than a single qTD.
1241          */
1242         if (elementsize > usb_maxpacket(dev, pipe)) {
1243                 printf("%s: xfers requiring several transactions are not supported.\n",
1244                        __func__);
1245                 return NULL;
1246         }
1247
1248         debug("Enter create_int_queue\n");
1249         if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
1250                 debug("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
1251                 return NULL;
1252         }
1253
1254         /* limit to 4 full pages worth of data -
1255          * we can safely fit them in a single TD,
1256          * no matter the alignment
1257          */
1258         if (elementsize >= 16384) {
1259                 debug("too large elements for interrupt transfers\n");
1260                 return NULL;
1261         }
1262
1263         result = malloc(sizeof(*result));
1264         if (!result) {
1265                 debug("ehci intr queue: out of memory\n");
1266                 goto fail1;
1267         }
1268         result->elementsize = elementsize;
1269         result->pipe = pipe;
1270         result->first = memalign(USB_DMA_MINALIGN,
1271                                  sizeof(struct QH) * queuesize);
1272         if (!result->first) {
1273                 debug("ehci intr queue: out of memory\n");
1274                 goto fail2;
1275         }
1276         result->current = result->first;
1277         result->last = result->first + queuesize - 1;
1278         result->tds = memalign(USB_DMA_MINALIGN,
1279                                sizeof(struct qTD) * queuesize);
1280         if (!result->tds) {
1281                 debug("ehci intr queue: out of memory\n");
1282                 goto fail3;
1283         }
1284         memset(result->first, 0, sizeof(struct QH) * queuesize);
1285         memset(result->tds, 0, sizeof(struct qTD) * queuesize);
1286
1287         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
1288
1289         for (i = 0; i < queuesize; i++) {
1290                 struct QH *qh = result->first + i;
1291                 struct qTD *td = result->tds + i;
1292                 void **buf = &qh->buffer;
1293
1294                 qh->qh_link = cpu_to_hc32((unsigned long)(qh+1) | QH_LINK_TYPE_QH);
1295                 if (i == queuesize - 1)
1296                         qh->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1297
1298                 qh->qh_overlay.qt_next = cpu_to_hc32((unsigned long)td);
1299                 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1300                 qh->qh_endpt1 =
1301                         cpu_to_hc32((0 << 28) | /* No NAK reload (ehci 4.9) */
1302                         (usb_maxpacket(dev, pipe) << 16) | /* MPS */
1303                         (1 << 14) |
1304                         QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
1305                         (usb_pipeendpoint(pipe) << 8) | /* Endpoint Number */
1306                         (usb_pipedevice(pipe) << 0));
1307                 qh->qh_endpt2 = cpu_to_hc32((1 << 30) | /* 1 Tx per mframe */
1308                         (1 << 0)); /* S-mask: microframe 0 */
1309                 if (dev->speed == USB_SPEED_LOW ||
1310                                 dev->speed == USB_SPEED_FULL) {
1311                         /* C-mask: microframes 2-4 */
1312                         qh->qh_endpt2 |= cpu_to_hc32((0x1c << 8));
1313                 }
1314                 ehci_update_endpt2_dev_n_port(dev, qh);
1315
1316                 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1317                 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1318                 debug("communication direction is '%s'\n",
1319                       usb_pipein(pipe) ? "in" : "out");
1320                 td->qt_token = cpu_to_hc32(
1321                         QT_TOKEN_DT(toggle) |
1322                         (elementsize << 16) |
1323                         ((usb_pipein(pipe) ? 1 : 0) << 8) | /* IN/OUT token */
1324                         0x80); /* active */
1325                 td->qt_buffer[0] =
1326                     cpu_to_hc32((unsigned long)buffer + i * elementsize);
1327                 td->qt_buffer[1] =
1328                     cpu_to_hc32((td->qt_buffer[0] + 0x1000) & ~0xfff);
1329                 td->qt_buffer[2] =
1330                     cpu_to_hc32((td->qt_buffer[0] + 0x2000) & ~0xfff);
1331                 td->qt_buffer[3] =
1332                     cpu_to_hc32((td->qt_buffer[0] + 0x3000) & ~0xfff);
1333                 td->qt_buffer[4] =
1334                     cpu_to_hc32((td->qt_buffer[0] + 0x4000) & ~0xfff);
1335
1336                 *buf = buffer + i * elementsize;
1337                 toggle ^= 1;
1338         }
1339
1340         flush_dcache_range((unsigned long)buffer,
1341                            ALIGN_END_ADDR(char, buffer,
1342                                           queuesize * elementsize));
1343         flush_dcache_range((unsigned long)result->first,
1344                            ALIGN_END_ADDR(struct QH, result->first,
1345                                           queuesize));
1346         flush_dcache_range((unsigned long)result->tds,
1347                            ALIGN_END_ADDR(struct qTD, result->tds,
1348                                           queuesize));
1349
1350         if (ctrl->periodic_schedules > 0) {
1351                 if (disable_periodic(ctrl) < 0) {
1352                         debug("FATAL: periodic should never fail, but did");
1353                         goto fail3;
1354                 }
1355         }
1356
1357         /* hook up to periodic list */
1358         struct QH *list = &ctrl->periodic_queue;
1359         result->last->qh_link = list->qh_link;
1360         list->qh_link = cpu_to_hc32((unsigned long)result->first | QH_LINK_TYPE_QH);
1361
1362         flush_dcache_range((unsigned long)result->last,
1363                            ALIGN_END_ADDR(struct QH, result->last, 1));
1364         flush_dcache_range((unsigned long)list,
1365                            ALIGN_END_ADDR(struct QH, list, 1));
1366
1367         if (enable_periodic(ctrl) < 0) {
1368                 debug("FATAL: periodic should never fail, but did");
1369                 goto fail3;
1370         }
1371         ctrl->periodic_schedules++;
1372
1373         debug("Exit create_int_queue\n");
1374         return result;
1375 fail3:
1376         if (result->tds)
1377                 free(result->tds);
1378 fail2:
1379         if (result->first)
1380                 free(result->first);
1381         if (result)
1382                 free(result);
1383 fail1:
1384         return NULL;
1385 }
1386
1387 static void *_ehci_poll_int_queue(struct usb_device *dev,
1388                                   struct int_queue *queue)
1389 {
1390         struct QH *cur = queue->current;
1391         struct qTD *cur_td;
1392         uint32_t token, toggle;
1393         unsigned long pipe = queue->pipe;
1394
1395         /* depleted queue */
1396         if (cur == NULL) {
1397                 debug("Exit poll_int_queue with completed queue\n");
1398                 return NULL;
1399         }
1400         /* still active */
1401         cur_td = &queue->tds[queue->current - queue->first];
1402         invalidate_dcache_range((unsigned long)cur_td,
1403                                 ALIGN_END_ADDR(struct qTD, cur_td, 1));
1404         token = hc32_to_cpu(cur_td->qt_token);
1405         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE) {
1406                 debug("Exit poll_int_queue with no completed intr transfer. token is %x\n", token);
1407                 return NULL;
1408         }
1409
1410         toggle = QT_TOKEN_GET_DT(token);
1411         usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), toggle);
1412
1413         if (!(cur->qh_link & QH_LINK_TERMINATE))
1414                 queue->current++;
1415         else
1416                 queue->current = NULL;
1417
1418         invalidate_dcache_range((unsigned long)cur->buffer,
1419                                 ALIGN_END_ADDR(char, cur->buffer,
1420                                                queue->elementsize));
1421
1422         debug("Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n",
1423               token, cur, queue->first);
1424         return cur->buffer;
1425 }
1426
1427 /* Do not free buffers associated with QHs, they're owned by someone else */
1428 static int _ehci_destroy_int_queue(struct usb_device *dev,
1429                                    struct int_queue *queue)
1430 {
1431         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1432         int result = -1;
1433         unsigned long timeout;
1434
1435         if (disable_periodic(ctrl) < 0) {
1436                 debug("FATAL: periodic should never fail, but did");
1437                 goto out;
1438         }
1439         ctrl->periodic_schedules--;
1440
1441         struct QH *cur = &ctrl->periodic_queue;
1442         timeout = get_timer(0) + 500; /* abort after 500ms */
1443         while (!(cur->qh_link & cpu_to_hc32(QH_LINK_TERMINATE))) {
1444                 debug("considering %p, with qh_link %x\n", cur, cur->qh_link);
1445                 if (NEXT_QH(cur) == queue->first) {
1446                         debug("found candidate. removing from chain\n");
1447                         cur->qh_link = queue->last->qh_link;
1448                         flush_dcache_range((unsigned long)cur,
1449                                            ALIGN_END_ADDR(struct QH, cur, 1));
1450                         result = 0;
1451                         break;
1452                 }
1453                 cur = NEXT_QH(cur);
1454                 if (get_timer(0) > timeout) {
1455                         printf("Timeout destroying interrupt endpoint queue\n");
1456                         result = -1;
1457                         goto out;
1458                 }
1459         }
1460
1461         if (ctrl->periodic_schedules > 0) {
1462                 result = enable_periodic(ctrl);
1463                 if (result < 0)
1464                         debug("FATAL: periodic should never fail, but did");
1465         }
1466
1467 out:
1468         free(queue->tds);
1469         free(queue->first);
1470         free(queue);
1471
1472         return result;
1473 }
1474
1475 static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe,
1476                                 void *buffer, int length, int interval,
1477                                 bool nonblock)
1478 {
1479         void *backbuffer;
1480         struct int_queue *queue;
1481         unsigned long timeout;
1482         int result = 0, ret;
1483
1484         debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
1485               dev, pipe, buffer, length, interval);
1486
1487         queue = _ehci_create_int_queue(dev, pipe, 1, length, buffer, interval);
1488         if (!queue)
1489                 return -1;
1490
1491         timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
1492         while ((backbuffer = _ehci_poll_int_queue(dev, queue)) == NULL)
1493                 if (get_timer(0) > timeout) {
1494                         printf("Timeout poll on interrupt endpoint\n");
1495                         result = -ETIMEDOUT;
1496                         break;
1497                 }
1498
1499         if (backbuffer != buffer) {
1500                 debug("got wrong buffer back (%p instead of %p)\n",
1501                       backbuffer, buffer);
1502                 return -EINVAL;
1503         }
1504
1505         ret = _ehci_destroy_int_queue(dev, queue);
1506         if (ret < 0)
1507                 return ret;
1508
1509         /* everything worked out fine */
1510         return result;
1511 }
1512
1513 #if !CONFIG_IS_ENABLED(DM_USB)
1514 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1515                             void *buffer, int length)
1516 {
1517         return _ehci_submit_bulk_msg(dev, pipe, buffer, length);
1518 }
1519
1520 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1521                    int length, struct devrequest *setup)
1522 {
1523         return _ehci_submit_control_msg(dev, pipe, buffer, length, setup);
1524 }
1525
1526 int submit_int_msg(struct usb_device *dev, unsigned long pipe,
1527                    void *buffer, int length, int interval, bool nonblock)
1528 {
1529         return _ehci_submit_int_msg(dev, pipe, buffer, length, interval,
1530                                     nonblock);
1531 }
1532
1533 struct int_queue *create_int_queue(struct usb_device *dev,
1534                 unsigned long pipe, int queuesize, int elementsize,
1535                 void *buffer, int interval)
1536 {
1537         return _ehci_create_int_queue(dev, pipe, queuesize, elementsize,
1538                                       buffer, interval);
1539 }
1540
1541 void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1542 {
1543         return _ehci_poll_int_queue(dev, queue);
1544 }
1545
1546 int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1547 {
1548         return _ehci_destroy_int_queue(dev, queue);
1549 }
1550 #endif
1551
1552 #if CONFIG_IS_ENABLED(DM_USB)
1553 static int ehci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
1554                                    unsigned long pipe, void *buffer, int length,
1555                                    struct devrequest *setup)
1556 {
1557         debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
1558               dev->name, udev, udev->dev->name, udev->portnr);
1559
1560         return _ehci_submit_control_msg(udev, pipe, buffer, length, setup);
1561 }
1562
1563 static int ehci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
1564                                 unsigned long pipe, void *buffer, int length)
1565 {
1566         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1567         return _ehci_submit_bulk_msg(udev, pipe, buffer, length);
1568 }
1569
1570 static int ehci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
1571                                unsigned long pipe, void *buffer, int length,
1572                                int interval, bool nonblock)
1573 {
1574         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1575         return _ehci_submit_int_msg(udev, pipe, buffer, length, interval,
1576                                     nonblock);
1577 }
1578
1579 static struct int_queue *ehci_create_int_queue(struct udevice *dev,
1580                 struct usb_device *udev, unsigned long pipe, int queuesize,
1581                 int elementsize, void *buffer, int interval)
1582 {
1583         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1584         return _ehci_create_int_queue(udev, pipe, queuesize, elementsize,
1585                                       buffer, interval);
1586 }
1587
1588 static void *ehci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
1589                                  struct int_queue *queue)
1590 {
1591         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1592         return _ehci_poll_int_queue(udev, queue);
1593 }
1594
1595 static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
1596                                   struct int_queue *queue)
1597 {
1598         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1599         return _ehci_destroy_int_queue(udev, queue);
1600 }
1601
1602 static int ehci_get_max_xfer_size(struct udevice *dev, size_t *size)
1603 {
1604         /*
1605          * EHCD can handle any transfer length as long as there is enough
1606          * free heap space left, hence set the theoretical max number here.
1607          */
1608         *size = SIZE_MAX;
1609
1610         return 0;
1611 }
1612
1613 int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
1614                   struct ehci_hcor *hcor, const struct ehci_ops *ops,
1615                   uint tweaks, enum usb_init_type init)
1616 {
1617         struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
1618         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1619         int ret = -1;
1620
1621         debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__,
1622               dev->name, ctrl, hccr, hcor, init);
1623
1624         if (!ctrl || !hccr || !hcor)
1625                 goto err;
1626
1627         priv->desc_before_addr = true;
1628
1629         ehci_setup_ops(ctrl, ops);
1630         ctrl->hccr = hccr;
1631         ctrl->hcor = hcor;
1632         ctrl->priv = ctrl;
1633
1634         ctrl->init = init;
1635         if (ctrl->init == USB_INIT_DEVICE)
1636                 goto done;
1637
1638         ret = ehci_reset(ctrl);
1639         if (ret)
1640                 goto err;
1641
1642         if (ctrl->ops.init_after_reset) {
1643                 ret = ctrl->ops.init_after_reset(ctrl);
1644                 if (ret)
1645                         goto err;
1646         }
1647
1648         ret = ehci_common_init(ctrl, tweaks);
1649         if (ret)
1650                 goto err;
1651 done:
1652         return 0;
1653 err:
1654         free(ctrl);
1655         debug("%s: failed, ret=%d\n", __func__, ret);
1656         return ret;
1657 }
1658
1659 int ehci_deregister(struct udevice *dev)
1660 {
1661         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1662
1663         if (ctrl->init == USB_INIT_DEVICE)
1664                 return 0;
1665
1666         ehci_shutdown(ctrl);
1667
1668         return 0;
1669 }
1670
1671 struct dm_usb_ops ehci_usb_ops = {
1672         .control = ehci_submit_control_msg,
1673         .bulk = ehci_submit_bulk_msg,
1674         .interrupt = ehci_submit_int_msg,
1675         .create_int_queue = ehci_create_int_queue,
1676         .poll_int_queue = ehci_poll_int_queue,
1677         .destroy_int_queue = ehci_destroy_int_queue,
1678         .get_max_xfer_size  = ehci_get_max_xfer_size,
1679 };
1680
1681 #endif
1682
1683 #ifdef CONFIG_PHY
1684 int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1685 {
1686         int ret;
1687
1688         if (!phy)
1689                 return 0;
1690
1691         ret = generic_phy_get_by_index(dev, index, phy);
1692         if (ret) {
1693                 if (ret != -ENOENT) {
1694                         dev_err(dev, "failed to get usb phy\n");
1695                         return ret;
1696                 }
1697         } else {
1698                 ret = generic_phy_init(phy);
1699                 if (ret) {
1700                         dev_err(dev, "failed to init usb phy\n");
1701                         return ret;
1702                 }
1703
1704                 ret = generic_phy_power_on(phy);
1705                 if (ret) {
1706                         dev_err(dev, "failed to power on usb phy\n");
1707                         return generic_phy_exit(phy);
1708                 }
1709         }
1710
1711         return 0;
1712 }
1713
1714 int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1715 {
1716         int ret = 0;
1717
1718         if (!phy)
1719                 return 0;
1720
1721         if (generic_phy_valid(phy)) {
1722                 ret = generic_phy_power_off(phy);
1723                 if (ret) {
1724                         dev_err(dev, "failed to power off usb phy\n");
1725                         return ret;
1726                 }
1727
1728                 ret = generic_phy_exit(phy);
1729                 if (ret) {
1730                         dev_err(dev, "failed to power off usb phy\n");
1731                         return ret;
1732                 }
1733         }
1734
1735         return 0;
1736 }
1737 #else
1738 int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1739 {
1740         return 0;
1741 }
1742
1743 int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1744 {
1745         return 0;
1746 }
1747 #endif