drivers/usb/host/ehci-hcd.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*-
   3  * Copyright (c) 2007-2008, Juniper Networks, Inc.
   4  * Copyright (c) 2008, Excito Elektronik i Skåne AB
   5  * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
   6  *
   7  * All rights reserved.
   8  */
   9 #include <common.h>
  10 #include <dm.h>
  11 #include <errno.h>
  12 #include <asm/byteorder.h>
  13 #include <asm/unaligned.h>
  14 #include <usb.h>
  15 #include <asm/io.h>
  16 #include <malloc.h>
  17 #include <memalign.h>
  18 #include <watchdog.h>
  19 #include <linux/compiler.h>
  20
  21 #include "ehci.h"
  22
  23 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
  24 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
  25 #endif
  26
  27 /*
  28  * EHCI spec page 20 says that the HC may take up to 16 uFrames (= 4ms) to halt.
  29  * Let's time out after 8 to have a little safety margin on top of that.
  30  */
  31 #define HCHALT_TIMEOUT (8 * 1000)
  32
  33 #ifndef CONFIG_DM_USB
  34 static struct ehci_ctrl ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
  35 #endif
  36
  37 #define ALIGN_END_ADDR(type, ptr, size)                 \
  38         ((unsigned long)(ptr) + roundup((size) * sizeof(type), USB_DMA_MINALIGN))
  39
  40 static struct descriptor {
  41         struct usb_hub_descriptor hub;
  42         struct usb_device_descriptor device;
  43         struct usb_linux_config_descriptor config;
  44         struct usb_linux_interface_descriptor interface;
  45         struct usb_endpoint_descriptor endpoint;
  46 }  __attribute__ ((packed)) descriptor = {
  47         {
  48                 0x8,            /* bDescLength */
  49                 0x29,           /* bDescriptorType: hub descriptor */
  50                 2,              /* bNrPorts -- runtime modified */
  51                 0,              /* wHubCharacteristics */
  52                 10,             /* bPwrOn2PwrGood */
  53                 0,              /* bHubCntrCurrent */
  54                 {               /* Device removable */
  55                 }               /* at most 7 ports! XXX */
  56         },
  57         {
  58                 0x12,           /* bLength */
  59                 1,              /* bDescriptorType: UDESC_DEVICE */
  60                 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
  61                 9,              /* bDeviceClass: UDCLASS_HUB */
  62                 0,              /* bDeviceSubClass: UDSUBCLASS_HUB */
  63                 1,              /* bDeviceProtocol: UDPROTO_HSHUBSTT */
  64                 64,             /* bMaxPacketSize: 64 bytes */
  65                 0x0000,         /* idVendor */
  66                 0x0000,         /* idProduct */
  67                 cpu_to_le16(0x0100), /* bcdDevice */
  68                 1,              /* iManufacturer */
  69                 2,              /* iProduct */
  70                 0,              /* iSerialNumber */
  71                 1               /* bNumConfigurations: 1 */
  72         },
  73         {
  74                 0x9,
  75                 2,              /* bDescriptorType: UDESC_CONFIG */
  76                 cpu_to_le16(0x19),
  77                 1,              /* bNumInterface */
  78                 1,              /* bConfigurationValue */
  79                 0,              /* iConfiguration */
  80                 0x40,           /* bmAttributes: UC_SELF_POWER */
  81                 0               /* bMaxPower */
  82         },
  83         {
  84                 0x9,            /* bLength */
  85                 4,              /* bDescriptorType: UDESC_INTERFACE */
  86                 0,              /* bInterfaceNumber */
  87                 0,              /* bAlternateSetting */
  88                 1,              /* bNumEndpoints */
  89                 9,              /* bInterfaceClass: UICLASS_HUB */
  90                 0,              /* bInterfaceSubClass: UISUBCLASS_HUB */
  91                 0,              /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
  92                 0               /* iInterface */
  93         },
  94         {
  95                 0x7,            /* bLength */
  96                 5,              /* bDescriptorType: UDESC_ENDPOINT */
  97                 0x81,           /* bEndpointAddress:
  98                                  * UE_DIR_IN | EHCI_INTR_ENDPT
  99                                  */
 100                 3,              /* bmAttributes: UE_INTERRUPT */
 101                 8,              /* wMaxPacketSize */
 102                 255             /* bInterval */
 103         },
 104 };
 105
 106 #if defined(CONFIG_EHCI_IS_TDI)
 107 #define ehci_is_TDI()   (1)
 108 #else
 109 #define ehci_is_TDI()   (0)
 110 #endif
 111
 112 static struct ehci_ctrl *ehci_get_ctrl(struct usb_device *udev)
 113 {
 114 #ifdef CONFIG_DM_USB
 115         return dev_get_priv(usb_get_bus(udev->dev));
 116 #else
 117         return udev->controller;
 118 #endif
 119 }
 120
 121 static int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
 122 {
 123         return PORTSC_PSPD(reg);
 124 }
 125
 126 static void ehci_set_usbmode(struct ehci_ctrl *ctrl)
 127 {
 128         uint32_t tmp;
 129         uint32_t *reg_ptr;
 130
 131         reg_ptr = (uint32_t *)((u8 *)&ctrl->hcor->or_usbcmd + USBMODE);
 132         tmp = ehci_readl(reg_ptr);
 133         tmp |= USBMODE_CM_HC;
 134 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
 135         tmp |= USBMODE_BE;
 136 #else
 137         tmp &= ~USBMODE_BE;
 138 #endif
 139         ehci_writel(reg_ptr, tmp);
 140 }
 141
 142 static void ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,
 143                                uint32_t *reg)
 144 {
 145         mdelay(50);
 146 }
 147
 148 static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)
 149 {
 150         int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 151
 152         if (port < 0 || port >= max_ports) {
 153                 /* Printing the message would cause a scan failure! */
 154                 debug("The request port(%u) exceeds maximum port number\n",
 155                       port);
 156                 return NULL;
 157         }
 158
 159         return (uint32_t *)&ctrl->hcor->or_portsc[port];
 160 }
 161
 162 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
 163 {
 164         uint32_t result;
 165         do {
 166                 result = ehci_readl(ptr);
 167                 udelay(5);
 168                 if (result == ~(uint32_t)0)
 169                         return -1;
 170                 result &= mask;
 171                 if (result == done)
 172                         return 0;
 173                 usec--;
 174         } while (usec > 0);
 175         return -1;
 176 }
 177
 178 static int ehci_reset(struct ehci_ctrl *ctrl)
 179 {
 180         uint32_t cmd;
 181         int ret = 0;
 182
 183         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 184         cmd = (cmd & ~CMD_RUN) | CMD_RESET;
 185         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 186         ret = handshake((uint32_t *)&ctrl->hcor->or_usbcmd,
 187                         CMD_RESET, 0, 250 * 1000);
 188         if (ret < 0) {
 189                 printf("EHCI fail to reset\n");
 190                 goto out;
 191         }
 192
 193         if (ehci_is_TDI())
 194                 ctrl->ops.set_usb_mode(ctrl);
 195
 196 #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
 197         cmd = ehci_readl(&ctrl->hcor->or_txfilltuning);
 198         cmd &= ~TXFIFO_THRESH_MASK;
 199         cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
 200         ehci_writel(&ctrl->hcor->or_txfilltuning, cmd);
 201 #endif
 202 out:
 203         return ret;
 204 }
 205
 206 static int ehci_shutdown(struct ehci_ctrl *ctrl)
 207 {
 208         int i, ret = 0;
 209         uint32_t cmd, reg;
 210         int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 211
 212         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 213         /* If not run, directly return */
 214         if (!(cmd & CMD_RUN))
 215                 return 0;
 216         cmd &= ~(CMD_PSE | CMD_ASE);
 217         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 218         ret = handshake(&ctrl->hcor->or_usbsts, STS_ASS | STS_PSS, 0,
 219                 100 * 1000);
 220
 221         if (!ret) {
 222                 for (i = 0; i < max_ports; i++) {
 223                         reg = ehci_readl(&ctrl->hcor->or_portsc[i]);
 224                         reg |= EHCI_PS_SUSP;
 225                         ehci_writel(&ctrl->hcor->or_portsc[i], reg);
 226                 }
 227
 228                 cmd &= ~CMD_RUN;
 229                 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 230                 ret = handshake(&ctrl->hcor->or_usbsts, STS_HALT, STS_HALT,
 231                         HCHALT_TIMEOUT);
 232         }
 233
 234         if (ret)
 235                 puts("EHCI failed to shut down host controller.\n");
 236
 237         return ret;
 238 }
 239
 240 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
 241 {
 242         uint32_t delta, next;
 243         unsigned long addr = (unsigned long)buf;
 244         int idx;
 245
 246         if (addr != ALIGN(addr, ARCH_DMA_MINALIGN))
 247                 debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
 248
 249         flush_dcache_range(addr, ALIGN(addr + sz, ARCH_DMA_MINALIGN));
 250
 251         idx = 0;
 252         while (idx < QT_BUFFER_CNT) {
 253                 td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr));
 254                 td->qt_buffer_hi[idx] = 0;
 255                 next = (addr + EHCI_PAGE_SIZE) & ~(EHCI_PAGE_SIZE - 1);
 256                 delta = next - addr;
 257                 if (delta >= sz)
 258                         break;
 259                 sz -= delta;
 260                 addr = next;
 261                 idx++;
 262         }
 263
 264         if (idx == QT_BUFFER_CNT) {
 265                 printf("out of buffer pointers (%zu bytes left)\n", sz);
 266                 return -1;
 267         }
 268
 269         return 0;
 270 }
 271
 272 static inline u8 ehci_encode_speed(enum usb_device_speed speed)
 273 {
 274         #define QH_HIGH_SPEED   2
 275         #define QH_FULL_SPEED   0
 276         #define QH_LOW_SPEED    1
 277         if (speed == USB_SPEED_HIGH)
 278                 return QH_HIGH_SPEED;
 279         if (speed == USB_SPEED_LOW)
 280                 return QH_LOW_SPEED;
 281         return QH_FULL_SPEED;
 282 }
 283
 284 static void ehci_update_endpt2_dev_n_port(struct usb_device *udev,
 285                                           struct QH *qh)
 286 {
 287         uint8_t portnr = 0;
 288         uint8_t hubaddr = 0;
 289
 290         if (udev->speed != USB_SPEED_LOW && udev->speed != USB_SPEED_FULL)
 291                 return;
 292
 293         usb_find_usb2_hub_address_port(udev, &hubaddr, &portnr);
 294
 295         qh->qh_endpt2 |= cpu_to_hc32(QH_ENDPT2_PORTNUM(portnr) |
 296                                      QH_ENDPT2_HUBADDR(hubaddr));
 297 }
 298
 299 static int
 300 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 301                    int length, struct devrequest *req)
 302 {
 303         ALLOC_ALIGN_BUFFER(struct QH, qh, 1, USB_DMA_MINALIGN);
 304         struct qTD *qtd;
 305         int qtd_count = 0;
 306         int qtd_counter = 0;
 307         volatile struct qTD *vtd;
 308         unsigned long ts;
 309         uint32_t *tdp;
 310         uint32_t endpt, maxpacket, token, usbsts;
 311         uint32_t c, toggle;
 312         uint32_t cmd;
 313         int timeout;
 314         int ret = 0;
 315         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
 316
 317         debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
 318               buffer, length, req);
 319         if (req != NULL)
 320                 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
 321                       req->request, req->request,
 322                       req->requesttype, req->requesttype,
 323                       le16_to_cpu(req->value), le16_to_cpu(req->value),
 324                       le16_to_cpu(req->index));
 325
 326 #define PKT_ALIGN       512
 327         /*
 328          * The USB transfer is split into qTD transfers. Eeach qTD transfer is
 329          * described by a transfer descriptor (the qTD). The qTDs form a linked
 330          * list with a queue head (QH).
 331          *
 332          * Each qTD transfer starts with a new USB packet, i.e. a packet cannot
 333          * have its beginning in a qTD transfer and its end in the following
 334          * one, so the qTD transfer lengths have to be chosen accordingly.
 335          *
 336          * Each qTD transfer uses up to QT_BUFFER_CNT data buffers, mapped to
 337          * single pages. The first data buffer can start at any offset within a
 338          * page (not considering the cache-line alignment issues), while the
 339          * following buffers must be page-aligned. There is no alignment
 340          * constraint on the size of a qTD transfer.
 341          */
 342         if (req != NULL)
 343                 /* 1 qTD will be needed for SETUP, and 1 for ACK. */
 344                 qtd_count += 1 + 1;
 345         if (length > 0 || req == NULL) {
 346                 /*
 347                  * Determine the qTD transfer size that will be used for the
 348                  * data payload (not considering the first qTD transfer, which
 349                  * may be longer or shorter, and the final one, which may be
 350                  * shorter).
 351                  *
 352                  * In order to keep each packet within a qTD transfer, the qTD
 353                  * transfer size is aligned to PKT_ALIGN, which is a multiple of
 354                  * wMaxPacketSize (except in some cases for interrupt transfers,
 355                  * see comment in submit_int_msg()).
 356                  *
 357                  * By default, i.e. if the input buffer is aligned to PKT_ALIGN,
 358                  * QT_BUFFER_CNT full pages will be used.
 359                  */
 360                 int xfr_sz = QT_BUFFER_CNT;
 361                 /*
 362                  * However, if the input buffer is not aligned to PKT_ALIGN, the
 363                  * qTD transfer size will be one page shorter, and the first qTD
 364                  * data buffer of each transfer will be page-unaligned.
 365                  */
 366                 if ((unsigned long)buffer & (PKT_ALIGN - 1))
 367                         xfr_sz--;
 368                 /* Convert the qTD transfer size to bytes. */
 369                 xfr_sz *= EHCI_PAGE_SIZE;
 370                 /*
 371                  * Approximate by excess the number of qTDs that will be
 372                  * required for the data payload. The exact formula is way more
 373                  * complicated and saves at most 2 qTDs, i.e. a total of 128
 374                  * bytes.
 375                  */
 376                 qtd_count += 2 + length / xfr_sz;
 377         }
 378 /*
 379  * Threshold value based on the worst-case total size of the allocated qTDs for
 380  * a mass-storage transfer of 65535 blocks of 512 bytes.
 381  */
 382 #if CONFIG_SYS_MALLOC_LEN <= 64 + 128 * 1024
 383 #warning CONFIG_SYS_MALLOC_LEN may be too small for EHCI
 384 #endif
 385         qtd = memalign(USB_DMA_MINALIGN, qtd_count * sizeof(struct qTD));
 386         if (qtd == NULL) {
 387                 printf("unable to allocate TDs\n");
 388                 return -1;
 389         }
 390
 391         memset(qh, 0, sizeof(struct QH));
 392         memset(qtd, 0, qtd_count * sizeof(*qtd));
 393
 394         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
 395
 396         /*
 397          * Setup QH (3.6 in ehci-r10.pdf)
 398          *
 399          *   qh_link ................. 03-00 H
 400          *   qh_endpt1 ............... 07-04 H
 401          *   qh_endpt2 ............... 0B-08 H
 402          * - qh_curtd
 403          *   qh_overlay.qt_next ...... 13-10 H
 404          * - qh_overlay.qt_altnext
 405          */
 406         qh->qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
 407         c = (dev->speed != USB_SPEED_HIGH) && !usb_pipeendpoint(pipe);
 408         maxpacket = usb_maxpacket(dev, pipe);
 409         endpt = QH_ENDPT1_RL(8) | QH_ENDPT1_C(c) |
 410                 QH_ENDPT1_MAXPKTLEN(maxpacket) | QH_ENDPT1_H(0) |
 411                 QH_ENDPT1_DTC(QH_ENDPT1_DTC_DT_FROM_QTD) |
 412                 QH_ENDPT1_ENDPT(usb_pipeendpoint(pipe)) | QH_ENDPT1_I(0) |
 413                 QH_ENDPT1_DEVADDR(usb_pipedevice(pipe));
 414
 415         /* Force FS for fsl HS quirk */
 416         if (!ctrl->has_fsl_erratum_a005275)
 417                 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(dev->speed));
 418         else
 419                 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(QH_FULL_SPEED));
 420
 421         qh->qh_endpt1 = cpu_to_hc32(endpt);
 422         endpt = QH_ENDPT2_MULT(1) | QH_ENDPT2_UFCMASK(0) | QH_ENDPT2_UFSMASK(0);
 423         qh->qh_endpt2 = cpu_to_hc32(endpt);
 424         ehci_update_endpt2_dev_n_port(dev, qh);
 425         qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 426         qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 427
 428         tdp = &qh->qh_overlay.qt_next;
 429         if (req != NULL) {
 430                 /*
 431                  * Setup request qTD (3.5 in ehci-r10.pdf)
 432                  *
 433                  *   qt_next ................ 03-00 H
 434                  *   qt_altnext ............. 07-04 H
 435                  *   qt_token ............... 0B-08 H
 436                  *
 437                  *   [ buffer, buffer_hi ] loaded with "req".
 438                  */
 439                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 440                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 441                 token = QT_TOKEN_DT(0) | QT_TOKEN_TOTALBYTES(sizeof(*req)) |
 442                         QT_TOKEN_IOC(0) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
 443                         QT_TOKEN_PID(QT_TOKEN_PID_SETUP) |
 444                         QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 445                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 446                 if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req))) {
 447                         printf("unable to construct SETUP TD\n");
 448                         goto fail;
 449                 }
 450                 /* Update previous qTD! */
 451                 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 452                 tdp = &qtd[qtd_counter++].qt_next;
 453                 toggle = 1;
 454         }
 455
 456         if (length > 0 || req == NULL) {
 457                 uint8_t *buf_ptr = buffer;
 458                 int left_length = length;
 459
 460                 do {
 461                         /*
 462                          * Determine the size of this qTD transfer. By default,
 463                          * QT_BUFFER_CNT full pages can be used.
 464                          */
 465                         int xfr_bytes = QT_BUFFER_CNT * EHCI_PAGE_SIZE;
 466                         /*
 467                          * However, if the input buffer is not page-aligned, the
 468                          * portion of the first page before the buffer start
 469                          * offset within that page is unusable.
 470                          */
 471                         xfr_bytes -= (unsigned long)buf_ptr & (EHCI_PAGE_SIZE - 1);
 472                         /*
 473                          * In order to keep each packet within a qTD transfer,
 474                          * align the qTD transfer size to PKT_ALIGN.
 475                          */
 476                         xfr_bytes &= ~(PKT_ALIGN - 1);
 477                         /*
 478                          * This transfer may be shorter than the available qTD
 479                          * transfer size that has just been computed.
 480                          */
 481                         xfr_bytes = min(xfr_bytes, left_length);
 482
 483                         /*
 484                          * Setup request qTD (3.5 in ehci-r10.pdf)
 485                          *
 486                          *   qt_next ................ 03-00 H
 487                          *   qt_altnext ............. 07-04 H
 488                          *   qt_token ............... 0B-08 H
 489                          *
 490                          *   [ buffer, buffer_hi ] loaded with "buffer".
 491                          */
 492                         qtd[qtd_counter].qt_next =
 493                                         cpu_to_hc32(QT_NEXT_TERMINATE);
 494                         qtd[qtd_counter].qt_altnext =
 495                                         cpu_to_hc32(QT_NEXT_TERMINATE);
 496                         token = QT_TOKEN_DT(toggle) |
 497                                 QT_TOKEN_TOTALBYTES(xfr_bytes) |
 498                                 QT_TOKEN_IOC(req == NULL) | QT_TOKEN_CPAGE(0) |
 499                                 QT_TOKEN_CERR(3) |
 500                                 QT_TOKEN_PID(usb_pipein(pipe) ?
 501                                         QT_TOKEN_PID_IN : QT_TOKEN_PID_OUT) |
 502                                 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 503                         qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 504                         if (ehci_td_buffer(&qtd[qtd_counter], buf_ptr,
 505                                                 xfr_bytes)) {
 506                                 printf("unable to construct DATA TD\n");
 507                                 goto fail;
 508                         }
 509                         /* Update previous qTD! */
 510                         *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 511                         tdp = &qtd[qtd_counter++].qt_next;
 512                         /*
 513                          * Data toggle has to be adjusted since the qTD transfer
 514                          * size is not always an even multiple of
 515                          * wMaxPacketSize.
 516                          */
 517                         if ((xfr_bytes / maxpacket) & 1)
 518                                 toggle ^= 1;
 519                         buf_ptr += xfr_bytes;
 520                         left_length -= xfr_bytes;
 521                 } while (left_length > 0);
 522         }
 523
 524         if (req != NULL) {
 525                 /*
 526                  * Setup request qTD (3.5 in ehci-r10.pdf)
 527                  *
 528                  *   qt_next ................ 03-00 H
 529                  *   qt_altnext ............. 07-04 H
 530                  *   qt_token ............... 0B-08 H
 531                  */
 532                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 533                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 534                 token = QT_TOKEN_DT(1) | QT_TOKEN_TOTALBYTES(0) |
 535                         QT_TOKEN_IOC(1) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
 536                         QT_TOKEN_PID(usb_pipein(pipe) ?
 537                                 QT_TOKEN_PID_OUT : QT_TOKEN_PID_IN) |
 538                         QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 539                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 540                 /* Update previous qTD! */
 541                 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 542                 tdp = &qtd[qtd_counter++].qt_next;
 543         }
 544
 545         ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(qh) | QH_LINK_TYPE_QH);
 546
 547         /* Flush dcache */
 548         flush_dcache_range((unsigned long)&ctrl->qh_list,
 549                 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 550         flush_dcache_range((unsigned long)qh, ALIGN_END_ADDR(struct QH, qh, 1));
 551         flush_dcache_range((unsigned long)qtd,
 552                            ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 553
 554         /* Set async. queue head pointer. */
 555         ehci_writel(&ctrl->hcor->or_asynclistaddr, virt_to_phys(&ctrl->qh_list));
 556
 557         usbsts = ehci_readl(&ctrl->hcor->or_usbsts);
 558         ehci_writel(&ctrl->hcor->or_usbsts, (usbsts & 0x3f));
 559
 560         /* Enable async. schedule. */
 561         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 562         cmd |= CMD_ASE;
 563         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 564
 565         ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, STS_ASS,
 566                         100 * 1000);
 567         if (ret < 0) {
 568                 printf("EHCI fail timeout STS_ASS set\n");
 569                 goto fail;
 570         }
 571
 572         /* Wait for TDs to be processed. */
 573         ts = get_timer(0);
 574         vtd = &qtd[qtd_counter - 1];
 575         timeout = USB_TIMEOUT_MS(pipe);
 576         do {
 577                 /* Invalidate dcache */
 578                 invalidate_dcache_range((unsigned long)&ctrl->qh_list,
 579                         ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 580                 invalidate_dcache_range((unsigned long)qh,
 581                         ALIGN_END_ADDR(struct QH, qh, 1));
 582                 invalidate_dcache_range((unsigned long)qtd,
 583                         ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 584
 585                 token = hc32_to_cpu(vtd->qt_token);
 586                 if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE))
 587                         break;
 588                 WATCHDOG_RESET();
 589         } while (get_timer(ts) < timeout);
 590
 591         /*
 592          * Invalidate the memory area occupied by buffer
 593          * Don't try to fix the buffer alignment, if it isn't properly
 594          * aligned it's upper layer's fault so let invalidate_dcache_range()
 595          * vow about it. But we have to fix the length as it's actual
 596          * transfer length and can be unaligned. This is potentially
 597          * dangerous operation, it's responsibility of the calling
 598          * code to make sure enough space is reserved.
 599          */
 600         if (buffer != NULL && length > 0)
 601                 invalidate_dcache_range((unsigned long)buffer,
 602                         ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN));
 603
 604         /* Check that the TD processing happened */
 605         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)
 606                 printf("EHCI timed out on TD - token=%#x\n", token);
 607
 608         /* Disable async schedule. */
 609         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 610         cmd &= ~CMD_ASE;
 611         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 612
 613         ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, 0,
 614                         100 * 1000);
 615         if (ret < 0) {
 616                 printf("EHCI fail timeout STS_ASS reset\n");
 617                 goto fail;
 618         }
 619
 620         token = hc32_to_cpu(qh->qh_overlay.qt_token);
 621         if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)) {
 622                 debug("TOKEN=%#x\n", token);
 623                 switch (QT_TOKEN_GET_STATUS(token) &
 624                         ~(QT_TOKEN_STATUS_SPLITXSTATE | QT_TOKEN_STATUS_PERR)) {
 625                 case 0:
 626                         toggle = QT_TOKEN_GET_DT(token);
 627                         usb_settoggle(dev, usb_pipeendpoint(pipe),
 628                                        usb_pipeout(pipe), toggle);
 629                         dev->status = 0;
 630                         break;
 631                 case QT_TOKEN_STATUS_HALTED:
 632                         dev->status = USB_ST_STALLED;
 633                         break;
 634                 case QT_TOKEN_STATUS_ACTIVE | QT_TOKEN_STATUS_DATBUFERR:
 635                 case QT_TOKEN_STATUS_DATBUFERR:
 636                         dev->status = USB_ST_BUF_ERR;
 637                         break;
 638                 case QT_TOKEN_STATUS_HALTED | QT_TOKEN_STATUS_BABBLEDET:
 639                 case QT_TOKEN_STATUS_BABBLEDET:
 640                         dev->status = USB_ST_BABBLE_DET;
 641                         break;
 642                 default:
 643                         dev->status = USB_ST_CRC_ERR;
 644                         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_HALTED)
 645                                 dev->status |= USB_ST_STALLED;
 646                         break;
 647                 }
 648                 dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(token);
 649         } else {
 650                 dev->act_len = 0;
 651 #ifndef CONFIG_USB_EHCI_FARADAY
 652                 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
 653                       dev->devnum, ehci_readl(&ctrl->hcor->or_usbsts),
 654                       ehci_readl(&ctrl->hcor->or_portsc[0]),
 655                       ehci_readl(&ctrl->hcor->or_portsc[1]));
 656 #endif
 657         }
 658
 659         free(qtd);
 660         return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
 661
 662 fail:
 663         free(qtd);
 664         return -1;
 665 }
 666
 667 static int ehci_submit_root(struct usb_device *dev, unsigned long pipe,
 668                             void *buffer, int length, struct devrequest *req)
 669 {
 670         uint8_t tmpbuf[4];
 671         u16 typeReq;
 672         void *srcptr = NULL;
 673         int len, srclen;
 674         uint32_t reg;
 675         uint32_t *status_reg;
 676         int port = le16_to_cpu(req->index) & 0xff;
 677         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
 678
 679         srclen = 0;
 680
 681         debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
 682               req->request, req->request,
 683               req->requesttype, req->requesttype,
 684               le16_to_cpu(req->value), le16_to_cpu(req->index));
 685
 686         typeReq = req->request | req->requesttype << 8;
 687
 688         switch (typeReq) {
 689         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 690         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 691         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 692                 status_reg = ctrl->ops.get_portsc_register(ctrl, port - 1);
 693                 if (!status_reg)
 694                         return -1;
 695                 break;
 696         default:
 697                 status_reg = NULL;
 698                 break;
 699         }
 700
 701         switch (typeReq) {
 702         case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
 703                 switch (le16_to_cpu(req->value) >> 8) {
 704                 case USB_DT_DEVICE:
 705                         debug("USB_DT_DEVICE request\n");
 706                         srcptr = &descriptor.device;
 707                         srclen = descriptor.device.bLength;
 708                         break;
 709                 case USB_DT_CONFIG:
 710                         debug("USB_DT_CONFIG config\n");
 711                         srcptr = &descriptor.config;
 712                         srclen = descriptor.config.bLength +
 713                                         descriptor.interface.bLength +
 714                                         descriptor.endpoint.bLength;
 715                         break;
 716                 case USB_DT_STRING:
 717                         debug("USB_DT_STRING config\n");
 718                         switch (le16_to_cpu(req->value) & 0xff) {
 719                         case 0: /* Language */
 720                                 srcptr = "\4\3\1\0";
 721                                 srclen = 4;
 722                                 break;
 723                         case 1: /* Vendor */
 724                                 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
 725                                 srclen = 14;
 726                                 break;
 727                         case 2: /* Product */
 728                                 srcptr = "\52\3E\0H\0C\0I\0 "
 729                                          "\0H\0o\0s\0t\0 "
 730                                          "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
 731                                 srclen = 42;
 732                                 break;
 733                         default:
 734                                 debug("unknown value DT_STRING %x\n",
 735                                         le16_to_cpu(req->value));
 736                                 goto unknown;
 737                         }
 738                         break;
 739                 default:
 740                         debug("unknown value %x\n", le16_to_cpu(req->value));
 741                         goto unknown;
 742                 }
 743                 break;
 744         case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
 745                 switch (le16_to_cpu(req->value) >> 8) {
 746                 case USB_DT_HUB:
 747                         debug("USB_DT_HUB config\n");
 748                         srcptr = &descriptor.hub;
 749                         srclen = descriptor.hub.bLength;
 750                         break;
 751                 default:
 752                         debug("unknown value %x\n", le16_to_cpu(req->value));
 753                         goto unknown;
 754                 }
 755                 break;
 756         case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
 757                 debug("USB_REQ_SET_ADDRESS\n");
 758                 ctrl->rootdev = le16_to_cpu(req->value);
 759                 break;
 760         case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
 761                 debug("USB_REQ_SET_CONFIGURATION\n");
 762                 /* Nothing to do */
 763                 break;
 764         case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
 765                 tmpbuf[0] = 1;  /* USB_STATUS_SELFPOWERED */
 766                 tmpbuf[1] = 0;
 767                 srcptr = tmpbuf;
 768                 srclen = 2;
 769                 break;
 770         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 771                 memset(tmpbuf, 0, 4);
 772                 reg = ehci_readl(status_reg);
 773                 if (reg & EHCI_PS_CS)
 774                         tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
 775                 if (reg & EHCI_PS_PE)
 776                         tmpbuf[0] |= USB_PORT_STAT_ENABLE;
 777                 if (reg & EHCI_PS_SUSP)
 778                         tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
 779                 if (reg & EHCI_PS_OCA)
 780                         tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
 781                 if (reg & EHCI_PS_PR)
 782                         tmpbuf[0] |= USB_PORT_STAT_RESET;
 783                 if (reg & EHCI_PS_PP)
 784                         tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
 785
 786                 if (ehci_is_TDI()) {
 787                         switch (ctrl->ops.get_port_speed(ctrl, reg)) {
 788                         case PORTSC_PSPD_FS:
 789                                 break;
 790                         case PORTSC_PSPD_LS:
 791                                 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
 792                                 break;
 793                         case PORTSC_PSPD_HS:
 794                         default:
 795                                 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 796                                 break;
 797                         }
 798                 } else {
 799                         tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 800                 }
 801
 802                 if (reg & EHCI_PS_CSC)
 803                         tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
 804                 if (reg & EHCI_PS_PEC)
 805                         tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
 806                 if (reg & EHCI_PS_OCC)
 807                         tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
 808                 if (ctrl->portreset & (1 << port))
 809                         tmpbuf[2] |= USB_PORT_STAT_C_RESET;
 810
 811                 srcptr = tmpbuf;
 812                 srclen = 4;
 813                 break;
 814         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 815                 reg = ehci_readl(status_reg);
 816                 reg &= ~EHCI_PS_CLEAR;
 817                 switch (le16_to_cpu(req->value)) {
 818                 case USB_PORT_FEAT_ENABLE:
 819                         reg |= EHCI_PS_PE;
 820                         ehci_writel(status_reg, reg);
 821                         break;
 822                 case USB_PORT_FEAT_POWER:
 823                         if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) {
 824                                 reg |= EHCI_PS_PP;
 825                                 ehci_writel(status_reg, reg);
 826                         }
 827                         break;
 828                 case USB_PORT_FEAT_RESET:
 829                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
 830                             !ehci_is_TDI() &&
 831                             EHCI_PS_IS_LOWSPEED(reg)) {
 832                                 /* Low speed device, give up ownership. */
 833                                 debug("port %d low speed --> companion\n",
 834                                       port - 1);
 835                                 reg |= EHCI_PS_PO;
 836                                 ehci_writel(status_reg, reg);
 837                                 return -ENXIO;
 838                         } else {
 839                                 int ret;
 840
 841                                 /* Disable chirp for HS erratum */
 842                                 if (ctrl->has_fsl_erratum_a005275)
 843                                         reg |= PORTSC_FSL_PFSC;
 844
 845                                 reg |= EHCI_PS_PR;
 846                                 reg &= ~EHCI_PS_PE;
 847                                 ehci_writel(status_reg, reg);
 848                                 /*
 849                                  * caller must wait, then call GetPortStatus
 850                                  * usb 2.0 specification say 50 ms resets on
 851                                  * root
 852                                  */
 853                                 ctrl->ops.powerup_fixup(ctrl, status_reg, &reg);
 854
 855                                 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
 856                                 /*
 857                                  * A host controller must terminate the reset
 858                                  * and stabilize the state of the port within
 859                                  * 2 milliseconds
 860                                  */
 861                                 ret = handshake(status_reg, EHCI_PS_PR, 0,
 862                                                 2 * 1000);
 863                                 if (!ret) {
 864                                         reg = ehci_readl(status_reg);
 865                                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS))
 866                                             == EHCI_PS_CS && !ehci_is_TDI()) {
 867                                                 debug("port %d full speed --> companion\n", port - 1);
 868                                                 reg &= ~EHCI_PS_CLEAR;
 869                                                 reg |= EHCI_PS_PO;
 870                                                 ehci_writel(status_reg, reg);
 871                                                 return -ENXIO;
 872                                         } else {
 873                                                 ctrl->portreset |= 1 << port;
 874                                         }
 875                                 } else {
 876                                         printf("port(%d) reset error\n",
 877                                                port - 1);
 878                                 }
 879                         }
 880                         break;
 881                 case USB_PORT_FEAT_TEST:
 882                         ehci_shutdown(ctrl);
 883                         reg &= ~(0xf << 16);
 884                         reg |= ((le16_to_cpu(req->index) >> 8) & 0xf) << 16;
 885                         ehci_writel(status_reg, reg);
 886                         break;
 887                 default:
 888                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 889                         goto unknown;
 890                 }
 891                 /* unblock posted writes */
 892                 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
 893                 break;
 894         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 895                 reg = ehci_readl(status_reg);
 896                 reg &= ~EHCI_PS_CLEAR;
 897                 switch (le16_to_cpu(req->value)) {
 898                 case USB_PORT_FEAT_ENABLE:
 899                         reg &= ~EHCI_PS_PE;
 900                         break;
 901                 case USB_PORT_FEAT_C_ENABLE:
 902                         reg |= EHCI_PS_PE;
 903                         break;
 904                 case USB_PORT_FEAT_POWER:
 905                         if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams)))
 906                                 reg &= ~EHCI_PS_PP;
 907                         break;
 908                 case USB_PORT_FEAT_C_CONNECTION:
 909                         reg |= EHCI_PS_CSC;
 910                         break;
 911                 case USB_PORT_FEAT_OVER_CURRENT:
 912                         reg |= EHCI_PS_OCC;
 913                         break;
 914                 case USB_PORT_FEAT_C_RESET:
 915                         ctrl->portreset &= ~(1 << port);
 916                         break;
 917                 default:
 918                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 919                         goto unknown;
 920                 }
 921                 ehci_writel(status_reg, reg);
 922                 /* unblock posted write */
 923                 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
 924                 break;
 925         default:
 926                 debug("Unknown request\n");
 927                 goto unknown;
 928         }
 929
 930         mdelay(1);
 931         len = min3(srclen, (int)le16_to_cpu(req->length), length);
 932         if (srcptr != NULL && len > 0)
 933                 memcpy(buffer, srcptr, len);
 934         else
 935                 debug("Len is 0\n");
 936
 937         dev->act_len = len;
 938         dev->status = 0;
 939         return 0;
 940
 941 unknown:
 942         debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
 943               req->requesttype, req->request, le16_to_cpu(req->value),
 944               le16_to_cpu(req->index), le16_to_cpu(req->length));
 945
 946         dev->act_len = 0;
 947         dev->status = USB_ST_STALLED;
 948         return -1;
 949 }
 950
 951 static const struct ehci_ops default_ehci_ops = {
 952         .set_usb_mode           = ehci_set_usbmode,
 953         .get_port_speed         = ehci_get_port_speed,
 954         .powerup_fixup          = ehci_powerup_fixup,
 955         .get_portsc_register    = ehci_get_portsc_register,
 956 };
 957
 958 static void ehci_setup_ops(struct ehci_ctrl *ctrl, const struct ehci_ops *ops)
 959 {
 960         if (!ops) {
 961                 ctrl->ops = default_ehci_ops;
 962         } else {
 963                 ctrl->ops = *ops;
 964                 if (!ctrl->ops.set_usb_mode)
 965                         ctrl->ops.set_usb_mode = ehci_set_usbmode;
 966                 if (!ctrl->ops.get_port_speed)
 967                         ctrl->ops.get_port_speed = ehci_get_port_speed;
 968                 if (!ctrl->ops.powerup_fixup)
 969                         ctrl->ops.powerup_fixup = ehci_powerup_fixup;
 970                 if (!ctrl->ops.get_portsc_register)
 971                         ctrl->ops.get_portsc_register =
 972                                         ehci_get_portsc_register;
 973         }
 974 }
 975
 976 #ifndef CONFIG_DM_USB
 977 void ehci_set_controller_priv(int index, void *priv, const struct ehci_ops *ops)
 978 {
 979         struct ehci_ctrl *ctrl = &ehcic[index];
 980
 981         ctrl->priv = priv;
 982         ehci_setup_ops(ctrl, ops);
 983 }
 984
 985 void *ehci_get_controller_priv(int index)
 986 {
 987         return ehcic[index].priv;
 988 }
 989 #endif
 990
 991 static int ehci_common_init(struct ehci_ctrl *ctrl, uint tweaks)
 992 {
 993         struct QH *qh_list;
 994         struct QH *periodic;
 995         uint32_t reg;
 996         uint32_t cmd;
 997         int i;
 998
 999         /* Set the high address word (aka segment) for 64-bit controller */
1000         if (ehci_readl(&ctrl->hccr->cr_hccparams) & 1)
1001                 ehci_writel(&ctrl->hcor->or_ctrldssegment, 0);
1002
1003         qh_list = &ctrl->qh_list;
1004
1005         /* Set head of reclaim list */
1006         memset(qh_list, 0, sizeof(*qh_list));
1007         qh_list->qh_link = cpu_to_hc32(virt_to_phys(qh_list) | QH_LINK_TYPE_QH);
1008         qh_list->qh_endpt1 = cpu_to_hc32(QH_ENDPT1_H(1) |
1009                                                 QH_ENDPT1_EPS(USB_SPEED_HIGH));
1010         qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1011         qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1012         qh_list->qh_overlay.qt_token =
1013                         cpu_to_hc32(QT_TOKEN_STATUS(QT_TOKEN_STATUS_HALTED));
1014
1015         flush_dcache_range((unsigned long)qh_list,
1016                            ALIGN_END_ADDR(struct QH, qh_list, 1));
1017
1018         /* Set async. queue head pointer. */
1019         ehci_writel(&ctrl->hcor->or_asynclistaddr, virt_to_phys(qh_list));
1020
1021         /*
1022          * Set up periodic list
1023          * Step 1: Parent QH for all periodic transfers.
1024          */
1025         ctrl->periodic_schedules = 0;
1026         periodic = &ctrl->periodic_queue;
1027         memset(periodic, 0, sizeof(*periodic));
1028         periodic->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1029         periodic->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1030         periodic->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1031
1032         flush_dcache_range((unsigned long)periodic,
1033                            ALIGN_END_ADDR(struct QH, periodic, 1));
1034
1035         /*
1036          * Step 2: Setup frame-list: Every microframe, USB tries the same list.
1037          *         In particular, device specifications on polling frequency
1038          *         are disregarded. Keyboards seem to send NAK/NYet reliably
1039          *         when polled with an empty buffer.
1040          *
1041          *         Split Transactions will be spread across microframes using
1042          *         S-mask and C-mask.
1043          */
1044         if (ctrl->periodic_list == NULL)
1045                 ctrl->periodic_list = memalign(4096, 1024 * 4);
1046
1047         if (!ctrl->periodic_list)
1048                 return -ENOMEM;
1049         for (i = 0; i < 1024; i++) {
1050                 ctrl->periodic_list[i] = cpu_to_hc32((unsigned long)periodic
1051                                                 | QH_LINK_TYPE_QH);
1052         }
1053
1054         flush_dcache_range((unsigned long)ctrl->periodic_list,
1055                            ALIGN_END_ADDR(uint32_t, ctrl->periodic_list,
1056                                           1024));
1057
1058         /* Set periodic list base address */
1059         ehci_writel(&ctrl->hcor->or_periodiclistbase,
1060                 (unsigned long)ctrl->periodic_list);
1061
1062         reg = ehci_readl(&ctrl->hccr->cr_hcsparams);
1063         descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
1064         debug("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
1065         /* Port Indicators */
1066         if (HCS_INDICATOR(reg))
1067                 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1068                                 | 0x80, &descriptor.hub.wHubCharacteristics);
1069         /* Port Power Control */
1070         if (HCS_PPC(reg))
1071                 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1072                                 | 0x01, &descriptor.hub.wHubCharacteristics);
1073
1074         /* Start the host controller. */
1075         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1076         /*
1077          * Philips, Intel, and maybe others need CMD_RUN before the
1078          * root hub will detect new devices (why?); NEC doesn't
1079          */
1080         cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
1081         cmd |= CMD_RUN;
1082         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
1083
1084         if (!(tweaks & EHCI_TWEAK_NO_INIT_CF)) {
1085                 /* take control over the ports */
1086                 cmd = ehci_readl(&ctrl->hcor->or_configflag);
1087                 cmd |= FLAG_CF;
1088                 ehci_writel(&ctrl->hcor->or_configflag, cmd);
1089         }
1090
1091         /* unblock posted write */
1092         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1093         mdelay(5);
1094         reg = HC_VERSION(ehci_readl(&ctrl->hccr->cr_capbase));
1095         printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
1096
1097         return 0;
1098 }
1099
1100 #ifndef CONFIG_DM_USB
1101 int usb_lowlevel_stop(int index)
1102 {
1103         ehci_shutdown(&ehcic[index]);
1104         return ehci_hcd_stop(index);
1105 }
1106
1107 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1108 {
1109         struct ehci_ctrl *ctrl = &ehcic[index];
1110         uint tweaks = 0;
1111         int rc;
1112
1113         /**
1114          * Set ops to default_ehci_ops, ehci_hcd_init should call
1115          * ehci_set_controller_priv to change any of these function pointers.
1116          */
1117         ctrl->ops = default_ehci_ops;
1118
1119         rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1120         if (rc)
1121                 return rc;
1122         if (!ctrl->hccr || !ctrl->hcor)
1123                 return -1;
1124         if (init == USB_INIT_DEVICE)
1125                 goto done;
1126
1127         /* EHCI spec section 4.1 */
1128         if (ehci_reset(ctrl))
1129                 return -1;
1130
1131 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
1132         rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1133         if (rc)
1134                 return rc;
1135 #endif
1136 #ifdef CONFIG_USB_EHCI_FARADAY
1137         tweaks |= EHCI_TWEAK_NO_INIT_CF;
1138 #endif
1139         rc = ehci_common_init(ctrl, tweaks);
1140         if (rc)
1141                 return rc;
1142
1143         ctrl->rootdev = 0;
1144 done:
1145         *controller = &ehcic[index];
1146         return 0;
1147 }
1148 #endif
1149
1150 static int _ehci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1151                                  void *buffer, int length)
1152 {
1153
1154         if (usb_pipetype(pipe) != PIPE_BULK) {
1155                 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
1156                 return -1;
1157         }
1158         return ehci_submit_async(dev, pipe, buffer, length, NULL);
1159 }
1160
1161 static int _ehci_submit_control_msg(struct usb_device *dev, unsigned long pipe,
1162                                     void *buffer, int length,
1163                                     struct devrequest *setup)
1164 {
1165         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1166
1167         if (usb_pipetype(pipe) != PIPE_CONTROL) {
1168                 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
1169                 return -1;
1170         }
1171
1172         if (usb_pipedevice(pipe) == ctrl->rootdev) {
1173                 if (!ctrl->rootdev)
1174                         dev->speed = USB_SPEED_HIGH;
1175                 return ehci_submit_root(dev, pipe, buffer, length, setup);
1176         }
1177         return ehci_submit_async(dev, pipe, buffer, length, setup);
1178 }
1179
1180 struct int_queue {
1181         int elementsize;
1182         unsigned long pipe;
1183         struct QH *first;
1184         struct QH *current;
1185         struct QH *last;
1186         struct qTD *tds;
1187 };
1188
1189 #define NEXT_QH(qh) (struct QH *)((unsigned long)hc32_to_cpu((qh)->qh_link) & ~0x1f)
1190
1191 static int
1192 enable_periodic(struct ehci_ctrl *ctrl)
1193 {
1194         uint32_t cmd;
1195         struct ehci_hcor *hcor = ctrl->hcor;
1196         int ret;
1197
1198         cmd = ehci_readl(&hcor->or_usbcmd);
1199         cmd |= CMD_PSE;
1200         ehci_writel(&hcor->or_usbcmd, cmd);
1201
1202         ret = handshake((uint32_t *)&hcor->or_usbsts,
1203                         STS_PSS, STS_PSS, 100 * 1000);
1204         if (ret < 0) {
1205                 printf("EHCI failed: timeout when enabling periodic list\n");
1206                 return -ETIMEDOUT;
1207         }
1208         udelay(1000);
1209         return 0;
1210 }
1211
1212 static int
1213 disable_periodic(struct ehci_ctrl *ctrl)
1214 {
1215         uint32_t cmd;
1216         struct ehci_hcor *hcor = ctrl->hcor;
1217         int ret;
1218
1219         cmd = ehci_readl(&hcor->or_usbcmd);
1220         cmd &= ~CMD_PSE;
1221         ehci_writel(&hcor->or_usbcmd, cmd);
1222
1223         ret = handshake((uint32_t *)&hcor->or_usbsts,
1224                         STS_PSS, 0, 100 * 1000);
1225         if (ret < 0) {
1226                 printf("EHCI failed: timeout when disabling periodic list\n");
1227                 return -ETIMEDOUT;
1228         }
1229         return 0;
1230 }
1231
1232 static struct int_queue *_ehci_create_int_queue(struct usb_device *dev,
1233                         unsigned long pipe, int queuesize, int elementsize,
1234                         void *buffer, int interval)
1235 {
1236         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1237         struct int_queue *result = NULL;
1238         uint32_t i, toggle;
1239
1240         /*
1241          * Interrupt transfers requiring several transactions are not supported
1242          * because bInterval is ignored.
1243          *
1244          * Also, ehci_submit_async() relies on wMaxPacketSize being a power of 2
1245          * <= PKT_ALIGN if several qTDs are required, while the USB
1246          * specification does not constrain this for interrupt transfers. That
1247          * means that ehci_submit_async() would support interrupt transfers
1248          * requiring several transactions only as long as the transfer size does
1249          * not require more than a single qTD.
1250          */
1251         if (elementsize > usb_maxpacket(dev, pipe)) {
1252                 printf("%s: xfers requiring several transactions are not supported.\n",
1253                        __func__);
1254                 return NULL;
1255         }
1256
1257         debug("Enter create_int_queue\n");
1258         if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
1259                 debug("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
1260                 return NULL;
1261         }
1262
1263         /* limit to 4 full pages worth of data -
1264          * we can safely fit them in a single TD,
1265          * no matter the alignment
1266          */
1267         if (elementsize >= 16384) {
1268                 debug("too large elements for interrupt transfers\n");
1269                 return NULL;
1270         }
1271
1272         result = malloc(sizeof(*result));
1273         if (!result) {
1274                 debug("ehci intr queue: out of memory\n");
1275                 goto fail1;
1276         }
1277         result->elementsize = elementsize;
1278         result->pipe = pipe;
1279         result->first = memalign(USB_DMA_MINALIGN,
1280                                  sizeof(struct QH) * queuesize);
1281         if (!result->first) {
1282                 debug("ehci intr queue: out of memory\n");
1283                 goto fail2;
1284         }
1285         result->current = result->first;
1286         result->last = result->first + queuesize - 1;
1287         result->tds = memalign(USB_DMA_MINALIGN,
1288                                sizeof(struct qTD) * queuesize);
1289         if (!result->tds) {
1290                 debug("ehci intr queue: out of memory\n");
1291                 goto fail3;
1292         }
1293         memset(result->first, 0, sizeof(struct QH) * queuesize);
1294         memset(result->tds, 0, sizeof(struct qTD) * queuesize);
1295
1296         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
1297
1298         for (i = 0; i < queuesize; i++) {
1299                 struct QH *qh = result->first + i;
1300                 struct qTD *td = result->tds + i;
1301                 void **buf = &qh->buffer;
1302
1303                 qh->qh_link = cpu_to_hc32((unsigned long)(qh+1) | QH_LINK_TYPE_QH);
1304                 if (i == queuesize - 1)
1305                         qh->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1306
1307                 qh->qh_overlay.qt_next = cpu_to_hc32((unsigned long)td);
1308                 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1309                 qh->qh_endpt1 =
1310                         cpu_to_hc32((0 << 28) | /* No NAK reload (ehci 4.9) */
1311                         (usb_maxpacket(dev, pipe) << 16) | /* MPS */
1312                         (1 << 14) |
1313                         QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
1314                         (usb_pipeendpoint(pipe) << 8) | /* Endpoint Number */
1315                         (usb_pipedevice(pipe) << 0));
1316                 qh->qh_endpt2 = cpu_to_hc32((1 << 30) | /* 1 Tx per mframe */
1317                         (1 << 0)); /* S-mask: microframe 0 */
1318                 if (dev->speed == USB_SPEED_LOW ||
1319                                 dev->speed == USB_SPEED_FULL) {
1320                         /* C-mask: microframes 2-4 */
1321                         qh->qh_endpt2 |= cpu_to_hc32((0x1c << 8));
1322                 }
1323                 ehci_update_endpt2_dev_n_port(dev, qh);
1324
1325                 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1326                 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1327                 debug("communication direction is '%s'\n",
1328                       usb_pipein(pipe) ? "in" : "out");
1329                 td->qt_token = cpu_to_hc32(
1330                         QT_TOKEN_DT(toggle) |
1331                         (elementsize << 16) |
1332                         ((usb_pipein(pipe) ? 1 : 0) << 8) | /* IN/OUT token */
1333                         0x80); /* active */
1334                 td->qt_buffer[0] =
1335                     cpu_to_hc32((unsigned long)buffer + i * elementsize);
1336                 td->qt_buffer[1] =
1337                     cpu_to_hc32((td->qt_buffer[0] + 0x1000) & ~0xfff);
1338                 td->qt_buffer[2] =
1339                     cpu_to_hc32((td->qt_buffer[0] + 0x2000) & ~0xfff);
1340                 td->qt_buffer[3] =
1341                     cpu_to_hc32((td->qt_buffer[0] + 0x3000) & ~0xfff);
1342                 td->qt_buffer[4] =
1343                     cpu_to_hc32((td->qt_buffer[0] + 0x4000) & ~0xfff);
1344
1345                 *buf = buffer + i * elementsize;
1346                 toggle ^= 1;
1347         }
1348
1349         flush_dcache_range((unsigned long)buffer,
1350                            ALIGN_END_ADDR(char, buffer,
1351                                           queuesize * elementsize));
1352         flush_dcache_range((unsigned long)result->first,
1353                            ALIGN_END_ADDR(struct QH, result->first,
1354                                           queuesize));
1355         flush_dcache_range((unsigned long)result->tds,
1356                            ALIGN_END_ADDR(struct qTD, result->tds,
1357                                           queuesize));
1358
1359         if (ctrl->periodic_schedules > 0) {
1360                 if (disable_periodic(ctrl) < 0) {
1361                         debug("FATAL: periodic should never fail, but did");
1362                         goto fail3;
1363                 }
1364         }
1365
1366         /* hook up to periodic list */
1367         struct QH *list = &ctrl->periodic_queue;
1368         result->last->qh_link = list->qh_link;
1369         list->qh_link = cpu_to_hc32((unsigned long)result->first | QH_LINK_TYPE_QH);
1370
1371         flush_dcache_range((unsigned long)result->last,
1372                            ALIGN_END_ADDR(struct QH, result->last, 1));
1373         flush_dcache_range((unsigned long)list,
1374                            ALIGN_END_ADDR(struct QH, list, 1));
1375
1376         if (enable_periodic(ctrl) < 0) {
1377                 debug("FATAL: periodic should never fail, but did");
1378                 goto fail3;
1379         }
1380         ctrl->periodic_schedules++;
1381
1382         debug("Exit create_int_queue\n");
1383         return result;
1384 fail3:
1385         if (result->tds)
1386                 free(result->tds);
1387 fail2:
1388         if (result->first)
1389                 free(result->first);
1390         if (result)
1391                 free(result);
1392 fail1:
1393         return NULL;
1394 }
1395
1396 static void *_ehci_poll_int_queue(struct usb_device *dev,
1397                                   struct int_queue *queue)
1398 {
1399         struct QH *cur = queue->current;
1400         struct qTD *cur_td;
1401         uint32_t token, toggle;
1402         unsigned long pipe = queue->pipe;
1403
1404         /* depleted queue */
1405         if (cur == NULL) {
1406                 debug("Exit poll_int_queue with completed queue\n");
1407                 return NULL;
1408         }
1409         /* still active */
1410         cur_td = &queue->tds[queue->current - queue->first];
1411         invalidate_dcache_range((unsigned long)cur_td,
1412                                 ALIGN_END_ADDR(struct qTD, cur_td, 1));
1413         token = hc32_to_cpu(cur_td->qt_token);
1414         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE) {
1415                 debug("Exit poll_int_queue with no completed intr transfer. token is %x\n", token);
1416                 return NULL;
1417         }
1418
1419         toggle = QT_TOKEN_GET_DT(token);
1420         usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), toggle);
1421
1422         if (!(cur->qh_link & QH_LINK_TERMINATE))
1423                 queue->current++;
1424         else
1425                 queue->current = NULL;
1426
1427         invalidate_dcache_range((unsigned long)cur->buffer,
1428                                 ALIGN_END_ADDR(char, cur->buffer,
1429                                                queue->elementsize));
1430
1431         debug("Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n",
1432               token, cur, queue->first);
1433         return cur->buffer;
1434 }
1435
1436 /* Do not free buffers associated with QHs, they're owned by someone else */
1437 static int _ehci_destroy_int_queue(struct usb_device *dev,
1438                                    struct int_queue *queue)
1439 {
1440         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1441         int result = -1;
1442         unsigned long timeout;
1443
1444         if (disable_periodic(ctrl) < 0) {
1445                 debug("FATAL: periodic should never fail, but did");
1446                 goto out;
1447         }
1448         ctrl->periodic_schedules--;
1449
1450         struct QH *cur = &ctrl->periodic_queue;
1451         timeout = get_timer(0) + 500; /* abort after 500ms */
1452         while (!(cur->qh_link & cpu_to_hc32(QH_LINK_TERMINATE))) {
1453                 debug("considering %p, with qh_link %x\n", cur, cur->qh_link);
1454                 if (NEXT_QH(cur) == queue->first) {
1455                         debug("found candidate. removing from chain\n");
1456                         cur->qh_link = queue->last->qh_link;
1457                         flush_dcache_range((unsigned long)cur,
1458                                            ALIGN_END_ADDR(struct QH, cur, 1));
1459                         result = 0;
1460                         break;
1461                 }
1462                 cur = NEXT_QH(cur);
1463                 if (get_timer(0) > timeout) {
1464                         printf("Timeout destroying interrupt endpoint queue\n");
1465                         result = -1;
1466                         goto out;
1467                 }
1468         }
1469
1470         if (ctrl->periodic_schedules > 0) {
1471                 result = enable_periodic(ctrl);
1472                 if (result < 0)
1473                         debug("FATAL: periodic should never fail, but did");
1474         }
1475
1476 out:
1477         free(queue->tds);
1478         free(queue->first);
1479         free(queue);
1480
1481         return result;
1482 }
1483
1484 static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe,
1485                                 void *buffer, int length, int interval)
1486 {
1487         void *backbuffer;
1488         struct int_queue *queue;
1489         unsigned long timeout;
1490         int result = 0, ret;
1491
1492         debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
1493               dev, pipe, buffer, length, interval);
1494
1495         queue = _ehci_create_int_queue(dev, pipe, 1, length, buffer, interval);
1496         if (!queue)
1497                 return -1;
1498
1499         timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
1500         while ((backbuffer = _ehci_poll_int_queue(dev, queue)) == NULL)
1501                 if (get_timer(0) > timeout) {
1502                         printf("Timeout poll on interrupt endpoint\n");
1503                         result = -ETIMEDOUT;
1504                         break;
1505                 }
1506
1507         if (backbuffer != buffer) {
1508                 debug("got wrong buffer back (%p instead of %p)\n",
1509                       backbuffer, buffer);
1510                 return -EINVAL;
1511         }
1512
1513         ret = _ehci_destroy_int_queue(dev, queue);
1514         if (ret < 0)
1515                 return ret;
1516
1517         /* everything worked out fine */
1518         return result;
1519 }
1520
1521 #ifndef CONFIG_DM_USB
1522 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1523                             void *buffer, int length)
1524 {
1525         return _ehci_submit_bulk_msg(dev, pipe, buffer, length);
1526 }
1527
1528 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1529                    int length, struct devrequest *setup)
1530 {
1531         return _ehci_submit_control_msg(dev, pipe, buffer, length, setup);
1532 }
1533
1534 int submit_int_msg(struct usb_device *dev, unsigned long pipe,
1535                    void *buffer, int length, int interval)
1536 {
1537         return _ehci_submit_int_msg(dev, pipe, buffer, length, interval);
1538 }
1539
1540 struct int_queue *create_int_queue(struct usb_device *dev,
1541                 unsigned long pipe, int queuesize, int elementsize,
1542                 void *buffer, int interval)
1543 {
1544         return _ehci_create_int_queue(dev, pipe, queuesize, elementsize,
1545                                       buffer, interval);
1546 }
1547
1548 void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1549 {
1550         return _ehci_poll_int_queue(dev, queue);
1551 }
1552
1553 int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1554 {
1555         return _ehci_destroy_int_queue(dev, queue);
1556 }
1557 #endif
1558
1559 #ifdef CONFIG_DM_USB
1560 static int ehci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
1561                                    unsigned long pipe, void *buffer, int length,
1562                                    struct devrequest *setup)
1563 {
1564         debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
1565               dev->name, udev, udev->dev->name, udev->portnr);
1566
1567         return _ehci_submit_control_msg(udev, pipe, buffer, length, setup);
1568 }
1569
1570 static int ehci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
1571                                 unsigned long pipe, void *buffer, int length)
1572 {
1573         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1574         return _ehci_submit_bulk_msg(udev, pipe, buffer, length);
1575 }
1576
1577 static int ehci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
1578                                unsigned long pipe, void *buffer, int length,
1579                                int interval)
1580 {
1581         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1582         return _ehci_submit_int_msg(udev, pipe, buffer, length, interval);
1583 }
1584
1585 static struct int_queue *ehci_create_int_queue(struct udevice *dev,
1586                 struct usb_device *udev, unsigned long pipe, int queuesize,
1587                 int elementsize, void *buffer, int interval)
1588 {
1589         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1590         return _ehci_create_int_queue(udev, pipe, queuesize, elementsize,
1591                                       buffer, interval);
1592 }
1593
1594 static void *ehci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
1595                                  struct int_queue *queue)
1596 {
1597         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1598         return _ehci_poll_int_queue(udev, queue);
1599 }
1600
1601 static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
1602                                   struct int_queue *queue)
1603 {
1604         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1605         return _ehci_destroy_int_queue(udev, queue);
1606 }
1607
1608 static int ehci_get_max_xfer_size(struct udevice *dev, size_t *size)
1609 {
1610         /*
1611          * EHCD can handle any transfer length as long as there is enough
1612          * free heap space left, hence set the theoretical max number here.
1613          */
1614         *size = SIZE_MAX;
1615
1616         return 0;
1617 }
1618
1619 int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
1620                   struct ehci_hcor *hcor, const struct ehci_ops *ops,
1621                   uint tweaks, enum usb_init_type init)
1622 {
1623         struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
1624         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1625         int ret = -1;
1626
1627         debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__,
1628               dev->name, ctrl, hccr, hcor, init);
1629
1630         if (!ctrl || !hccr || !hcor)
1631                 goto err;
1632
1633         priv->desc_before_addr = true;
1634
1635         ehci_setup_ops(ctrl, ops);
1636         ctrl->hccr = hccr;
1637         ctrl->hcor = hcor;
1638         ctrl->priv = ctrl;
1639
1640         ctrl->init = init;
1641         if (ctrl->init == USB_INIT_DEVICE)
1642                 goto done;
1643
1644         ret = ehci_reset(ctrl);
1645         if (ret)
1646                 goto err;
1647
1648         if (ctrl->ops.init_after_reset) {
1649                 ret = ctrl->ops.init_after_reset(ctrl);
1650                 if (ret)
1651                         goto err;
1652         }
1653
1654         ret = ehci_common_init(ctrl, tweaks);
1655         if (ret)
1656                 goto err;
1657 done:
1658         return 0;
1659 err:
1660         free(ctrl);
1661         debug("%s: failed, ret=%d\n", __func__, ret);
1662         return ret;
1663 }
1664
1665 int ehci_deregister(struct udevice *dev)
1666 {
1667         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1668
1669         if (ctrl->init == USB_INIT_DEVICE)
1670                 return 0;
1671
1672         ehci_shutdown(ctrl);
1673
1674         return 0;
1675 }
1676
1677 struct dm_usb_ops ehci_usb_ops = {
1678         .control = ehci_submit_control_msg,
1679         .bulk = ehci_submit_bulk_msg,
1680         .interrupt = ehci_submit_int_msg,
1681         .create_int_queue = ehci_create_int_queue,
1682         .poll_int_queue = ehci_poll_int_queue,
1683         .destroy_int_queue = ehci_destroy_int_queue,
1684         .get_max_xfer_size  = ehci_get_max_xfer_size,
1685 };
1686
1687 #endif
1688
1689 #ifdef CONFIG_PHY
1690 int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1691 {
1692         int ret;
1693
1694         if (!phy)
1695                 return 0;
1696
1697         ret = generic_phy_get_by_index(dev, index, phy);
1698         if (ret) {
1699                 if (ret != -ENOENT) {
1700                         dev_err(dev, "failed to get usb phy\n");
1701                         return ret;
1702                 }
1703         } else {
1704                 ret = generic_phy_init(phy);
1705                 if (ret) {
1706                         dev_err(dev, "failed to init usb phy\n");
1707                         return ret;
1708                 }
1709
1710                 ret = generic_phy_power_on(phy);
1711                 if (ret) {
1712                         dev_err(dev, "failed to power on usb phy\n");
1713                         return generic_phy_exit(phy);
1714                 }
1715         }
1716
1717         return 0;
1718 }
1719
1720 int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1721 {
1722         int ret = 0;
1723
1724         if (!phy)
1725                 return 0;
1726
1727         if (generic_phy_valid(phy)) {
1728                 ret = generic_phy_power_off(phy);
1729                 if (ret) {
1730                         dev_err(dev, "failed to power off usb phy\n");
1731                         return ret;
1732                 }
1733
1734                 ret = generic_phy_exit(phy);
1735                 if (ret) {
1736                         dev_err(dev, "failed to power off usb phy\n");
1737                         return ret;
1738                 }
1739         }
1740
1741         return 0;
1742 }
1743 #else
1744 int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1745 {
1746         return 0;
1747 }
1748
1749 int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1750 {
1751         return 0;
1752 }
1753 #endif