drivers/usb/host/ehci-hcd.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*-
   3  * Copyright (c) 2007-2008, Juniper Networks, Inc.
   4  * Copyright (c) 2008, Excito Elektronik i Skåne AB
   5  * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
   6  *
   7  * All rights reserved.
   8  */
   9 #include <common.h>
  10 #include <cpu_func.h>
  11 #include <dm.h>
  12 #include <errno.h>
  13 #include <asm/byteorder.h>
  14 #include <asm/unaligned.h>
  15 #include <usb.h>
  16 #include <asm/io.h>
  17 #include <malloc.h>
  18 #include <memalign.h>
  19 #include <watchdog.h>
  20 #include <dm/device_compat.h>
  21 #include <linux/compiler.h>
  22
  23 #include "ehci.h"
  24
  25 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
  26 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
  27 #endif
  28
  29 /*
  30  * EHCI spec page 20 says that the HC may take up to 16 uFrames (= 4ms) to halt.
  31  * Let's time out after 8 to have a little safety margin on top of that.
  32  */
  33 #define HCHALT_TIMEOUT (8 * 1000)
  34
  35 #if !CONFIG_IS_ENABLED(DM_USB)
  36 static struct ehci_ctrl ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
  37 #endif
  38
  39 #define ALIGN_END_ADDR(type, ptr, size)                 \
  40         ((unsigned long)(ptr) + roundup((size) * sizeof(type), USB_DMA_MINALIGN))
  41
  42 static struct descriptor {
  43         struct usb_hub_descriptor hub;
  44         struct usb_device_descriptor device;
  45         struct usb_linux_config_descriptor config;
  46         struct usb_linux_interface_descriptor interface;
  47         struct usb_endpoint_descriptor endpoint;
  48 }  __attribute__ ((packed)) descriptor = {
  49         {
  50                 0x8,            /* bDescLength */
  51                 0x29,           /* bDescriptorType: hub descriptor */
  52                 2,              /* bNrPorts -- runtime modified */
  53                 0,              /* wHubCharacteristics */
  54                 10,             /* bPwrOn2PwrGood */
  55                 0,              /* bHubCntrCurrent */
  56                 {               /* Device removable */
  57                 }               /* at most 7 ports! XXX */
  58         },
  59         {
  60                 0x12,           /* bLength */
  61                 1,              /* bDescriptorType: UDESC_DEVICE */
  62                 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
  63                 9,              /* bDeviceClass: UDCLASS_HUB */
  64                 0,              /* bDeviceSubClass: UDSUBCLASS_HUB */
  65                 1,              /* bDeviceProtocol: UDPROTO_HSHUBSTT */
  66                 64,             /* bMaxPacketSize: 64 bytes */
  67                 0x0000,         /* idVendor */
  68                 0x0000,         /* idProduct */
  69                 cpu_to_le16(0x0100), /* bcdDevice */
  70                 1,              /* iManufacturer */
  71                 2,              /* iProduct */
  72                 0,              /* iSerialNumber */
  73                 1               /* bNumConfigurations: 1 */
  74         },
  75         {
  76                 0x9,
  77                 2,              /* bDescriptorType: UDESC_CONFIG */
  78                 cpu_to_le16(0x19),
  79                 1,              /* bNumInterface */
  80                 1,              /* bConfigurationValue */
  81                 0,              /* iConfiguration */
  82                 0x40,           /* bmAttributes: UC_SELF_POWER */
  83                 0               /* bMaxPower */
  84         },
  85         {
  86                 0x9,            /* bLength */
  87                 4,              /* bDescriptorType: UDESC_INTERFACE */
  88                 0,              /* bInterfaceNumber */
  89                 0,              /* bAlternateSetting */
  90                 1,              /* bNumEndpoints */
  91                 9,              /* bInterfaceClass: UICLASS_HUB */
  92                 0,              /* bInterfaceSubClass: UISUBCLASS_HUB */
  93                 0,              /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
  94                 0               /* iInterface */
  95         },
  96         {
  97                 0x7,            /* bLength */
  98                 5,              /* bDescriptorType: UDESC_ENDPOINT */
  99                 0x81,           /* bEndpointAddress:
 100                                  * UE_DIR_IN | EHCI_INTR_ENDPT
 101                                  */
 102                 3,              /* bmAttributes: UE_INTERRUPT */
 103                 8,              /* wMaxPacketSize */
 104                 255             /* bInterval */
 105         },
 106 };
 107
 108 #if defined(CONFIG_EHCI_IS_TDI)
 109 #define ehci_is_TDI()   (1)
 110 #else
 111 #define ehci_is_TDI()   (0)
 112 #endif
 113
 114 static struct ehci_ctrl *ehci_get_ctrl(struct usb_device *udev)
 115 {
 116 #if CONFIG_IS_ENABLED(DM_USB)
 117         return dev_get_priv(usb_get_bus(udev->dev));
 118 #else
 119         return udev->controller;
 120 #endif
 121 }
 122
 123 static int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
 124 {
 125         return PORTSC_PSPD(reg);
 126 }
 127
 128 static void ehci_set_usbmode(struct ehci_ctrl *ctrl)
 129 {
 130         uint32_t tmp;
 131         uint32_t *reg_ptr;
 132
 133         reg_ptr = (uint32_t *)((u8 *)&ctrl->hcor->or_usbcmd + USBMODE);
 134         tmp = ehci_readl(reg_ptr);
 135         tmp |= USBMODE_CM_HC;
 136 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
 137         tmp |= USBMODE_BE;
 138 #else
 139         tmp &= ~USBMODE_BE;
 140 #endif
 141         ehci_writel(reg_ptr, tmp);
 142 }
 143
 144 static void ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,
 145                                uint32_t *reg)
 146 {
 147         mdelay(50);
 148 }
 149
 150 static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)
 151 {
 152         int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 153
 154         if (port < 0 || port >= max_ports) {
 155                 /* Printing the message would cause a scan failure! */
 156                 debug("The request port(%u) exceeds maximum port number\n",
 157                       port);
 158                 return NULL;
 159         }
 160
 161         return (uint32_t *)&ctrl->hcor->or_portsc[port];
 162 }
 163
 164 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
 165 {
 166         uint32_t result;
 167         do {
 168                 result = ehci_readl(ptr);
 169                 udelay(5);
 170                 if (result == ~(uint32_t)0)
 171                         return -1;
 172                 result &= mask;
 173                 if (result == done)
 174                         return 0;
 175                 usec--;
 176         } while (usec > 0);
 177         return -1;
 178 }
 179
 180 static int ehci_reset(struct ehci_ctrl *ctrl)
 181 {
 182         uint32_t cmd;
 183         int ret = 0;
 184
 185         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 186         cmd = (cmd & ~CMD_RUN) | CMD_RESET;
 187         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 188         ret = handshake((uint32_t *)&ctrl->hcor->or_usbcmd,
 189                         CMD_RESET, 0, 250 * 1000);
 190         if (ret < 0) {
 191                 printf("EHCI fail to reset\n");
 192                 goto out;
 193         }
 194
 195         if (ehci_is_TDI())
 196                 ctrl->ops.set_usb_mode(ctrl);
 197
 198 #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
 199         cmd = ehci_readl(&ctrl->hcor->or_txfilltuning);
 200         cmd &= ~TXFIFO_THRESH_MASK;
 201         cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
 202         ehci_writel(&ctrl->hcor->or_txfilltuning, cmd);
 203 #endif
 204 out:
 205         return ret;
 206 }
 207
 208 static int ehci_shutdown(struct ehci_ctrl *ctrl)
 209 {
 210         int i, ret = 0;
 211         uint32_t cmd, reg;
 212         int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 213
 214         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 215         /* If not run, directly return */
 216         if (!(cmd & CMD_RUN))
 217                 return 0;
 218         cmd &= ~(CMD_PSE | CMD_ASE);
 219         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 220         ret = handshake(&ctrl->hcor->or_usbsts, STS_ASS | STS_PSS, 0,
 221                 100 * 1000);
 222
 223         if (!ret) {
 224                 for (i = 0; i < max_ports; i++) {
 225                         reg = ehci_readl(&ctrl->hcor->or_portsc[i]);
 226                         reg |= EHCI_PS_SUSP;
 227                         ehci_writel(&ctrl->hcor->or_portsc[i], reg);
 228                 }
 229
 230                 cmd &= ~CMD_RUN;
 231                 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 232                 ret = handshake(&ctrl->hcor->or_usbsts, STS_HALT, STS_HALT,
 233                         HCHALT_TIMEOUT);
 234         }
 235
 236         if (ret)
 237                 puts("EHCI failed to shut down host controller.\n");
 238
 239         return ret;
 240 }
 241
 242 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
 243 {
 244         uint32_t delta, next;
 245         unsigned long addr = (unsigned long)buf;
 246         int idx;
 247
 248         if (addr != ALIGN(addr, ARCH_DMA_MINALIGN))
 249                 debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
 250
 251         flush_dcache_range(addr, ALIGN(addr + sz, ARCH_DMA_MINALIGN));
 252
 253         idx = 0;
 254         while (idx < QT_BUFFER_CNT) {
 255                 td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr));
 256                 td->qt_buffer_hi[idx] = 0;
 257                 next = (addr + EHCI_PAGE_SIZE) & ~(EHCI_PAGE_SIZE - 1);
 258                 delta = next - addr;
 259                 if (delta >= sz)
 260                         break;
 261                 sz -= delta;
 262                 addr = next;
 263                 idx++;
 264         }
 265
 266         if (idx == QT_BUFFER_CNT) {
 267                 printf("out of buffer pointers (%zu bytes left)\n", sz);
 268                 return -1;
 269         }
 270
 271         return 0;
 272 }
 273
 274 static inline u8 ehci_encode_speed(enum usb_device_speed speed)
 275 {
 276         #define QH_HIGH_SPEED   2
 277         #define QH_FULL_SPEED   0
 278         #define QH_LOW_SPEED    1
 279         if (speed == USB_SPEED_HIGH)
 280                 return QH_HIGH_SPEED;
 281         if (speed == USB_SPEED_LOW)
 282                 return QH_LOW_SPEED;
 283         return QH_FULL_SPEED;
 284 }
 285
 286 static void ehci_update_endpt2_dev_n_port(struct usb_device *udev,
 287                                           struct QH *qh)
 288 {
 289         uint8_t portnr = 0;
 290         uint8_t hubaddr = 0;
 291
 292         if (udev->speed != USB_SPEED_LOW && udev->speed != USB_SPEED_FULL)
 293                 return;
 294
 295         usb_find_usb2_hub_address_port(udev, &hubaddr, &portnr);
 296
 297         qh->qh_endpt2 |= cpu_to_hc32(QH_ENDPT2_PORTNUM(portnr) |
 298                                      QH_ENDPT2_HUBADDR(hubaddr));
 299 }
 300
 301 static int ehci_enable_async(struct ehci_ctrl *ctrl)
 302 {
 303         u32 cmd;
 304         int ret;
 305
 306         /* Enable async. schedule. */
 307         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 308         if (cmd & CMD_ASE)
 309                 return 0;
 310
 311         cmd |= CMD_ASE;
 312         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 313
 314         ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, STS_ASS,
 315                         100 * 1000);
 316         if (ret < 0)
 317                 printf("EHCI fail timeout STS_ASS set\n");
 318
 319         return ret;
 320 }
 321
 322 static int ehci_disable_async(struct ehci_ctrl *ctrl)
 323 {
 324         u32 cmd;
 325         int ret;
 326
 327         if (ctrl->async_locked)
 328                 return 0;
 329
 330         /* Disable async schedule. */
 331         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 332         if (!(cmd & CMD_ASE))
 333                 return 0;
 334
 335         cmd &= ~CMD_ASE;
 336         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 337
 338         ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, 0,
 339                         100 * 1000);
 340         if (ret < 0)
 341                 printf("EHCI fail timeout STS_ASS reset\n");
 342
 343         return ret;
 344 }
 345
 346 static int
 347 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 348                    int length, struct devrequest *req)
 349 {
 350         ALLOC_ALIGN_BUFFER(struct QH, qh, 1, USB_DMA_MINALIGN);
 351         struct qTD *qtd;
 352         int qtd_count = 0;
 353         int qtd_counter = 0;
 354         volatile struct qTD *vtd;
 355         unsigned long ts;
 356         uint32_t *tdp;
 357         uint32_t endpt, maxpacket, token, usbsts, qhtoken;
 358         uint32_t c, toggle;
 359         int timeout;
 360         int ret = 0;
 361         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
 362
 363         debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
 364               buffer, length, req);
 365         if (req != NULL)
 366                 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
 367                       req->request, req->request,
 368                       req->requesttype, req->requesttype,
 369                       le16_to_cpu(req->value), le16_to_cpu(req->value),
 370                       le16_to_cpu(req->index));
 371
 372 #define PKT_ALIGN       512
 373         /*
 374          * The USB transfer is split into qTD transfers. Eeach qTD transfer is
 375          * described by a transfer descriptor (the qTD). The qTDs form a linked
 376          * list with a queue head (QH).
 377          *
 378          * Each qTD transfer starts with a new USB packet, i.e. a packet cannot
 379          * have its beginning in a qTD transfer and its end in the following
 380          * one, so the qTD transfer lengths have to be chosen accordingly.
 381          *
 382          * Each qTD transfer uses up to QT_BUFFER_CNT data buffers, mapped to
 383          * single pages. The first data buffer can start at any offset within a
 384          * page (not considering the cache-line alignment issues), while the
 385          * following buffers must be page-aligned. There is no alignment
 386          * constraint on the size of a qTD transfer.
 387          */
 388         if (req != NULL)
 389                 /* 1 qTD will be needed for SETUP, and 1 for ACK. */
 390                 qtd_count += 1 + 1;
 391         if (length > 0 || req == NULL) {
 392                 /*
 393                  * Determine the qTD transfer size that will be used for the
 394                  * data payload (not considering the first qTD transfer, which
 395                  * may be longer or shorter, and the final one, which may be
 396                  * shorter).
 397                  *
 398                  * In order to keep each packet within a qTD transfer, the qTD
 399                  * transfer size is aligned to PKT_ALIGN, which is a multiple of
 400                  * wMaxPacketSize (except in some cases for interrupt transfers,
 401                  * see comment in submit_int_msg()).
 402                  *
 403                  * By default, i.e. if the input buffer is aligned to PKT_ALIGN,
 404                  * QT_BUFFER_CNT full pages will be used.
 405                  */
 406                 int xfr_sz = QT_BUFFER_CNT;
 407                 /*
 408                  * However, if the input buffer is not aligned to PKT_ALIGN, the
 409                  * qTD transfer size will be one page shorter, and the first qTD
 410                  * data buffer of each transfer will be page-unaligned.
 411                  */
 412                 if ((unsigned long)buffer & (PKT_ALIGN - 1))
 413                         xfr_sz--;
 414                 /* Convert the qTD transfer size to bytes. */
 415                 xfr_sz *= EHCI_PAGE_SIZE;
 416                 /*
 417                  * Approximate by excess the number of qTDs that will be
 418                  * required for the data payload. The exact formula is way more
 419                  * complicated and saves at most 2 qTDs, i.e. a total of 128
 420                  * bytes.
 421                  */
 422                 qtd_count += 2 + length / xfr_sz;
 423         }
 424 /*
 425  * Threshold value based on the worst-case total size of the allocated qTDs for
 426  * a mass-storage transfer of 65535 blocks of 512 bytes.
 427  */
 428 #if CONFIG_SYS_MALLOC_LEN <= 64 + 128 * 1024
 429 #warning CONFIG_SYS_MALLOC_LEN may be too small for EHCI
 430 #endif
 431         qtd = memalign(USB_DMA_MINALIGN, qtd_count * sizeof(struct qTD));
 432         if (qtd == NULL) {
 433                 printf("unable to allocate TDs\n");
 434                 return -1;
 435         }
 436
 437         memset(qh, 0, sizeof(struct QH));
 438         memset(qtd, 0, qtd_count * sizeof(*qtd));
 439
 440         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
 441
 442         /*
 443          * Setup QH (3.6 in ehci-r10.pdf)
 444          *
 445          *   qh_link ................. 03-00 H
 446          *   qh_endpt1 ............... 07-04 H
 447          *   qh_endpt2 ............... 0B-08 H
 448          * - qh_curtd
 449          *   qh_overlay.qt_next ...... 13-10 H
 450          * - qh_overlay.qt_altnext
 451          */
 452         qh->qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
 453         c = (dev->speed != USB_SPEED_HIGH) && !usb_pipeendpoint(pipe);
 454         maxpacket = usb_maxpacket(dev, pipe);
 455         endpt = QH_ENDPT1_RL(8) | QH_ENDPT1_C(c) |
 456                 QH_ENDPT1_MAXPKTLEN(maxpacket) | QH_ENDPT1_H(0) |
 457                 QH_ENDPT1_DTC(QH_ENDPT1_DTC_DT_FROM_QTD) |
 458                 QH_ENDPT1_ENDPT(usb_pipeendpoint(pipe)) | QH_ENDPT1_I(0) |
 459                 QH_ENDPT1_DEVADDR(usb_pipedevice(pipe));
 460
 461         /* Force FS for fsl HS quirk */
 462         if (!ctrl->has_fsl_erratum_a005275)
 463                 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(dev->speed));
 464         else
 465                 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(QH_FULL_SPEED));
 466
 467         qh->qh_endpt1 = cpu_to_hc32(endpt);
 468         endpt = QH_ENDPT2_MULT(1) | QH_ENDPT2_UFCMASK(0) | QH_ENDPT2_UFSMASK(0);
 469         qh->qh_endpt2 = cpu_to_hc32(endpt);
 470         ehci_update_endpt2_dev_n_port(dev, qh);
 471         qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 472         qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 473
 474         tdp = &qh->qh_overlay.qt_next;
 475         if (req != NULL) {
 476                 /*
 477                  * Setup request qTD (3.5 in ehci-r10.pdf)
 478                  *
 479                  *   qt_next ................ 03-00 H
 480                  *   qt_altnext ............. 07-04 H
 481                  *   qt_token ............... 0B-08 H
 482                  *
 483                  *   [ buffer, buffer_hi ] loaded with "req".
 484                  */
 485                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 486                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 487                 token = QT_TOKEN_DT(0) | QT_TOKEN_TOTALBYTES(sizeof(*req)) |
 488                         QT_TOKEN_IOC(0) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
 489                         QT_TOKEN_PID(QT_TOKEN_PID_SETUP) |
 490                         QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 491                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 492                 if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req))) {
 493                         printf("unable to construct SETUP TD\n");
 494                         goto fail;
 495                 }
 496                 /* Update previous qTD! */
 497                 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 498                 tdp = &qtd[qtd_counter++].qt_next;
 499                 toggle = 1;
 500         }
 501
 502         if (length > 0 || req == NULL) {
 503                 uint8_t *buf_ptr = buffer;
 504                 int left_length = length;
 505
 506                 do {
 507                         /*
 508                          * Determine the size of this qTD transfer. By default,
 509                          * QT_BUFFER_CNT full pages can be used.
 510                          */
 511                         int xfr_bytes = QT_BUFFER_CNT * EHCI_PAGE_SIZE;
 512                         /*
 513                          * However, if the input buffer is not page-aligned, the
 514                          * portion of the first page before the buffer start
 515                          * offset within that page is unusable.
 516                          */
 517                         xfr_bytes -= (unsigned long)buf_ptr & (EHCI_PAGE_SIZE - 1);
 518                         /*
 519                          * In order to keep each packet within a qTD transfer,
 520                          * align the qTD transfer size to PKT_ALIGN.
 521                          */
 522                         xfr_bytes &= ~(PKT_ALIGN - 1);
 523                         /*
 524                          * This transfer may be shorter than the available qTD
 525                          * transfer size that has just been computed.
 526                          */
 527                         xfr_bytes = min(xfr_bytes, left_length);
 528
 529                         /*
 530                          * Setup request qTD (3.5 in ehci-r10.pdf)
 531                          *
 532                          *   qt_next ................ 03-00 H
 533                          *   qt_altnext ............. 07-04 H
 534                          *   qt_token ............... 0B-08 H
 535                          *
 536                          *   [ buffer, buffer_hi ] loaded with "buffer".
 537                          */
 538                         qtd[qtd_counter].qt_next =
 539                                         cpu_to_hc32(QT_NEXT_TERMINATE);
 540                         qtd[qtd_counter].qt_altnext =
 541                                         cpu_to_hc32(QT_NEXT_TERMINATE);
 542                         token = QT_TOKEN_DT(toggle) |
 543                                 QT_TOKEN_TOTALBYTES(xfr_bytes) |
 544                                 QT_TOKEN_IOC(req == NULL) | QT_TOKEN_CPAGE(0) |
 545                                 QT_TOKEN_CERR(3) |
 546                                 QT_TOKEN_PID(usb_pipein(pipe) ?
 547                                         QT_TOKEN_PID_IN : QT_TOKEN_PID_OUT) |
 548                                 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 549                         qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 550                         if (ehci_td_buffer(&qtd[qtd_counter], buf_ptr,
 551                                                 xfr_bytes)) {
 552                                 printf("unable to construct DATA TD\n");
 553                                 goto fail;
 554                         }
 555                         /* Update previous qTD! */
 556                         *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 557                         tdp = &qtd[qtd_counter++].qt_next;
 558                         /*
 559                          * Data toggle has to be adjusted since the qTD transfer
 560                          * size is not always an even multiple of
 561                          * wMaxPacketSize.
 562                          */
 563                         if ((xfr_bytes / maxpacket) & 1)
 564                                 toggle ^= 1;
 565                         buf_ptr += xfr_bytes;
 566                         left_length -= xfr_bytes;
 567                 } while (left_length > 0);
 568         }
 569
 570         if (req != NULL) {
 571                 /*
 572                  * Setup request qTD (3.5 in ehci-r10.pdf)
 573                  *
 574                  *   qt_next ................ 03-00 H
 575                  *   qt_altnext ............. 07-04 H
 576                  *   qt_token ............... 0B-08 H
 577                  */
 578                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 579                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 580                 token = QT_TOKEN_DT(1) | QT_TOKEN_TOTALBYTES(0) |
 581                         QT_TOKEN_IOC(1) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
 582                         QT_TOKEN_PID(usb_pipein(pipe) ?
 583                                 QT_TOKEN_PID_OUT : QT_TOKEN_PID_IN) |
 584                         QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 585                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 586                 /* Update previous qTD! */
 587                 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 588                 tdp = &qtd[qtd_counter++].qt_next;
 589         }
 590
 591         ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(qh) | QH_LINK_TYPE_QH);
 592
 593         /* Flush dcache */
 594         flush_dcache_range((unsigned long)&ctrl->qh_list,
 595                 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 596         flush_dcache_range((unsigned long)qh, ALIGN_END_ADDR(struct QH, qh, 1));
 597         flush_dcache_range((unsigned long)qtd,
 598                            ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 599
 600         usbsts = ehci_readl(&ctrl->hcor->or_usbsts);
 601         ehci_writel(&ctrl->hcor->or_usbsts, (usbsts & 0x3f));
 602
 603         ret = ehci_enable_async(ctrl);
 604         if (ret)
 605                 goto fail;
 606
 607         /* Wait for TDs to be processed. */
 608         ts = get_timer(0);
 609         vtd = &qtd[qtd_counter - 1];
 610         timeout = USB_TIMEOUT_MS(pipe);
 611         do {
 612                 /* Invalidate dcache */
 613                 invalidate_dcache_range((unsigned long)&ctrl->qh_list,
 614                         ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 615                 invalidate_dcache_range((unsigned long)qh,
 616                         ALIGN_END_ADDR(struct QH, qh, 1));
 617                 invalidate_dcache_range((unsigned long)qtd,
 618                         ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 619
 620                 token = hc32_to_cpu(vtd->qt_token);
 621                 if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE))
 622                         break;
 623                 WATCHDOG_RESET();
 624         } while (get_timer(ts) < timeout);
 625         qhtoken = hc32_to_cpu(qh->qh_overlay.qt_token);
 626
 627         ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
 628         flush_dcache_range((unsigned long)&ctrl->qh_list,
 629                 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 630
 631         /*
 632          * Invalidate the memory area occupied by buffer
 633          * Don't try to fix the buffer alignment, if it isn't properly
 634          * aligned it's upper layer's fault so let invalidate_dcache_range()
 635          * vow about it. But we have to fix the length as it's actual
 636          * transfer length and can be unaligned. This is potentially
 637          * dangerous operation, it's responsibility of the calling
 638          * code to make sure enough space is reserved.
 639          */
 640         if (buffer != NULL && length > 0)
 641                 invalidate_dcache_range((unsigned long)buffer,
 642                         ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN));
 643
 644         /* Check that the TD processing happened */
 645         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)
 646                 printf("EHCI timed out on TD - token=%#x\n", token);
 647
 648         ret = ehci_disable_async(ctrl);
 649         if (ret)
 650                 goto fail;
 651
 652         if (!(QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_ACTIVE)) {
 653                 debug("TOKEN=%#x\n", qhtoken);
 654                 switch (QT_TOKEN_GET_STATUS(qhtoken) &
 655                         ~(QT_TOKEN_STATUS_SPLITXSTATE | QT_TOKEN_STATUS_PERR)) {
 656                 case 0:
 657                         toggle = QT_TOKEN_GET_DT(qhtoken);
 658                         usb_settoggle(dev, usb_pipeendpoint(pipe),
 659                                        usb_pipeout(pipe), toggle);
 660                         dev->status = 0;
 661                         break;
 662                 case QT_TOKEN_STATUS_HALTED:
 663                         dev->status = USB_ST_STALLED;
 664                         break;
 665                 case QT_TOKEN_STATUS_ACTIVE | QT_TOKEN_STATUS_DATBUFERR:
 666                 case QT_TOKEN_STATUS_DATBUFERR:
 667                         dev->status = USB_ST_BUF_ERR;
 668                         break;
 669                 case QT_TOKEN_STATUS_HALTED | QT_TOKEN_STATUS_BABBLEDET:
 670                 case QT_TOKEN_STATUS_BABBLEDET:
 671                         dev->status = USB_ST_BABBLE_DET;
 672                         break;
 673                 default:
 674                         dev->status = USB_ST_CRC_ERR;
 675                         if (QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_HALTED)
 676                                 dev->status |= USB_ST_STALLED;
 677                         break;
 678                 }
 679                 dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(qhtoken);
 680         } else {
 681                 dev->act_len = 0;
 682 #ifndef CONFIG_USB_EHCI_FARADAY
 683                 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
 684                       dev->devnum, ehci_readl(&ctrl->hcor->or_usbsts),
 685                       ehci_readl(&ctrl->hcor->or_portsc[0]),
 686                       ehci_readl(&ctrl->hcor->or_portsc[1]));
 687 #endif
 688         }
 689
 690         free(qtd);
 691         return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
 692
 693 fail:
 694         free(qtd);
 695         return -1;
 696 }
 697
 698 static int ehci_submit_root(struct usb_device *dev, unsigned long pipe,
 699                             void *buffer, int length, struct devrequest *req)
 700 {
 701         uint8_t tmpbuf[4];
 702         u16 typeReq;
 703         void *srcptr = NULL;
 704         int len, srclen;
 705         uint32_t reg;
 706         uint32_t *status_reg;
 707         int port = le16_to_cpu(req->index) & 0xff;
 708         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
 709
 710         srclen = 0;
 711
 712         debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
 713               req->request, req->request,
 714               req->requesttype, req->requesttype,
 715               le16_to_cpu(req->value), le16_to_cpu(req->index));
 716
 717         typeReq = req->request | req->requesttype << 8;
 718
 719         switch (typeReq) {
 720         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 721         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 722         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 723                 status_reg = ctrl->ops.get_portsc_register(ctrl, port - 1);
 724                 if (!status_reg)
 725                         return -1;
 726                 break;
 727         default:
 728                 status_reg = NULL;
 729                 break;
 730         }
 731
 732         switch (typeReq) {
 733         case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
 734                 switch (le16_to_cpu(req->value) >> 8) {
 735                 case USB_DT_DEVICE:
 736                         debug("USB_DT_DEVICE request\n");
 737                         srcptr = &descriptor.device;
 738                         srclen = descriptor.device.bLength;
 739                         break;
 740                 case USB_DT_CONFIG:
 741                         debug("USB_DT_CONFIG config\n");
 742                         srcptr = &descriptor.config;
 743                         srclen = descriptor.config.bLength +
 744                                         descriptor.interface.bLength +
 745                                         descriptor.endpoint.bLength;
 746                         break;
 747                 case USB_DT_STRING:
 748                         debug("USB_DT_STRING config\n");
 749                         switch (le16_to_cpu(req->value) & 0xff) {
 750                         case 0: /* Language */
 751                                 srcptr = "\4\3\1\0";
 752                                 srclen = 4;
 753                                 break;
 754                         case 1: /* Vendor */
 755                                 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
 756                                 srclen = 14;
 757                                 break;
 758                         case 2: /* Product */
 759                                 srcptr = "\52\3E\0H\0C\0I\0 "
 760                                          "\0H\0o\0s\0t\0 "
 761                                          "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
 762                                 srclen = 42;
 763                                 break;
 764                         default:
 765                                 debug("unknown value DT_STRING %x\n",
 766                                         le16_to_cpu(req->value));
 767                                 goto unknown;
 768                         }
 769                         break;
 770                 default:
 771                         debug("unknown value %x\n", le16_to_cpu(req->value));
 772                         goto unknown;
 773                 }
 774                 break;
 775         case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
 776                 switch (le16_to_cpu(req->value) >> 8) {
 777                 case USB_DT_HUB:
 778                         debug("USB_DT_HUB config\n");
 779                         srcptr = &descriptor.hub;
 780                         srclen = descriptor.hub.bLength;
 781                         break;
 782                 default:
 783                         debug("unknown value %x\n", le16_to_cpu(req->value));
 784                         goto unknown;
 785                 }
 786                 break;
 787         case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
 788                 debug("USB_REQ_SET_ADDRESS\n");
 789                 ctrl->rootdev = le16_to_cpu(req->value);
 790                 break;
 791         case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
 792                 debug("USB_REQ_SET_CONFIGURATION\n");
 793                 /* Nothing to do */
 794                 break;
 795         case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
 796                 tmpbuf[0] = 1;  /* USB_STATUS_SELFPOWERED */
 797                 tmpbuf[1] = 0;
 798                 srcptr = tmpbuf;
 799                 srclen = 2;
 800                 break;
 801         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 802                 memset(tmpbuf, 0, 4);
 803                 reg = ehci_readl(status_reg);
 804                 if (reg & EHCI_PS_CS)
 805                         tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
 806                 if (reg & EHCI_PS_PE)
 807                         tmpbuf[0] |= USB_PORT_STAT_ENABLE;
 808                 if (reg & EHCI_PS_SUSP)
 809                         tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
 810                 if (reg & EHCI_PS_OCA)
 811                         tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
 812                 if (reg & EHCI_PS_PR)
 813                         tmpbuf[0] |= USB_PORT_STAT_RESET;
 814                 if (reg & EHCI_PS_PP)
 815                         tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
 816
 817                 if (ehci_is_TDI()) {
 818                         switch (ctrl->ops.get_port_speed(ctrl, reg)) {
 819                         case PORTSC_PSPD_FS:
 820                                 break;
 821                         case PORTSC_PSPD_LS:
 822                                 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
 823                                 break;
 824                         case PORTSC_PSPD_HS:
 825                         default:
 826                                 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 827                                 break;
 828                         }
 829                 } else {
 830                         tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 831                 }
 832
 833                 if (reg & EHCI_PS_CSC)
 834                         tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
 835                 if (reg & EHCI_PS_PEC)
 836                         tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
 837                 if (reg & EHCI_PS_OCC)
 838                         tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
 839                 if (ctrl->portreset & (1 << port))
 840                         tmpbuf[2] |= USB_PORT_STAT_C_RESET;
 841
 842                 srcptr = tmpbuf;
 843                 srclen = 4;
 844                 break;
 845         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 846                 reg = ehci_readl(status_reg);
 847                 reg &= ~EHCI_PS_CLEAR;
 848                 switch (le16_to_cpu(req->value)) {
 849                 case USB_PORT_FEAT_ENABLE:
 850                         reg |= EHCI_PS_PE;
 851                         ehci_writel(status_reg, reg);
 852                         break;
 853                 case USB_PORT_FEAT_POWER:
 854                         if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) {
 855                                 reg |= EHCI_PS_PP;
 856                                 ehci_writel(status_reg, reg);
 857                         }
 858                         break;
 859                 case USB_PORT_FEAT_RESET:
 860                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
 861                             !ehci_is_TDI() &&
 862                             EHCI_PS_IS_LOWSPEED(reg)) {
 863                                 /* Low speed device, give up ownership. */
 864                                 debug("port %d low speed --> companion\n",
 865                                       port - 1);
 866                                 reg |= EHCI_PS_PO;
 867                                 ehci_writel(status_reg, reg);
 868                                 return -ENXIO;
 869                         } else {
 870                                 int ret;
 871
 872                                 /* Disable chirp for HS erratum */
 873                                 if (ctrl->has_fsl_erratum_a005275)
 874                                         reg |= PORTSC_FSL_PFSC;
 875
 876                                 reg |= EHCI_PS_PR;
 877                                 reg &= ~EHCI_PS_PE;
 878                                 ehci_writel(status_reg, reg);
 879                                 /*
 880                                  * caller must wait, then call GetPortStatus
 881                                  * usb 2.0 specification say 50 ms resets on
 882                                  * root
 883                                  */
 884                                 ctrl->ops.powerup_fixup(ctrl, status_reg, &reg);
 885
 886                                 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
 887                                 /*
 888                                  * A host controller must terminate the reset
 889                                  * and stabilize the state of the port within
 890                                  * 2 milliseconds
 891                                  */
 892                                 ret = handshake(status_reg, EHCI_PS_PR, 0,
 893                                                 2 * 1000);
 894                                 if (!ret) {
 895                                         reg = ehci_readl(status_reg);
 896                                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS))
 897                                             == EHCI_PS_CS && !ehci_is_TDI()) {
 898                                                 debug("port %d full speed --> companion\n", port - 1);
 899                                                 reg &= ~EHCI_PS_CLEAR;
 900                                                 reg |= EHCI_PS_PO;
 901                                                 ehci_writel(status_reg, reg);
 902                                                 return -ENXIO;
 903                                         } else {
 904                                                 ctrl->portreset |= 1 << port;
 905                                         }
 906                                 } else {
 907                                         printf("port(%d) reset error\n",
 908                                                port - 1);
 909                                 }
 910                         }
 911                         break;
 912                 case USB_PORT_FEAT_TEST:
 913                         ehci_shutdown(ctrl);
 914                         reg &= ~(0xf << 16);
 915                         reg |= ((le16_to_cpu(req->index) >> 8) & 0xf) << 16;
 916                         ehci_writel(status_reg, reg);
 917                         break;
 918                 default:
 919                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 920                         goto unknown;
 921                 }
 922                 /* unblock posted writes */
 923                 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
 924                 break;
 925         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 926                 reg = ehci_readl(status_reg);
 927                 reg &= ~EHCI_PS_CLEAR;
 928                 switch (le16_to_cpu(req->value)) {
 929                 case USB_PORT_FEAT_ENABLE:
 930                         reg &= ~EHCI_PS_PE;
 931                         break;
 932                 case USB_PORT_FEAT_C_ENABLE:
 933                         reg |= EHCI_PS_PE;
 934                         break;
 935                 case USB_PORT_FEAT_POWER:
 936                         if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams)))
 937                                 reg &= ~EHCI_PS_PP;
 938                         break;
 939                 case USB_PORT_FEAT_C_CONNECTION:
 940                         reg |= EHCI_PS_CSC;
 941                         break;
 942                 case USB_PORT_FEAT_OVER_CURRENT:
 943                         reg |= EHCI_PS_OCC;
 944                         break;
 945                 case USB_PORT_FEAT_C_RESET:
 946                         ctrl->portreset &= ~(1 << port);
 947                         break;
 948                 default:
 949                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 950                         goto unknown;
 951                 }
 952                 ehci_writel(status_reg, reg);
 953                 /* unblock posted write */
 954                 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
 955                 break;
 956         default:
 957                 debug("Unknown request\n");
 958                 goto unknown;
 959         }
 960
 961         mdelay(1);
 962         len = min3(srclen, (int)le16_to_cpu(req->length), length);
 963         if (srcptr != NULL && len > 0)
 964                 memcpy(buffer, srcptr, len);
 965         else
 966                 debug("Len is 0\n");
 967
 968         dev->act_len = len;
 969         dev->status = 0;
 970         return 0;
 971
 972 unknown:
 973         debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
 974               req->requesttype, req->request, le16_to_cpu(req->value),
 975               le16_to_cpu(req->index), le16_to_cpu(req->length));
 976
 977         dev->act_len = 0;
 978         dev->status = USB_ST_STALLED;
 979         return -1;
 980 }
 981
 982 static const struct ehci_ops default_ehci_ops = {
 983         .set_usb_mode           = ehci_set_usbmode,
 984         .get_port_speed         = ehci_get_port_speed,
 985         .powerup_fixup          = ehci_powerup_fixup,
 986         .get_portsc_register    = ehci_get_portsc_register,
 987 };
 988
 989 static void ehci_setup_ops(struct ehci_ctrl *ctrl, const struct ehci_ops *ops)
 990 {
 991         if (!ops) {
 992                 ctrl->ops = default_ehci_ops;
 993         } else {
 994                 ctrl->ops = *ops;
 995                 if (!ctrl->ops.set_usb_mode)
 996                         ctrl->ops.set_usb_mode = ehci_set_usbmode;
 997                 if (!ctrl->ops.get_port_speed)
 998                         ctrl->ops.get_port_speed = ehci_get_port_speed;
 999                 if (!ctrl->ops.powerup_fixup)
1000                         ctrl->ops.powerup_fixup = ehci_powerup_fixup;
1001                 if (!ctrl->ops.get_portsc_register)
1002                         ctrl->ops.get_portsc_register =
1003                                         ehci_get_portsc_register;
1004         }
1005 }
1006
1007 #if !CONFIG_IS_ENABLED(DM_USB)
1008 void ehci_set_controller_priv(int index, void *priv, const struct ehci_ops *ops)
1009 {
1010         struct ehci_ctrl *ctrl = &ehcic[index];
1011
1012         ctrl->priv = priv;
1013         ehci_setup_ops(ctrl, ops);
1014 }
1015
1016 void *ehci_get_controller_priv(int index)
1017 {
1018         return ehcic[index].priv;
1019 }
1020 #endif
1021
1022 static int ehci_common_init(struct ehci_ctrl *ctrl, uint tweaks)
1023 {
1024         struct QH *qh_list;
1025         struct QH *periodic;
1026         uint32_t reg;
1027         uint32_t cmd;
1028         int i;
1029
1030         /* Set the high address word (aka segment) for 64-bit controller */
1031         if (ehci_readl(&ctrl->hccr->cr_hccparams) & 1)
1032                 ehci_writel(&ctrl->hcor->or_ctrldssegment, 0);
1033
1034         qh_list = &ctrl->qh_list;
1035
1036         /* Set head of reclaim list */
1037         memset(qh_list, 0, sizeof(*qh_list));
1038         qh_list->qh_link = cpu_to_hc32(virt_to_phys(qh_list) | QH_LINK_TYPE_QH);
1039         qh_list->qh_endpt1 = cpu_to_hc32(QH_ENDPT1_H(1) |
1040                                                 QH_ENDPT1_EPS(USB_SPEED_HIGH));
1041         qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1042         qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1043         qh_list->qh_overlay.qt_token =
1044                         cpu_to_hc32(QT_TOKEN_STATUS(QT_TOKEN_STATUS_HALTED));
1045
1046         flush_dcache_range((unsigned long)qh_list,
1047                            ALIGN_END_ADDR(struct QH, qh_list, 1));
1048
1049         /* Set async. queue head pointer. */
1050         ehci_writel(&ctrl->hcor->or_asynclistaddr, virt_to_phys(qh_list));
1051
1052         /*
1053          * Set up periodic list
1054          * Step 1: Parent QH for all periodic transfers.
1055          */
1056         ctrl->periodic_schedules = 0;
1057         periodic = &ctrl->periodic_queue;
1058         memset(periodic, 0, sizeof(*periodic));
1059         periodic->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1060         periodic->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1061         periodic->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1062
1063         flush_dcache_range((unsigned long)periodic,
1064                            ALIGN_END_ADDR(struct QH, periodic, 1));
1065
1066         /*
1067          * Step 2: Setup frame-list: Every microframe, USB tries the same list.
1068          *         In particular, device specifications on polling frequency
1069          *         are disregarded. Keyboards seem to send NAK/NYet reliably
1070          *         when polled with an empty buffer.
1071          *
1072          *         Split Transactions will be spread across microframes using
1073          *         S-mask and C-mask.
1074          */
1075         if (ctrl->periodic_list == NULL)
1076                 ctrl->periodic_list = memalign(4096, 1024 * 4);
1077
1078         if (!ctrl->periodic_list)
1079                 return -ENOMEM;
1080         for (i = 0; i < 1024; i++) {
1081                 ctrl->periodic_list[i] = cpu_to_hc32((unsigned long)periodic
1082                                                 | QH_LINK_TYPE_QH);
1083         }
1084
1085         flush_dcache_range((unsigned long)ctrl->periodic_list,
1086                            ALIGN_END_ADDR(uint32_t, ctrl->periodic_list,
1087                                           1024));
1088
1089         /* Set periodic list base address */
1090         ehci_writel(&ctrl->hcor->or_periodiclistbase,
1091                 (unsigned long)ctrl->periodic_list);
1092
1093         reg = ehci_readl(&ctrl->hccr->cr_hcsparams);
1094         descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
1095         debug("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
1096         /* Port Indicators */
1097         if (HCS_INDICATOR(reg))
1098                 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1099                                 | 0x80, &descriptor.hub.wHubCharacteristics);
1100         /* Port Power Control */
1101         if (HCS_PPC(reg))
1102                 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1103                                 | 0x01, &descriptor.hub.wHubCharacteristics);
1104
1105         /* Start the host controller. */
1106         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1107         /*
1108          * Philips, Intel, and maybe others need CMD_RUN before the
1109          * root hub will detect new devices (why?); NEC doesn't
1110          */
1111         cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
1112         cmd |= CMD_RUN;
1113         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
1114
1115         if (!(tweaks & EHCI_TWEAK_NO_INIT_CF)) {
1116                 /* take control over the ports */
1117                 cmd = ehci_readl(&ctrl->hcor->or_configflag);
1118                 cmd |= FLAG_CF;
1119                 ehci_writel(&ctrl->hcor->or_configflag, cmd);
1120         }
1121
1122         /* unblock posted write */
1123         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1124         mdelay(5);
1125         reg = HC_VERSION(ehci_readl(&ctrl->hccr->cr_capbase));
1126         printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
1127
1128         return 0;
1129 }
1130
1131 #if !CONFIG_IS_ENABLED(DM_USB)
1132 int usb_lowlevel_stop(int index)
1133 {
1134         ehci_shutdown(&ehcic[index]);
1135         return ehci_hcd_stop(index);
1136 }
1137
1138 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1139 {
1140         struct ehci_ctrl *ctrl = &ehcic[index];
1141         uint tweaks = 0;
1142         int rc;
1143
1144         /**
1145          * Set ops to default_ehci_ops, ehci_hcd_init should call
1146          * ehci_set_controller_priv to change any of these function pointers.
1147          */
1148         ctrl->ops = default_ehci_ops;
1149
1150         rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1151         if (rc)
1152                 return rc;
1153         if (!ctrl->hccr || !ctrl->hcor)
1154                 return -1;
1155         if (init == USB_INIT_DEVICE)
1156                 goto done;
1157
1158         /* EHCI spec section 4.1 */
1159         if (ehci_reset(ctrl))
1160                 return -1;
1161
1162 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
1163         rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1164         if (rc)
1165                 return rc;
1166 #endif
1167 #ifdef CONFIG_USB_EHCI_FARADAY
1168         tweaks |= EHCI_TWEAK_NO_INIT_CF;
1169 #endif
1170         rc = ehci_common_init(ctrl, tweaks);
1171         if (rc)
1172                 return rc;
1173
1174         ctrl->rootdev = 0;
1175 done:
1176         *controller = &ehcic[index];
1177         return 0;
1178 }
1179 #endif
1180
1181 static int _ehci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1182                                  void *buffer, int length)
1183 {
1184
1185         if (usb_pipetype(pipe) != PIPE_BULK) {
1186                 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
1187                 return -1;
1188         }
1189         return ehci_submit_async(dev, pipe, buffer, length, NULL);
1190 }
1191
1192 static int _ehci_submit_control_msg(struct usb_device *dev, unsigned long pipe,
1193                                     void *buffer, int length,
1194                                     struct devrequest *setup)
1195 {
1196         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1197
1198         if (usb_pipetype(pipe) != PIPE_CONTROL) {
1199                 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
1200                 return -1;
1201         }
1202
1203         if (usb_pipedevice(pipe) == ctrl->rootdev) {
1204                 if (!ctrl->rootdev)
1205                         dev->speed = USB_SPEED_HIGH;
1206                 return ehci_submit_root(dev, pipe, buffer, length, setup);
1207         }
1208         return ehci_submit_async(dev, pipe, buffer, length, setup);
1209 }
1210
1211 struct int_queue {
1212         int elementsize;
1213         unsigned long pipe;
1214         struct QH *first;
1215         struct QH *current;
1216         struct QH *last;
1217         struct qTD *tds;
1218 };
1219
1220 #define NEXT_QH(qh) (struct QH *)((unsigned long)hc32_to_cpu((qh)->qh_link) & ~0x1f)
1221
1222 static int
1223 enable_periodic(struct ehci_ctrl *ctrl)
1224 {
1225         uint32_t cmd;
1226         struct ehci_hcor *hcor = ctrl->hcor;
1227         int ret;
1228
1229         cmd = ehci_readl(&hcor->or_usbcmd);
1230         cmd |= CMD_PSE;
1231         ehci_writel(&hcor->or_usbcmd, cmd);
1232
1233         ret = handshake((uint32_t *)&hcor->or_usbsts,
1234                         STS_PSS, STS_PSS, 100 * 1000);
1235         if (ret < 0) {
1236                 printf("EHCI failed: timeout when enabling periodic list\n");
1237                 return -ETIMEDOUT;
1238         }
1239         udelay(1000);
1240         return 0;
1241 }
1242
1243 static int
1244 disable_periodic(struct ehci_ctrl *ctrl)
1245 {
1246         uint32_t cmd;
1247         struct ehci_hcor *hcor = ctrl->hcor;
1248         int ret;
1249
1250         cmd = ehci_readl(&hcor->or_usbcmd);
1251         cmd &= ~CMD_PSE;
1252         ehci_writel(&hcor->or_usbcmd, cmd);
1253
1254         ret = handshake((uint32_t *)&hcor->or_usbsts,
1255                         STS_PSS, 0, 100 * 1000);
1256         if (ret < 0) {
1257                 printf("EHCI failed: timeout when disabling periodic list\n");
1258                 return -ETIMEDOUT;
1259         }
1260         return 0;
1261 }
1262
1263 static struct int_queue *_ehci_create_int_queue(struct usb_device *dev,
1264                         unsigned long pipe, int queuesize, int elementsize,
1265                         void *buffer, int interval)
1266 {
1267         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1268         struct int_queue *result = NULL;
1269         uint32_t i, toggle;
1270
1271         /*
1272          * Interrupt transfers requiring several transactions are not supported
1273          * because bInterval is ignored.
1274          *
1275          * Also, ehci_submit_async() relies on wMaxPacketSize being a power of 2
1276          * <= PKT_ALIGN if several qTDs are required, while the USB
1277          * specification does not constrain this for interrupt transfers. That
1278          * means that ehci_submit_async() would support interrupt transfers
1279          * requiring several transactions only as long as the transfer size does
1280          * not require more than a single qTD.
1281          */
1282         if (elementsize > usb_maxpacket(dev, pipe)) {
1283                 printf("%s: xfers requiring several transactions are not supported.\n",
1284                        __func__);
1285                 return NULL;
1286         }
1287
1288         debug("Enter create_int_queue\n");
1289         if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
1290                 debug("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
1291                 return NULL;
1292         }
1293
1294         /* limit to 4 full pages worth of data -
1295          * we can safely fit them in a single TD,
1296          * no matter the alignment
1297          */
1298         if (elementsize >= 16384) {
1299                 debug("too large elements for interrupt transfers\n");
1300                 return NULL;
1301         }
1302
1303         result = malloc(sizeof(*result));
1304         if (!result) {
1305                 debug("ehci intr queue: out of memory\n");
1306                 goto fail1;
1307         }
1308         result->elementsize = elementsize;
1309         result->pipe = pipe;
1310         result->first = memalign(USB_DMA_MINALIGN,
1311                                  sizeof(struct QH) * queuesize);
1312         if (!result->first) {
1313                 debug("ehci intr queue: out of memory\n");
1314                 goto fail2;
1315         }
1316         result->current = result->first;
1317         result->last = result->first + queuesize - 1;
1318         result->tds = memalign(USB_DMA_MINALIGN,
1319                                sizeof(struct qTD) * queuesize);
1320         if (!result->tds) {
1321                 debug("ehci intr queue: out of memory\n");
1322                 goto fail3;
1323         }
1324         memset(result->first, 0, sizeof(struct QH) * queuesize);
1325         memset(result->tds, 0, sizeof(struct qTD) * queuesize);
1326
1327         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
1328
1329         for (i = 0; i < queuesize; i++) {
1330                 struct QH *qh = result->first + i;
1331                 struct qTD *td = result->tds + i;
1332                 void **buf = &qh->buffer;
1333
1334                 qh->qh_link = cpu_to_hc32((unsigned long)(qh+1) | QH_LINK_TYPE_QH);
1335                 if (i == queuesize - 1)
1336                         qh->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1337
1338                 qh->qh_overlay.qt_next = cpu_to_hc32((unsigned long)td);
1339                 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1340                 qh->qh_endpt1 =
1341                         cpu_to_hc32((0 << 28) | /* No NAK reload (ehci 4.9) */
1342                         (usb_maxpacket(dev, pipe) << 16) | /* MPS */
1343                         (1 << 14) |
1344                         QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
1345                         (usb_pipeendpoint(pipe) << 8) | /* Endpoint Number */
1346                         (usb_pipedevice(pipe) << 0));
1347                 qh->qh_endpt2 = cpu_to_hc32((1 << 30) | /* 1 Tx per mframe */
1348                         (1 << 0)); /* S-mask: microframe 0 */
1349                 if (dev->speed == USB_SPEED_LOW ||
1350                                 dev->speed == USB_SPEED_FULL) {
1351                         /* C-mask: microframes 2-4 */
1352                         qh->qh_endpt2 |= cpu_to_hc32((0x1c << 8));
1353                 }
1354                 ehci_update_endpt2_dev_n_port(dev, qh);
1355
1356                 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1357                 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1358                 debug("communication direction is '%s'\n",
1359                       usb_pipein(pipe) ? "in" : "out");
1360                 td->qt_token = cpu_to_hc32(
1361                         QT_TOKEN_DT(toggle) |
1362                         (elementsize << 16) |
1363                         ((usb_pipein(pipe) ? 1 : 0) << 8) | /* IN/OUT token */
1364                         0x80); /* active */
1365                 td->qt_buffer[0] =
1366                     cpu_to_hc32((unsigned long)buffer + i * elementsize);
1367                 td->qt_buffer[1] =
1368                     cpu_to_hc32((td->qt_buffer[0] + 0x1000) & ~0xfff);
1369                 td->qt_buffer[2] =
1370                     cpu_to_hc32((td->qt_buffer[0] + 0x2000) & ~0xfff);
1371                 td->qt_buffer[3] =
1372                     cpu_to_hc32((td->qt_buffer[0] + 0x3000) & ~0xfff);
1373                 td->qt_buffer[4] =
1374                     cpu_to_hc32((td->qt_buffer[0] + 0x4000) & ~0xfff);
1375
1376                 *buf = buffer + i * elementsize;
1377                 toggle ^= 1;
1378         }
1379
1380         flush_dcache_range((unsigned long)buffer,
1381                            ALIGN_END_ADDR(char, buffer,
1382                                           queuesize * elementsize));
1383         flush_dcache_range((unsigned long)result->first,
1384                            ALIGN_END_ADDR(struct QH, result->first,
1385                                           queuesize));
1386         flush_dcache_range((unsigned long)result->tds,
1387                            ALIGN_END_ADDR(struct qTD, result->tds,
1388                                           queuesize));
1389
1390         if (ctrl->periodic_schedules > 0) {
1391                 if (disable_periodic(ctrl) < 0) {
1392                         debug("FATAL: periodic should never fail, but did");
1393                         goto fail3;
1394                 }
1395         }
1396
1397         /* hook up to periodic list */
1398         struct QH *list = &ctrl->periodic_queue;
1399         result->last->qh_link = list->qh_link;
1400         list->qh_link = cpu_to_hc32((unsigned long)result->first | QH_LINK_TYPE_QH);
1401
1402         flush_dcache_range((unsigned long)result->last,
1403                            ALIGN_END_ADDR(struct QH, result->last, 1));
1404         flush_dcache_range((unsigned long)list,
1405                            ALIGN_END_ADDR(struct QH, list, 1));
1406
1407         if (enable_periodic(ctrl) < 0) {
1408                 debug("FATAL: periodic should never fail, but did");
1409                 goto fail3;
1410         }
1411         ctrl->periodic_schedules++;
1412
1413         debug("Exit create_int_queue\n");
1414         return result;
1415 fail3:
1416         free(result->tds);
1417 fail2:
1418         free(result->first);
1419         free(result);
1420 fail1:
1421         return NULL;
1422 }
1423
1424 static void *_ehci_poll_int_queue(struct usb_device *dev,
1425                                   struct int_queue *queue)
1426 {
1427         struct QH *cur = queue->current;
1428         struct qTD *cur_td;
1429         uint32_t token, toggle;
1430         unsigned long pipe = queue->pipe;
1431
1432         /* depleted queue */
1433         if (cur == NULL) {
1434                 debug("Exit poll_int_queue with completed queue\n");
1435                 return NULL;
1436         }
1437         /* still active */
1438         cur_td = &queue->tds[queue->current - queue->first];
1439         invalidate_dcache_range((unsigned long)cur_td,
1440                                 ALIGN_END_ADDR(struct qTD, cur_td, 1));
1441         token = hc32_to_cpu(cur_td->qt_token);
1442         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE) {
1443                 debug("Exit poll_int_queue with no completed intr transfer. token is %x\n", token);
1444                 return NULL;
1445         }
1446
1447         toggle = QT_TOKEN_GET_DT(token);
1448         usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), toggle);
1449
1450         if (!(cur->qh_link & QH_LINK_TERMINATE))
1451                 queue->current++;
1452         else
1453                 queue->current = NULL;
1454
1455         invalidate_dcache_range((unsigned long)cur->buffer,
1456                                 ALIGN_END_ADDR(char, cur->buffer,
1457                                                queue->elementsize));
1458
1459         debug("Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n",
1460               token, cur, queue->first);
1461         return cur->buffer;
1462 }
1463
1464 /* Do not free buffers associated with QHs, they're owned by someone else */
1465 static int _ehci_destroy_int_queue(struct usb_device *dev,
1466                                    struct int_queue *queue)
1467 {
1468         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1469         int result = -1;
1470         unsigned long timeout;
1471
1472         if (disable_periodic(ctrl) < 0) {
1473                 debug("FATAL: periodic should never fail, but did");
1474                 goto out;
1475         }
1476         ctrl->periodic_schedules--;
1477
1478         struct QH *cur = &ctrl->periodic_queue;
1479         timeout = get_timer(0) + 500; /* abort after 500ms */
1480         while (!(cur->qh_link & cpu_to_hc32(QH_LINK_TERMINATE))) {
1481                 debug("considering %p, with qh_link %x\n", cur, cur->qh_link);
1482                 if (NEXT_QH(cur) == queue->first) {
1483                         debug("found candidate. removing from chain\n");
1484                         cur->qh_link = queue->last->qh_link;
1485                         flush_dcache_range((unsigned long)cur,
1486                                            ALIGN_END_ADDR(struct QH, cur, 1));
1487                         result = 0;
1488                         break;
1489                 }
1490                 cur = NEXT_QH(cur);
1491                 if (get_timer(0) > timeout) {
1492                         printf("Timeout destroying interrupt endpoint queue\n");
1493                         result = -1;
1494                         goto out;
1495                 }
1496         }
1497
1498         if (ctrl->periodic_schedules > 0) {
1499                 result = enable_periodic(ctrl);
1500                 if (result < 0)
1501                         debug("FATAL: periodic should never fail, but did");
1502         }
1503
1504 out:
1505         free(queue->tds);
1506         free(queue->first);
1507         free(queue);
1508
1509         return result;
1510 }
1511
1512 static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe,
1513                                 void *buffer, int length, int interval,
1514                                 bool nonblock)
1515 {
1516         void *backbuffer;
1517         struct int_queue *queue;
1518         unsigned long timeout;
1519         int result = 0, ret;
1520
1521         debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
1522               dev, pipe, buffer, length, interval);
1523
1524         queue = _ehci_create_int_queue(dev, pipe, 1, length, buffer, interval);
1525         if (!queue)
1526                 return -1;
1527
1528         timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
1529         while ((backbuffer = _ehci_poll_int_queue(dev, queue)) == NULL)
1530                 if (get_timer(0) > timeout) {
1531                         printf("Timeout poll on interrupt endpoint\n");
1532                         result = -ETIMEDOUT;
1533                         break;
1534                 }
1535
1536         if (backbuffer != buffer) {
1537                 debug("got wrong buffer back (%p instead of %p)\n",
1538                       backbuffer, buffer);
1539                 return -EINVAL;
1540         }
1541
1542         ret = _ehci_destroy_int_queue(dev, queue);
1543         if (ret < 0)
1544                 return ret;
1545
1546         /* everything worked out fine */
1547         return result;
1548 }
1549
1550 static int _ehci_lock_async(struct ehci_ctrl *ctrl, int lock)
1551 {
1552         ctrl->async_locked = lock;
1553
1554         if (lock)
1555                 return 0;
1556
1557         return ehci_disable_async(ctrl);
1558 }
1559
1560 #if !CONFIG_IS_ENABLED(DM_USB)
1561 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1562                             void *buffer, int length)
1563 {
1564         return _ehci_submit_bulk_msg(dev, pipe, buffer, length);
1565 }
1566
1567 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1568                    int length, struct devrequest *setup)
1569 {
1570         return _ehci_submit_control_msg(dev, pipe, buffer, length, setup);
1571 }
1572
1573 int submit_int_msg(struct usb_device *dev, unsigned long pipe,
1574                    void *buffer, int length, int interval, bool nonblock)
1575 {
1576         return _ehci_submit_int_msg(dev, pipe, buffer, length, interval,
1577                                     nonblock);
1578 }
1579
1580 struct int_queue *create_int_queue(struct usb_device *dev,
1581                 unsigned long pipe, int queuesize, int elementsize,
1582                 void *buffer, int interval)
1583 {
1584         return _ehci_create_int_queue(dev, pipe, queuesize, elementsize,
1585                                       buffer, interval);
1586 }
1587
1588 void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1589 {
1590         return _ehci_poll_int_queue(dev, queue);
1591 }
1592
1593 int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1594 {
1595         return _ehci_destroy_int_queue(dev, queue);
1596 }
1597
1598 int usb_lock_async(struct usb_device *dev, int lock)
1599 {
1600         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1601
1602         return _ehci_lock_async(ctrl, lock);
1603 }
1604 #endif
1605
1606 #if CONFIG_IS_ENABLED(DM_USB)
1607 static int ehci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
1608                                    unsigned long pipe, void *buffer, int length,
1609                                    struct devrequest *setup)
1610 {
1611         debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
1612               dev->name, udev, udev->dev->name, udev->portnr);
1613
1614         return _ehci_submit_control_msg(udev, pipe, buffer, length, setup);
1615 }
1616
1617 static int ehci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
1618                                 unsigned long pipe, void *buffer, int length)
1619 {
1620         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1621         return _ehci_submit_bulk_msg(udev, pipe, buffer, length);
1622 }
1623
1624 static int ehci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
1625                                unsigned long pipe, void *buffer, int length,
1626                                int interval, bool nonblock)
1627 {
1628         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1629         return _ehci_submit_int_msg(udev, pipe, buffer, length, interval,
1630                                     nonblock);
1631 }
1632
1633 static struct int_queue *ehci_create_int_queue(struct udevice *dev,
1634                 struct usb_device *udev, unsigned long pipe, int queuesize,
1635                 int elementsize, void *buffer, int interval)
1636 {
1637         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1638         return _ehci_create_int_queue(udev, pipe, queuesize, elementsize,
1639                                       buffer, interval);
1640 }
1641
1642 static void *ehci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
1643                                  struct int_queue *queue)
1644 {
1645         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1646         return _ehci_poll_int_queue(udev, queue);
1647 }
1648
1649 static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
1650                                   struct int_queue *queue)
1651 {
1652         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1653         return _ehci_destroy_int_queue(udev, queue);
1654 }
1655
1656 static int ehci_get_max_xfer_size(struct udevice *dev, size_t *size)
1657 {
1658         /*
1659          * EHCD can handle any transfer length as long as there is enough
1660          * free heap space left, hence set the theoretical max number here.
1661          */
1662         *size = SIZE_MAX;
1663
1664         return 0;
1665 }
1666
1667 static int ehci_lock_async(struct udevice *dev, int lock)
1668 {
1669         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1670
1671         return _ehci_lock_async(ctrl, lock);
1672 }
1673
1674 int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
1675                   struct ehci_hcor *hcor, const struct ehci_ops *ops,
1676                   uint tweaks, enum usb_init_type init)
1677 {
1678         struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
1679         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1680         int ret = -1;
1681
1682         debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__,
1683               dev->name, ctrl, hccr, hcor, init);
1684
1685         if (!ctrl || !hccr || !hcor)
1686                 goto err;
1687
1688         priv->desc_before_addr = true;
1689
1690         ehci_setup_ops(ctrl, ops);
1691         ctrl->hccr = hccr;
1692         ctrl->hcor = hcor;
1693         ctrl->priv = ctrl;
1694
1695         ctrl->init = init;
1696         if (ctrl->init == USB_INIT_DEVICE)
1697                 goto done;
1698
1699         ret = ehci_reset(ctrl);
1700         if (ret)
1701                 goto err;
1702
1703         if (ctrl->ops.init_after_reset) {
1704                 ret = ctrl->ops.init_after_reset(ctrl);
1705                 if (ret)
1706                         goto err;
1707         }
1708
1709         ret = ehci_common_init(ctrl, tweaks);
1710         if (ret)
1711                 goto err;
1712 done:
1713         return 0;
1714 err:
1715         free(ctrl);
1716         debug("%s: failed, ret=%d\n", __func__, ret);
1717         return ret;
1718 }
1719
1720 int ehci_deregister(struct udevice *dev)
1721 {
1722         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1723
1724         if (ctrl->init == USB_INIT_DEVICE)
1725                 return 0;
1726
1727         ehci_shutdown(ctrl);
1728
1729         return 0;
1730 }
1731
1732 struct dm_usb_ops ehci_usb_ops = {
1733         .control = ehci_submit_control_msg,
1734         .bulk = ehci_submit_bulk_msg,
1735         .interrupt = ehci_submit_int_msg,
1736         .create_int_queue = ehci_create_int_queue,
1737         .poll_int_queue = ehci_poll_int_queue,
1738         .destroy_int_queue = ehci_destroy_int_queue,
1739         .get_max_xfer_size  = ehci_get_max_xfer_size,
1740         .lock_async = ehci_lock_async,
1741 };
1742
1743 #endif
1744
1745 #ifdef CONFIG_PHY
1746 int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1747 {
1748         int ret;
1749
1750         if (!phy)
1751                 return 0;
1752
1753         ret = generic_phy_get_by_index(dev, index, phy);
1754         if (ret) {
1755                 if (ret != -ENOENT) {
1756                         dev_err(dev, "failed to get usb phy\n");
1757                         return ret;
1758                 }
1759         } else {
1760                 ret = generic_phy_init(phy);
1761                 if (ret) {
1762                         dev_err(dev, "failed to init usb phy\n");
1763                         return ret;
1764                 }
1765
1766                 ret = generic_phy_power_on(phy);
1767                 if (ret) {
1768                         dev_err(dev, "failed to power on usb phy\n");
1769                         return generic_phy_exit(phy);
1770                 }
1771         }
1772
1773         return 0;
1774 }
1775
1776 int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1777 {
1778         int ret = 0;
1779
1780         if (!phy)
1781                 return 0;
1782
1783         if (generic_phy_valid(phy)) {
1784                 ret = generic_phy_power_off(phy);
1785                 if (ret) {
1786                         dev_err(dev, "failed to power off usb phy\n");
1787                         return ret;
1788                 }
1789
1790                 ret = generic_phy_exit(phy);
1791                 if (ret) {
1792                         dev_err(dev, "failed to power off usb phy\n");
1793                         return ret;
1794                 }
1795         }
1796
1797         return 0;
1798 }
1799 #else
1800 int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1801 {
1802         return 0;
1803 }
1804
1805 int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1806 {
1807         return 0;
1808 }
1809 #endif