drivers/usb/host/ehci-hcd.c

   1 /*-
   2  * Copyright (c) 2007-2008, Juniper Networks, Inc.
   3  * Copyright (c) 2008, Excito Elektronik i Skåne AB
   4  * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
   5  *
   6  * All rights reserved.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation version 2 of
  11  * the License.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23 #include <common.h>
  24 #include <asm/byteorder.h>
  25 #include <usb.h>
  26 #include <asm/io.h>
  27 #include <malloc.h>
  28 #include <watchdog.h>
  29
  30 #include "ehci.h"
  31
  32 int rootdev;
  33 struct ehci_hccr *hccr; /* R/O registers, not need for volatile */
  34 volatile struct ehci_hcor *hcor;
  35
  36 static uint16_t portreset;
  37 static struct QH qh_list __attribute__((aligned(32)));
  38
  39 static struct descriptor {
  40         struct usb_hub_descriptor hub;
  41         struct usb_device_descriptor device;
  42         struct usb_linux_config_descriptor config;
  43         struct usb_linux_interface_descriptor interface;
  44         struct usb_endpoint_descriptor endpoint;
  45 }  __attribute__ ((packed)) descriptor = {
  46         {
  47                 0x8,            /* bDescLength */
  48                 0x29,           /* bDescriptorType: hub descriptor */
  49                 2,              /* bNrPorts -- runtime modified */
  50                 0,              /* wHubCharacteristics */
  51                 0xff,           /* bPwrOn2PwrGood */
  52                 0,              /* bHubCntrCurrent */
  53                 {},             /* Device removable */
  54                 {}              /* at most 7 ports! XXX */
  55         },
  56         {
  57                 0x12,           /* bLength */
  58                 1,              /* bDescriptorType: UDESC_DEVICE */
  59                 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
  60                 9,              /* bDeviceClass: UDCLASS_HUB */
  61                 0,              /* bDeviceSubClass: UDSUBCLASS_HUB */
  62                 1,              /* bDeviceProtocol: UDPROTO_HSHUBSTT */
  63                 64,             /* bMaxPacketSize: 64 bytes */
  64                 0x0000,         /* idVendor */
  65                 0x0000,         /* idProduct */
  66                 cpu_to_le16(0x0100), /* bcdDevice */
  67                 1,              /* iManufacturer */
  68                 2,              /* iProduct */
  69                 0,              /* iSerialNumber */
  70                 1               /* bNumConfigurations: 1 */
  71         },
  72         {
  73                 0x9,
  74                 2,              /* bDescriptorType: UDESC_CONFIG */
  75                 cpu_to_le16(0x19),
  76                 1,              /* bNumInterface */
  77                 1,              /* bConfigurationValue */
  78                 0,              /* iConfiguration */
  79                 0x40,           /* bmAttributes: UC_SELF_POWER */
  80                 0               /* bMaxPower */
  81         },
  82         {
  83                 0x9,            /* bLength */
  84                 4,              /* bDescriptorType: UDESC_INTERFACE */
  85                 0,              /* bInterfaceNumber */
  86                 0,              /* bAlternateSetting */
  87                 1,              /* bNumEndpoints */
  88                 9,              /* bInterfaceClass: UICLASS_HUB */
  89                 0,              /* bInterfaceSubClass: UISUBCLASS_HUB */
  90                 0,              /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
  91                 0               /* iInterface */
  92         },
  93         {
  94                 0x7,            /* bLength */
  95                 5,              /* bDescriptorType: UDESC_ENDPOINT */
  96                 0x81,           /* bEndpointAddress:
  97                                  * UE_DIR_IN | EHCI_INTR_ENDPT
  98                                  */
  99                 3,              /* bmAttributes: UE_INTERRUPT */
 100                 8,              /* wMaxPacketSize */
 101                 255             /* bInterval */
 102         },
 103 };
 104
 105 #if defined(CONFIG_EHCI_IS_TDI)
 106 #define ehci_is_TDI()   (1)
 107 #else
 108 #define ehci_is_TDI()   (0)
 109 #endif
 110
 111 #if defined(CONFIG_EHCI_DCACHE)
 112 /*
 113  * Routines to handle (flush/invalidate) the dcache for the QH and qTD
 114  * structures and data buffers. This is needed on platforms using this
 115  * EHCI support with dcache enabled.
 116  */
 117 static void flush_invalidate(u32 addr, int size, int flush)
 118 {
 119         if (flush)
 120                 flush_dcache_range(addr, addr + size);
 121         else
 122                 invalidate_dcache_range(addr, addr + size);
 123 }
 124
 125 static void cache_qtd(struct qTD *qtd, int flush)
 126 {
 127         u32 *ptr = (u32 *)qtd->qt_buffer[0];
 128         int len = (qtd->qt_token & 0x7fff0000) >> 16;
 129
 130         flush_invalidate((u32)qtd, sizeof(struct qTD), flush);
 131         if (ptr && len)
 132                 flush_invalidate((u32)ptr, len, flush);
 133 }
 134
 135
 136 static inline struct QH *qh_addr(struct QH *qh)
 137 {
 138         return (struct QH *)((u32)qh & 0xffffffe0);
 139 }
 140
 141 static void cache_qh(struct QH *qh, int flush)
 142 {
 143         struct qTD *qtd;
 144         struct qTD *next;
 145         static struct qTD *first_qtd;
 146
 147         /*
 148          * Walk the QH list and flush/invalidate all entries
 149          */
 150         while (1) {
 151                 flush_invalidate((u32)qh_addr(qh), sizeof(struct QH), flush);
 152                 if ((u32)qh & QH_LINK_TYPE_QH)
 153                         break;
 154                 qh = qh_addr(qh);
 155                 qh = (struct QH *)qh->qh_link;
 156         }
 157         qh = qh_addr(qh);
 158
 159         /*
 160          * Save first qTD pointer, needed for invalidating pass on this QH
 161          */
 162         if (flush)
 163                 first_qtd = qtd = (struct qTD *)(*(u32 *)&qh->qh_overlay &
 164                                                  0xffffffe0);
 165         else
 166                 qtd = first_qtd;
 167
 168         /*
 169          * Walk the qTD list and flush/invalidate all entries
 170          */
 171         while (1) {
 172                 if (qtd == NULL)
 173                         break;
 174                 cache_qtd(qtd, flush);
 175                 next = (struct qTD *)((u32)qtd->qt_next & 0xffffffe0);
 176                 if (next == qtd)
 177                         break;
 178                 qtd = next;
 179         }
 180 }
 181
 182 static inline void ehci_flush_dcache(struct QH *qh)
 183 {
 184         cache_qh(qh, 1);
 185 }
 186
 187 static inline void ehci_invalidate_dcache(struct QH *qh)
 188 {
 189         cache_qh(qh, 0);
 190 }
 191 #else /* CONFIG_EHCI_DCACHE */
 192 /*
 193  *
 194  */
 195 static inline void ehci_flush_dcache(struct QH *qh)
 196 {
 197 }
 198
 199 static inline void ehci_invalidate_dcache(struct QH *qh)
 200 {
 201 }
 202 #endif /* CONFIG_EHCI_DCACHE */
 203
 204 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
 205 {
 206         uint32_t result;
 207         do {
 208                 result = ehci_readl(ptr);
 209                 udelay(5);
 210                 if (result == ~(uint32_t)0)
 211                         return -1;
 212                 result &= mask;
 213                 if (result == done)
 214                         return 0;
 215                 usec--;
 216         } while (usec > 0);
 217         return -1;
 218 }
 219
 220 static void ehci_free(void *p, size_t sz)
 221 {
 222
 223 }
 224
 225 static int ehci_reset(void)
 226 {
 227         uint32_t cmd;
 228         uint32_t tmp;
 229         uint32_t *reg_ptr;
 230         int ret = 0;
 231
 232         cmd = ehci_readl(&hcor->or_usbcmd);
 233         cmd = (cmd & ~CMD_RUN) | CMD_RESET;
 234         ehci_writel(&hcor->or_usbcmd, cmd);
 235         ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000);
 236         if (ret < 0) {
 237                 printf("EHCI fail to reset\n");
 238                 goto out;
 239         }
 240
 241         if (ehci_is_TDI()) {
 242                 reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE);
 243                 tmp = ehci_readl(reg_ptr);
 244                 tmp |= USBMODE_CM_HC;
 245 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
 246                 tmp |= USBMODE_BE;
 247 #endif
 248                 ehci_writel(reg_ptr, tmp);
 249         }
 250 out:
 251         return ret;
 252 }
 253
 254 static void *ehci_alloc(size_t sz, size_t align)
 255 {
 256         static struct QH qh __attribute__((aligned(32)));
 257         static struct qTD td[3] __attribute__((aligned (32)));
 258         static int ntds;
 259         void *p;
 260
 261         switch (sz) {
 262         case sizeof(struct QH):
 263                 p = &qh;
 264                 ntds = 0;
 265                 break;
 266         case sizeof(struct qTD):
 267                 if (ntds == 3) {
 268                         debug("out of TDs\n");
 269                         return NULL;
 270                 }
 271                 p = &td[ntds];
 272                 ntds++;
 273                 break;
 274         default:
 275                 debug("unknown allocation size\n");
 276                 return NULL;
 277         }
 278
 279         memset(p, 0, sz);
 280         return p;
 281 }
 282
 283 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
 284 {
 285         uint32_t addr, delta, next;
 286         int idx;
 287
 288         addr = (uint32_t) buf;
 289         idx = 0;
 290         while (idx < 5) {
 291                 td->qt_buffer[idx] = cpu_to_hc32(addr);
 292                 td->qt_buffer_hi[idx] = 0;
 293                 next = (addr + 4096) & ~4095;
 294                 delta = next - addr;
 295                 if (delta >= sz)
 296                         break;
 297                 sz -= delta;
 298                 addr = next;
 299                 idx++;
 300         }
 301
 302         if (idx == 5) {
 303                 debug("out of buffer pointers (%u bytes left)\n", sz);
 304                 return -1;
 305         }
 306
 307         return 0;
 308 }
 309
 310 static int
 311 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 312                    int length, struct devrequest *req)
 313 {
 314         struct QH *qh;
 315         struct qTD *td;
 316         volatile struct qTD *vtd;
 317         unsigned long ts;
 318         uint32_t *tdp;
 319         uint32_t endpt, token, usbsts;
 320         uint32_t c, toggle;
 321         uint32_t cmd;
 322         int timeout;
 323         int ret = 0;
 324
 325         debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
 326               buffer, length, req);
 327         if (req != NULL)
 328                 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
 329                       req->request, req->request,
 330                       req->requesttype, req->requesttype,
 331                       le16_to_cpu(req->value), le16_to_cpu(req->value),
 332                       le16_to_cpu(req->index));
 333
 334         qh = ehci_alloc(sizeof(struct QH), 32);
 335         if (qh == NULL) {
 336                 debug("unable to allocate QH\n");
 337                 return -1;
 338         }
 339         qh->qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
 340         c = (usb_pipespeed(pipe) != USB_SPEED_HIGH &&
 341              usb_pipeendpoint(pipe) == 0) ? 1 : 0;
 342         endpt = (8 << 28) |
 343             (c << 27) |
 344             (usb_maxpacket(dev, pipe) << 16) |
 345             (0 << 15) |
 346             (1 << 14) |
 347             (usb_pipespeed(pipe) << 12) |
 348             (usb_pipeendpoint(pipe) << 8) |
 349             (0 << 7) | (usb_pipedevice(pipe) << 0);
 350         qh->qh_endpt1 = cpu_to_hc32(endpt);
 351         endpt = (1 << 30) |
 352             (dev->portnr << 23) |
 353             (dev->parent->devnum << 16) | (0 << 8) | (0 << 0);
 354         qh->qh_endpt2 = cpu_to_hc32(endpt);
 355         qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 356
 357         td = NULL;
 358         tdp = &qh->qh_overlay.qt_next;
 359
 360         toggle =
 361             usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
 362
 363         if (req != NULL) {
 364                 td = ehci_alloc(sizeof(struct qTD), 32);
 365                 if (td == NULL) {
 366                         debug("unable to allocate SETUP td\n");
 367                         goto fail;
 368                 }
 369                 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 370                 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 371                 token = (0 << 31) |
 372                     (sizeof(*req) << 16) |
 373                     (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0);
 374                 td->qt_token = cpu_to_hc32(token);
 375                 if (ehci_td_buffer(td, req, sizeof(*req)) != 0) {
 376                         debug("unable construct SETUP td\n");
 377                         ehci_free(td, sizeof(*td));
 378                         goto fail;
 379                 }
 380                 *tdp = cpu_to_hc32((uint32_t) td);
 381                 tdp = &td->qt_next;
 382                 toggle = 1;
 383         }
 384
 385         if (length > 0 || req == NULL) {
 386                 td = ehci_alloc(sizeof(struct qTD), 32);
 387                 if (td == NULL) {
 388                         debug("unable to allocate DATA td\n");
 389                         goto fail;
 390                 }
 391                 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 392                 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 393                 token = (toggle << 31) |
 394                     (length << 16) |
 395                     ((req == NULL ? 1 : 0) << 15) |
 396                     (0 << 12) |
 397                     (3 << 10) |
 398                     ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0);
 399                 td->qt_token = cpu_to_hc32(token);
 400                 if (ehci_td_buffer(td, buffer, length) != 0) {
 401                         debug("unable construct DATA td\n");
 402                         ehci_free(td, sizeof(*td));
 403                         goto fail;
 404                 }
 405                 *tdp = cpu_to_hc32((uint32_t) td);
 406                 tdp = &td->qt_next;
 407         }
 408
 409         if (req != NULL) {
 410                 td = ehci_alloc(sizeof(struct qTD), 32);
 411                 if (td == NULL) {
 412                         debug("unable to allocate ACK td\n");
 413                         goto fail;
 414                 }
 415                 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 416                 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 417                 token = (toggle << 31) |
 418                     (0 << 16) |
 419                     (1 << 15) |
 420                     (0 << 12) |
 421                     (3 << 10) |
 422                     ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0);
 423                 td->qt_token = cpu_to_hc32(token);
 424                 *tdp = cpu_to_hc32((uint32_t) td);
 425                 tdp = &td->qt_next;
 426         }
 427
 428         qh_list.qh_link = cpu_to_hc32((uint32_t) qh | QH_LINK_TYPE_QH);
 429
 430         /* Flush dcache */
 431         ehci_flush_dcache(&qh_list);
 432
 433         usbsts = ehci_readl(&hcor->or_usbsts);
 434         ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f));
 435
 436         /* Enable async. schedule. */
 437         cmd = ehci_readl(&hcor->or_usbcmd);
 438         cmd |= CMD_ASE;
 439         ehci_writel(&hcor->or_usbcmd, cmd);
 440
 441         ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS,
 442                         100 * 1000);
 443         if (ret < 0) {
 444                 printf("EHCI fail timeout STD_ASS set\n");
 445                 goto fail;
 446         }
 447
 448         /* Wait for TDs to be processed. */
 449         ts = get_timer(0);
 450         vtd = td;
 451         timeout = USB_TIMEOUT_MS(pipe);
 452         do {
 453                 /* Invalidate dcache */
 454                 ehci_invalidate_dcache(&qh_list);
 455                 token = hc32_to_cpu(vtd->qt_token);
 456                 if (!(token & 0x80))
 457                         break;
 458                 WATCHDOG_RESET();
 459         } while (get_timer(ts) < timeout);
 460
 461         /* Check that the TD processing happened */
 462         if (token & 0x80) {
 463                 printf("EHCI timed out on TD - token=%#x\n", token);
 464                 goto fail;
 465         }
 466
 467         /* Disable async schedule. */
 468         cmd = ehci_readl(&hcor->or_usbcmd);
 469         cmd &= ~CMD_ASE;
 470         ehci_writel(&hcor->or_usbcmd, cmd);
 471
 472         ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0,
 473                         100 * 1000);
 474         if (ret < 0) {
 475                 printf("EHCI fail timeout STD_ASS reset\n");
 476                 goto fail;
 477         }
 478
 479         qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
 480
 481         token = hc32_to_cpu(qh->qh_overlay.qt_token);
 482         if (!(token & 0x80)) {
 483                 debug("TOKEN=%#x\n", token);
 484                 switch (token & 0xfc) {
 485                 case 0:
 486                         toggle = token >> 31;
 487                         usb_settoggle(dev, usb_pipeendpoint(pipe),
 488                                        usb_pipeout(pipe), toggle);
 489                         dev->status = 0;
 490                         break;
 491                 case 0x40:
 492                         dev->status = USB_ST_STALLED;
 493                         break;
 494                 case 0xa0:
 495                 case 0x20:
 496                         dev->status = USB_ST_BUF_ERR;
 497                         break;
 498                 case 0x50:
 499                 case 0x10:
 500                         dev->status = USB_ST_BABBLE_DET;
 501                         break;
 502                 default:
 503                         dev->status = USB_ST_CRC_ERR;
 504                         if ((token & 0x40) == 0x40)
 505                                 dev->status |= USB_ST_STALLED;
 506                         break;
 507                 }
 508                 dev->act_len = length - ((token >> 16) & 0x7fff);
 509         } else {
 510                 dev->act_len = 0;
 511                 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
 512                       dev->devnum, ehci_readl(&hcor->or_usbsts),
 513                       ehci_readl(&hcor->or_portsc[0]),
 514                       ehci_readl(&hcor->or_portsc[1]));
 515         }
 516
 517         return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
 518
 519 fail:
 520         td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
 521         while (td != (void *)QT_NEXT_TERMINATE) {
 522                 qh->qh_overlay.qt_next = td->qt_next;
 523                 ehci_free(td, sizeof(*td));
 524                 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
 525         }
 526         ehci_free(qh, sizeof(*qh));
 527         return -1;
 528 }
 529
 530 static inline int min3(int a, int b, int c)
 531 {
 532
 533         if (b < a)
 534                 a = b;
 535         if (c < a)
 536                 a = c;
 537         return a;
 538 }
 539
 540 int
 541 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 542                  int length, struct devrequest *req)
 543 {
 544         uint8_t tmpbuf[4];
 545         u16 typeReq;
 546         void *srcptr = NULL;
 547         int len, srclen;
 548         uint32_t reg;
 549         uint32_t *status_reg;
 550
 551         if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
 552                 printf("The request port(%d) is not configured\n",
 553                         le16_to_cpu(req->index) - 1);
 554                 return -1;
 555         }
 556         status_reg = (uint32_t *)&hcor->or_portsc[
 557                                                 le16_to_cpu(req->index) - 1];
 558         srclen = 0;
 559
 560         debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
 561               req->request, req->request,
 562               req->requesttype, req->requesttype,
 563               le16_to_cpu(req->value), le16_to_cpu(req->index));
 564
 565         typeReq = req->request | req->requesttype << 8;
 566
 567         switch (typeReq) {
 568         case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
 569                 switch (le16_to_cpu(req->value) >> 8) {
 570                 case USB_DT_DEVICE:
 571                         debug("USB_DT_DEVICE request\n");
 572                         srcptr = &descriptor.device;
 573                         srclen = 0x12;
 574                         break;
 575                 case USB_DT_CONFIG:
 576                         debug("USB_DT_CONFIG config\n");
 577                         srcptr = &descriptor.config;
 578                         srclen = 0x19;
 579                         break;
 580                 case USB_DT_STRING:
 581                         debug("USB_DT_STRING config\n");
 582                         switch (le16_to_cpu(req->value) & 0xff) {
 583                         case 0: /* Language */
 584                                 srcptr = "\4\3\1\0";
 585                                 srclen = 4;
 586                                 break;
 587                         case 1: /* Vendor */
 588                                 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
 589                                 srclen = 14;
 590                                 break;
 591                         case 2: /* Product */
 592                                 srcptr = "\52\3E\0H\0C\0I\0 "
 593                                          "\0H\0o\0s\0t\0 "
 594                                          "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
 595                                 srclen = 42;
 596                                 break;
 597                         default:
 598                                 debug("unknown value DT_STRING %x\n",
 599                                         le16_to_cpu(req->value));
 600                                 goto unknown;
 601                         }
 602                         break;
 603                 default:
 604                         debug("unknown value %x\n", le16_to_cpu(req->value));
 605                         goto unknown;
 606                 }
 607                 break;
 608         case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
 609                 switch (le16_to_cpu(req->value) >> 8) {
 610                 case USB_DT_HUB:
 611                         debug("USB_DT_HUB config\n");
 612                         srcptr = &descriptor.hub;
 613                         srclen = 0x8;
 614                         break;
 615                 default:
 616                         debug("unknown value %x\n", le16_to_cpu(req->value));
 617                         goto unknown;
 618                 }
 619                 break;
 620         case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
 621                 debug("USB_REQ_SET_ADDRESS\n");
 622                 rootdev = le16_to_cpu(req->value);
 623                 break;
 624         case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
 625                 debug("USB_REQ_SET_CONFIGURATION\n");
 626                 /* Nothing to do */
 627                 break;
 628         case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
 629                 tmpbuf[0] = 1;  /* USB_STATUS_SELFPOWERED */
 630                 tmpbuf[1] = 0;
 631                 srcptr = tmpbuf;
 632                 srclen = 2;
 633                 break;
 634         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 635                 memset(tmpbuf, 0, 4);
 636                 reg = ehci_readl(status_reg);
 637                 if (reg & EHCI_PS_CS)
 638                         tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
 639                 if (reg & EHCI_PS_PE)
 640                         tmpbuf[0] |= USB_PORT_STAT_ENABLE;
 641                 if (reg & EHCI_PS_SUSP)
 642                         tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
 643                 if (reg & EHCI_PS_OCA)
 644                         tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
 645                 if (reg & EHCI_PS_PR)
 646                         tmpbuf[0] |= USB_PORT_STAT_RESET;
 647                 if (reg & EHCI_PS_PP)
 648                         tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
 649
 650                 if (ehci_is_TDI()) {
 651                         switch ((reg >> 26) & 3) {
 652                         case 0:
 653                                 break;
 654                         case 1:
 655                                 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
 656                                 break;
 657                         case 2:
 658                         default:
 659                                 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 660                                 break;
 661                         }
 662                 } else {
 663                         tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 664                 }
 665
 666                 if (reg & EHCI_PS_CSC)
 667                         tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
 668                 if (reg & EHCI_PS_PEC)
 669                         tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
 670                 if (reg & EHCI_PS_OCC)
 671                         tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
 672                 if (portreset & (1 << le16_to_cpu(req->index)))
 673                         tmpbuf[2] |= USB_PORT_STAT_C_RESET;
 674
 675                 srcptr = tmpbuf;
 676                 srclen = 4;
 677                 break;
 678         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 679                 reg = ehci_readl(status_reg);
 680                 reg &= ~EHCI_PS_CLEAR;
 681                 switch (le16_to_cpu(req->value)) {
 682                 case USB_PORT_FEAT_ENABLE:
 683                         reg |= EHCI_PS_PE;
 684                         ehci_writel(status_reg, reg);
 685                         break;
 686                 case USB_PORT_FEAT_POWER:
 687                         if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) {
 688                                 reg |= EHCI_PS_PP;
 689                                 ehci_writel(status_reg, reg);
 690                         }
 691                         break;
 692                 case USB_PORT_FEAT_RESET:
 693                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
 694                             !ehci_is_TDI() &&
 695                             EHCI_PS_IS_LOWSPEED(reg)) {
 696                                 /* Low speed device, give up ownership. */
 697                                 debug("port %d low speed --> companion\n",
 698                                       req->index - 1);
 699                                 reg |= EHCI_PS_PO;
 700                                 ehci_writel(status_reg, reg);
 701                                 break;
 702                         } else {
 703                                 int ret;
 704
 705                                 reg |= EHCI_PS_PR;
 706                                 reg &= ~EHCI_PS_PE;
 707                                 ehci_writel(status_reg, reg);
 708                                 /*
 709                                  * caller must wait, then call GetPortStatus
 710                                  * usb 2.0 specification say 50 ms resets on
 711                                  * root
 712                                  */
 713                                 wait_ms(50);
 714                                 /* terminate the reset */
 715                                 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
 716                                 /*
 717                                  * A host controller must terminate the reset
 718                                  * and stabilize the state of the port within
 719                                  * 2 milliseconds
 720                                  */
 721                                 ret = handshake(status_reg, EHCI_PS_PR, 0,
 722                                                 2 * 1000);
 723                                 if (!ret)
 724                                         portreset |=
 725                                                 1 << le16_to_cpu(req->index);
 726                                 else
 727                                         printf("port(%d) reset error\n",
 728                                         le16_to_cpu(req->index) - 1);
 729                         }
 730                         break;
 731                 default:
 732                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 733                         goto unknown;
 734                 }
 735                 /* unblock posted writes */
 736                 (void) ehci_readl(&hcor->or_usbcmd);
 737                 break;
 738         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 739                 reg = ehci_readl(status_reg);
 740                 switch (le16_to_cpu(req->value)) {
 741                 case USB_PORT_FEAT_ENABLE:
 742                         reg &= ~EHCI_PS_PE;
 743                         break;
 744                 case USB_PORT_FEAT_C_ENABLE:
 745                         reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE;
 746                         break;
 747                 case USB_PORT_FEAT_POWER:
 748                         if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams)))
 749                                 reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP);
 750                 case USB_PORT_FEAT_C_CONNECTION:
 751                         reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC;
 752                         break;
 753                 case USB_PORT_FEAT_OVER_CURRENT:
 754                         reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC;
 755                         break;
 756                 case USB_PORT_FEAT_C_RESET:
 757                         portreset &= ~(1 << le16_to_cpu(req->index));
 758                         break;
 759                 default:
 760                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 761                         goto unknown;
 762                 }
 763                 ehci_writel(status_reg, reg);
 764                 /* unblock posted write */
 765                 (void) ehci_readl(&hcor->or_usbcmd);
 766                 break;
 767         default:
 768                 debug("Unknown request\n");
 769                 goto unknown;
 770         }
 771
 772         wait_ms(1);
 773         len = min3(srclen, le16_to_cpu(req->length), length);
 774         if (srcptr != NULL && len > 0)
 775                 memcpy(buffer, srcptr, len);
 776         else
 777                 debug("Len is 0\n");
 778
 779         dev->act_len = len;
 780         dev->status = 0;
 781         return 0;
 782
 783 unknown:
 784         debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
 785               req->requesttype, req->request, le16_to_cpu(req->value),
 786               le16_to_cpu(req->index), le16_to_cpu(req->length));
 787
 788         dev->act_len = 0;
 789         dev->status = USB_ST_STALLED;
 790         return -1;
 791 }
 792
 793 int usb_lowlevel_stop(void)
 794 {
 795         return ehci_hcd_stop();
 796 }
 797
 798 int usb_lowlevel_init(void)
 799 {
 800         uint32_t reg;
 801         uint32_t cmd;
 802
 803         if (ehci_hcd_init() != 0)
 804                 return -1;
 805
 806         /* EHCI spec section 4.1 */
 807         if (ehci_reset() != 0)
 808                 return -1;
 809
 810 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
 811         if (ehci_hcd_init() != 0)
 812                 return -1;
 813 #endif
 814
 815         /* Set head of reclaim list */
 816         memset(&qh_list, 0, sizeof(qh_list));
 817         qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
 818         qh_list.qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12));
 819         qh_list.qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE);
 820         qh_list.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 821         qh_list.qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 822         qh_list.qh_overlay.qt_token = cpu_to_hc32(0x40);
 823
 824         /* Set async. queue head pointer. */
 825         ehci_writel(&hcor->or_asynclistaddr, (uint32_t)&qh_list);
 826
 827         reg = ehci_readl(&hccr->cr_hcsparams);
 828         descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
 829         printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
 830         /* Port Indicators */
 831         if (HCS_INDICATOR(reg))
 832                 descriptor.hub.wHubCharacteristics |= 0x80;
 833         /* Port Power Control */
 834         if (HCS_PPC(reg))
 835                 descriptor.hub.wHubCharacteristics |= 0x01;
 836
 837         /* Start the host controller. */
 838         cmd = ehci_readl(&hcor->or_usbcmd);
 839         /*
 840          * Philips, Intel, and maybe others need CMD_RUN before the
 841          * root hub will detect new devices (why?); NEC doesn't
 842          */
 843         cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 844         cmd |= CMD_RUN;
 845         ehci_writel(&hcor->or_usbcmd, cmd);
 846
 847         /* take control over the ports */
 848         cmd = ehci_readl(&hcor->or_configflag);
 849         cmd |= FLAG_CF;
 850         ehci_writel(&hcor->or_configflag, cmd);
 851         /* unblock posted write */
 852         cmd = ehci_readl(&hcor->or_usbcmd);
 853         wait_ms(5);
 854         reg = HC_VERSION(ehci_readl(&hccr->cr_capbase));
 855         printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
 856
 857         rootdev = 0;
 858
 859         return 0;
 860 }
 861
 862 int
 863 submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 864                 int length)
 865 {
 866
 867         if (usb_pipetype(pipe) != PIPE_BULK) {
 868                 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
 869                 return -1;
 870         }
 871         return ehci_submit_async(dev, pipe, buffer, length, NULL);
 872 }
 873
 874 int
 875 submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 876                    int length, struct devrequest *setup)
 877 {
 878
 879         if (usb_pipetype(pipe) != PIPE_CONTROL) {
 880                 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
 881                 return -1;
 882         }
 883
 884         if (usb_pipedevice(pipe) == rootdev) {
 885                 if (rootdev == 0)
 886                         dev->speed = USB_SPEED_HIGH;
 887                 return ehci_submit_root(dev, pipe, buffer, length, setup);
 888         }
 889         return ehci_submit_async(dev, pipe, buffer, length, setup);
 890 }
 891
 892 int
 893 submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 894                int length, int interval)
 895 {
 896
 897         debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
 898               dev, pipe, buffer, length, interval);
 899         return -1;
 900 }