drivers/usb/host/ehci-hcd.c

   1 /*
   2  * Enhanced Host Controller Interface (EHCI) driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * Copyright (c) 2000-2004 by David Brownell
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License as published by the
  10  * Free Software Foundation; either version 2 of the License, or (at your
  11  * option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/pci.h>
  25 #include <linux/dmapool.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/hrtimer.h>
  34 #include <linux/list.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/usb.h>
  37 #include <linux/usb/hcd.h>
  38 #include <linux/moduleparam.h>
  39 #include <linux/dma-mapping.h>
  40 #include <linux/debugfs.h>
  41 #include <linux/slab.h>
  42
  43 #include <asm/byteorder.h>
  44 #include <asm/io.h>
  45 #include <asm/irq.h>
  46 #include <asm/unaligned.h>
  47
  48 #if defined(CONFIG_PPC_PS3)
  49 #include <asm/firmware.h>
  50 #endif
  51
  52 /*-------------------------------------------------------------------------*/
  53
  54 /*
  55  * EHCI hc_driver implementation ... experimental, incomplete.
  56  * Based on the final 1.0 register interface specification.
  57  *
  58  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  59  * First was PCMCIA, like ISA; then CardBus, which is PCI.
  60  * Next comes "CardBay", using USB 2.0 signals.
  61  *
  62  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  63  * Special thanks to Intel and VIA for providing host controllers to
  64  * test this driver on, and Cypress (including In-System Design) for
  65  * providing early devices for those host controllers to talk to!
  66  */
  67
  68 #define DRIVER_AUTHOR "David Brownell"
  69 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  70
  71 static const char       hcd_name [] = "ehci_hcd";
  72
  73
  74 #undef VERBOSE_DEBUG
  75 #undef EHCI_URB_TRACE
  76
  77 /* magic numbers that can affect system performance */
  78 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  79 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  80 #define EHCI_TUNE_RL_TT         0
  81 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  82 #define EHCI_TUNE_MULT_TT       1
  83 /*
  84  * Some drivers think it's safe to schedule isochronous transfers more than
  85  * 256 ms into the future (partly as a result of an old bug in the scheduling
  86  * code).  In an attempt to avoid trouble, we will use a minimum scheduling
  87  * length of 512 frames instead of 256.
  88  */
  89 #define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
  90
  91 /* Initial IRQ latency:  faster than hw default */
  92 static int log2_irq_thresh = 0;         // 0 to 6
  93 module_param (log2_irq_thresh, int, S_IRUGO);
  94 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
  95
  96 /* initial park setting:  slower than hw default */
  97 static unsigned park = 0;
  98 module_param (park, uint, S_IRUGO);
  99 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
 100
 101 /* for flakey hardware, ignore overcurrent indicators */
 102 static bool ignore_oc = 0;
 103 module_param (ignore_oc, bool, S_IRUGO);
 104 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
 105
 106 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 107
 108 /*-------------------------------------------------------------------------*/
 109
 110 #include "ehci.h"
 111 #include "pci-quirks.h"
 112
 113 /*
 114  * The MosChip MCS9990 controller updates its microframe counter
 115  * a little before the frame counter, and occasionally we will read
 116  * the invalid intermediate value.  Avoid problems by checking the
 117  * microframe number (the low-order 3 bits); if they are 0 then
 118  * re-read the register to get the correct value.
 119  */
 120 static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
 121 {
 122         unsigned uf;
 123
 124         uf = ehci_readl(ehci, &ehci->regs->frame_index);
 125         if (unlikely((uf & 7) == 0))
 126                 uf = ehci_readl(ehci, &ehci->regs->frame_index);
 127         return uf;
 128 }
 129
 130 static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
 131 {
 132         if (ehci->frame_index_bug)
 133                 return ehci_moschip_read_frame_index(ehci);
 134         return ehci_readl(ehci, &ehci->regs->frame_index);
 135 }
 136
 137 #include "ehci-dbg.c"
 138
 139 /*-------------------------------------------------------------------------*/
 140
 141 /*
 142  * handshake - spin reading hc until handshake completes or fails
 143  * @ptr: address of hc register to be read
 144  * @mask: bits to look at in result of read
 145  * @done: value of those bits when handshake succeeds
 146  * @usec: timeout in microseconds
 147  *
 148  * Returns negative errno, or zero on success
 149  *
 150  * Success happens when the "mask" bits have the specified value (hardware
 151  * handshake done).  There are two failure modes:  "usec" have passed (major
 152  * hardware flakeout), or the register reads as all-ones (hardware removed).
 153  *
 154  * That last failure should_only happen in cases like physical cardbus eject
 155  * before driver shutdown. But it also seems to be caused by bugs in cardbus
 156  * bridge shutdown:  shutting down the bridge before the devices using it.
 157  */
 158 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
 159                       u32 mask, u32 done, int usec)
 160 {
 161         u32     result;
 162
 163         do {
 164                 result = ehci_readl(ehci, ptr);
 165                 if (result == ~(u32)0)          /* card removed */
 166                         return -ENODEV;
 167                 result &= mask;
 168                 if (result == done)
 169                         return 0;
 170                 udelay (1);
 171                 usec--;
 172         } while (usec > 0);
 173         return -ETIMEDOUT;
 174 }
 175
 176 /* check TDI/ARC silicon is in host mode */
 177 static int tdi_in_host_mode (struct ehci_hcd *ehci)
 178 {
 179         u32             tmp;
 180
 181         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 182         return (tmp & 3) == USBMODE_CM_HC;
 183 }
 184
 185 /*
 186  * Force HC to halt state from unknown (EHCI spec section 2.3).
 187  * Must be called with interrupts enabled and the lock not held.
 188  */
 189 static int ehci_halt (struct ehci_hcd *ehci)
 190 {
 191         u32     temp;
 192
 193         spin_lock_irq(&ehci->lock);
 194
 195         /* disable any irqs left enabled by previous code */
 196         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 197
 198         if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
 199                 spin_unlock_irq(&ehci->lock);
 200                 return 0;
 201         }
 202
 203         /*
 204          * This routine gets called during probe before ehci->command
 205          * has been initialized, so we can't rely on its value.
 206          */
 207         ehci->command &= ~CMD_RUN;
 208         temp = ehci_readl(ehci, &ehci->regs->command);
 209         temp &= ~(CMD_RUN | CMD_IAAD);
 210         ehci_writel(ehci, temp, &ehci->regs->command);
 211
 212         spin_unlock_irq(&ehci->lock);
 213         synchronize_irq(ehci_to_hcd(ehci)->irq);
 214
 215         return handshake(ehci, &ehci->regs->status,
 216                           STS_HALT, STS_HALT, 16 * 125);
 217 }
 218
 219 /* put TDI/ARC silicon into EHCI mode */
 220 static void tdi_reset (struct ehci_hcd *ehci)
 221 {
 222         u32             tmp;
 223
 224         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 225         tmp |= USBMODE_CM_HC;
 226         /* The default byte access to MMR space is LE after
 227          * controller reset. Set the required endian mode
 228          * for transfer buffers to match the host microprocessor
 229          */
 230         if (ehci_big_endian_mmio(ehci))
 231                 tmp |= USBMODE_BE;
 232         ehci_writel(ehci, tmp, &ehci->regs->usbmode);
 233 }
 234
 235 /*
 236  * Reset a non-running (STS_HALT == 1) controller.
 237  * Must be called with interrupts enabled and the lock not held.
 238  */
 239 static int ehci_reset (struct ehci_hcd *ehci)
 240 {
 241         int     retval;
 242         u32     command = ehci_readl(ehci, &ehci->regs->command);
 243
 244         /* If the EHCI debug controller is active, special care must be
 245          * taken before and after a host controller reset */
 246         if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
 247                 ehci->debug = NULL;
 248
 249         command |= CMD_RESET;
 250         dbg_cmd (ehci, "reset", command);
 251         ehci_writel(ehci, command, &ehci->regs->command);
 252         ehci->rh_state = EHCI_RH_HALTED;
 253         ehci->next_statechange = jiffies;
 254         retval = handshake (ehci, &ehci->regs->command,
 255                             CMD_RESET, 0, 250 * 1000);
 256
 257         if (ehci->has_hostpc) {
 258                 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 259                                 &ehci->regs->usbmode_ex);
 260                 ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
 261         }
 262         if (retval)
 263                 return retval;
 264
 265         if (ehci_is_TDI(ehci))
 266                 tdi_reset (ehci);
 267
 268         if (ehci->debug)
 269                 dbgp_external_startup(ehci_to_hcd(ehci));
 270
 271         ehci->port_c_suspend = ehci->suspended_ports =
 272                         ehci->resuming_ports = 0;
 273         return retval;
 274 }
 275
 276 /*
 277  * Idle the controller (turn off the schedules).
 278  * Must be called with interrupts enabled and the lock not held.
 279  */
 280 static void ehci_quiesce (struct ehci_hcd *ehci)
 281 {
 282         u32     temp;
 283
 284         if (ehci->rh_state != EHCI_RH_RUNNING)
 285                 return;
 286
 287         /* wait for any schedule enables/disables to take effect */
 288         temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
 289         handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp, 16 * 125);
 290
 291         /* then disable anything that's still active */
 292         spin_lock_irq(&ehci->lock);
 293         ehci->command &= ~(CMD_ASE | CMD_PSE);
 294         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 295         spin_unlock_irq(&ehci->lock);
 296
 297         /* hardware can take 16 microframes to turn off ... */
 298         handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0, 16 * 125);
 299 }
 300
 301 /*-------------------------------------------------------------------------*/
 302
 303 static void end_unlink_async(struct ehci_hcd *ehci);
 304 static void unlink_empty_async(struct ehci_hcd *ehci);
 305 static void unlink_empty_async_suspended(struct ehci_hcd *ehci);
 306 static void ehci_work(struct ehci_hcd *ehci);
 307 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 308 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 309
 310 #include "ehci-timer.c"
 311 #include "ehci-hub.c"
 312 #include "ehci-mem.c"
 313 #include "ehci-q.c"
 314 #include "ehci-sched.c"
 315 #include "ehci-sysfs.c"
 316
 317 /*-------------------------------------------------------------------------*/
 318
 319 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
 320  * The firmware seems to think that powering off is a wakeup event!
 321  * This routine turns off remote wakeup and everything else, on all ports.
 322  */
 323 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 324 {
 325         int     port = HCS_N_PORTS(ehci->hcs_params);
 326
 327         while (port--)
 328                 ehci_writel(ehci, PORT_RWC_BITS,
 329                                 &ehci->regs->port_status[port]);
 330 }
 331
 332 /*
 333  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 334  * Must be called with interrupts enabled and the lock not held.
 335  */
 336 static void ehci_silence_controller(struct ehci_hcd *ehci)
 337 {
 338         ehci_halt(ehci);
 339
 340         spin_lock_irq(&ehci->lock);
 341         ehci->rh_state = EHCI_RH_HALTED;
 342         ehci_turn_off_all_ports(ehci);
 343
 344         /* make BIOS/etc use companion controller during reboot */
 345         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 346
 347         /* unblock posted writes */
 348         ehci_readl(ehci, &ehci->regs->configured_flag);
 349         spin_unlock_irq(&ehci->lock);
 350 }
 351
 352 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 353  * This forcibly disables dma and IRQs, helping kexec and other cases
 354  * where the next system software may expect clean state.
 355  */
 356 static void ehci_shutdown(struct usb_hcd *hcd)
 357 {
 358         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 359
 360         spin_lock_irq(&ehci->lock);
 361         ehci->shutdown = true;
 362         ehci->rh_state = EHCI_RH_STOPPING;
 363         ehci->enabled_hrtimer_events = 0;
 364         spin_unlock_irq(&ehci->lock);
 365
 366         ehci_silence_controller(ehci);
 367
 368         hrtimer_cancel(&ehci->hrtimer);
 369 }
 370
 371 /*-------------------------------------------------------------------------*/
 372
 373 /*
 374  * ehci_work is called from some interrupts, timers, and so on.
 375  * it calls driver completion functions, after dropping ehci->lock.
 376  */
 377 static void ehci_work (struct ehci_hcd *ehci)
 378 {
 379         /* another CPU may drop ehci->lock during a schedule scan while
 380          * it reports urb completions.  this flag guards against bogus
 381          * attempts at re-entrant schedule scanning.
 382          */
 383         if (ehci->scanning) {
 384                 ehci->need_rescan = true;
 385                 return;
 386         }
 387         ehci->scanning = true;
 388
 389  rescan:
 390         ehci->need_rescan = false;
 391         if (ehci->async_count)
 392                 scan_async(ehci);
 393         if (ehci->intr_count > 0)
 394                 scan_intr(ehci);
 395         if (ehci->isoc_count > 0)
 396                 scan_isoc(ehci);
 397         if (ehci->need_rescan)
 398                 goto rescan;
 399         ehci->scanning = false;
 400
 401         /* the IO watchdog guards against hardware or driver bugs that
 402          * misplace IRQs, and should let us run completely without IRQs.
 403          * such lossage has been observed on both VT6202 and VT8235.
 404          */
 405         turn_on_io_watchdog(ehci);
 406 }
 407
 408 /*
 409  * Called when the ehci_hcd module is removed.
 410  */
 411 static void ehci_stop (struct usb_hcd *hcd)
 412 {
 413         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 414
 415         ehci_dbg (ehci, "stop\n");
 416
 417         /* no more interrupts ... */
 418
 419         spin_lock_irq(&ehci->lock);
 420         ehci->enabled_hrtimer_events = 0;
 421         spin_unlock_irq(&ehci->lock);
 422
 423         ehci_quiesce(ehci);
 424         ehci_silence_controller(ehci);
 425         ehci_reset (ehci);
 426
 427         hrtimer_cancel(&ehci->hrtimer);
 428         remove_sysfs_files(ehci);
 429         remove_debug_files (ehci);
 430
 431         /* root hub is shut down separately (first, when possible) */
 432         spin_lock_irq (&ehci->lock);
 433         end_free_itds(ehci);
 434         spin_unlock_irq (&ehci->lock);
 435         ehci_mem_cleanup (ehci);
 436
 437         if (ehci->amd_pll_fix == 1)
 438                 usb_amd_dev_put();
 439
 440 #ifdef  EHCI_STATS
 441         ehci_dbg(ehci, "irq normal %ld err %ld iaa %ld (lost %ld)\n",
 442                 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
 443                 ehci->stats.lost_iaa);
 444         ehci_dbg (ehci, "complete %ld unlink %ld\n",
 445                 ehci->stats.complete, ehci->stats.unlink);
 446 #endif
 447
 448         dbg_status (ehci, "ehci_stop completed",
 449                     ehci_readl(ehci, &ehci->regs->status));
 450 }
 451
 452 /* one-time init, only for memory state */
 453 static int ehci_init(struct usb_hcd *hcd)
 454 {
 455         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 456         u32                     temp;
 457         int                     retval;
 458         u32                     hcc_params;
 459         struct ehci_qh_hw       *hw;
 460
 461         spin_lock_init(&ehci->lock);
 462
 463         /*
 464          * keep io watchdog by default, those good HCDs could turn off it later
 465          */
 466         ehci->need_io_watchdog = 1;
 467
 468         hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
 469         ehci->hrtimer.function = ehci_hrtimer_func;
 470         ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
 471
 472         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 473
 474         /*
 475          * by default set standard 80% (== 100 usec/uframe) max periodic
 476          * bandwidth as required by USB 2.0
 477          */
 478         ehci->uframe_periodic_max = 100;
 479
 480         /*
 481          * hw default: 1K periodic list heads, one per frame.
 482          * periodic_size can shrink by USBCMD update if hcc_params allows.
 483          */
 484         ehci->periodic_size = DEFAULT_I_TDPS;
 485         INIT_LIST_HEAD(&ehci->async_unlink);
 486         INIT_LIST_HEAD(&ehci->async_idle);
 487         INIT_LIST_HEAD(&ehci->intr_unlink);
 488         INIT_LIST_HEAD(&ehci->intr_qh_list);
 489         INIT_LIST_HEAD(&ehci->cached_itd_list);
 490         INIT_LIST_HEAD(&ehci->cached_sitd_list);
 491
 492         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 493                 /* periodic schedule size can be smaller than default */
 494                 switch (EHCI_TUNE_FLS) {
 495                 case 0: ehci->periodic_size = 1024; break;
 496                 case 1: ehci->periodic_size = 512; break;
 497                 case 2: ehci->periodic_size = 256; break;
 498                 default:        BUG();
 499                 }
 500         }
 501         if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 502                 return retval;
 503
 504         /* controllers may cache some of the periodic schedule ... */
 505         if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
 506                 ehci->i_thresh = 0;
 507         else                                    // N microframes cached
 508                 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 509
 510         /*
 511          * dedicate a qh for the async ring head, since we couldn't unlink
 512          * a 'real' qh without stopping the async schedule [4.8].  use it
 513          * as the 'reclamation list head' too.
 514          * its dummy is used in hw_alt_next of many tds, to prevent the qh
 515          * from automatically advancing to the next td after short reads.
 516          */
 517         ehci->async->qh_next.qh = NULL;
 518         hw = ehci->async->hw;
 519         hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 520         hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 521 #if defined(CONFIG_PPC_PS3)
 522         hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
 523 #endif
 524         hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 525         hw->hw_qtd_next = EHCI_LIST_END(ehci);
 526         ehci->async->qh_state = QH_STATE_LINKED;
 527         hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 528
 529         /* clear interrupt enables, set irq latency */
 530         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 531                 log2_irq_thresh = 0;
 532         temp = 1 << (16 + log2_irq_thresh);
 533         if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
 534                 ehci->has_ppcd = 1;
 535                 ehci_dbg(ehci, "enable per-port change event\n");
 536                 temp |= CMD_PPCEE;
 537         }
 538         if (HCC_CANPARK(hcc_params)) {
 539                 /* HW default park == 3, on hardware that supports it (like
 540                  * NVidia and ALI silicon), maximizes throughput on the async
 541                  * schedule by avoiding QH fetches between transfers.
 542                  *
 543                  * With fast usb storage devices and NForce2, "park" seems to
 544                  * make problems:  throughput reduction (!), data errors...
 545                  */
 546                 if (park) {
 547                         park = min(park, (unsigned) 3);
 548                         temp |= CMD_PARK;
 549                         temp |= park << 8;
 550                 }
 551                 ehci_dbg(ehci, "park %d\n", park);
 552         }
 553         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 554                 /* periodic schedule size can be smaller than default */
 555                 temp &= ~(3 << 2);
 556                 temp |= (EHCI_TUNE_FLS << 2);
 557         }
 558         ehci->command = temp;
 559
 560         /* Accept arbitrarily long scatter-gather lists */
 561         if (!(hcd->driver->flags & HCD_LOCAL_MEM))
 562                 hcd->self.sg_tablesize = ~0;
 563         return 0;
 564 }
 565
 566 /* start HC running; it's halted, ehci_init() has been run (once) */
 567 static int ehci_run (struct usb_hcd *hcd)
 568 {
 569         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 570         u32                     temp;
 571         u32                     hcc_params;
 572
 573         hcd->uses_new_polling = 1;
 574
 575         /* EHCI spec section 4.1 */
 576
 577         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 578         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 579
 580         /*
 581          * hcc_params controls whether ehci->regs->segment must (!!!)
 582          * be used; it constrains QH/ITD/SITD and QTD locations.
 583          * pci_pool consistent memory always uses segment zero.
 584          * streaming mappings for I/O buffers, like pci_map_single(),
 585          * can return segments above 4GB, if the device allows.
 586          *
 587          * NOTE:  the dma mask is visible through dma_supported(), so
 588          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 589          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 590          * host side drivers though.
 591          */
 592         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 593         if (HCC_64BIT_ADDR(hcc_params)) {
 594                 ehci_writel(ehci, 0, &ehci->regs->segment);
 595 #if 0
 596 // this is deeply broken on almost all architectures
 597                 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 598                         ehci_info(ehci, "enabled 64bit DMA\n");
 599 #endif
 600         }
 601
 602
 603         // Philips, Intel, and maybe others need CMD_RUN before the
 604         // root hub will detect new devices (why?); NEC doesn't
 605         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 606         ehci->command |= CMD_RUN;
 607         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 608         dbg_cmd (ehci, "init", ehci->command);
 609
 610         /*
 611          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 612          * are explicitly handed to companion controller(s), so no TT is
 613          * involved with the root hub.  (Except where one is integrated,
 614          * and there's no companion controller unless maybe for USB OTG.)
 615          *
 616          * Turning on the CF flag will transfer ownership of all ports
 617          * from the companions to the EHCI controller.  If any of the
 618          * companions are in the middle of a port reset at the time, it
 619          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 620          * guarantees that no resets are in progress.  After we set CF,
 621          * a short delay lets the hardware catch up; new resets shouldn't
 622          * be started before the port switching actions could complete.
 623          */
 624         down_write(&ehci_cf_port_reset_rwsem);
 625         ehci->rh_state = EHCI_RH_RUNNING;
 626         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 627         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
 628         msleep(5);
 629         up_write(&ehci_cf_port_reset_rwsem);
 630         ehci->last_periodic_enable = ktime_get_real();
 631
 632         temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 633         ehci_info (ehci,
 634                 "USB %x.%x started, EHCI %x.%02x%s\n",
 635                 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 636                 temp >> 8, temp & 0xff,
 637                 ignore_oc ? ", overcurrent ignored" : "");
 638
 639         ehci_writel(ehci, INTR_MASK,
 640                     &ehci->regs->intr_enable); /* Turn On Interrupts */
 641
 642         /* GRR this is run-once init(), being done every time the HC starts.
 643          * So long as they're part of class devices, we can't do it init()
 644          * since the class device isn't created that early.
 645          */
 646         create_debug_files(ehci);
 647         create_sysfs_files(ehci);
 648
 649         return 0;
 650 }
 651
 652 int ehci_setup(struct usb_hcd *hcd)
 653 {
 654         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 655         int retval;
 656
 657         ehci->regs = (void __iomem *)ehci->caps +
 658             HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 659         dbg_hcs_params(ehci, "reset");
 660         dbg_hcc_params(ehci, "reset");
 661
 662         /* cache this readonly data; minimize chip reads */
 663         ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 664
 665         ehci->sbrn = HCD_USB2;
 666
 667         /* data structure init */
 668         retval = ehci_init(hcd);
 669         if (retval)
 670                 return retval;
 671
 672         retval = ehci_halt(ehci);
 673         if (retval)
 674                 return retval;
 675
 676         if (ehci_is_TDI(ehci))
 677                 tdi_reset(ehci);
 678
 679         ehci_reset(ehci);
 680
 681         return 0;
 682 }
 683 EXPORT_SYMBOL_GPL(ehci_setup);
 684
 685 /*-------------------------------------------------------------------------*/
 686
 687 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 688 {
 689         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 690         u32                     status, masked_status, pcd_status = 0, cmd;
 691         int                     bh;
 692
 693         spin_lock (&ehci->lock);
 694
 695         status = ehci_readl(ehci, &ehci->regs->status);
 696
 697         /* e.g. cardbus physical eject */
 698         if (status == ~(u32) 0) {
 699                 ehci_dbg (ehci, "device removed\n");
 700                 goto dead;
 701         }
 702
 703         /*
 704          * We don't use STS_FLR, but some controllers don't like it to
 705          * remain on, so mask it out along with the other status bits.
 706          */
 707         masked_status = status & (INTR_MASK | STS_FLR);
 708
 709         /* Shared IRQ? */
 710         if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
 711                 spin_unlock(&ehci->lock);
 712                 return IRQ_NONE;
 713         }
 714
 715         /* clear (just) interrupts */
 716         ehci_writel(ehci, masked_status, &ehci->regs->status);
 717         cmd = ehci_readl(ehci, &ehci->regs->command);
 718         bh = 0;
 719
 720 #ifdef  VERBOSE_DEBUG
 721         /* unrequested/ignored: Frame List Rollover */
 722         dbg_status (ehci, "irq", status);
 723 #endif
 724
 725         /* INT, ERR, and IAA interrupt rates can be throttled */
 726
 727         /* normal [4.15.1.2] or error [4.15.1.1] completion */
 728         if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 729                 if (likely ((status & STS_ERR) == 0))
 730                         COUNT (ehci->stats.normal);
 731                 else
 732                         COUNT (ehci->stats.error);
 733                 bh = 1;
 734         }
 735
 736         /* complete the unlinking of some qh [4.15.2.3] */
 737         if (status & STS_IAA) {
 738
 739                 /* Turn off the IAA watchdog */
 740                 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
 741
 742                 /*
 743                  * Mild optimization: Allow another IAAD to reset the
 744                  * hrtimer, if one occurs before the next expiration.
 745                  * In theory we could always cancel the hrtimer, but
 746                  * tests show that about half the time it will be reset
 747                  * for some other event anyway.
 748                  */
 749                 if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
 750                         ++ehci->next_hrtimer_event;
 751
 752                 /* guard against (alleged) silicon errata */
 753                 if (cmd & CMD_IAAD)
 754                         ehci_dbg(ehci, "IAA with IAAD still set?\n");
 755                 if (ehci->iaa_in_progress)
 756                         COUNT(ehci->stats.iaa);
 757                 end_unlink_async(ehci);
 758         }
 759
 760         /* remote wakeup [4.3.1] */
 761         if (status & STS_PCD) {
 762                 unsigned        i = HCS_N_PORTS (ehci->hcs_params);
 763                 u32             ppcd = ~0;
 764
 765                 /* kick root hub later */
 766                 pcd_status = status;
 767
 768                 /* resume root hub? */
 769                 if (ehci->rh_state == EHCI_RH_SUSPENDED)
 770                         usb_hcd_resume_root_hub(hcd);
 771
 772                 /* get per-port change detect bits */
 773                 if (ehci->has_ppcd)
 774                         ppcd = status >> 16;
 775
 776                 while (i--) {
 777                         int pstatus;
 778
 779                         /* leverage per-port change bits feature */
 780                         if (!(ppcd & (1 << i)))
 781                                 continue;
 782                         pstatus = ehci_readl(ehci,
 783                                          &ehci->regs->port_status[i]);
 784
 785                         if (pstatus & PORT_OWNER)
 786                                 continue;
 787                         if (!(test_bit(i, &ehci->suspended_ports) &&
 788                                         ((pstatus & PORT_RESUME) ||
 789                                                 !(pstatus & PORT_SUSPEND)) &&
 790                                         (pstatus & PORT_PE) &&
 791                                         ehci->reset_done[i] == 0))
 792                                 continue;
 793
 794                         /* start 20 msec resume signaling from this port,
 795                          * and make khubd collect PORT_STAT_C_SUSPEND to
 796                          * stop that signaling.  Use 5 ms extra for safety,
 797                          * like usb_port_resume() does.
 798                          */
 799                         ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
 800                         set_bit(i, &ehci->resuming_ports);
 801                         ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 802                         usb_hcd_start_port_resume(&hcd->self, i);
 803                         mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 804                 }
 805         }
 806
 807         /* PCI errors [4.15.2.4] */
 808         if (unlikely ((status & STS_FATAL) != 0)) {
 809                 ehci_err(ehci, "fatal error\n");
 810                 dbg_cmd(ehci, "fatal", cmd);
 811                 dbg_status(ehci, "fatal", status);
 812 dead:
 813                 usb_hc_died(hcd);
 814
 815                 /* Don't let the controller do anything more */
 816                 ehci->shutdown = true;
 817                 ehci->rh_state = EHCI_RH_STOPPING;
 818                 ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
 819                 ehci_writel(ehci, ehci->command, &ehci->regs->command);
 820                 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 821                 ehci_handle_controller_death(ehci);
 822
 823                 /* Handle completions when the controller stops */
 824                 bh = 0;
 825         }
 826
 827         if (bh)
 828                 ehci_work (ehci);
 829         spin_unlock (&ehci->lock);
 830         if (pcd_status)
 831                 usb_hcd_poll_rh_status(hcd);
 832         return IRQ_HANDLED;
 833 }
 834
 835 /*-------------------------------------------------------------------------*/
 836
 837 /*
 838  * non-error returns are a promise to giveback() the urb later
 839  * we drop ownership so next owner (or urb unlink) can get it
 840  *
 841  * urb + dev is in hcd.self.controller.urb_list
 842  * we're queueing TDs onto software and hardware lists
 843  *
 844  * hcd-specific init for hcpriv hasn't been done yet
 845  *
 846  * NOTE:  control, bulk, and interrupt share the same code to append TDs
 847  * to a (possibly active) QH, and the same QH scanning code.
 848  */
 849 static int ehci_urb_enqueue (
 850         struct usb_hcd  *hcd,
 851         struct urb      *urb,
 852         gfp_t           mem_flags
 853 ) {
 854         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 855         struct list_head        qtd_list;
 856
 857         INIT_LIST_HEAD (&qtd_list);
 858
 859         switch (usb_pipetype (urb->pipe)) {
 860         case PIPE_CONTROL:
 861                 /* qh_completions() code doesn't handle all the fault cases
 862                  * in multi-TD control transfers.  Even 1KB is rare anyway.
 863                  */
 864                 if (urb->transfer_buffer_length > (16 * 1024))
 865                         return -EMSGSIZE;
 866                 /* FALLTHROUGH */
 867         /* case PIPE_BULK: */
 868         default:
 869                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 870                         return -ENOMEM;
 871                 return submit_async(ehci, urb, &qtd_list, mem_flags);
 872
 873         case PIPE_INTERRUPT:
 874                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 875                         return -ENOMEM;
 876                 return intr_submit(ehci, urb, &qtd_list, mem_flags);
 877
 878         case PIPE_ISOCHRONOUS:
 879                 if (urb->dev->speed == USB_SPEED_HIGH)
 880                         return itd_submit (ehci, urb, mem_flags);
 881                 else
 882                         return sitd_submit (ehci, urb, mem_flags);
 883         }
 884 }
 885
 886 /* remove from hardware lists
 887  * completions normally happen asynchronously
 888  */
 889
 890 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 891 {
 892         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 893         struct ehci_qh          *qh;
 894         unsigned long           flags;
 895         int                     rc;
 896
 897         spin_lock_irqsave (&ehci->lock, flags);
 898         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 899         if (rc)
 900                 goto done;
 901
 902         if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
 903                 /*
 904                  * We don't expedite dequeue for isochronous URBs.
 905                  * Just wait until they complete normally or their
 906                  * time slot expires.
 907                  */
 908         } else {
 909                 qh = (struct ehci_qh *) urb->hcpriv;
 910                 qh->exception = 1;
 911                 switch (qh->qh_state) {
 912                 case QH_STATE_LINKED:
 913                         if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)
 914                                 start_unlink_intr(ehci, qh);
 915                         else
 916                                 start_unlink_async(ehci, qh);
 917                         break;
 918                 case QH_STATE_COMPLETING:
 919                         qh->dequeue_during_giveback = 1;
 920                         break;
 921                 case QH_STATE_UNLINK:
 922                 case QH_STATE_UNLINK_WAIT:
 923                         /* already started */
 924                         break;
 925                 case QH_STATE_IDLE:
 926                         /* QH might be waiting for a Clear-TT-Buffer */
 927                         qh_completions(ehci, qh);
 928                         break;
 929                 }
 930         }
 931 done:
 932         spin_unlock_irqrestore (&ehci->lock, flags);
 933         return rc;
 934 }
 935
 936 /*-------------------------------------------------------------------------*/
 937
 938 // bulk qh holds the data toggle
 939
 940 static void
 941 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 942 {
 943         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 944         unsigned long           flags;
 945         struct ehci_qh          *qh, *tmp;
 946
 947         /* ASSERT:  any requests/urbs are being unlinked */
 948         /* ASSERT:  nobody can be submitting urbs for this any more */
 949
 950 rescan:
 951         spin_lock_irqsave (&ehci->lock, flags);
 952         qh = ep->hcpriv;
 953         if (!qh)
 954                 goto done;
 955
 956         /* endpoints can be iso streams.  for now, we don't
 957          * accelerate iso completions ... so spin a while.
 958          */
 959         if (qh->hw == NULL) {
 960                 struct ehci_iso_stream  *stream = ep->hcpriv;
 961
 962                 if (!list_empty(&stream->td_list))
 963                         goto idle_timeout;
 964
 965                 /* BUG_ON(!list_empty(&stream->free_list)); */
 966                 kfree(stream);
 967                 goto done;
 968         }
 969
 970         qh->exception = 1;
 971         if (ehci->rh_state < EHCI_RH_RUNNING)
 972                 qh->qh_state = QH_STATE_IDLE;
 973         switch (qh->qh_state) {
 974         case QH_STATE_LINKED:
 975         case QH_STATE_COMPLETING:
 976                 for (tmp = ehci->async->qh_next.qh;
 977                                 tmp && tmp != qh;
 978                                 tmp = tmp->qh_next.qh)
 979                         continue;
 980                 /* periodic qh self-unlinks on empty, and a COMPLETING qh
 981                  * may already be unlinked.
 982                  */
 983                 if (tmp)
 984                         start_unlink_async(ehci, qh);
 985                 /* FALL THROUGH */
 986         case QH_STATE_UNLINK:           /* wait for hw to finish? */
 987         case QH_STATE_UNLINK_WAIT:
 988 idle_timeout:
 989                 spin_unlock_irqrestore (&ehci->lock, flags);
 990                 schedule_timeout_uninterruptible(1);
 991                 goto rescan;
 992         case QH_STATE_IDLE:             /* fully unlinked */
 993                 if (qh->clearing_tt)
 994                         goto idle_timeout;
 995                 if (list_empty (&qh->qtd_list)) {
 996                         qh_destroy(ehci, qh);
 997                         break;
 998                 }
 999                 /* else FALL THROUGH */
1000         default:
1001                 /* caller was supposed to have unlinked any requests;
1002                  * that's not our job.  just leak this memory.
1003                  */
1004                 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1005                         qh, ep->desc.bEndpointAddress, qh->qh_state,
1006                         list_empty (&qh->qtd_list) ? "" : "(has tds)");
1007                 break;
1008         }
1009  done:
1010         ep->hcpriv = NULL;
1011         spin_unlock_irqrestore (&ehci->lock, flags);
1012 }
1013
1014 static void
1015 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1016 {
1017         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1018         struct ehci_qh          *qh;
1019         int                     eptype = usb_endpoint_type(&ep->desc);
1020         int                     epnum = usb_endpoint_num(&ep->desc);
1021         int                     is_out = usb_endpoint_dir_out(&ep->desc);
1022         unsigned long           flags;
1023
1024         if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1025                 return;
1026
1027         spin_lock_irqsave(&ehci->lock, flags);
1028         qh = ep->hcpriv;
1029
1030         /* For Bulk and Interrupt endpoints we maintain the toggle state
1031          * in the hardware; the toggle bits in udev aren't used at all.
1032          * When an endpoint is reset by usb_clear_halt() we must reset
1033          * the toggle bit in the QH.
1034          */
1035         if (qh) {
1036                 usb_settoggle(qh->dev, epnum, is_out, 0);
1037                 if (!list_empty(&qh->qtd_list)) {
1038                         WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1039                 } else {
1040                         /* The toggle value in the QH can't be updated
1041                          * while the QH is active.  Unlink it now;
1042                          * re-linking will call qh_refresh().
1043                          */
1044                         qh->exception = 1;
1045                         if (eptype == USB_ENDPOINT_XFER_BULK)
1046                                 start_unlink_async(ehci, qh);
1047                         else
1048                                 start_unlink_intr(ehci, qh);
1049                 }
1050         }
1051         spin_unlock_irqrestore(&ehci->lock, flags);
1052 }
1053
1054 static int ehci_get_frame (struct usb_hcd *hcd)
1055 {
1056         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1057         return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1058 }
1059
1060 /*-------------------------------------------------------------------------*/
1061
1062 #ifdef  CONFIG_PM
1063
1064 /* suspend/resume, section 4.3 */
1065
1066 /* These routines handle the generic parts of controller suspend/resume */
1067
1068 int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1069 {
1070         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1071
1072         if (time_before(jiffies, ehci->next_statechange))
1073                 msleep(10);
1074
1075         /*
1076          * Root hub was already suspended.  Disable IRQ emission and
1077          * mark HW unaccessible.  The PM and USB cores make sure that
1078          * the root hub is either suspended or stopped.
1079          */
1080         ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1081
1082         spin_lock_irq(&ehci->lock);
1083         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1084         (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1085
1086         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1087         spin_unlock_irq(&ehci->lock);
1088
1089         return 0;
1090 }
1091 EXPORT_SYMBOL_GPL(ehci_suspend);
1092
1093 /* Returns 0 if power was preserved, 1 if power was lost */
1094 int ehci_resume(struct usb_hcd *hcd, bool hibernated)
1095 {
1096         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1097
1098         if (time_before(jiffies, ehci->next_statechange))
1099                 msleep(100);
1100
1101         /* Mark hardware accessible again as we are back to full power by now */
1102         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1103
1104         if (ehci->shutdown)
1105                 return 0;               /* Controller is dead */
1106
1107         /*
1108          * If CF is still set and we aren't resuming from hibernation
1109          * then we maintained suspend power.
1110          * Just undo the effect of ehci_suspend().
1111          */
1112         if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1113                         !hibernated) {
1114                 int     mask = INTR_MASK;
1115
1116                 ehci_prepare_ports_for_controller_resume(ehci);
1117
1118                 spin_lock_irq(&ehci->lock);
1119                 if (ehci->shutdown)
1120                         goto skip;
1121
1122                 if (!hcd->self.root_hub->do_remote_wakeup)
1123                         mask &= ~STS_PCD;
1124                 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1125                 ehci_readl(ehci, &ehci->regs->intr_enable);
1126  skip:
1127                 spin_unlock_irq(&ehci->lock);
1128                 return 0;
1129         }
1130
1131         /*
1132          * Else reset, to cope with power loss or resume from hibernation
1133          * having let the firmware kick in during reboot.
1134          */
1135         usb_root_hub_lost_power(hcd->self.root_hub);
1136         (void) ehci_halt(ehci);
1137         (void) ehci_reset(ehci);
1138
1139         spin_lock_irq(&ehci->lock);
1140         if (ehci->shutdown)
1141                 goto skip;
1142
1143         ehci_writel(ehci, ehci->command, &ehci->regs->command);
1144         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1145         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1146
1147         ehci->rh_state = EHCI_RH_SUSPENDED;
1148         spin_unlock_irq(&ehci->lock);
1149
1150         return 1;
1151 }
1152 EXPORT_SYMBOL_GPL(ehci_resume);
1153
1154 #endif
1155
1156 /*-------------------------------------------------------------------------*/
1157
1158 /*
1159  * Generic structure: This gets copied for platform drivers so that
1160  * individual entries can be overridden as needed.
1161  */
1162
1163 static const struct hc_driver ehci_hc_driver = {
1164         .description =          hcd_name,
1165         .product_desc =         "EHCI Host Controller",
1166         .hcd_priv_size =        sizeof(struct ehci_hcd),
1167
1168         /*
1169          * generic hardware linkage
1170          */
1171         .irq =                  ehci_irq,
1172         .flags =                HCD_MEMORY | HCD_USB2,
1173
1174         /*
1175          * basic lifecycle operations
1176          */
1177         .reset =                ehci_setup,
1178         .start =                ehci_run,
1179         .stop =                 ehci_stop,
1180         .shutdown =             ehci_shutdown,
1181
1182         /*
1183          * managing i/o requests and associated device resources
1184          */
1185         .urb_enqueue =          ehci_urb_enqueue,
1186         .urb_dequeue =          ehci_urb_dequeue,
1187         .endpoint_disable =     ehci_endpoint_disable,
1188         .endpoint_reset =       ehci_endpoint_reset,
1189         .clear_tt_buffer_complete =     ehci_clear_tt_buffer_complete,
1190
1191         /*
1192          * scheduling support
1193          */
1194         .get_frame_number =     ehci_get_frame,
1195
1196         /*
1197          * root hub support
1198          */
1199         .hub_status_data =      ehci_hub_status_data,
1200         .hub_control =          ehci_hub_control,
1201         .bus_suspend =          ehci_bus_suspend,
1202         .bus_resume =           ehci_bus_resume,
1203         .relinquish_port =      ehci_relinquish_port,
1204         .port_handed_over =     ehci_port_handed_over,
1205 };
1206
1207 void ehci_init_driver(struct hc_driver *drv,
1208                 const struct ehci_driver_overrides *over)
1209 {
1210         /* Copy the generic table to drv and then apply the overrides */
1211         *drv = ehci_hc_driver;
1212
1213         if (over) {
1214                 drv->hcd_priv_size += over->extra_priv_size;
1215                 if (over->reset)
1216                         drv->reset = over->reset;
1217         }
1218 }
1219 EXPORT_SYMBOL_GPL(ehci_init_driver);
1220
1221 /*-------------------------------------------------------------------------*/
1222
1223 MODULE_DESCRIPTION(DRIVER_DESC);
1224 MODULE_AUTHOR (DRIVER_AUTHOR);
1225 MODULE_LICENSE ("GPL");
1226
1227 #ifdef CONFIG_USB_EHCI_FSL
1228 #include "ehci-fsl.c"
1229 #define PLATFORM_DRIVER         ehci_fsl_driver
1230 #endif
1231
1232 #ifdef CONFIG_USB_EHCI_SH
1233 #include "ehci-sh.c"
1234 #define PLATFORM_DRIVER         ehci_hcd_sh_driver
1235 #endif
1236
1237 #ifdef CONFIG_PPC_PS3
1238 #include "ehci-ps3.c"
1239 #define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1240 #endif
1241
1242 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1243 #include "ehci-ppc-of.c"
1244 #define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1245 #endif
1246
1247 #ifdef CONFIG_XPS_USB_HCD_XILINX
1248 #include "ehci-xilinx-of.c"
1249 #define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1250 #endif
1251
1252 #ifdef CONFIG_PLAT_ORION
1253 #include "ehci-orion.c"
1254 #define PLATFORM_DRIVER         ehci_orion_driver
1255 #endif
1256
1257 #ifdef CONFIG_USB_W90X900_EHCI
1258 #include "ehci-w90x900.c"
1259 #define PLATFORM_DRIVER         ehci_hcd_w90x900_driver
1260 #endif
1261
1262 #ifdef CONFIG_ARCH_AT91
1263 #include "ehci-atmel.c"
1264 #define PLATFORM_DRIVER         ehci_atmel_driver
1265 #endif
1266
1267 #ifdef CONFIG_USB_OCTEON_EHCI
1268 #include "ehci-octeon.c"
1269 #define PLATFORM_DRIVER         ehci_octeon_driver
1270 #endif
1271
1272 #ifdef CONFIG_ARCH_VT8500
1273 #include "ehci-vt8500.c"
1274 #define PLATFORM_DRIVER         vt8500_ehci_driver
1275 #endif
1276
1277 #ifdef CONFIG_PLAT_SPEAR
1278 #include "ehci-spear.c"
1279 #define PLATFORM_DRIVER         spear_ehci_hcd_driver
1280 #endif
1281
1282 #ifdef CONFIG_USB_EHCI_MSM
1283 #include "ehci-msm.c"
1284 #define PLATFORM_DRIVER         ehci_msm_driver
1285 #endif
1286
1287 #ifdef CONFIG_TILE_USB
1288 #include "ehci-tilegx.c"
1289 #define PLATFORM_DRIVER         ehci_hcd_tilegx_driver
1290 #endif
1291
1292 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1293 #include "ehci-pmcmsp.c"
1294 #define PLATFORM_DRIVER         ehci_hcd_msp_driver
1295 #endif
1296
1297 #ifdef CONFIG_USB_EHCI_TEGRA
1298 #include "ehci-tegra.c"
1299 #define PLATFORM_DRIVER         tegra_ehci_driver
1300 #endif
1301
1302 #ifdef CONFIG_USB_EHCI_S5P
1303 #include "ehci-s5p.c"
1304 #define PLATFORM_DRIVER         s5p_ehci_driver
1305 #endif
1306
1307 #ifdef CONFIG_SPARC_LEON
1308 #include "ehci-grlib.c"
1309 #define PLATFORM_DRIVER         ehci_grlib_driver
1310 #endif
1311
1312 #ifdef CONFIG_USB_EHCI_MV
1313 #include "ehci-mv.c"
1314 #define        PLATFORM_DRIVER         ehci_mv_driver
1315 #endif
1316
1317 #ifdef CONFIG_MIPS_SEAD3
1318 #include "ehci-sead3.c"
1319 #define PLATFORM_DRIVER         ehci_hcd_sead3_driver
1320 #endif
1321
1322 #if !IS_ENABLED(CONFIG_USB_EHCI_PCI) && \
1323         !IS_ENABLED(CONFIG_USB_EHCI_HCD_PLATFORM) && \
1324         !IS_ENABLED(CONFIG_USB_CHIPIDEA_HOST) && \
1325         !IS_ENABLED(CONFIG_USB_EHCI_MXC) && \
1326         !IS_ENABLED(CONFIG_USB_EHCI_HCD_OMAP) && \
1327         !defined(PLATFORM_DRIVER) && \
1328         !defined(PS3_SYSTEM_BUS_DRIVER) && \
1329         !defined(OF_PLATFORM_DRIVER) && \
1330         !defined(XILINX_OF_PLATFORM_DRIVER)
1331 #error "missing bus glue for ehci-hcd"
1332 #endif
1333
1334 static int __init ehci_hcd_init(void)
1335 {
1336         int retval = 0;
1337
1338         if (usb_disabled())
1339                 return -ENODEV;
1340
1341         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1342         set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1343         if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1344                         test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1345                 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1346                                 " before uhci_hcd and ohci_hcd, not after\n");
1347
1348         pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1349                  hcd_name,
1350                  sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1351                  sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1352
1353 #ifdef DEBUG
1354         ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1355         if (!ehci_debug_root) {
1356                 retval = -ENOENT;
1357                 goto err_debug;
1358         }
1359 #endif
1360
1361 #ifdef PLATFORM_DRIVER
1362         retval = platform_driver_register(&PLATFORM_DRIVER);
1363         if (retval < 0)
1364                 goto clean0;
1365 #endif
1366
1367 #ifdef PS3_SYSTEM_BUS_DRIVER
1368         retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1369         if (retval < 0)
1370                 goto clean2;
1371 #endif
1372
1373 #ifdef OF_PLATFORM_DRIVER
1374         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1375         if (retval < 0)
1376                 goto clean3;
1377 #endif
1378
1379 #ifdef XILINX_OF_PLATFORM_DRIVER
1380         retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1381         if (retval < 0)
1382                 goto clean4;
1383 #endif
1384         return retval;
1385
1386 #ifdef XILINX_OF_PLATFORM_DRIVER
1387         /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1388 clean4:
1389 #endif
1390 #ifdef OF_PLATFORM_DRIVER
1391         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1392 clean3:
1393 #endif
1394 #ifdef PS3_SYSTEM_BUS_DRIVER
1395         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1396 clean2:
1397 #endif
1398 #ifdef PLATFORM_DRIVER
1399         platform_driver_unregister(&PLATFORM_DRIVER);
1400 clean0:
1401 #endif
1402 #ifdef DEBUG
1403         debugfs_remove(ehci_debug_root);
1404         ehci_debug_root = NULL;
1405 err_debug:
1406 #endif
1407         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1408         return retval;
1409 }
1410 module_init(ehci_hcd_init);
1411
1412 static void __exit ehci_hcd_cleanup(void)
1413 {
1414 #ifdef XILINX_OF_PLATFORM_DRIVER
1415         platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1416 #endif
1417 #ifdef OF_PLATFORM_DRIVER
1418         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1419 #endif
1420 #ifdef PLATFORM_DRIVER
1421         platform_driver_unregister(&PLATFORM_DRIVER);
1422 #endif
1423 #ifdef PS3_SYSTEM_BUS_DRIVER
1424         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1425 #endif
1426 #ifdef DEBUG
1427         debugfs_remove(ehci_debug_root);
1428 #endif
1429         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1430 }
1431 module_exit(ehci_hcd_cleanup);