2 * Copyright 2005-2009 MontaVista Software, Inc.
3 * Copyright 2008,2012,2015 Freescale Semiconductor, Inc.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided
21 * Power Management support by Dave Liu <daveliu@freescale.com>,
22 * Jerry Huang <Chang-Ming.Huang@freescale.com> and
23 * Anton Vorontsov <avorontsov@ru.mvista.com>.
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/types.h>
29 #include <linux/delay.h>
31 #include <linux/err.h>
32 #include <linux/usb.h>
33 #include <linux/usb/ehci_def.h>
34 #include <linux/usb/hcd.h>
35 #include <linux/usb/otg.h>
36 #include <linux/platform_device.h>
37 #include <linux/fsl_devices.h>
42 #define DRIVER_DESC "Freescale EHCI Host controller driver"
43 #define DRV_NAME "ehci-fsl"
45 static struct hc_driver __read_mostly fsl_ehci_hc_driver;
47 /* configure so an HC device and id are always provided */
48 /* always called with process context; sleeping is OK */
51 * fsl_ehci_drv_probe - initialize FSL-based HCDs
52 * @pdev: USB Host Controller being probed
53 * Context: !in_interrupt()
55 * Allocates basic resources for this USB host controller.
58 static int fsl_ehci_drv_probe(struct platform_device *pdev)
60 struct fsl_usb2_platform_data *pdata;
66 pr_debug("initializing FSL-SOC USB Controller\n");
68 /* Need platform data for setup */
69 pdata = dev_get_platdata(&pdev->dev);
72 "No platform data for %s.\n", dev_name(&pdev->dev));
77 * This is a host mode driver, verify that we're supposed to be
80 if (!((pdata->operating_mode == FSL_USB2_DR_HOST) ||
81 (pdata->operating_mode == FSL_USB2_MPH_HOST) ||
82 (pdata->operating_mode == FSL_USB2_DR_OTG))) {
84 "Non Host Mode configured for %s. Wrong driver linked.\n",
85 dev_name(&pdev->dev));
89 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
92 "Found HC with no IRQ. Check %s setup!\n",
93 dev_name(&pdev->dev));
98 hcd = usb_create_hcd(&fsl_ehci_hc_driver, &pdev->dev,
99 dev_name(&pdev->dev));
105 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
106 hcd->regs = devm_ioremap_resource(&pdev->dev, res);
107 if (IS_ERR(hcd->regs)) {
108 retval = PTR_ERR(hcd->regs);
112 hcd->rsrc_start = res->start;
113 hcd->rsrc_len = resource_size(res);
115 pdata->regs = hcd->regs;
117 if (pdata->power_budget)
118 hcd->power_budget = pdata->power_budget;
121 * do platform specific init: check the clock, grab/config pins, etc.
123 if (pdata->init && pdata->init(pdev)) {
128 /* Enable USB controller, 83xx or 8536 */
129 if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6)
130 setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
132 /* Don't need to set host mode here. It will be done by tdi_reset() */
134 retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
137 device_wakeup_enable(hcd->self.controller);
139 #ifdef CONFIG_USB_OTG
140 if (pdata->operating_mode == FSL_USB2_DR_OTG) {
141 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
143 hcd->usb_phy = usb_get_phy(USB_PHY_TYPE_USB2);
144 dev_dbg(&pdev->dev, "hcd=0x%p ehci=0x%p, phy=0x%p\n",
145 hcd, ehci, hcd->usb_phy);
147 if (!IS_ERR_OR_NULL(hcd->usb_phy)) {
148 retval = otg_set_host(hcd->usb_phy->otg,
149 &ehci_to_hcd(ehci)->self);
151 usb_put_phy(hcd->usb_phy);
155 dev_err(&pdev->dev, "can't find phy\n");
166 dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
172 static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
173 enum fsl_usb2_phy_modes phy_mode,
174 unsigned int port_offset)
177 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
178 void __iomem *non_ehci = hcd->regs;
179 struct device *dev = hcd->self.controller;
180 struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
182 if (pdata->controller_ver < 0) {
183 dev_warn(hcd->self.controller, "Could not get controller version\n");
187 portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
188 portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
191 case FSL_USB2_PHY_ULPI:
192 if (pdata->have_sysif_regs && pdata->controller_ver) {
193 /* controller version 1.6 or above */
194 clrbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
195 setbits32(non_ehci + FSL_SOC_USB_CTRL,
196 ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN);
198 portsc |= PORT_PTS_ULPI;
200 case FSL_USB2_PHY_SERIAL:
201 portsc |= PORT_PTS_SERIAL;
203 case FSL_USB2_PHY_UTMI_WIDE:
204 portsc |= PORT_PTS_PTW;
206 case FSL_USB2_PHY_UTMI:
207 if (pdata->have_sysif_regs && pdata->controller_ver) {
208 /* controller version 1.6 or above */
209 setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
210 mdelay(FSL_UTMI_PHY_DLY); /* Delay for UTMI PHY CLK to
211 become stable - 10ms*/
213 /* enable UTMI PHY */
214 if (pdata->have_sysif_regs)
215 setbits32(non_ehci + FSL_SOC_USB_CTRL,
217 portsc |= PORT_PTS_UTMI;
219 case FSL_USB2_PHY_NONE:
223 if (pdata->have_sysif_regs &&
224 pdata->controller_ver > FSL_USB_VER_1_6 &&
225 (phy_mode == FSL_USB2_PHY_ULPI)) {
226 /* check PHY_CLK_VALID to get phy clk valid */
227 if (!(spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
228 PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0) ||
229 in_be32(non_ehci + FSL_SOC_USB_PRICTRL))) {
230 dev_warn(hcd->self.controller, "USB PHY clock invalid\n");
235 ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
237 if (phy_mode != FSL_USB2_PHY_ULPI && pdata->have_sysif_regs)
238 setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN);
243 static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
245 struct usb_hcd *hcd = ehci_to_hcd(ehci);
246 struct fsl_usb2_platform_data *pdata;
247 void __iomem *non_ehci = hcd->regs;
249 pdata = dev_get_platdata(hcd->self.controller);
251 if (pdata->have_sysif_regs) {
253 * Turn on cache snooping hardware, since some PowerPC platforms
254 * wholly rely on hardware to deal with cache coherent
257 /* Setup Snooping for all the 4GB space */
258 /* SNOOP1 starts from 0x0, size 2G */
259 out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB);
260 /* SNOOP2 starts from 0x80000000, size 2G */
261 out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
264 if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
265 (pdata->operating_mode == FSL_USB2_DR_OTG))
266 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
269 if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
270 unsigned int chip, rev, svr;
272 svr = mfspr(SPRN_SVR);
274 rev = (svr >> 4) & 0xf;
276 /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
277 if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
278 ehci->has_fsl_port_bug = 1;
280 if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
281 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
284 if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
285 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1))
289 if (pdata->have_sysif_regs) {
290 #ifdef CONFIG_FSL_SOC_BOOKE
291 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
292 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
294 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
295 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
297 out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
303 /* called after powerup, by probe or system-pm "wakeup" */
304 static int ehci_fsl_reinit(struct ehci_hcd *ehci)
306 if (ehci_fsl_usb_setup(ehci))
312 /* called during probe() after chip reset completes */
313 static int ehci_fsl_setup(struct usb_hcd *hcd)
315 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
317 struct fsl_usb2_platform_data *pdata;
320 dev = hcd->self.controller;
321 pdata = dev_get_platdata(hcd->self.controller);
322 ehci->big_endian_desc = pdata->big_endian_desc;
323 ehci->big_endian_mmio = pdata->big_endian_mmio;
325 /* EHCI registers start at offset 0x100 */
326 ehci->caps = hcd->regs + 0x100;
328 #ifdef CONFIG_PPC_83xx
330 * Deal with MPC834X that need port power to be cycled after the power
331 * fault condition is removed. Otherwise the state machine does not
332 * reflect PORTSC[CSC] correctly.
334 ehci->need_oc_pp_cycle = 1;
339 retval = ehci_setup(hcd);
343 if (of_device_is_compatible(dev->parent->of_node,
344 "fsl,mpc5121-usb2-dr")) {
346 * set SBUSCFG:AHBBRST so that control msgs don't
347 * fail when doing heavy PATA writes.
349 ehci_writel(ehci, SBUSCFG_INCR8,
350 hcd->regs + FSL_SOC_USB_SBUSCFG);
353 retval = ehci_fsl_reinit(ehci);
358 struct ehci_hcd ehci;
361 /* Saved USB PHY settings, need to restore after deep sleep. */
368 #ifdef CONFIG_PPC_MPC512x
369 static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
371 struct usb_hcd *hcd = dev_get_drvdata(dev);
372 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
373 struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
376 #ifdef CONFIG_DYNAMIC_DEBUG
377 u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
378 mode &= USBMODE_CM_MASK;
379 tmp = ehci_readl(ehci, hcd->regs + 0x140); /* usbcmd */
381 dev_dbg(dev, "suspend=%d already_suspended=%d "
382 "mode=%d usbcmd %08x\n", pdata->suspended,
383 pdata->already_suspended, mode, tmp);
387 * If the controller is already suspended, then this must be a
388 * PM suspend. Remember this fact, so that we will leave the
389 * controller suspended at PM resume time.
391 if (pdata->suspended) {
392 dev_dbg(dev, "already suspended, leaving early\n");
393 pdata->already_suspended = 1;
397 dev_dbg(dev, "suspending...\n");
399 ehci->rh_state = EHCI_RH_SUSPENDED;
400 dev->power.power_state = PMSG_SUSPEND;
402 /* ignore non-host interrupts */
403 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
405 /* stop the controller */
406 tmp = ehci_readl(ehci, &ehci->regs->command);
408 ehci_writel(ehci, tmp, &ehci->regs->command);
410 /* save EHCI registers */
411 pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
412 pdata->pm_command &= ~CMD_RUN;
413 pdata->pm_status = ehci_readl(ehci, &ehci->regs->status);
414 pdata->pm_intr_enable = ehci_readl(ehci, &ehci->regs->intr_enable);
415 pdata->pm_frame_index = ehci_readl(ehci, &ehci->regs->frame_index);
416 pdata->pm_segment = ehci_readl(ehci, &ehci->regs->segment);
417 pdata->pm_frame_list = ehci_readl(ehci, &ehci->regs->frame_list);
418 pdata->pm_async_next = ehci_readl(ehci, &ehci->regs->async_next);
419 pdata->pm_configured_flag =
420 ehci_readl(ehci, &ehci->regs->configured_flag);
421 pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
422 pdata->pm_usbgenctrl = ehci_readl(ehci,
423 hcd->regs + FSL_SOC_USB_USBGENCTRL);
425 /* clear the W1C bits */
426 pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
428 pdata->suspended = 1;
430 /* clear PP to cut power to the port */
431 tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
433 ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
438 static int ehci_fsl_mpc512x_drv_resume(struct device *dev)
440 struct usb_hcd *hcd = dev_get_drvdata(dev);
441 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
442 struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
445 dev_dbg(dev, "suspend=%d already_suspended=%d\n",
446 pdata->suspended, pdata->already_suspended);
449 * If the controller was already suspended at suspend time,
450 * then don't resume it now.
452 if (pdata->already_suspended) {
453 dev_dbg(dev, "already suspended, leaving early\n");
454 pdata->already_suspended = 0;
458 if (!pdata->suspended) {
459 dev_dbg(dev, "not suspended, leaving early\n");
463 pdata->suspended = 0;
465 dev_dbg(dev, "resuming...\n");
468 tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
469 ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
471 ehci_writel(ehci, pdata->pm_usbgenctrl,
472 hcd->regs + FSL_SOC_USB_USBGENCTRL);
473 ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
474 hcd->regs + FSL_SOC_USB_ISIPHYCTRL);
476 ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
478 /* restore EHCI registers */
479 ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
480 ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
481 ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
482 ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
483 ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
484 ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
485 ehci_writel(ehci, pdata->pm_configured_flag,
486 &ehci->regs->configured_flag);
487 ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
489 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
490 ehci->rh_state = EHCI_RH_RUNNING;
491 dev->power.power_state = PMSG_ON;
493 tmp = ehci_readl(ehci, &ehci->regs->command);
495 ehci_writel(ehci, tmp, &ehci->regs->command);
497 usb_hcd_resume_root_hub(hcd);
502 static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
507 static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev)
511 #endif /* CONFIG_PPC_MPC512x */
513 static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
515 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
517 return container_of(ehci, struct ehci_fsl, ehci);
520 static int ehci_fsl_drv_suspend(struct device *dev)
522 struct usb_hcd *hcd = dev_get_drvdata(dev);
523 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
524 void __iomem *non_ehci = hcd->regs;
526 if (of_device_is_compatible(dev->parent->of_node,
527 "fsl,mpc5121-usb2-dr")) {
528 return ehci_fsl_mpc512x_drv_suspend(dev);
531 ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
532 device_may_wakeup(dev));
533 if (!fsl_deep_sleep())
536 ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL);
540 static int ehci_fsl_drv_resume(struct device *dev)
542 struct usb_hcd *hcd = dev_get_drvdata(dev);
543 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
544 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
545 void __iomem *non_ehci = hcd->regs;
547 if (of_device_is_compatible(dev->parent->of_node,
548 "fsl,mpc5121-usb2-dr")) {
549 return ehci_fsl_mpc512x_drv_resume(dev);
552 ehci_prepare_ports_for_controller_resume(ehci);
553 if (!fsl_deep_sleep())
556 usb_root_hub_lost_power(hcd->self.root_hub);
558 /* Restore USB PHY settings and enable the controller. */
559 out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl);
562 ehci_fsl_reinit(ehci);
567 static int ehci_fsl_drv_restore(struct device *dev)
569 struct usb_hcd *hcd = dev_get_drvdata(dev);
571 usb_root_hub_lost_power(hcd->self.root_hub);
575 static struct dev_pm_ops ehci_fsl_pm_ops = {
576 .suspend = ehci_fsl_drv_suspend,
577 .resume = ehci_fsl_drv_resume,
578 .restore = ehci_fsl_drv_restore,
581 #define EHCI_FSL_PM_OPS (&ehci_fsl_pm_ops)
583 #define EHCI_FSL_PM_OPS NULL
584 #endif /* CONFIG_PM */
586 #ifdef CONFIG_USB_OTG
587 static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port)
589 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
597 /* start port reset before HNP protocol time out */
598 status = readl(&ehci->regs->port_status[port]);
599 if (!(status & PORT_CONNECT))
602 /* hub_wq will finish the reset later */
603 if (ehci_is_TDI(ehci)) {
605 (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)),
606 &ehci->regs->port_status[port]);
608 writel(PORT_RESET, &ehci->regs->port_status[port]);
614 #define ehci_start_port_reset NULL
615 #endif /* CONFIG_USB_OTG */
617 static struct ehci_driver_overrides ehci_fsl_overrides __initdata = {
618 .extra_priv_size = sizeof(struct ehci_fsl),
619 .reset = ehci_fsl_setup,
623 * fsl_ehci_drv_remove - shutdown processing for FSL-based HCDs
624 * @dev: USB Host Controller being removed
625 * Context: !in_interrupt()
627 * Reverses the effect of usb_hcd_fsl_probe().
631 static int fsl_ehci_drv_remove(struct platform_device *pdev)
633 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
634 struct usb_hcd *hcd = platform_get_drvdata(pdev);
636 if (!IS_ERR_OR_NULL(hcd->usb_phy)) {
637 otg_set_host(hcd->usb_phy->otg, NULL);
638 usb_put_phy(hcd->usb_phy);
644 * do platform specific un-initialization:
645 * release iomux pins, disable clock, etc.
654 static struct platform_driver ehci_fsl_driver = {
655 .probe = fsl_ehci_drv_probe,
656 .remove = fsl_ehci_drv_remove,
657 .shutdown = usb_hcd_platform_shutdown,
660 .pm = EHCI_FSL_PM_OPS,
664 static int __init ehci_fsl_init(void)
669 pr_info(DRV_NAME ": " DRIVER_DESC "\n");
671 ehci_init_driver(&fsl_ehci_hc_driver, &ehci_fsl_overrides);
673 fsl_ehci_hc_driver.product_desc =
674 "Freescale On-Chip EHCI Host Controller";
675 fsl_ehci_hc_driver.start_port_reset = ehci_start_port_reset;
678 return platform_driver_register(&ehci_fsl_driver);
680 module_init(ehci_fsl_init);
682 static void __exit ehci_fsl_cleanup(void)
684 platform_driver_unregister(&ehci_fsl_driver);
686 module_exit(ehci_fsl_cleanup);
688 MODULE_DESCRIPTION(DRIVER_DESC);
689 MODULE_LICENSE("GPL");
690 MODULE_ALIAS("platform:" DRV_NAME);