2 * Copyright 2005-2009 MontaVista Software, Inc.
3 * Copyright 2008,2012 Freescale Semiconductor, Inc.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided
21 * Power Management support by Dave Liu <daveliu@freescale.com>,
22 * Jerry Huang <Chang-Ming.Huang@freescale.com> and
23 * Anton Vorontsov <avorontsov@ru.mvista.com>.
26 #include <linux/kernel.h>
27 #include <linux/types.h>
28 #include <linux/delay.h>
30 #include <linux/err.h>
31 #include <linux/platform_device.h>
32 #include <linux/fsl_devices.h>
36 /* configure so an HC device and id are always provided */
37 /* always called with process context; sleeping is OK */
40 * usb_hcd_fsl_probe - initialize FSL-based HCDs
41 * @drvier: Driver to be used for this HCD
42 * @pdev: USB Host Controller being probed
43 * Context: !in_interrupt()
45 * Allocates basic resources for this USB host controller.
48 static int usb_hcd_fsl_probe(const struct hc_driver *driver,
49 struct platform_device *pdev)
51 struct fsl_usb2_platform_data *pdata;
57 pr_debug("initializing FSL-SOC USB Controller\n");
59 /* Need platform data for setup */
60 pdata = (struct fsl_usb2_platform_data *)dev_get_platdata(&pdev->dev);
63 "No platform data for %s.\n", dev_name(&pdev->dev));
68 * This is a host mode driver, verify that we're supposed to be
71 if (!((pdata->operating_mode == FSL_USB2_DR_HOST) ||
72 (pdata->operating_mode == FSL_USB2_MPH_HOST) ||
73 (pdata->operating_mode == FSL_USB2_DR_OTG))) {
75 "Non Host Mode configured for %s. Wrong driver linked.\n",
76 dev_name(&pdev->dev));
80 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
83 "Found HC with no IRQ. Check %s setup!\n",
84 dev_name(&pdev->dev));
89 hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
95 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
98 "Found HC with no register addr. Check %s setup!\n",
99 dev_name(&pdev->dev));
103 hcd->rsrc_start = res->start;
104 hcd->rsrc_len = resource_size(res);
105 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
106 driver->description)) {
107 dev_dbg(&pdev->dev, "controller already in use\n");
111 hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
113 if (hcd->regs == NULL) {
114 dev_dbg(&pdev->dev, "error mapping memory\n");
119 pdata->regs = hcd->regs;
121 if (pdata->power_budget)
122 hcd->power_budget = pdata->power_budget;
125 * do platform specific init: check the clock, grab/config pins, etc.
127 if (pdata->init && pdata->init(pdev)) {
132 /* Enable USB controller, 83xx or 8536 */
133 if (pdata->have_sysif_regs)
134 setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
136 /* Don't need to set host mode here. It will be done by tdi_reset() */
138 retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
142 #ifdef CONFIG_USB_OTG
143 if (pdata->operating_mode == FSL_USB2_DR_OTG) {
144 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
146 hcd->phy = usb_get_phy(USB_PHY_TYPE_USB2);
147 dev_dbg(&pdev->dev, "hcd=0x%p ehci=0x%p, phy=0x%p\n",
148 hcd, ehci, hcd->phy);
150 if (!IS_ERR_OR_NULL(hcd->phy)) {
151 retval = otg_set_host(hcd->phy->otg,
152 &ehci_to_hcd(ehci)->self);
154 usb_put_phy(hcd->phy);
158 dev_err(&pdev->dev, "can't find phy\n");
169 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
173 dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
179 /* may be called without controller electrically present */
180 /* may be called with controller, bus, and devices active */
183 * usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs
184 * @dev: USB Host Controller being removed
185 * Context: !in_interrupt()
187 * Reverses the effect of usb_hcd_fsl_probe().
190 static void usb_hcd_fsl_remove(struct usb_hcd *hcd,
191 struct platform_device *pdev)
193 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
195 if (!IS_ERR_OR_NULL(hcd->phy)) {
196 otg_set_host(hcd->phy->otg, NULL);
197 usb_put_phy(hcd->phy);
203 * do platform specific un-initialization:
204 * release iomux pins, disable clock, etc.
209 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
213 static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
214 enum fsl_usb2_phy_modes phy_mode,
215 unsigned int port_offset)
218 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
219 void __iomem *non_ehci = hcd->regs;
220 struct device *dev = hcd->self.controller;
221 struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
223 if (pdata->controller_ver < 0) {
224 dev_warn(hcd->self.controller, "Could not get controller version\n");
228 portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
229 portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
232 case FSL_USB2_PHY_ULPI:
233 if (pdata->have_sysif_regs && pdata->controller_ver) {
234 /* controller version 1.6 or above */
235 setbits32(non_ehci + FSL_SOC_USB_CTRL,
238 * Due to controller issue of PHY_CLK_VALID in ULPI
239 * mode, we set USB_CTRL_USB_EN before checking
240 * PHY_CLK_VALID, otherwise PHY_CLK_VALID doesn't work.
242 clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
243 UTMI_PHY_EN, USB_CTRL_USB_EN);
245 portsc |= PORT_PTS_ULPI;
247 case FSL_USB2_PHY_SERIAL:
248 portsc |= PORT_PTS_SERIAL;
250 case FSL_USB2_PHY_UTMI_WIDE:
251 portsc |= PORT_PTS_PTW;
253 case FSL_USB2_PHY_UTMI:
254 if (pdata->have_sysif_regs && pdata->controller_ver) {
255 /* controller version 1.6 or above */
256 setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
257 mdelay(FSL_UTMI_PHY_DLY); /* Delay for UTMI PHY CLK to
258 become stable - 10ms*/
260 /* enable UTMI PHY */
261 if (pdata->have_sysif_regs)
262 setbits32(non_ehci + FSL_SOC_USB_CTRL,
264 portsc |= PORT_PTS_UTMI;
266 case FSL_USB2_PHY_NONE:
270 if (pdata->have_sysif_regs && pdata->controller_ver &&
271 (phy_mode == FSL_USB2_PHY_ULPI)) {
272 /* check PHY_CLK_VALID to get phy clk valid */
273 if (!spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
274 PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0)) {
275 printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
280 ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
282 if (phy_mode != FSL_USB2_PHY_ULPI && pdata->have_sysif_regs)
283 setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN);
288 static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
290 struct usb_hcd *hcd = ehci_to_hcd(ehci);
291 struct fsl_usb2_platform_data *pdata;
292 void __iomem *non_ehci = hcd->regs;
294 pdata = dev_get_platdata(hcd->self.controller);
296 if (pdata->have_sysif_regs) {
298 * Turn on cache snooping hardware, since some PowerPC platforms
299 * wholly rely on hardware to deal with cache coherent
302 /* Setup Snooping for all the 4GB space */
303 /* SNOOP1 starts from 0x0, size 2G */
304 out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB);
305 /* SNOOP2 starts from 0x80000000, size 2G */
306 out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
309 if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
310 (pdata->operating_mode == FSL_USB2_DR_OTG))
311 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
314 if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
315 unsigned int chip, rev, svr;
317 svr = mfspr(SPRN_SVR);
319 rev = (svr >> 4) & 0xf;
321 /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
322 if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
323 ehci->has_fsl_port_bug = 1;
325 if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
326 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
329 if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
330 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1))
334 if (pdata->have_sysif_regs) {
335 #ifdef CONFIG_FSL_SOC_BOOKE
336 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
337 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
339 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
340 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
342 out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
348 /* called after powerup, by probe or system-pm "wakeup" */
349 static int ehci_fsl_reinit(struct ehci_hcd *ehci)
351 if (ehci_fsl_usb_setup(ehci))
357 /* called during probe() after chip reset completes */
358 static int ehci_fsl_setup(struct usb_hcd *hcd)
360 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
362 struct fsl_usb2_platform_data *pdata;
365 dev = hcd->self.controller;
366 pdata = dev_get_platdata(hcd->self.controller);
367 ehci->big_endian_desc = pdata->big_endian_desc;
368 ehci->big_endian_mmio = pdata->big_endian_mmio;
370 /* EHCI registers start at offset 0x100 */
371 ehci->caps = hcd->regs + 0x100;
373 #ifdef CONFIG_PPC_83xx
375 * Deal with MPC834X that need port power to be cycled after the power
376 * fault condition is removed. Otherwise the state machine does not
377 * reflect PORTSC[CSC] correctly.
379 ehci->need_oc_pp_cycle = 1;
384 retval = ehci_setup(hcd);
388 if (of_device_is_compatible(dev->parent->of_node,
389 "fsl,mpc5121-usb2-dr")) {
391 * set SBUSCFG:AHBBRST so that control msgs don't
392 * fail when doing heavy PATA writes.
394 ehci_writel(ehci, SBUSCFG_INCR8,
395 hcd->regs + FSL_SOC_USB_SBUSCFG);
398 retval = ehci_fsl_reinit(ehci);
403 struct ehci_hcd ehci;
406 /* Saved USB PHY settings, need to restore after deep sleep. */
413 #ifdef CONFIG_PPC_MPC512x
414 static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
416 struct usb_hcd *hcd = dev_get_drvdata(dev);
417 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
418 struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
421 #if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG)
422 u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
423 mode &= USBMODE_CM_MASK;
424 tmp = ehci_readl(ehci, hcd->regs + 0x140); /* usbcmd */
426 dev_dbg(dev, "suspend=%d already_suspended=%d "
427 "mode=%d usbcmd %08x\n", pdata->suspended,
428 pdata->already_suspended, mode, tmp);
432 * If the controller is already suspended, then this must be a
433 * PM suspend. Remember this fact, so that we will leave the
434 * controller suspended at PM resume time.
436 if (pdata->suspended) {
437 dev_dbg(dev, "already suspended, leaving early\n");
438 pdata->already_suspended = 1;
442 dev_dbg(dev, "suspending...\n");
444 ehci->rh_state = EHCI_RH_SUSPENDED;
445 dev->power.power_state = PMSG_SUSPEND;
447 /* ignore non-host interrupts */
448 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
450 /* stop the controller */
451 tmp = ehci_readl(ehci, &ehci->regs->command);
453 ehci_writel(ehci, tmp, &ehci->regs->command);
455 /* save EHCI registers */
456 pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
457 pdata->pm_command &= ~CMD_RUN;
458 pdata->pm_status = ehci_readl(ehci, &ehci->regs->status);
459 pdata->pm_intr_enable = ehci_readl(ehci, &ehci->regs->intr_enable);
460 pdata->pm_frame_index = ehci_readl(ehci, &ehci->regs->frame_index);
461 pdata->pm_segment = ehci_readl(ehci, &ehci->regs->segment);
462 pdata->pm_frame_list = ehci_readl(ehci, &ehci->regs->frame_list);
463 pdata->pm_async_next = ehci_readl(ehci, &ehci->regs->async_next);
464 pdata->pm_configured_flag =
465 ehci_readl(ehci, &ehci->regs->configured_flag);
466 pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
467 pdata->pm_usbgenctrl = ehci_readl(ehci,
468 hcd->regs + FSL_SOC_USB_USBGENCTRL);
470 /* clear the W1C bits */
471 pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
473 pdata->suspended = 1;
475 /* clear PP to cut power to the port */
476 tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
478 ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
483 static int ehci_fsl_mpc512x_drv_resume(struct device *dev)
485 struct usb_hcd *hcd = dev_get_drvdata(dev);
486 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
487 struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
490 dev_dbg(dev, "suspend=%d already_suspended=%d\n",
491 pdata->suspended, pdata->already_suspended);
494 * If the controller was already suspended at suspend time,
495 * then don't resume it now.
497 if (pdata->already_suspended) {
498 dev_dbg(dev, "already suspended, leaving early\n");
499 pdata->already_suspended = 0;
503 if (!pdata->suspended) {
504 dev_dbg(dev, "not suspended, leaving early\n");
508 pdata->suspended = 0;
510 dev_dbg(dev, "resuming...\n");
513 tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
514 ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
516 ehci_writel(ehci, pdata->pm_usbgenctrl,
517 hcd->regs + FSL_SOC_USB_USBGENCTRL);
518 ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
519 hcd->regs + FSL_SOC_USB_ISIPHYCTRL);
521 ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
523 /* restore EHCI registers */
524 ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
525 ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
526 ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
527 ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
528 ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
529 ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
530 ehci_writel(ehci, pdata->pm_configured_flag,
531 &ehci->regs->configured_flag);
532 ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
534 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
535 ehci->rh_state = EHCI_RH_RUNNING;
536 dev->power.power_state = PMSG_ON;
538 tmp = ehci_readl(ehci, &ehci->regs->command);
540 ehci_writel(ehci, tmp, &ehci->regs->command);
542 usb_hcd_resume_root_hub(hcd);
547 static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
552 static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev)
556 #endif /* CONFIG_PPC_MPC512x */
558 static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
560 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
562 return container_of(ehci, struct ehci_fsl, ehci);
565 static int ehci_fsl_drv_suspend(struct device *dev)
567 struct usb_hcd *hcd = dev_get_drvdata(dev);
568 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
569 void __iomem *non_ehci = hcd->regs;
571 if (of_device_is_compatible(dev->parent->of_node,
572 "fsl,mpc5121-usb2-dr")) {
573 return ehci_fsl_mpc512x_drv_suspend(dev);
576 ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
577 device_may_wakeup(dev));
578 if (!fsl_deep_sleep())
581 ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL);
585 static int ehci_fsl_drv_resume(struct device *dev)
587 struct usb_hcd *hcd = dev_get_drvdata(dev);
588 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
589 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
590 void __iomem *non_ehci = hcd->regs;
592 if (of_device_is_compatible(dev->parent->of_node,
593 "fsl,mpc5121-usb2-dr")) {
594 return ehci_fsl_mpc512x_drv_resume(dev);
597 ehci_prepare_ports_for_controller_resume(ehci);
598 if (!fsl_deep_sleep())
601 usb_root_hub_lost_power(hcd->self.root_hub);
603 /* Restore USB PHY settings and enable the controller. */
604 out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl);
607 ehci_fsl_reinit(ehci);
612 static int ehci_fsl_drv_restore(struct device *dev)
614 struct usb_hcd *hcd = dev_get_drvdata(dev);
616 usb_root_hub_lost_power(hcd->self.root_hub);
620 static struct dev_pm_ops ehci_fsl_pm_ops = {
621 .suspend = ehci_fsl_drv_suspend,
622 .resume = ehci_fsl_drv_resume,
623 .restore = ehci_fsl_drv_restore,
626 #define EHCI_FSL_PM_OPS (&ehci_fsl_pm_ops)
628 #define EHCI_FSL_PM_OPS NULL
629 #endif /* CONFIG_PM */
631 #ifdef CONFIG_USB_OTG
632 static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port)
634 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
642 /* start port reset before HNP protocol time out */
643 status = readl(&ehci->regs->port_status[port]);
644 if (!(status & PORT_CONNECT))
647 /* khubd will finish the reset later */
648 if (ehci_is_TDI(ehci)) {
650 (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)),
651 &ehci->regs->port_status[port]);
653 writel(PORT_RESET, &ehci->regs->port_status[port]);
659 #define ehci_start_port_reset NULL
660 #endif /* CONFIG_USB_OTG */
663 static const struct hc_driver ehci_fsl_hc_driver = {
664 .description = hcd_name,
665 .product_desc = "Freescale On-Chip EHCI Host Controller",
666 .hcd_priv_size = sizeof(struct ehci_fsl),
669 * generic hardware linkage
672 .flags = HCD_USB2 | HCD_MEMORY | HCD_BH,
675 * basic lifecycle operations
677 .reset = ehci_fsl_setup,
680 .shutdown = ehci_shutdown,
683 * managing i/o requests and associated device resources
685 .urb_enqueue = ehci_urb_enqueue,
686 .urb_dequeue = ehci_urb_dequeue,
687 .endpoint_disable = ehci_endpoint_disable,
688 .endpoint_reset = ehci_endpoint_reset,
693 .get_frame_number = ehci_get_frame,
698 .hub_status_data = ehci_hub_status_data,
699 .hub_control = ehci_hub_control,
700 .bus_suspend = ehci_bus_suspend,
701 .bus_resume = ehci_bus_resume,
702 .start_port_reset = ehci_start_port_reset,
703 .relinquish_port = ehci_relinquish_port,
704 .port_handed_over = ehci_port_handed_over,
706 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
709 static int ehci_fsl_drv_probe(struct platform_device *pdev)
714 /* FIXME we only want one one probe() not two */
715 return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev);
718 static int ehci_fsl_drv_remove(struct platform_device *pdev)
720 struct usb_hcd *hcd = platform_get_drvdata(pdev);
722 /* FIXME we only want one one remove() not two */
723 usb_hcd_fsl_remove(hcd, pdev);
727 MODULE_ALIAS("platform:fsl-ehci");
729 static struct platform_driver ehci_fsl_driver = {
730 .probe = ehci_fsl_drv_probe,
731 .remove = ehci_fsl_drv_remove,
732 .shutdown = usb_hcd_platform_shutdown,
735 .owner = THIS_MODULE,
736 .pm = EHCI_FSL_PM_OPS,