Merge tag 'xilinx-for-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u...
[platform/kernel/u-boot.git] / drivers / usb / host / ehci-atmel.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2012
4  * Atmel Semiconductor <www.atmel.com>
5  * Written-by: Bo Shen <voice.shen@atmel.com>
6  */
7
8 #include <common.h>
9 #include <clk.h>
10 #include <dm.h>
11 #include <malloc.h>
12 #include <usb.h>
13 #include <asm/io.h>
14 #include <asm/arch/clk.h>
15
16 #include "ehci.h"
17
18 #if !CONFIG_IS_ENABLED(DM_USB)
19
20 int ehci_hcd_init(int index, enum usb_init_type init,
21                 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
22 {
23         /* Enable UTMI PLL */
24         if (at91_upll_clk_enable())
25                 return -1;
26
27         /* Enable USB Host clock */
28         at91_periph_clk_enable(ATMEL_ID_UHPHS);
29
30         *hccr = (struct ehci_hccr *)ATMEL_BASE_EHCI;
31         *hcor = (struct ehci_hcor *)((uint32_t)*hccr +
32                         HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
33
34         return 0;
35 }
36
37 int ehci_hcd_stop(int index)
38 {
39         /* Disable USB Host Clock */
40         at91_periph_clk_disable(ATMEL_ID_UHPHS);
41
42         /* Disable UTMI PLL */
43         if (at91_upll_clk_disable())
44                 return -1;
45
46         return 0;
47 }
48
49 #else
50
51 struct ehci_atmel_priv {
52         struct ehci_ctrl ehci;
53 };
54
55 static int ehci_atmel_enable_clk(struct udevice *dev)
56 {
57         struct clk clk;
58         int ret;
59
60         ret = clk_get_by_index(dev, 0, &clk);
61         if (ret)
62                 return ret;
63
64         ret = clk_enable(&clk);
65         if (ret)
66                 return ret;
67
68         ret = clk_get_by_index(dev, 1, &clk);
69         if (ret)
70                 return -EINVAL;
71
72         ret = clk_enable(&clk);
73         if (ret)
74                 return ret;
75
76         clk_free(&clk);
77
78         return 0;
79 }
80
81 static int ehci_atmel_probe(struct udevice *dev)
82 {
83         struct ehci_hccr *hccr;
84         struct ehci_hcor *hcor;
85         fdt_addr_t hcd_base;
86         int ret;
87
88         ret = ehci_atmel_enable_clk(dev);
89         if (ret) {
90                 debug("Failed to enable USB Host clock\n");
91                 return ret;
92         }
93
94         /*
95          * Get the base address for EHCI controller from the device node
96          */
97         hcd_base = devfdt_get_addr(dev);
98         if (hcd_base == FDT_ADDR_T_NONE) {
99                 debug("Can't get the EHCI register base address\n");
100                 return -ENXIO;
101         }
102
103         hccr = (struct ehci_hccr *)hcd_base;
104         hcor = (struct ehci_hcor *)
105                 ((u32)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
106
107         debug("echi-atmel: init hccr %x and hcor %x hc_length %d\n",
108               (u32)hccr, (u32)hcor,
109               (u32)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
110
111         return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
112 }
113
114 static const struct udevice_id ehci_usb_ids[] = {
115         { .compatible = "atmel,at91sam9g45-ehci", },
116         { }
117 };
118
119 U_BOOT_DRIVER(ehci_atmel) = {
120         .name           = "ehci_atmel",
121         .id             = UCLASS_USB,
122         .of_match       = ehci_usb_ids,
123         .probe          = ehci_atmel_probe,
124         .remove         = ehci_deregister,
125         .ops            = &ehci_usb_ops,
126         .platdata_auto_alloc_size = sizeof(struct usb_platdata),
127         .priv_auto_alloc_size = sizeof(struct ehci_atmel_priv),
128         .flags          = DM_FLAG_ALLOC_PRIV_DMA,
129 };
130
131 #endif