drivers/usb/host/ehci-atmel.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2012
   4  * Atmel Semiconductor <www.atmel.com>
   5  * Written-by: Bo Shen <voice.shen@atmel.com>
   6  */
   7
   8 #include <common.h>
   9 #include <clk.h>
  10 #include <dm.h>
  11 #include <usb.h>
  12 #include <asm/io.h>
  13 #include <asm/arch/clk.h>
  14
  15 #include "ehci.h"
  16
  17 #ifndef CONFIG_DM_USB
  18
  19 int ehci_hcd_init(int index, enum usb_init_type init,
  20                 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
  21 {
  22         /* Enable UTMI PLL */
  23         if (at91_upll_clk_enable())
  24                 return -1;
  25
  26         /* Enable USB Host clock */
  27         at91_periph_clk_enable(ATMEL_ID_UHPHS);
  28
  29         *hccr = (struct ehci_hccr *)ATMEL_BASE_EHCI;
  30         *hcor = (struct ehci_hcor *)((uint32_t)*hccr +
  31                         HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
  32
  33         return 0;
  34 }
  35
  36 int ehci_hcd_stop(int index)
  37 {
  38         /* Disable USB Host Clock */
  39         at91_periph_clk_disable(ATMEL_ID_UHPHS);
  40
  41         /* Disable UTMI PLL */
  42         if (at91_upll_clk_disable())
  43                 return -1;
  44
  45         return 0;
  46 }
  47
  48 #else
  49
  50 struct ehci_atmel_priv {
  51         struct ehci_ctrl ehci;
  52 };
  53
  54 static int ehci_atmel_enable_clk(struct udevice *dev)
  55 {
  56         struct clk clk;
  57         int ret;
  58
  59         ret = clk_get_by_index(dev, 0, &clk);
  60         if (ret)
  61                 return ret;
  62
  63         ret = clk_enable(&clk);
  64         if (ret)
  65                 return ret;
  66
  67         ret = clk_get_by_index(dev, 1, &clk);
  68         if (ret)
  69                 return -EINVAL;
  70
  71         ret = clk_enable(&clk);
  72         if (ret)
  73                 return ret;
  74
  75         clk_free(&clk);
  76
  77         return 0;
  78 }
  79
  80 static int ehci_atmel_probe(struct udevice *dev)
  81 {
  82         struct ehci_hccr *hccr;
  83         struct ehci_hcor *hcor;
  84         fdt_addr_t hcd_base;
  85         int ret;
  86
  87         ret = ehci_atmel_enable_clk(dev);
  88         if (ret) {
  89                 debug("Failed to enable USB Host clock\n");
  90                 return ret;
  91         }
  92
  93         /*
  94          * Get the base address for EHCI controller from the device node
  95          */
  96         hcd_base = devfdt_get_addr(dev);
  97         if (hcd_base == FDT_ADDR_T_NONE) {
  98                 debug("Can't get the EHCI register base address\n");
  99                 return -ENXIO;
 100         }
 101
 102         hccr = (struct ehci_hccr *)hcd_base;
 103         hcor = (struct ehci_hcor *)
 104                 ((u32)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
 105
 106         debug("echi-atmel: init hccr %x and hcor %x hc_length %d\n",
 107               (u32)hccr, (u32)hcor,
 108               (u32)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
 109
 110         return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
 111 }
 112
 113 static const struct udevice_id ehci_usb_ids[] = {
 114         { .compatible = "atmel,at91sam9g45-ehci", },
 115         { }
 116 };
 117
 118 U_BOOT_DRIVER(ehci_atmel) = {
 119         .name           = "ehci_atmel",
 120         .id             = UCLASS_USB,
 121         .of_match       = ehci_usb_ids,
 122         .probe          = ehci_atmel_probe,
 123         .remove         = ehci_deregister,
 124         .ops            = &ehci_usb_ops,
 125         .platdata_auto_alloc_size = sizeof(struct usb_platdata),
 126         .priv_auto_alloc_size = sizeof(struct ehci_atmel_priv),
 127         .flags          = DM_FLAG_ALLOC_PRIV_DMA,
 128 };
 129
 130 #endif