1 /* ==========================================================================
2 * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_pcd.h $
7 * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
8 * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
9 * otherwise expressly agreed to in writing between Synopsys and you.
11 * The Software IS NOT an item of Licensed Software or Licensed Product under
12 * any End User Software License Agreement or Agreement for Licensed Product
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14 * redistribute this Software in source and binary forms, with or without
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19 * below, then you are not authorized to use the Software.
21 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
32 * ========================================================================== */
34 #if !defined(__DWC_PCD_H__)
37 #include "dwc_otg_os_dep.h"
39 #include "dwc_otg_cil.h"
40 #include "dwc_otg_pcd_if.h"
41 #include "dwc_otg_driver.h"
48 * This file contains the structures, constants, and interfaces for
49 * the Perpherial Contoller Driver (PCD).
51 * The Peripheral Controller Driver (PCD) for Linux will implement the
52 * Gadget API, so that the existing Gadget drivers can be used. For
53 * the Mass Storage Function driver the File-backed USB Storage Gadget
54 * (FBS) driver will be used. The FBS driver supports the
55 * Control-Bulk (CB), Control-Bulk-Interrupt (CBI), and Bulk-Only
60 /** Invalid DMA Address */
61 #define DWC_DMA_ADDR_INVALID (~(dwc_dma_t)0)
63 /** Max Transfer size for any EP */
64 #define DDMA_MAX_TRANSFER_SIZE 65535
67 * Get the pointer to the core_if from the pcd pointer.
69 #define GET_CORE_IF( _pcd ) (_pcd->core_if)
74 typedef enum ep0_state {
75 EP0_DISCONNECT, /* no host */
84 /** Fordward declaration.*/
87 /** DWC_otg iso request structure.
90 typedef struct usb_iso_request dwc_otg_pcd_iso_request_t;
95 * This shall be the exact analogy of the same type structure defined in the
96 * usb_gadget.h. Each descriptor contains
98 struct dwc_iso_pkt_desc_port {
100 uint32_t length; /* expected length */
101 uint32_t actual_length;
105 struct dwc_iso_xreq_port {
106 /** transfer/submission flag */
107 uint32_t tr_sub_flags;
108 /** Start the request ASAP */
109 #define DWC_EREQ_TF_ASAP 0x00000002
110 /** Just enqueue the request w/o initiating a transfer */
111 #define DWC_EREQ_TF_ENQUEUE 0x00000004
114 * count of ISO packets attached to this request - shall
115 * not exceed the pio_alloc_pkt_count
117 uint32_t pio_pkt_count;
118 /** count of ISO packets allocated for this request */
119 uint32_t pio_alloc_pkt_count;
120 /** number of ISO packet errors */
121 uint32_t error_count;
122 /** reserved for future extension */
124 /** Will be allocated and freed in the UTE gadget and based on the CFC value */
125 struct dwc_iso_pkt_desc_port *per_io_frame_descs;
128 /** DWC_otg request structure.
129 * This structure is a list of requests.
131 typedef struct dwc_otg_pcd_request {
139 * Used instead of original buffer if
140 * it(physical address) is not dword-aligned.
142 uint8_t *dw_align_buf;
143 dwc_dma_t dw_align_buf_dma;
145 DWC_CIRCLEQ_ENTRY(dwc_otg_pcd_request) queue_entry;
146 #ifdef DWC_UTE_PER_IO
147 struct dwc_iso_xreq_port ext_req;
148 //void *priv_ereq_nport; /* */
150 } dwc_otg_pcd_request_t;
152 DWC_CIRCLEQ_HEAD(req_list, dwc_otg_pcd_request);
154 /** PCD EP structure.
155 * This structure describes an EP, there is an array of EPs in the PCD
158 typedef struct dwc_otg_pcd_ep {
159 /** USB EP Descriptor */
160 const usb_endpoint_descriptor_t *desc;
162 /** queue of dwc_otg_pcd_requests. */
163 struct req_list queue;
165 unsigned disabling:1;
167 unsigned queue_sof:1;
170 /** ISOC req handle passed */
171 void *iso_req_handle;
174 /** DWC_otg ep data. */
177 /** Pointer to PCD */
178 struct dwc_otg_pcd *pcd;
183 /** DWC_otg PCD Structure.
184 * This structure encapsulates the data for the dwc_otg PCD.
187 const struct dwc_otg_pcd_function_ops *fops;
188 /** The DWC otg device pointer */
189 struct dwc_otg_device *otg_dev;
190 /** Core Interface */
191 dwc_otg_core_if_t *core_if;
194 /** EP0 Request is pending */
195 unsigned ep0_pending:1;
196 /** Indicates when SET CONFIGURATION Request is in process */
197 unsigned request_config:1;
198 /** The state of the Remote Wakeup Enable. */
199 unsigned remote_wakeup_enable:1;
200 /** The state of the B-Device HNP Enable. */
201 unsigned b_hnp_enable:1;
202 /** The state of A-Device HNP Support. */
203 unsigned a_hnp_support:1;
204 /** The state of the A-Device Alt HNP support. */
205 unsigned a_alt_hnp_support:1;
206 /** Count of pending Requests */
207 unsigned request_pending;
209 /** SETUP packet for EP0
210 * This structure is allocated as a DMA buffer on PCD initialization
211 * with enough space for up to 3 setup packets.
214 usb_device_request_t req;
218 dwc_dma_t setup_pkt_dma_handle;
220 /* Additional buffer and flag for CTRL_WR premature case */
222 unsigned data_terminated;
224 /** 2-byte dma buffer used to return status from GET_STATUS */
225 uint16_t *status_buf;
226 dwc_dma_t status_buf_dma_handle;
229 dwc_otg_pcd_ep_t ep0;
231 /** Array of IN EPs. */
232 dwc_otg_pcd_ep_t in_ep[MAX_EPS_CHANNELS - 1];
233 /** Array of OUT EPs. */
234 dwc_otg_pcd_ep_t out_ep[MAX_EPS_CHANNELS - 1];
235 /** number of valid EPs in the above array. */
236 // unsigned num_eps : 4;
237 dwc_spinlock_t *lock;
239 /** Tasklet to defer starting of TEST mode transmissions until
240 * Status Phase has been completed.
242 dwc_tasklet_t *test_mode_tasklet;
244 /** Tasklet to delay starting of xfer in DMA mode */
245 dwc_tasklet_t *start_xfer_tasklet;
247 /** The test mode to enter when the tasklet is executed. */
249 /** The cfi_api structure that implements most of the CFI API
250 * and OTG specific core configuration functionality
253 struct cfiobject *cfi;
258 static inline struct device *dwc_otg_pcd_to_dev(struct dwc_otg_pcd *pcd)
260 return &pcd->otg_dev->os_dep.platformdev->dev;
263 //FIXME this functions should be static, and this prototypes should be removed
264 extern void dwc_otg_request_nuke(dwc_otg_pcd_ep_t * ep);
265 extern void dwc_otg_request_done(dwc_otg_pcd_ep_t * ep,
266 dwc_otg_pcd_request_t * req, int32_t status);
268 void dwc_otg_iso_buffer_done(dwc_otg_pcd_t * pcd, dwc_otg_pcd_ep_t * ep,
271 extern void do_test_mode(void *data);
273 #endif /* DWC_HOST_ONLY */