1 // SPDX-License-Identifier: GPL-2.0+
3 * STiH407 family DWC3 specific Glue layer
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
6 * Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
16 #include <reset-uclass.h>
20 #include <linux/usb/dwc3.h>
21 #include <linux/usb/otg.h>
22 #include <dwc3-sti-glue.h>
24 DECLARE_GLOBAL_DATA_PTR;
27 * struct sti_dwc3_glue_plat - dwc3 STi glue driver private structure
28 * @syscfg_base: addr for the glue syscfg
29 * @glue_base: addr for the glue registers
30 * @syscfg_offset: usb syscfg control offset
31 * @powerdown_ctl: rest controller for powerdown signal
32 * @softreset_ctl: reset controller for softreset signal
33 * @mode: drd static host/device config
35 struct sti_dwc3_glue_plat {
36 phys_addr_t syscfg_base;
37 phys_addr_t glue_base;
38 phys_addr_t syscfg_offset;
39 struct reset_ctl powerdown_ctl;
40 struct reset_ctl softreset_ctl;
41 enum usb_dr_mode mode;
44 static int sti_dwc3_glue_drd_init(struct sti_dwc3_glue_plat *plat)
48 val = readl(plat->syscfg_base + plat->syscfg_offset);
50 val &= USB3_CONTROL_MASK;
53 case USB_DR_MODE_PERIPHERAL:
54 val &= ~(USB3_DELAY_VBUSVALID
55 | USB3_SEL_FORCE_OPMODE | USB3_FORCE_OPMODE(0x3)
56 | USB3_SEL_FORCE_DPPULLDOWN2 | USB3_FORCE_DPPULLDOWN2
57 | USB3_SEL_FORCE_DMPULLDOWN2 | USB3_FORCE_DMPULLDOWN2);
59 val |= USB3_DEVICE_NOT_HOST | USB3_FORCE_VBUSVALID;
62 case USB_DR_MODE_HOST:
63 val &= ~(USB3_DEVICE_NOT_HOST | USB3_FORCE_VBUSVALID
64 | USB3_SEL_FORCE_OPMODE | USB3_FORCE_OPMODE(0x3)
65 | USB3_SEL_FORCE_DPPULLDOWN2 | USB3_FORCE_DPPULLDOWN2
66 | USB3_SEL_FORCE_DMPULLDOWN2 | USB3_FORCE_DMPULLDOWN2);
68 val |= USB3_DELAY_VBUSVALID;
72 pr_err("Unsupported mode of operation %d\n", plat->mode);
75 writel(val, plat->syscfg_base + plat->syscfg_offset);
80 static void sti_dwc3_glue_init(struct sti_dwc3_glue_plat *plat)
84 reg = readl(plat->glue_base + CLKRST_CTRL);
86 reg |= AUX_CLK_EN | EXT_CFG_RESET_N | XHCI_REVISION;
87 reg &= ~SW_PIPEW_RESET_N;
89 writel(reg, plat->glue_base + CLKRST_CTRL);
91 /* configure mux for vbus, powerpresent and bvalid signals */
92 reg = readl(plat->glue_base + USB2_VBUS_MNGMNT_SEL1);
94 reg |= SEL_OVERRIDE_VBUSVALID(USB2_VBUS_UTMIOTG) |
95 SEL_OVERRIDE_POWERPRESENT(USB2_VBUS_UTMIOTG) |
96 SEL_OVERRIDE_BVALID(USB2_VBUS_UTMIOTG);
98 writel(reg, plat->glue_base + USB2_VBUS_MNGMNT_SEL1);
100 setbits_le32(plat->glue_base + CLKRST_CTRL, SW_PIPEW_RESET_N);
103 static int sti_dwc3_glue_of_to_plat(struct udevice *dev)
105 struct sti_dwc3_glue_plat *plat = dev_get_plat(dev);
106 struct udevice *syscon;
107 struct regmap *regmap;
111 ret = ofnode_read_u32_array(dev_ofnode(dev), "reg", reg,
114 pr_err("unable to find st,stih407-dwc3 reg property(%d)\n", ret);
118 plat->glue_base = reg[0];
119 plat->syscfg_offset = reg[2];
121 /* get corresponding syscon phandle */
122 ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "st,syscfg",
125 pr_err("unable to find syscon device (%d)\n", ret);
129 /* get syscfg-reg base address */
130 regmap = syscon_get_regmap(syscon);
132 pr_err("unable to find regmap\n");
135 plat->syscfg_base = regmap->ranges[0].start;
137 /* get powerdown reset */
138 ret = reset_get_by_name(dev, "powerdown", &plat->powerdown_ctl);
140 pr_err("can't get powerdown reset for %s (%d)", dev->name, ret);
144 /* get softreset reset */
145 ret = reset_get_by_name(dev, "softreset", &plat->softreset_ctl);
147 pr_err("can't get soft reset for %s (%d)", dev->name, ret);
152 static int sti_dwc3_glue_bind(struct udevice *dev)
154 struct sti_dwc3_glue_plat *plat = dev_get_plat(dev);
155 ofnode node, dwc3_node;
157 /* Find snps,dwc3 node from subnode */
158 ofnode_for_each_subnode(node, dev_ofnode(dev)) {
159 if (ofnode_device_is_compatible(node, "snps,dwc3"))
163 if (!ofnode_valid(dwc3_node)) {
164 pr_err("Can't find dwc3 subnode for %s\n", dev->name);
168 /* retrieve the DWC3 dual role mode */
169 plat->mode = usb_get_dr_mode(dwc3_node);
170 if (plat->mode == USB_DR_MODE_UNKNOWN)
171 /* by default set dual role mode to HOST */
172 plat->mode = USB_DR_MODE_HOST;
174 return dm_scan_fdt_dev(dev);
177 static int sti_dwc3_glue_probe(struct udevice *dev)
179 struct sti_dwc3_glue_plat *plat = dev_get_plat(dev);
182 /* deassert both powerdown and softreset */
183 ret = reset_deassert(&plat->powerdown_ctl);
185 pr_err("DWC3 powerdown reset deassert failed: %d", ret);
189 ret = reset_deassert(&plat->softreset_ctl);
191 pr_err("DWC3 soft reset deassert failed: %d", ret);
195 ret = sti_dwc3_glue_drd_init(plat);
199 sti_dwc3_glue_init(plat);
204 ret = reset_assert(&plat->softreset_ctl);
206 pr_err("DWC3 soft reset deassert failed: %d", ret);
211 ret = reset_assert(&plat->powerdown_ctl);
213 pr_err("DWC3 powerdown reset deassert failed: %d", ret);
218 static int sti_dwc3_glue_remove(struct udevice *dev)
220 struct sti_dwc3_glue_plat *plat = dev_get_plat(dev);
223 /* assert both powerdown and softreset */
224 ret = reset_assert(&plat->powerdown_ctl);
226 pr_err("DWC3 powerdown reset deassert failed: %d", ret);
230 ret = reset_assert(&plat->softreset_ctl);
232 pr_err("DWC3 soft reset deassert failed: %d", ret);
237 static const struct udevice_id sti_dwc3_glue_ids[] = {
238 { .compatible = "st,stih407-dwc3" },
242 U_BOOT_DRIVER(dwc3_sti_glue) = {
243 .name = "dwc3_sti_glue",
245 .of_match = sti_dwc3_glue_ids,
246 .of_to_plat = sti_dwc3_glue_of_to_plat,
247 .probe = sti_dwc3_glue_probe,
248 .remove = sti_dwc3_glue_remove,
249 .bind = sti_dwc3_glue_bind,
250 .plat_auto = sizeof(struct sti_dwc3_glue_plat),
251 .flags = DM_FLAG_ALLOC_PRIV_DMA,