Merge tag 'sound-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
[profile/ivi/kernel-adaptation-intel-automotive.git] / drivers / usb / gadget / pxa25x_udc.c
1 /*
2  * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
3  *
4  * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
5  * Copyright (C) 2003 Robert Schwebel, Pengutronix
6  * Copyright (C) 2003 Benedikt Spranger, Pengutronix
7  * Copyright (C) 2003 David Brownell
8  * Copyright (C) 2003 Joshua Wise
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License as published by
12  * the Free Software Foundation; either version 2 of the License, or
13  * (at your option) any later version.
14  */
15
16 /* #define VERBOSE_DEBUG */
17
18 #include <linux/device.h>
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/ioport.h>
22 #include <linux/types.h>
23 #include <linux/errno.h>
24 #include <linux/delay.h>
25 #include <linux/slab.h>
26 #include <linux/init.h>
27 #include <linux/timer.h>
28 #include <linux/list.h>
29 #include <linux/interrupt.h>
30 #include <linux/mm.h>
31 #include <linux/platform_device.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/irq.h>
34 #include <linux/clk.h>
35 #include <linux/err.h>
36 #include <linux/seq_file.h>
37 #include <linux/debugfs.h>
38 #include <linux/io.h>
39 #include <linux/prefetch.h>
40
41 #include <asm/byteorder.h>
42 #include <asm/dma.h>
43 #include <asm/gpio.h>
44 #include <asm/mach-types.h>
45 #include <asm/unaligned.h>
46
47 #include <linux/usb/ch9.h>
48 #include <linux/usb/gadget.h>
49 #include <linux/usb/otg.h>
50
51 /*
52  * This driver is PXA25x only.  Grab the right register definitions.
53  */
54 #ifdef CONFIG_ARCH_PXA
55 #include <mach/pxa25x-udc.h>
56 #endif
57
58 #ifdef CONFIG_ARCH_LUBBOCK
59 #include <mach/lubbock.h>
60 #endif
61
62 #include <asm/mach/udc_pxa2xx.h>
63
64
65 /*
66  * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
67  * series processors.  The UDC for the IXP 4xx series is very similar.
68  * There are fifteen endpoints, in addition to ep0.
69  *
70  * Such controller drivers work with a gadget driver.  The gadget driver
71  * returns descriptors, implements configuration and data protocols used
72  * by the host to interact with this device, and allocates endpoints to
73  * the different protocol interfaces.  The controller driver virtualizes
74  * usb hardware so that the gadget drivers will be more portable.
75  *
76  * This UDC hardware wants to implement a bit too much USB protocol, so
77  * it constrains the sorts of USB configuration change events that work.
78  * The errata for these chips are misleading; some "fixed" bugs from
79  * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
80  *
81  * Note that the UDC hardware supports DMA (except on IXP) but that's
82  * not used here.  IN-DMA (to host) is simple enough, when the data is
83  * suitably aligned (16 bytes) ... the network stack doesn't do that,
84  * other software can.  OUT-DMA is buggy in most chip versions, as well
85  * as poorly designed (data toggle not automatic).  So this driver won't
86  * bother using DMA.  (Mostly-working IN-DMA support was available in
87  * kernels before 2.6.23, but was never enabled or well tested.)
88  */
89
90 #define DRIVER_VERSION  "30-June-2007"
91 #define DRIVER_DESC     "PXA 25x USB Device Controller driver"
92
93
94 static const char driver_name [] = "pxa25x_udc";
95
96 static const char ep0name [] = "ep0";
97
98
99 #ifdef CONFIG_ARCH_IXP4XX
100
101 /* cpu-specific register addresses are compiled in to this code */
102 #ifdef CONFIG_ARCH_PXA
103 #error "Can't configure both IXP and PXA"
104 #endif
105
106 /* IXP doesn't yet support <linux/clk.h> */
107 #define clk_get(dev,name)       NULL
108 #define clk_enable(clk)         do { } while (0)
109 #define clk_disable(clk)        do { } while (0)
110 #define clk_put(clk)            do { } while (0)
111
112 #endif
113
114 #include "pxa25x_udc.h"
115
116
117 #ifdef  CONFIG_USB_PXA25X_SMALL
118 #define SIZE_STR        " (small)"
119 #else
120 #define SIZE_STR        ""
121 #endif
122
123 /* ---------------------------------------------------------------------------
124  *      endpoint related parts of the api to the usb controller hardware,
125  *      used by gadget driver; and the inner talker-to-hardware core.
126  * ---------------------------------------------------------------------------
127  */
128
129 static void pxa25x_ep_fifo_flush (struct usb_ep *ep);
130 static void nuke (struct pxa25x_ep *, int status);
131
132 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
133 static void pullup_off(void)
134 {
135         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
136         int off_level = mach->gpio_pullup_inverted;
137
138         if (gpio_is_valid(mach->gpio_pullup))
139                 gpio_set_value(mach->gpio_pullup, off_level);
140         else if (mach->udc_command)
141                 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
142 }
143
144 static void pullup_on(void)
145 {
146         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
147         int on_level = !mach->gpio_pullup_inverted;
148
149         if (gpio_is_valid(mach->gpio_pullup))
150                 gpio_set_value(mach->gpio_pullup, on_level);
151         else if (mach->udc_command)
152                 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
153 }
154
155 static void pio_irq_enable(int bEndpointAddress)
156 {
157         bEndpointAddress &= 0xf;
158         if (bEndpointAddress < 8)
159                 UICR0 &= ~(1 << bEndpointAddress);
160         else {
161                 bEndpointAddress -= 8;
162                 UICR1 &= ~(1 << bEndpointAddress);
163         }
164 }
165
166 static void pio_irq_disable(int bEndpointAddress)
167 {
168         bEndpointAddress &= 0xf;
169         if (bEndpointAddress < 8)
170                 UICR0 |= 1 << bEndpointAddress;
171         else {
172                 bEndpointAddress -= 8;
173                 UICR1 |= 1 << bEndpointAddress;
174         }
175 }
176
177 /* The UDCCR reg contains mask and interrupt status bits,
178  * so using '|=' isn't safe as it may ack an interrupt.
179  */
180 #define UDCCR_MASK_BITS         (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
181
182 static inline void udc_set_mask_UDCCR(int mask)
183 {
184         UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
185 }
186
187 static inline void udc_clear_mask_UDCCR(int mask)
188 {
189         UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
190 }
191
192 static inline void udc_ack_int_UDCCR(int mask)
193 {
194         /* udccr contains the bits we dont want to change */
195         __u32 udccr = UDCCR & UDCCR_MASK_BITS;
196
197         UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
198 }
199
200 /*
201  * endpoint enable/disable
202  *
203  * we need to verify the descriptors used to enable endpoints.  since pxa25x
204  * endpoint configurations are fixed, and are pretty much always enabled,
205  * there's not a lot to manage here.
206  *
207  * because pxa25x can't selectively initialize bulk (or interrupt) endpoints,
208  * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
209  * for a single interface (with only the default altsetting) and for gadget
210  * drivers that don't halt endpoints (not reset by set_interface).  that also
211  * means that if you use ISO, you must violate the USB spec rule that all
212  * iso endpoints must be in non-default altsettings.
213  */
214 static int pxa25x_ep_enable (struct usb_ep *_ep,
215                 const struct usb_endpoint_descriptor *desc)
216 {
217         struct pxa25x_ep        *ep;
218         struct pxa25x_udc       *dev;
219
220         ep = container_of (_ep, struct pxa25x_ep, ep);
221         if (!_ep || !desc || ep->ep.desc || _ep->name == ep0name
222                         || desc->bDescriptorType != USB_DT_ENDPOINT
223                         || ep->bEndpointAddress != desc->bEndpointAddress
224                         || ep->fifo_size < usb_endpoint_maxp (desc)) {
225                 DMSG("%s, bad ep or descriptor\n", __func__);
226                 return -EINVAL;
227         }
228
229         /* xfer types must match, except that interrupt ~= bulk */
230         if (ep->bmAttributes != desc->bmAttributes
231                         && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
232                         && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
233                 DMSG("%s, %s type mismatch\n", __func__, _ep->name);
234                 return -EINVAL;
235         }
236
237         /* hardware _could_ do smaller, but driver doesn't */
238         if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
239                                 && usb_endpoint_maxp (desc)
240                                                 != BULK_FIFO_SIZE)
241                         || !desc->wMaxPacketSize) {
242                 DMSG("%s, bad %s maxpacket\n", __func__, _ep->name);
243                 return -ERANGE;
244         }
245
246         dev = ep->dev;
247         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
248                 DMSG("%s, bogus device state\n", __func__);
249                 return -ESHUTDOWN;
250         }
251
252         ep->ep.desc = desc;
253         ep->stopped = 0;
254         ep->pio_irqs = 0;
255         ep->ep.maxpacket = usb_endpoint_maxp (desc);
256
257         /* flush fifo (mostly for OUT buffers) */
258         pxa25x_ep_fifo_flush (_ep);
259
260         /* ... reset halt state too, if we could ... */
261
262         DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
263         return 0;
264 }
265
266 static int pxa25x_ep_disable (struct usb_ep *_ep)
267 {
268         struct pxa25x_ep        *ep;
269         unsigned long           flags;
270
271         ep = container_of (_ep, struct pxa25x_ep, ep);
272         if (!_ep || !ep->ep.desc) {
273                 DMSG("%s, %s not enabled\n", __func__,
274                         _ep ? ep->ep.name : NULL);
275                 return -EINVAL;
276         }
277         local_irq_save(flags);
278
279         nuke (ep, -ESHUTDOWN);
280
281         /* flush fifo (mostly for IN buffers) */
282         pxa25x_ep_fifo_flush (_ep);
283
284         ep->ep.desc = NULL;
285         ep->stopped = 1;
286
287         local_irq_restore(flags);
288         DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
289         return 0;
290 }
291
292 /*-------------------------------------------------------------------------*/
293
294 /* for the pxa25x, these can just wrap kmalloc/kfree.  gadget drivers
295  * must still pass correctly initialized endpoints, since other controller
296  * drivers may care about how it's currently set up (dma issues etc).
297  */
298
299 /*
300  *      pxa25x_ep_alloc_request - allocate a request data structure
301  */
302 static struct usb_request *
303 pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
304 {
305         struct pxa25x_request *req;
306
307         req = kzalloc(sizeof(*req), gfp_flags);
308         if (!req)
309                 return NULL;
310
311         INIT_LIST_HEAD (&req->queue);
312         return &req->req;
313 }
314
315
316 /*
317  *      pxa25x_ep_free_request - deallocate a request data structure
318  */
319 static void
320 pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
321 {
322         struct pxa25x_request   *req;
323
324         req = container_of (_req, struct pxa25x_request, req);
325         WARN_ON(!list_empty (&req->queue));
326         kfree(req);
327 }
328
329 /*-------------------------------------------------------------------------*/
330
331 /*
332  *      done - retire a request; caller blocked irqs
333  */
334 static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)
335 {
336         unsigned                stopped = ep->stopped;
337
338         list_del_init(&req->queue);
339
340         if (likely (req->req.status == -EINPROGRESS))
341                 req->req.status = status;
342         else
343                 status = req->req.status;
344
345         if (status && status != -ESHUTDOWN)
346                 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
347                         ep->ep.name, &req->req, status,
348                         req->req.actual, req->req.length);
349
350         /* don't modify queue heads during completion callback */
351         ep->stopped = 1;
352         req->req.complete(&ep->ep, &req->req);
353         ep->stopped = stopped;
354 }
355
356
357 static inline void ep0_idle (struct pxa25x_udc *dev)
358 {
359         dev->ep0state = EP0_IDLE;
360 }
361
362 static int
363 write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)
364 {
365         u8              *buf;
366         unsigned        length, count;
367
368         buf = req->req.buf + req->req.actual;
369         prefetch(buf);
370
371         /* how big will this packet be? */
372         length = min(req->req.length - req->req.actual, max);
373         req->req.actual += length;
374
375         count = length;
376         while (likely(count--))
377                 *uddr = *buf++;
378
379         return length;
380 }
381
382 /*
383  * write to an IN endpoint fifo, as many packets as possible.
384  * irqs will use this to write the rest later.
385  * caller guarantees at least one packet buffer is ready (or a zlp).
386  */
387 static int
388 write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
389 {
390         unsigned                max;
391
392         max = usb_endpoint_maxp(ep->ep.desc);
393         do {
394                 unsigned        count;
395                 int             is_last, is_short;
396
397                 count = write_packet(ep->reg_uddr, req, max);
398
399                 /* last packet is usually short (or a zlp) */
400                 if (unlikely (count != max))
401                         is_last = is_short = 1;
402                 else {
403                         if (likely(req->req.length != req->req.actual)
404                                         || req->req.zero)
405                                 is_last = 0;
406                         else
407                                 is_last = 1;
408                         /* interrupt/iso maxpacket may not fill the fifo */
409                         is_short = unlikely (max < ep->fifo_size);
410                 }
411
412                 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
413                         ep->ep.name, count,
414                         is_last ? "/L" : "", is_short ? "/S" : "",
415                         req->req.length - req->req.actual, req);
416
417                 /* let loose that packet. maybe try writing another one,
418                  * double buffering might work.  TSP, TPC, and TFS
419                  * bit values are the same for all normal IN endpoints.
420                  */
421                 *ep->reg_udccs = UDCCS_BI_TPC;
422                 if (is_short)
423                         *ep->reg_udccs = UDCCS_BI_TSP;
424
425                 /* requests complete when all IN data is in the FIFO */
426                 if (is_last) {
427                         done (ep, req, 0);
428                         if (list_empty(&ep->queue))
429                                 pio_irq_disable (ep->bEndpointAddress);
430                         return 1;
431                 }
432
433                 // TODO experiment: how robust can fifo mode tweaking be?
434                 // double buffering is off in the default fifo mode, which
435                 // prevents TFS from being set here.
436
437         } while (*ep->reg_udccs & UDCCS_BI_TFS);
438         return 0;
439 }
440
441 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
442  * ep0 data stage.  these chips want very simple state transitions.
443  */
444 static inline
445 void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)
446 {
447         UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
448         USIR0 = USIR0_IR0;
449         dev->req_pending = 0;
450         DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
451                 __func__, tag, UDCCS0, flags);
452 }
453
454 static int
455 write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
456 {
457         unsigned        count;
458         int             is_short;
459
460         count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
461         ep->dev->stats.write.bytes += count;
462
463         /* last packet "must be" short (or a zlp) */
464         is_short = (count != EP0_FIFO_SIZE);
465
466         DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
467                 req->req.length - req->req.actual, req);
468
469         if (unlikely (is_short)) {
470                 if (ep->dev->req_pending)
471                         ep0start(ep->dev, UDCCS0_IPR, "short IN");
472                 else
473                         UDCCS0 = UDCCS0_IPR;
474
475                 count = req->req.length;
476                 done (ep, req, 0);
477                 ep0_idle(ep->dev);
478 #ifndef CONFIG_ARCH_IXP4XX
479 #if 1
480                 /* This seems to get rid of lost status irqs in some cases:
481                  * host responds quickly, or next request involves config
482                  * change automagic, or should have been hidden, or ...
483                  *
484                  * FIXME get rid of all udelays possible...
485                  */
486                 if (count >= EP0_FIFO_SIZE) {
487                         count = 100;
488                         do {
489                                 if ((UDCCS0 & UDCCS0_OPR) != 0) {
490                                         /* clear OPR, generate ack */
491                                         UDCCS0 = UDCCS0_OPR;
492                                         break;
493                                 }
494                                 count--;
495                                 udelay(1);
496                         } while (count);
497                 }
498 #endif
499 #endif
500         } else if (ep->dev->req_pending)
501                 ep0start(ep->dev, 0, "IN");
502         return is_short;
503 }
504
505
506 /*
507  * read_fifo -  unload packet(s) from the fifo we use for usb OUT
508  * transfers and put them into the request.  caller should have made
509  * sure there's at least one packet ready.
510  *
511  * returns true if the request completed because of short packet or the
512  * request buffer having filled (and maybe overran till end-of-packet).
513  */
514 static int
515 read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
516 {
517         for (;;) {
518                 u32             udccs;
519                 u8              *buf;
520                 unsigned        bufferspace, count, is_short;
521
522                 /* make sure there's a packet in the FIFO.
523                  * UDCCS_{BO,IO}_RPC are all the same bit value.
524                  * UDCCS_{BO,IO}_RNE are all the same bit value.
525                  */
526                 udccs = *ep->reg_udccs;
527                 if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
528                         break;
529                 buf = req->req.buf + req->req.actual;
530                 prefetchw(buf);
531                 bufferspace = req->req.length - req->req.actual;
532
533                 /* read all bytes from this packet */
534                 if (likely (udccs & UDCCS_BO_RNE)) {
535                         count = 1 + (0x0ff & *ep->reg_ubcr);
536                         req->req.actual += min (count, bufferspace);
537                 } else /* zlp */
538                         count = 0;
539                 is_short = (count < ep->ep.maxpacket);
540                 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
541                         ep->ep.name, udccs, count,
542                         is_short ? "/S" : "",
543                         req, req->req.actual, req->req.length);
544                 while (likely (count-- != 0)) {
545                         u8      byte = (u8) *ep->reg_uddr;
546
547                         if (unlikely (bufferspace == 0)) {
548                                 /* this happens when the driver's buffer
549                                  * is smaller than what the host sent.
550                                  * discard the extra data.
551                                  */
552                                 if (req->req.status != -EOVERFLOW)
553                                         DMSG("%s overflow %d\n",
554                                                 ep->ep.name, count);
555                                 req->req.status = -EOVERFLOW;
556                         } else {
557                                 *buf++ = byte;
558                                 bufferspace--;
559                         }
560                 }
561                 *ep->reg_udccs =  UDCCS_BO_RPC;
562                 /* RPC/RSP/RNE could now reflect the other packet buffer */
563
564                 /* iso is one request per packet */
565                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
566                         if (udccs & UDCCS_IO_ROF)
567                                 req->req.status = -EHOSTUNREACH;
568                         /* more like "is_done" */
569                         is_short = 1;
570                 }
571
572                 /* completion */
573                 if (is_short || req->req.actual == req->req.length) {
574                         done (ep, req, 0);
575                         if (list_empty(&ep->queue))
576                                 pio_irq_disable (ep->bEndpointAddress);
577                         return 1;
578                 }
579
580                 /* finished that packet.  the next one may be waiting... */
581         }
582         return 0;
583 }
584
585 /*
586  * special ep0 version of the above.  no UBCR0 or double buffering; status
587  * handshaking is magic.  most device protocols don't need control-OUT.
588  * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
589  * protocols do use them.
590  */
591 static int
592 read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
593 {
594         u8              *buf, byte;
595         unsigned        bufferspace;
596
597         buf = req->req.buf + req->req.actual;
598         bufferspace = req->req.length - req->req.actual;
599
600         while (UDCCS0 & UDCCS0_RNE) {
601                 byte = (u8) UDDR0;
602
603                 if (unlikely (bufferspace == 0)) {
604                         /* this happens when the driver's buffer
605                          * is smaller than what the host sent.
606                          * discard the extra data.
607                          */
608                         if (req->req.status != -EOVERFLOW)
609                                 DMSG("%s overflow\n", ep->ep.name);
610                         req->req.status = -EOVERFLOW;
611                 } else {
612                         *buf++ = byte;
613                         req->req.actual++;
614                         bufferspace--;
615                 }
616         }
617
618         UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
619
620         /* completion */
621         if (req->req.actual >= req->req.length)
622                 return 1;
623
624         /* finished that packet.  the next one may be waiting... */
625         return 0;
626 }
627
628 /*-------------------------------------------------------------------------*/
629
630 static int
631 pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
632 {
633         struct pxa25x_request   *req;
634         struct pxa25x_ep        *ep;
635         struct pxa25x_udc       *dev;
636         unsigned long           flags;
637
638         req = container_of(_req, struct pxa25x_request, req);
639         if (unlikely (!_req || !_req->complete || !_req->buf
640                         || !list_empty(&req->queue))) {
641                 DMSG("%s, bad params\n", __func__);
642                 return -EINVAL;
643         }
644
645         ep = container_of(_ep, struct pxa25x_ep, ep);
646         if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
647                 DMSG("%s, bad ep\n", __func__);
648                 return -EINVAL;
649         }
650
651         dev = ep->dev;
652         if (unlikely (!dev->driver
653                         || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
654                 DMSG("%s, bogus device state\n", __func__);
655                 return -ESHUTDOWN;
656         }
657
658         /* iso is always one packet per request, that's the only way
659          * we can report per-packet status.  that also helps with dma.
660          */
661         if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
662                         && req->req.length > usb_endpoint_maxp(ep->ep.desc)))
663                 return -EMSGSIZE;
664
665         DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
666                 _ep->name, _req, _req->length, _req->buf);
667
668         local_irq_save(flags);
669
670         _req->status = -EINPROGRESS;
671         _req->actual = 0;
672
673         /* kickstart this i/o queue? */
674         if (list_empty(&ep->queue) && !ep->stopped) {
675                 if (ep->ep.desc == NULL/* ep0 */) {
676                         unsigned        length = _req->length;
677
678                         switch (dev->ep0state) {
679                         case EP0_IN_DATA_PHASE:
680                                 dev->stats.write.ops++;
681                                 if (write_ep0_fifo(ep, req))
682                                         req = NULL;
683                                 break;
684
685                         case EP0_OUT_DATA_PHASE:
686                                 dev->stats.read.ops++;
687                                 /* messy ... */
688                                 if (dev->req_config) {
689                                         DBG(DBG_VERBOSE, "ep0 config ack%s\n",
690                                                 dev->has_cfr ?  "" : " raced");
691                                         if (dev->has_cfr)
692                                                 UDCCFR = UDCCFR_AREN|UDCCFR_ACM
693                                                         |UDCCFR_MB1;
694                                         done(ep, req, 0);
695                                         dev->ep0state = EP0_END_XFER;
696                                         local_irq_restore (flags);
697                                         return 0;
698                                 }
699                                 if (dev->req_pending)
700                                         ep0start(dev, UDCCS0_IPR, "OUT");
701                                 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
702                                                 && read_ep0_fifo(ep, req))) {
703                                         ep0_idle(dev);
704                                         done(ep, req, 0);
705                                         req = NULL;
706                                 }
707                                 break;
708
709                         default:
710                                 DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
711                                 local_irq_restore (flags);
712                                 return -EL2HLT;
713                         }
714                 /* can the FIFO can satisfy the request immediately? */
715                 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
716                         if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
717                                         && write_fifo(ep, req))
718                                 req = NULL;
719                 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
720                                 && read_fifo(ep, req)) {
721                         req = NULL;
722                 }
723
724                 if (likely(req && ep->ep.desc))
725                         pio_irq_enable(ep->bEndpointAddress);
726         }
727
728         /* pio or dma irq handler advances the queue. */
729         if (likely(req != NULL))
730                 list_add_tail(&req->queue, &ep->queue);
731         local_irq_restore(flags);
732
733         return 0;
734 }
735
736
737 /*
738  *      nuke - dequeue ALL requests
739  */
740 static void nuke(struct pxa25x_ep *ep, int status)
741 {
742         struct pxa25x_request *req;
743
744         /* called with irqs blocked */
745         while (!list_empty(&ep->queue)) {
746                 req = list_entry(ep->queue.next,
747                                 struct pxa25x_request,
748                                 queue);
749                 done(ep, req, status);
750         }
751         if (ep->ep.desc)
752                 pio_irq_disable (ep->bEndpointAddress);
753 }
754
755
756 /* dequeue JUST ONE request */
757 static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
758 {
759         struct pxa25x_ep        *ep;
760         struct pxa25x_request   *req;
761         unsigned long           flags;
762
763         ep = container_of(_ep, struct pxa25x_ep, ep);
764         if (!_ep || ep->ep.name == ep0name)
765                 return -EINVAL;
766
767         local_irq_save(flags);
768
769         /* make sure it's actually queued on this endpoint */
770         list_for_each_entry (req, &ep->queue, queue) {
771                 if (&req->req == _req)
772                         break;
773         }
774         if (&req->req != _req) {
775                 local_irq_restore(flags);
776                 return -EINVAL;
777         }
778
779         done(ep, req, -ECONNRESET);
780
781         local_irq_restore(flags);
782         return 0;
783 }
784
785 /*-------------------------------------------------------------------------*/
786
787 static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
788 {
789         struct pxa25x_ep        *ep;
790         unsigned long           flags;
791
792         ep = container_of(_ep, struct pxa25x_ep, ep);
793         if (unlikely (!_ep
794                         || (!ep->ep.desc && ep->ep.name != ep0name))
795                         || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
796                 DMSG("%s, bad ep\n", __func__);
797                 return -EINVAL;
798         }
799         if (value == 0) {
800                 /* this path (reset toggle+halt) is needed to implement
801                  * SET_INTERFACE on normal hardware.  but it can't be
802                  * done from software on the PXA UDC, and the hardware
803                  * forgets to do it as part of SET_INTERFACE automagic.
804                  */
805                 DMSG("only host can clear %s halt\n", _ep->name);
806                 return -EROFS;
807         }
808
809         local_irq_save(flags);
810
811         if ((ep->bEndpointAddress & USB_DIR_IN) != 0
812                         && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
813                            || !list_empty(&ep->queue))) {
814                 local_irq_restore(flags);
815                 return -EAGAIN;
816         }
817
818         /* FST bit is the same for control, bulk in, bulk out, interrupt in */
819         *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
820
821         /* ep0 needs special care */
822         if (!ep->ep.desc) {
823                 start_watchdog(ep->dev);
824                 ep->dev->req_pending = 0;
825                 ep->dev->ep0state = EP0_STALL;
826
827         /* and bulk/intr endpoints like dropping stalls too */
828         } else {
829                 unsigned i;
830                 for (i = 0; i < 1000; i += 20) {
831                         if (*ep->reg_udccs & UDCCS_BI_SST)
832                                 break;
833                         udelay(20);
834                 }
835         }
836         local_irq_restore(flags);
837
838         DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
839         return 0;
840 }
841
842 static int pxa25x_ep_fifo_status(struct usb_ep *_ep)
843 {
844         struct pxa25x_ep        *ep;
845
846         ep = container_of(_ep, struct pxa25x_ep, ep);
847         if (!_ep) {
848                 DMSG("%s, bad ep\n", __func__);
849                 return -ENODEV;
850         }
851         /* pxa can't report unclaimed bytes from IN fifos */
852         if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
853                 return -EOPNOTSUPP;
854         if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
855                         || (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
856                 return 0;
857         else
858                 return (*ep->reg_ubcr & 0xfff) + 1;
859 }
860
861 static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
862 {
863         struct pxa25x_ep        *ep;
864
865         ep = container_of(_ep, struct pxa25x_ep, ep);
866         if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
867                 DMSG("%s, bad ep\n", __func__);
868                 return;
869         }
870
871         /* toggle and halt bits stay unchanged */
872
873         /* for OUT, just read and discard the FIFO contents. */
874         if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
875                 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
876                         (void) *ep->reg_uddr;
877                 return;
878         }
879
880         /* most IN status is the same, but ISO can't stall */
881         *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
882                 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
883                         ? 0 : UDCCS_BI_SST);
884 }
885
886
887 static struct usb_ep_ops pxa25x_ep_ops = {
888         .enable         = pxa25x_ep_enable,
889         .disable        = pxa25x_ep_disable,
890
891         .alloc_request  = pxa25x_ep_alloc_request,
892         .free_request   = pxa25x_ep_free_request,
893
894         .queue          = pxa25x_ep_queue,
895         .dequeue        = pxa25x_ep_dequeue,
896
897         .set_halt       = pxa25x_ep_set_halt,
898         .fifo_status    = pxa25x_ep_fifo_status,
899         .fifo_flush     = pxa25x_ep_fifo_flush,
900 };
901
902
903 /* ---------------------------------------------------------------------------
904  *      device-scoped parts of the api to the usb controller hardware
905  * ---------------------------------------------------------------------------
906  */
907
908 static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)
909 {
910         return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
911 }
912
913 static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)
914 {
915         /* host may not have enabled remote wakeup */
916         if ((UDCCS0 & UDCCS0_DRWF) == 0)
917                 return -EHOSTUNREACH;
918         udc_set_mask_UDCCR(UDCCR_RSM);
919         return 0;
920 }
921
922 static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);
923 static void udc_enable (struct pxa25x_udc *);
924 static void udc_disable(struct pxa25x_udc *);
925
926 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
927  * in active use.
928  */
929 static int pullup(struct pxa25x_udc *udc)
930 {
931         int is_active = udc->vbus && udc->pullup && !udc->suspended;
932         DMSG("%s\n", is_active ? "active" : "inactive");
933         if (is_active) {
934                 if (!udc->active) {
935                         udc->active = 1;
936                         /* Enable clock for USB device */
937                         clk_enable(udc->clk);
938                         udc_enable(udc);
939                 }
940         } else {
941                 if (udc->active) {
942                         if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
943                                 DMSG("disconnect %s\n", udc->driver
944                                         ? udc->driver->driver.name
945                                         : "(no driver)");
946                                 stop_activity(udc, udc->driver);
947                         }
948                         udc_disable(udc);
949                         /* Disable clock for USB device */
950                         clk_disable(udc->clk);
951                         udc->active = 0;
952                 }
953
954         }
955         return 0;
956 }
957
958 /* VBUS reporting logically comes from a transceiver */
959 static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
960 {
961         struct pxa25x_udc       *udc;
962
963         udc = container_of(_gadget, struct pxa25x_udc, gadget);
964         udc->vbus = is_active;
965         DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
966         pullup(udc);
967         return 0;
968 }
969
970 /* drivers may have software control over D+ pullup */
971 static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)
972 {
973         struct pxa25x_udc       *udc;
974
975         udc = container_of(_gadget, struct pxa25x_udc, gadget);
976
977         /* not all boards support pullup control */
978         if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
979                 return -EOPNOTSUPP;
980
981         udc->pullup = (is_active != 0);
982         pullup(udc);
983         return 0;
984 }
985
986 /* boards may consume current from VBUS, up to 100-500mA based on config.
987  * the 500uA suspend ceiling means that exclusively vbus-powered PXA designs
988  * violate USB specs.
989  */
990 static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
991 {
992         struct pxa25x_udc       *udc;
993
994         udc = container_of(_gadget, struct pxa25x_udc, gadget);
995
996         if (udc->transceiver)
997                 return usb_phy_set_power(udc->transceiver, mA);
998         return -EOPNOTSUPP;
999 }
1000
1001 static int pxa25x_start(struct usb_gadget_driver *driver,
1002                 int (*bind)(struct usb_gadget *));
1003 static int pxa25x_stop(struct usb_gadget_driver *driver);
1004
1005 static const struct usb_gadget_ops pxa25x_udc_ops = {
1006         .get_frame      = pxa25x_udc_get_frame,
1007         .wakeup         = pxa25x_udc_wakeup,
1008         .vbus_session   = pxa25x_udc_vbus_session,
1009         .pullup         = pxa25x_udc_pullup,
1010         .vbus_draw      = pxa25x_udc_vbus_draw,
1011         .start          = pxa25x_start,
1012         .stop           = pxa25x_stop,
1013 };
1014
1015 /*-------------------------------------------------------------------------*/
1016
1017 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1018
1019 static int
1020 udc_seq_show(struct seq_file *m, void *_d)
1021 {
1022         struct pxa25x_udc       *dev = m->private;
1023         unsigned long           flags;
1024         int                     i;
1025         u32                     tmp;
1026
1027         local_irq_save(flags);
1028
1029         /* basic device status */
1030         seq_printf(m, DRIVER_DESC "\n"
1031                 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1032                 driver_name, DRIVER_VERSION SIZE_STR "(pio)",
1033                 dev->driver ? dev->driver->driver.name : "(none)",
1034                 dev->gadget.speed == USB_SPEED_FULL ? "full speed" : "disconnected");
1035
1036         /* registers for device and ep0 */
1037         seq_printf(m,
1038                 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1039                 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
1040
1041         tmp = UDCCR;
1042         seq_printf(m,
1043                 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1044                 (tmp & UDCCR_REM) ? " rem" : "",
1045                 (tmp & UDCCR_RSTIR) ? " rstir" : "",
1046                 (tmp & UDCCR_SRM) ? " srm" : "",
1047                 (tmp & UDCCR_SUSIR) ? " susir" : "",
1048                 (tmp & UDCCR_RESIR) ? " resir" : "",
1049                 (tmp & UDCCR_RSM) ? " rsm" : "",
1050                 (tmp & UDCCR_UDA) ? " uda" : "",
1051                 (tmp & UDCCR_UDE) ? " ude" : "");
1052
1053         tmp = UDCCS0;
1054         seq_printf(m,
1055                 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1056                 (tmp & UDCCS0_SA) ? " sa" : "",
1057                 (tmp & UDCCS0_RNE) ? " rne" : "",
1058                 (tmp & UDCCS0_FST) ? " fst" : "",
1059                 (tmp & UDCCS0_SST) ? " sst" : "",
1060                 (tmp & UDCCS0_DRWF) ? " dwrf" : "",
1061                 (tmp & UDCCS0_FTF) ? " ftf" : "",
1062                 (tmp & UDCCS0_IPR) ? " ipr" : "",
1063                 (tmp & UDCCS0_OPR) ? " opr" : "");
1064
1065         if (dev->has_cfr) {
1066                 tmp = UDCCFR;
1067                 seq_printf(m,
1068                         "udccfr %02X =%s%s\n", tmp,
1069                         (tmp & UDCCFR_AREN) ? " aren" : "",
1070                         (tmp & UDCCFR_ACM) ? " acm" : "");
1071         }
1072
1073         if (dev->gadget.speed != USB_SPEED_FULL || !dev->driver)
1074                 goto done;
1075
1076         seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1077                 dev->stats.write.bytes, dev->stats.write.ops,
1078                 dev->stats.read.bytes, dev->stats.read.ops,
1079                 dev->stats.irqs);
1080
1081         /* dump endpoint queues */
1082         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1083                 struct pxa25x_ep        *ep = &dev->ep [i];
1084                 struct pxa25x_request   *req;
1085
1086                 if (i != 0) {
1087                         const struct usb_endpoint_descriptor    *desc;
1088
1089                         desc = ep->ep.desc;
1090                         if (!desc)
1091                                 continue;
1092                         tmp = *dev->ep [i].reg_udccs;
1093                         seq_printf(m,
1094                                 "%s max %d %s udccs %02x irqs %lu\n",
1095                                 ep->ep.name, usb_endpoint_maxp(desc),
1096                                 "pio", tmp, ep->pio_irqs);
1097                         /* TODO translate all five groups of udccs bits! */
1098
1099                 } else /* ep0 should only have one transfer queued */
1100                         seq_printf(m, "ep0 max 16 pio irqs %lu\n",
1101                                 ep->pio_irqs);
1102
1103                 if (list_empty(&ep->queue)) {
1104                         seq_printf(m, "\t(nothing queued)\n");
1105                         continue;
1106                 }
1107                 list_for_each_entry(req, &ep->queue, queue) {
1108                         seq_printf(m,
1109                                         "\treq %p len %d/%d buf %p\n",
1110                                         &req->req, req->req.actual,
1111                                         req->req.length, req->req.buf);
1112                 }
1113         }
1114
1115 done:
1116         local_irq_restore(flags);
1117         return 0;
1118 }
1119
1120 static int
1121 udc_debugfs_open(struct inode *inode, struct file *file)
1122 {
1123         return single_open(file, udc_seq_show, inode->i_private);
1124 }
1125
1126 static const struct file_operations debug_fops = {
1127         .open           = udc_debugfs_open,
1128         .read           = seq_read,
1129         .llseek         = seq_lseek,
1130         .release        = single_release,
1131         .owner          = THIS_MODULE,
1132 };
1133
1134 #define create_debug_files(dev) \
1135         do { \
1136                 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \
1137                         S_IRUGO, NULL, dev, &debug_fops); \
1138         } while (0)
1139 #define remove_debug_files(dev) \
1140         do { \
1141                 if (dev->debugfs_udc) \
1142                         debugfs_remove(dev->debugfs_udc); \
1143         } while (0)
1144
1145 #else   /* !CONFIG_USB_GADGET_DEBUG_FILES */
1146
1147 #define create_debug_files(dev) do {} while (0)
1148 #define remove_debug_files(dev) do {} while (0)
1149
1150 #endif  /* CONFIG_USB_GADGET_DEBUG_FILES */
1151
1152 /*-------------------------------------------------------------------------*/
1153
1154 /*
1155  *      udc_disable - disable USB device controller
1156  */
1157 static void udc_disable(struct pxa25x_udc *dev)
1158 {
1159         /* block all irqs */
1160         udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
1161         UICR0 = UICR1 = 0xff;
1162         UFNRH = UFNRH_SIM;
1163
1164         /* if hardware supports it, disconnect from usb */
1165         pullup_off();
1166
1167         udc_clear_mask_UDCCR(UDCCR_UDE);
1168
1169         ep0_idle (dev);
1170         dev->gadget.speed = USB_SPEED_UNKNOWN;
1171 }
1172
1173
1174 /*
1175  *      udc_reinit - initialize software state
1176  */
1177 static void udc_reinit(struct pxa25x_udc *dev)
1178 {
1179         u32     i;
1180
1181         /* device/ep0 records init */
1182         INIT_LIST_HEAD (&dev->gadget.ep_list);
1183         INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1184         dev->ep0state = EP0_IDLE;
1185
1186         /* basic endpoint records init */
1187         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1188                 struct pxa25x_ep *ep = &dev->ep[i];
1189
1190                 if (i != 0)
1191                         list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1192
1193                 ep->ep.desc = NULL;
1194                 ep->stopped = 0;
1195                 INIT_LIST_HEAD (&ep->queue);
1196                 ep->pio_irqs = 0;
1197         }
1198
1199         /* the rest was statically initialized, and is read-only */
1200 }
1201
1202 /* until it's enabled, this UDC should be completely invisible
1203  * to any USB host.
1204  */
1205 static void udc_enable (struct pxa25x_udc *dev)
1206 {
1207         udc_clear_mask_UDCCR(UDCCR_UDE);
1208
1209         /* try to clear these bits before we enable the udc */
1210         udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1211
1212         ep0_idle(dev);
1213         dev->gadget.speed = USB_SPEED_UNKNOWN;
1214         dev->stats.irqs = 0;
1215
1216         /*
1217          * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1218          * - enable UDC
1219          * - if RESET is already in progress, ack interrupt
1220          * - unmask reset interrupt
1221          */
1222         udc_set_mask_UDCCR(UDCCR_UDE);
1223         if (!(UDCCR & UDCCR_UDA))
1224                 udc_ack_int_UDCCR(UDCCR_RSTIR);
1225
1226         if (dev->has_cfr /* UDC_RES2 is defined */) {
1227                 /* pxa255 (a0+) can avoid a set_config race that could
1228                  * prevent gadget drivers from configuring correctly
1229                  */
1230                 UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
1231         } else {
1232                 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1233                  * which could result in missing packets and interrupts.
1234                  * supposedly one bit per endpoint, controlling whether it
1235                  * double buffers or not; ACM/AREN bits fit into the holes.
1236                  * zero bits (like USIR0_IRx) disable double buffering.
1237                  */
1238                 UDC_RES1 = 0x00;
1239                 UDC_RES2 = 0x00;
1240         }
1241
1242         /* enable suspend/resume and reset irqs */
1243         udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
1244
1245         /* enable ep0 irqs */
1246         UICR0 &= ~UICR0_IM0;
1247
1248         /* if hardware supports it, pullup D+ and wait for reset */
1249         pullup_on();
1250 }
1251
1252
1253 /* when a driver is successfully registered, it will receive
1254  * control requests including set_configuration(), which enables
1255  * non-control requests.  then usb traffic follows until a
1256  * disconnect is reported.  then a host may connect again, or
1257  * the driver might get unbound.
1258  */
1259 static int pxa25x_start(struct usb_gadget_driver *driver,
1260                 int (*bind)(struct usb_gadget *))
1261 {
1262         struct pxa25x_udc       *dev = the_controller;
1263         int                     retval;
1264
1265         if (!driver
1266                         || driver->max_speed < USB_SPEED_FULL
1267                         || !bind
1268                         || !driver->disconnect
1269                         || !driver->setup)
1270                 return -EINVAL;
1271         if (!dev)
1272                 return -ENODEV;
1273         if (dev->driver)
1274                 return -EBUSY;
1275
1276         /* first hook up the driver ... */
1277         dev->driver = driver;
1278         dev->gadget.dev.driver = &driver->driver;
1279         dev->pullup = 1;
1280
1281         retval = device_add (&dev->gadget.dev);
1282         if (retval) {
1283 fail:
1284                 dev->driver = NULL;
1285                 dev->gadget.dev.driver = NULL;
1286                 return retval;
1287         }
1288         retval = bind(&dev->gadget);
1289         if (retval) {
1290                 DMSG("bind to driver %s --> error %d\n",
1291                                 driver->driver.name, retval);
1292                 device_del (&dev->gadget.dev);
1293                 goto fail;
1294         }
1295
1296         /* ... then enable host detection and ep0; and we're ready
1297          * for set_configuration as well as eventual disconnect.
1298          */
1299         DMSG("registered gadget driver '%s'\n", driver->driver.name);
1300
1301         /* connect to bus through transceiver */
1302         if (dev->transceiver) {
1303                 retval = otg_set_peripheral(dev->transceiver->otg,
1304                                                 &dev->gadget);
1305                 if (retval) {
1306                         DMSG("can't bind to transceiver\n");
1307                         if (driver->unbind)
1308                                 driver->unbind(&dev->gadget);
1309                         goto bind_fail;
1310                 }
1311         }
1312
1313         pullup(dev);
1314         dump_state(dev);
1315         return 0;
1316 bind_fail:
1317         return retval;
1318 }
1319
1320 static void
1321 stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
1322 {
1323         int i;
1324
1325         /* don't disconnect drivers more than once */
1326         if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1327                 driver = NULL;
1328         dev->gadget.speed = USB_SPEED_UNKNOWN;
1329
1330         /* prevent new request submissions, kill any outstanding requests  */
1331         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1332                 struct pxa25x_ep *ep = &dev->ep[i];
1333
1334                 ep->stopped = 1;
1335                 nuke(ep, -ESHUTDOWN);
1336         }
1337         del_timer_sync(&dev->timer);
1338
1339         /* report disconnect; the driver is already quiesced */
1340         if (driver)
1341                 driver->disconnect(&dev->gadget);
1342
1343         /* re-init driver-visible data structures */
1344         udc_reinit(dev);
1345 }
1346
1347 static int pxa25x_stop(struct usb_gadget_driver *driver)
1348 {
1349         struct pxa25x_udc       *dev = the_controller;
1350
1351         if (!dev)
1352                 return -ENODEV;
1353         if (!driver || driver != dev->driver || !driver->unbind)
1354                 return -EINVAL;
1355
1356         local_irq_disable();
1357         dev->pullup = 0;
1358         pullup(dev);
1359         stop_activity(dev, driver);
1360         local_irq_enable();
1361
1362         if (dev->transceiver)
1363                 (void) otg_set_peripheral(dev->transceiver->otg, NULL);
1364
1365         driver->unbind(&dev->gadget);
1366         dev->gadget.dev.driver = NULL;
1367         dev->driver = NULL;
1368
1369         device_del (&dev->gadget.dev);
1370
1371         DMSG("unregistered gadget driver '%s'\n", driver->driver.name);
1372         dump_state(dev);
1373         return 0;
1374 }
1375
1376 /*-------------------------------------------------------------------------*/
1377
1378 #ifdef CONFIG_ARCH_LUBBOCK
1379
1380 /* Lubbock has separate connect and disconnect irqs.  More typical designs
1381  * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1382  */
1383
1384 static irqreturn_t
1385 lubbock_vbus_irq(int irq, void *_dev)
1386 {
1387         struct pxa25x_udc       *dev = _dev;
1388         int                     vbus;
1389
1390         dev->stats.irqs++;
1391         switch (irq) {
1392         case LUBBOCK_USB_IRQ:
1393                 vbus = 1;
1394                 disable_irq(LUBBOCK_USB_IRQ);
1395                 enable_irq(LUBBOCK_USB_DISC_IRQ);
1396                 break;
1397         case LUBBOCK_USB_DISC_IRQ:
1398                 vbus = 0;
1399                 disable_irq(LUBBOCK_USB_DISC_IRQ);
1400                 enable_irq(LUBBOCK_USB_IRQ);
1401                 break;
1402         default:
1403                 return IRQ_NONE;
1404         }
1405
1406         pxa25x_udc_vbus_session(&dev->gadget, vbus);
1407         return IRQ_HANDLED;
1408 }
1409
1410 #endif
1411
1412
1413 /*-------------------------------------------------------------------------*/
1414
1415 static inline void clear_ep_state (struct pxa25x_udc *dev)
1416 {
1417         unsigned i;
1418
1419         /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1420          * fifos, and pending transactions mustn't be continued in any case.
1421          */
1422         for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
1423                 nuke(&dev->ep[i], -ECONNABORTED);
1424 }
1425
1426 static void udc_watchdog(unsigned long _dev)
1427 {
1428         struct pxa25x_udc       *dev = (void *)_dev;
1429
1430         local_irq_disable();
1431         if (dev->ep0state == EP0_STALL
1432                         && (UDCCS0 & UDCCS0_FST) == 0
1433                         && (UDCCS0 & UDCCS0_SST) == 0) {
1434                 UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
1435                 DBG(DBG_VERBOSE, "ep0 re-stall\n");
1436                 start_watchdog(dev);
1437         }
1438         local_irq_enable();
1439 }
1440
1441 static void handle_ep0 (struct pxa25x_udc *dev)
1442 {
1443         u32                     udccs0 = UDCCS0;
1444         struct pxa25x_ep        *ep = &dev->ep [0];
1445         struct pxa25x_request   *req;
1446         union {
1447                 struct usb_ctrlrequest  r;
1448                 u8                      raw [8];
1449                 u32                     word [2];
1450         } u;
1451
1452         if (list_empty(&ep->queue))
1453                 req = NULL;
1454         else
1455                 req = list_entry(ep->queue.next, struct pxa25x_request, queue);
1456
1457         /* clear stall status */
1458         if (udccs0 & UDCCS0_SST) {
1459                 nuke(ep, -EPIPE);
1460                 UDCCS0 = UDCCS0_SST;
1461                 del_timer(&dev->timer);
1462                 ep0_idle(dev);
1463         }
1464
1465         /* previous request unfinished?  non-error iff back-to-back ... */
1466         if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
1467                 nuke(ep, 0);
1468                 del_timer(&dev->timer);
1469                 ep0_idle(dev);
1470         }
1471
1472         switch (dev->ep0state) {
1473         case EP0_IDLE:
1474                 /* late-breaking status? */
1475                 udccs0 = UDCCS0;
1476
1477                 /* start control request? */
1478                 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1479                                 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
1480                         int i;
1481
1482                         nuke (ep, -EPROTO);
1483
1484                         /* read SETUP packet */
1485                         for (i = 0; i < 8; i++) {
1486                                 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
1487 bad_setup:
1488                                         DMSG("SETUP %d!\n", i);
1489                                         goto stall;
1490                                 }
1491                                 u.raw [i] = (u8) UDDR0;
1492                         }
1493                         if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
1494                                 goto bad_setup;
1495
1496 got_setup:
1497                         DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1498                                 u.r.bRequestType, u.r.bRequest,
1499                                 le16_to_cpu(u.r.wValue),
1500                                 le16_to_cpu(u.r.wIndex),
1501                                 le16_to_cpu(u.r.wLength));
1502
1503                         /* cope with automagic for some standard requests. */
1504                         dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
1505                                                 == USB_TYPE_STANDARD;
1506                         dev->req_config = 0;
1507                         dev->req_pending = 1;
1508                         switch (u.r.bRequest) {
1509                         /* hardware restricts gadget drivers here! */
1510                         case USB_REQ_SET_CONFIGURATION:
1511                                 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1512                                         /* reflect hardware's automagic
1513                                          * up to the gadget driver.
1514                                          */
1515 config_change:
1516                                         dev->req_config = 1;
1517                                         clear_ep_state(dev);
1518                                         /* if !has_cfr, there's no synch
1519                                          * else use AREN (later) not SA|OPR
1520                                          * USIR0_IR0 acts edge sensitive
1521                                          */
1522                                 }
1523                                 break;
1524                         /* ... and here, even more ... */
1525                         case USB_REQ_SET_INTERFACE:
1526                                 if (u.r.bRequestType == USB_RECIP_INTERFACE) {
1527                                         /* udc hardware is broken by design:
1528                                          *  - altsetting may only be zero;
1529                                          *  - hw resets all interfaces' eps;
1530                                          *  - ep reset doesn't include halt(?).
1531                                          */
1532                                         DMSG("broken set_interface (%d/%d)\n",
1533                                                 le16_to_cpu(u.r.wIndex),
1534                                                 le16_to_cpu(u.r.wValue));
1535                                         goto config_change;
1536                                 }
1537                                 break;
1538                         /* hardware was supposed to hide this */
1539                         case USB_REQ_SET_ADDRESS:
1540                                 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1541                                         ep0start(dev, 0, "address");
1542                                         return;
1543                                 }
1544                                 break;
1545                         }
1546
1547                         if (u.r.bRequestType & USB_DIR_IN)
1548                                 dev->ep0state = EP0_IN_DATA_PHASE;
1549                         else
1550                                 dev->ep0state = EP0_OUT_DATA_PHASE;
1551
1552                         i = dev->driver->setup(&dev->gadget, &u.r);
1553                         if (i < 0) {
1554                                 /* hardware automagic preventing STALL... */
1555                                 if (dev->req_config) {
1556                                         /* hardware sometimes neglects to tell
1557                                          * tell us about config change events,
1558                                          * so later ones may fail...
1559                                          */
1560                                         WARNING("config change %02x fail %d?\n",
1561                                                 u.r.bRequest, i);
1562                                         return;
1563                                         /* TODO experiment:  if has_cfr,
1564                                          * hardware didn't ACK; maybe we
1565                                          * could actually STALL!
1566                                          */
1567                                 }
1568                                 DBG(DBG_VERBOSE, "protocol STALL, "
1569                                         "%02x err %d\n", UDCCS0, i);
1570 stall:
1571                                 /* the watchdog timer helps deal with cases
1572                                  * where udc seems to clear FST wrongly, and
1573                                  * then NAKs instead of STALLing.
1574                                  */
1575                                 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
1576                                 start_watchdog(dev);
1577                                 dev->ep0state = EP0_STALL;
1578
1579                         /* deferred i/o == no response yet */
1580                         } else if (dev->req_pending) {
1581                                 if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1582                                                 || dev->req_std || u.r.wLength))
1583                                         ep0start(dev, 0, "defer");
1584                                 else
1585                                         ep0start(dev, UDCCS0_IPR, "defer/IPR");
1586                         }
1587
1588                         /* expect at least one data or status stage irq */
1589                         return;
1590
1591                 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1592                                 == (UDCCS0_OPR|UDCCS0_SA))) {
1593                         unsigned i;
1594
1595                         /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1596                          * still observed on a pxa255 a0.
1597                          */
1598                         DBG(DBG_VERBOSE, "e131\n");
1599                         nuke(ep, -EPROTO);
1600
1601                         /* read SETUP data, but don't trust it too much */
1602                         for (i = 0; i < 8; i++)
1603                                 u.raw [i] = (u8) UDDR0;
1604                         if ((u.r.bRequestType & USB_RECIP_MASK)
1605                                         > USB_RECIP_OTHER)
1606                                 goto stall;
1607                         if (u.word [0] == 0 && u.word [1] == 0)
1608                                 goto stall;
1609                         goto got_setup;
1610                 } else {
1611                         /* some random early IRQ:
1612                          * - we acked FST
1613                          * - IPR cleared
1614                          * - OPR got set, without SA (likely status stage)
1615                          */
1616                         UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
1617                 }
1618                 break;
1619         case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
1620                 if (udccs0 & UDCCS0_OPR) {
1621                         UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
1622                         DBG(DBG_VERBOSE, "ep0in premature status\n");
1623                         if (req)
1624                                 done(ep, req, 0);
1625                         ep0_idle(dev);
1626                 } else /* irq was IPR clearing */ {
1627                         if (req) {
1628                                 /* this IN packet might finish the request */
1629                                 (void) write_ep0_fifo(ep, req);
1630                         } /* else IN token before response was written */
1631                 }
1632                 break;
1633         case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
1634                 if (udccs0 & UDCCS0_OPR) {
1635                         if (req) {
1636                                 /* this OUT packet might finish the request */
1637                                 if (read_ep0_fifo(ep, req))
1638                                         done(ep, req, 0);
1639                                 /* else more OUT packets expected */
1640                         } /* else OUT token before read was issued */
1641                 } else /* irq was IPR clearing */ {
1642                         DBG(DBG_VERBOSE, "ep0out premature status\n");
1643                         if (req)
1644                                 done(ep, req, 0);
1645                         ep0_idle(dev);
1646                 }
1647                 break;
1648         case EP0_END_XFER:
1649                 if (req)
1650                         done(ep, req, 0);
1651                 /* ack control-IN status (maybe in-zlp was skipped)
1652                  * also appears after some config change events.
1653                  */
1654                 if (udccs0 & UDCCS0_OPR)
1655                         UDCCS0 = UDCCS0_OPR;
1656                 ep0_idle(dev);
1657                 break;
1658         case EP0_STALL:
1659                 UDCCS0 = UDCCS0_FST;
1660                 break;
1661         }
1662         USIR0 = USIR0_IR0;
1663 }
1664
1665 static void handle_ep(struct pxa25x_ep *ep)
1666 {
1667         struct pxa25x_request   *req;
1668         int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
1669         int                     completed;
1670         u32                     udccs, tmp;
1671
1672         do {
1673                 completed = 0;
1674                 if (likely (!list_empty(&ep->queue)))
1675                         req = list_entry(ep->queue.next,
1676                                         struct pxa25x_request, queue);
1677                 else
1678                         req = NULL;
1679
1680                 // TODO check FST handling
1681
1682                 udccs = *ep->reg_udccs;
1683                 if (unlikely(is_in)) {  /* irq from TPC, SST, or (ISO) TUR */
1684                         tmp = UDCCS_BI_TUR;
1685                         if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1686                                 tmp |= UDCCS_BI_SST;
1687                         tmp &= udccs;
1688                         if (likely (tmp))
1689                                 *ep->reg_udccs = tmp;
1690                         if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1691                                 completed = write_fifo(ep, req);
1692
1693                 } else {        /* irq from RPC (or for ISO, ROF) */
1694                         if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1695                                 tmp = UDCCS_BO_SST | UDCCS_BO_DME;
1696                         else
1697                                 tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1698                         tmp &= udccs;
1699                         if (likely(tmp))
1700                                 *ep->reg_udccs = tmp;
1701
1702                         /* fifos can hold packets, ready for reading... */
1703                         if (likely(req)) {
1704                                 completed = read_fifo(ep, req);
1705                         } else
1706                                 pio_irq_disable (ep->bEndpointAddress);
1707                 }
1708                 ep->pio_irqs++;
1709         } while (completed);
1710 }
1711
1712 /*
1713  *      pxa25x_udc_irq - interrupt handler
1714  *
1715  * avoid delays in ep0 processing. the control handshaking isn't always
1716  * under software control (pxa250c0 and the pxa255 are better), and delays
1717  * could cause usb protocol errors.
1718  */
1719 static irqreturn_t
1720 pxa25x_udc_irq(int irq, void *_dev)
1721 {
1722         struct pxa25x_udc       *dev = _dev;
1723         int                     handled;
1724
1725         dev->stats.irqs++;
1726         do {
1727                 u32             udccr = UDCCR;
1728
1729                 handled = 0;
1730
1731                 /* SUSpend Interrupt Request */
1732                 if (unlikely(udccr & UDCCR_SUSIR)) {
1733                         udc_ack_int_UDCCR(UDCCR_SUSIR);
1734                         handled = 1;
1735                         DBG(DBG_VERBOSE, "USB suspend\n");
1736
1737                         if (dev->gadget.speed != USB_SPEED_UNKNOWN
1738                                         && dev->driver
1739                                         && dev->driver->suspend)
1740                                 dev->driver->suspend(&dev->gadget);
1741                         ep0_idle (dev);
1742                 }
1743
1744                 /* RESume Interrupt Request */
1745                 if (unlikely(udccr & UDCCR_RESIR)) {
1746                         udc_ack_int_UDCCR(UDCCR_RESIR);
1747                         handled = 1;
1748                         DBG(DBG_VERBOSE, "USB resume\n");
1749
1750                         if (dev->gadget.speed != USB_SPEED_UNKNOWN
1751                                         && dev->driver
1752                                         && dev->driver->resume)
1753                                 dev->driver->resume(&dev->gadget);
1754                 }
1755
1756                 /* ReSeT Interrupt Request - USB reset */
1757                 if (unlikely(udccr & UDCCR_RSTIR)) {
1758                         udc_ack_int_UDCCR(UDCCR_RSTIR);
1759                         handled = 1;
1760
1761                         if ((UDCCR & UDCCR_UDA) == 0) {
1762                                 DBG(DBG_VERBOSE, "USB reset start\n");
1763
1764                                 /* reset driver and endpoints,
1765                                  * in case that's not yet done
1766                                  */
1767                                 stop_activity (dev, dev->driver);
1768
1769                         } else {
1770                                 DBG(DBG_VERBOSE, "USB reset end\n");
1771                                 dev->gadget.speed = USB_SPEED_FULL;
1772                                 memset(&dev->stats, 0, sizeof dev->stats);
1773                                 /* driver and endpoints are still reset */
1774                         }
1775
1776                 } else {
1777                         u32     usir0 = USIR0 & ~UICR0;
1778                         u32     usir1 = USIR1 & ~UICR1;
1779                         int     i;
1780
1781                         if (unlikely (!usir0 && !usir1))
1782                                 continue;
1783
1784                         DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
1785
1786                         /* control traffic */
1787                         if (usir0 & USIR0_IR0) {
1788                                 dev->ep[0].pio_irqs++;
1789                                 handle_ep0(dev);
1790                                 handled = 1;
1791                         }
1792
1793                         /* endpoint data transfers */
1794                         for (i = 0; i < 8; i++) {
1795                                 u32     tmp = 1 << i;
1796
1797                                 if (i && (usir0 & tmp)) {
1798                                         handle_ep(&dev->ep[i]);
1799                                         USIR0 |= tmp;
1800                                         handled = 1;
1801                                 }
1802 #ifndef CONFIG_USB_PXA25X_SMALL
1803                                 if (usir1 & tmp) {
1804                                         handle_ep(&dev->ep[i+8]);
1805                                         USIR1 |= tmp;
1806                                         handled = 1;
1807                                 }
1808 #endif
1809                         }
1810                 }
1811
1812                 /* we could also ask for 1 msec SOF (SIR) interrupts */
1813
1814         } while (handled);
1815         return IRQ_HANDLED;
1816 }
1817
1818 /*-------------------------------------------------------------------------*/
1819
1820 static void nop_release (struct device *dev)
1821 {
1822         DMSG("%s %s\n", __func__, dev_name(dev));
1823 }
1824
1825 /* this uses load-time allocation and initialization (instead of
1826  * doing it at run-time) to save code, eliminate fault paths, and
1827  * be more obviously correct.
1828  */
1829 static struct pxa25x_udc memory = {
1830         .gadget = {
1831                 .ops            = &pxa25x_udc_ops,
1832                 .ep0            = &memory.ep[0].ep,
1833                 .name           = driver_name,
1834                 .dev = {
1835                         .init_name      = "gadget",
1836                         .release        = nop_release,
1837                 },
1838         },
1839
1840         /* control endpoint */
1841         .ep[0] = {
1842                 .ep = {
1843                         .name           = ep0name,
1844                         .ops            = &pxa25x_ep_ops,
1845                         .maxpacket      = EP0_FIFO_SIZE,
1846                 },
1847                 .dev            = &memory,
1848                 .reg_udccs      = &UDCCS0,
1849                 .reg_uddr       = &UDDR0,
1850         },
1851
1852         /* first group of endpoints */
1853         .ep[1] = {
1854                 .ep = {
1855                         .name           = "ep1in-bulk",
1856                         .ops            = &pxa25x_ep_ops,
1857                         .maxpacket      = BULK_FIFO_SIZE,
1858                 },
1859                 .dev            = &memory,
1860                 .fifo_size      = BULK_FIFO_SIZE,
1861                 .bEndpointAddress = USB_DIR_IN | 1,
1862                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1863                 .reg_udccs      = &UDCCS1,
1864                 .reg_uddr       = &UDDR1,
1865         },
1866         .ep[2] = {
1867                 .ep = {
1868                         .name           = "ep2out-bulk",
1869                         .ops            = &pxa25x_ep_ops,
1870                         .maxpacket      = BULK_FIFO_SIZE,
1871                 },
1872                 .dev            = &memory,
1873                 .fifo_size      = BULK_FIFO_SIZE,
1874                 .bEndpointAddress = 2,
1875                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1876                 .reg_udccs      = &UDCCS2,
1877                 .reg_ubcr       = &UBCR2,
1878                 .reg_uddr       = &UDDR2,
1879         },
1880 #ifndef CONFIG_USB_PXA25X_SMALL
1881         .ep[3] = {
1882                 .ep = {
1883                         .name           = "ep3in-iso",
1884                         .ops            = &pxa25x_ep_ops,
1885                         .maxpacket      = ISO_FIFO_SIZE,
1886                 },
1887                 .dev            = &memory,
1888                 .fifo_size      = ISO_FIFO_SIZE,
1889                 .bEndpointAddress = USB_DIR_IN | 3,
1890                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1891                 .reg_udccs      = &UDCCS3,
1892                 .reg_uddr       = &UDDR3,
1893         },
1894         .ep[4] = {
1895                 .ep = {
1896                         .name           = "ep4out-iso",
1897                         .ops            = &pxa25x_ep_ops,
1898                         .maxpacket      = ISO_FIFO_SIZE,
1899                 },
1900                 .dev            = &memory,
1901                 .fifo_size      = ISO_FIFO_SIZE,
1902                 .bEndpointAddress = 4,
1903                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1904                 .reg_udccs      = &UDCCS4,
1905                 .reg_ubcr       = &UBCR4,
1906                 .reg_uddr       = &UDDR4,
1907         },
1908         .ep[5] = {
1909                 .ep = {
1910                         .name           = "ep5in-int",
1911                         .ops            = &pxa25x_ep_ops,
1912                         .maxpacket      = INT_FIFO_SIZE,
1913                 },
1914                 .dev            = &memory,
1915                 .fifo_size      = INT_FIFO_SIZE,
1916                 .bEndpointAddress = USB_DIR_IN | 5,
1917                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
1918                 .reg_udccs      = &UDCCS5,
1919                 .reg_uddr       = &UDDR5,
1920         },
1921
1922         /* second group of endpoints */
1923         .ep[6] = {
1924                 .ep = {
1925                         .name           = "ep6in-bulk",
1926                         .ops            = &pxa25x_ep_ops,
1927                         .maxpacket      = BULK_FIFO_SIZE,
1928                 },
1929                 .dev            = &memory,
1930                 .fifo_size      = BULK_FIFO_SIZE,
1931                 .bEndpointAddress = USB_DIR_IN | 6,
1932                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1933                 .reg_udccs      = &UDCCS6,
1934                 .reg_uddr       = &UDDR6,
1935         },
1936         .ep[7] = {
1937                 .ep = {
1938                         .name           = "ep7out-bulk",
1939                         .ops            = &pxa25x_ep_ops,
1940                         .maxpacket      = BULK_FIFO_SIZE,
1941                 },
1942                 .dev            = &memory,
1943                 .fifo_size      = BULK_FIFO_SIZE,
1944                 .bEndpointAddress = 7,
1945                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1946                 .reg_udccs      = &UDCCS7,
1947                 .reg_ubcr       = &UBCR7,
1948                 .reg_uddr       = &UDDR7,
1949         },
1950         .ep[8] = {
1951                 .ep = {
1952                         .name           = "ep8in-iso",
1953                         .ops            = &pxa25x_ep_ops,
1954                         .maxpacket      = ISO_FIFO_SIZE,
1955                 },
1956                 .dev            = &memory,
1957                 .fifo_size      = ISO_FIFO_SIZE,
1958                 .bEndpointAddress = USB_DIR_IN | 8,
1959                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1960                 .reg_udccs      = &UDCCS8,
1961                 .reg_uddr       = &UDDR8,
1962         },
1963         .ep[9] = {
1964                 .ep = {
1965                         .name           = "ep9out-iso",
1966                         .ops            = &pxa25x_ep_ops,
1967                         .maxpacket      = ISO_FIFO_SIZE,
1968                 },
1969                 .dev            = &memory,
1970                 .fifo_size      = ISO_FIFO_SIZE,
1971                 .bEndpointAddress = 9,
1972                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1973                 .reg_udccs      = &UDCCS9,
1974                 .reg_ubcr       = &UBCR9,
1975                 .reg_uddr       = &UDDR9,
1976         },
1977         .ep[10] = {
1978                 .ep = {
1979                         .name           = "ep10in-int",
1980                         .ops            = &pxa25x_ep_ops,
1981                         .maxpacket      = INT_FIFO_SIZE,
1982                 },
1983                 .dev            = &memory,
1984                 .fifo_size      = INT_FIFO_SIZE,
1985                 .bEndpointAddress = USB_DIR_IN | 10,
1986                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
1987                 .reg_udccs      = &UDCCS10,
1988                 .reg_uddr       = &UDDR10,
1989         },
1990
1991         /* third group of endpoints */
1992         .ep[11] = {
1993                 .ep = {
1994                         .name           = "ep11in-bulk",
1995                         .ops            = &pxa25x_ep_ops,
1996                         .maxpacket      = BULK_FIFO_SIZE,
1997                 },
1998                 .dev            = &memory,
1999                 .fifo_size      = BULK_FIFO_SIZE,
2000                 .bEndpointAddress = USB_DIR_IN | 11,
2001                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
2002                 .reg_udccs      = &UDCCS11,
2003                 .reg_uddr       = &UDDR11,
2004         },
2005         .ep[12] = {
2006                 .ep = {
2007                         .name           = "ep12out-bulk",
2008                         .ops            = &pxa25x_ep_ops,
2009                         .maxpacket      = BULK_FIFO_SIZE,
2010                 },
2011                 .dev            = &memory,
2012                 .fifo_size      = BULK_FIFO_SIZE,
2013                 .bEndpointAddress = 12,
2014                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
2015                 .reg_udccs      = &UDCCS12,
2016                 .reg_ubcr       = &UBCR12,
2017                 .reg_uddr       = &UDDR12,
2018         },
2019         .ep[13] = {
2020                 .ep = {
2021                         .name           = "ep13in-iso",
2022                         .ops            = &pxa25x_ep_ops,
2023                         .maxpacket      = ISO_FIFO_SIZE,
2024                 },
2025                 .dev            = &memory,
2026                 .fifo_size      = ISO_FIFO_SIZE,
2027                 .bEndpointAddress = USB_DIR_IN | 13,
2028                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
2029                 .reg_udccs      = &UDCCS13,
2030                 .reg_uddr       = &UDDR13,
2031         },
2032         .ep[14] = {
2033                 .ep = {
2034                         .name           = "ep14out-iso",
2035                         .ops            = &pxa25x_ep_ops,
2036                         .maxpacket      = ISO_FIFO_SIZE,
2037                 },
2038                 .dev            = &memory,
2039                 .fifo_size      = ISO_FIFO_SIZE,
2040                 .bEndpointAddress = 14,
2041                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
2042                 .reg_udccs      = &UDCCS14,
2043                 .reg_ubcr       = &UBCR14,
2044                 .reg_uddr       = &UDDR14,
2045         },
2046         .ep[15] = {
2047                 .ep = {
2048                         .name           = "ep15in-int",
2049                         .ops            = &pxa25x_ep_ops,
2050                         .maxpacket      = INT_FIFO_SIZE,
2051                 },
2052                 .dev            = &memory,
2053                 .fifo_size      = INT_FIFO_SIZE,
2054                 .bEndpointAddress = USB_DIR_IN | 15,
2055                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
2056                 .reg_udccs      = &UDCCS15,
2057                 .reg_uddr       = &UDDR15,
2058         },
2059 #endif /* !CONFIG_USB_PXA25X_SMALL */
2060 };
2061
2062 #define CP15R0_VENDOR_MASK      0xffffe000
2063
2064 #if     defined(CONFIG_ARCH_PXA)
2065 #define CP15R0_XSCALE_VALUE     0x69052000      /* intel/arm/xscale */
2066
2067 #elif   defined(CONFIG_ARCH_IXP4XX)
2068 #define CP15R0_XSCALE_VALUE     0x69054000      /* intel/arm/ixp4xx */
2069
2070 #endif
2071
2072 #define CP15R0_PROD_MASK        0x000003f0
2073 #define PXA25x                  0x00000100      /* and PXA26x */
2074 #define PXA210                  0x00000120
2075
2076 #define CP15R0_REV_MASK         0x0000000f
2077
2078 #define CP15R0_PRODREV_MASK     (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2079
2080 #define PXA255_A0               0x00000106      /* or PXA260_B1 */
2081 #define PXA250_C0               0x00000105      /* or PXA26x_B0 */
2082 #define PXA250_B2               0x00000104
2083 #define PXA250_B1               0x00000103      /* or PXA260_A0 */
2084 #define PXA250_B0               0x00000102
2085 #define PXA250_A1               0x00000101
2086 #define PXA250_A0               0x00000100
2087
2088 #define PXA210_C0               0x00000125
2089 #define PXA210_B2               0x00000124
2090 #define PXA210_B1               0x00000123
2091 #define PXA210_B0               0x00000122
2092 #define IXP425_A0               0x000001c1
2093 #define IXP425_B0               0x000001f1
2094 #define IXP465_AD               0x00000200
2095
2096 /*
2097  *      probe - binds to the platform device
2098  */
2099 static int __init pxa25x_udc_probe(struct platform_device *pdev)
2100 {
2101         struct pxa25x_udc *dev = &memory;
2102         int retval, irq;
2103         u32 chiprev;
2104
2105         /* insist on Intel/ARM/XScale */
2106         asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
2107         if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
2108                 pr_err("%s: not XScale!\n", driver_name);
2109                 return -ENODEV;
2110         }
2111
2112         /* trigger chiprev-specific logic */
2113         switch (chiprev & CP15R0_PRODREV_MASK) {
2114 #if     defined(CONFIG_ARCH_PXA)
2115         case PXA255_A0:
2116                 dev->has_cfr = 1;
2117                 break;
2118         case PXA250_A0:
2119         case PXA250_A1:
2120                 /* A0/A1 "not released"; ep 13, 15 unusable */
2121                 /* fall through */
2122         case PXA250_B2: case PXA210_B2:
2123         case PXA250_B1: case PXA210_B1:
2124         case PXA250_B0: case PXA210_B0:
2125                 /* OUT-DMA is broken ... */
2126                 /* fall through */
2127         case PXA250_C0: case PXA210_C0:
2128                 break;
2129 #elif   defined(CONFIG_ARCH_IXP4XX)
2130         case IXP425_A0:
2131         case IXP425_B0:
2132         case IXP465_AD:
2133                 dev->has_cfr = 1;
2134                 break;
2135 #endif
2136         default:
2137                 pr_err("%s: unrecognized processor: %08x\n",
2138                         driver_name, chiprev);
2139                 /* iop3xx, ixp4xx, ... */
2140                 return -ENODEV;
2141         }
2142
2143         irq = platform_get_irq(pdev, 0);
2144         if (irq < 0)
2145                 return -ENODEV;
2146
2147         dev->clk = clk_get(&pdev->dev, NULL);
2148         if (IS_ERR(dev->clk)) {
2149                 retval = PTR_ERR(dev->clk);
2150                 goto err_clk;
2151         }
2152
2153         pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
2154                 dev->has_cfr ? "" : " (!cfr)",
2155                 SIZE_STR "(pio)"
2156                 );
2157
2158         /* other non-static parts of init */
2159         dev->dev = &pdev->dev;
2160         dev->mach = pdev->dev.platform_data;
2161
2162         dev->transceiver = usb_get_transceiver();
2163
2164         if (gpio_is_valid(dev->mach->gpio_pullup)) {
2165                 if ((retval = gpio_request(dev->mach->gpio_pullup,
2166                                 "pca25x_udc GPIO PULLUP"))) {
2167                         dev_dbg(&pdev->dev,
2168                                 "can't get pullup gpio %d, err: %d\n",
2169                                 dev->mach->gpio_pullup, retval);
2170                         goto err_gpio_pullup;
2171                 }
2172                 gpio_direction_output(dev->mach->gpio_pullup, 0);
2173         }
2174
2175         init_timer(&dev->timer);
2176         dev->timer.function = udc_watchdog;
2177         dev->timer.data = (unsigned long) dev;
2178
2179         device_initialize(&dev->gadget.dev);
2180         dev->gadget.dev.parent = &pdev->dev;
2181         dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
2182
2183         the_controller = dev;
2184         platform_set_drvdata(pdev, dev);
2185
2186         udc_disable(dev);
2187         udc_reinit(dev);
2188
2189         dev->vbus = 0;
2190
2191         /* irq setup after old hardware state is cleaned up */
2192         retval = request_irq(irq, pxa25x_udc_irq,
2193                         0, driver_name, dev);
2194         if (retval != 0) {
2195                 pr_err("%s: can't get irq %d, err %d\n",
2196                         driver_name, irq, retval);
2197                 goto err_irq1;
2198         }
2199         dev->got_irq = 1;
2200
2201 #ifdef CONFIG_ARCH_LUBBOCK
2202         if (machine_is_lubbock()) {
2203                 retval = request_irq(LUBBOCK_USB_DISC_IRQ,
2204                                 lubbock_vbus_irq,
2205                                 IRQF_SAMPLE_RANDOM,
2206                                 driver_name, dev);
2207                 if (retval != 0) {
2208                         pr_err("%s: can't get irq %i, err %d\n",
2209                                 driver_name, LUBBOCK_USB_DISC_IRQ, retval);
2210                         goto err_irq_lub;
2211                 }
2212                 retval = request_irq(LUBBOCK_USB_IRQ,
2213                                 lubbock_vbus_irq,
2214                                 IRQF_SAMPLE_RANDOM,
2215                                 driver_name, dev);
2216                 if (retval != 0) {
2217                         pr_err("%s: can't get irq %i, err %d\n",
2218                                 driver_name, LUBBOCK_USB_IRQ, retval);
2219                         goto lubbock_fail0;
2220                 }
2221         } else
2222 #endif
2223         create_debug_files(dev);
2224
2225         retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);
2226         if (!retval)
2227                 return retval;
2228
2229         remove_debug_files(dev);
2230 #ifdef  CONFIG_ARCH_LUBBOCK
2231 lubbock_fail0:
2232         free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2233  err_irq_lub:
2234         free_irq(irq, dev);
2235 #endif
2236  err_irq1:
2237         if (gpio_is_valid(dev->mach->gpio_pullup))
2238                 gpio_free(dev->mach->gpio_pullup);
2239  err_gpio_pullup:
2240         if (dev->transceiver) {
2241                 usb_put_transceiver(dev->transceiver);
2242                 dev->transceiver = NULL;
2243         }
2244         clk_put(dev->clk);
2245  err_clk:
2246         return retval;
2247 }
2248
2249 static void pxa25x_udc_shutdown(struct platform_device *_dev)
2250 {
2251         pullup_off();
2252 }
2253
2254 static int __exit pxa25x_udc_remove(struct platform_device *pdev)
2255 {
2256         struct pxa25x_udc *dev = platform_get_drvdata(pdev);
2257
2258         usb_del_gadget_udc(&dev->gadget);
2259         if (dev->driver)
2260                 return -EBUSY;
2261
2262         dev->pullup = 0;
2263         pullup(dev);
2264
2265         remove_debug_files(dev);
2266
2267         if (dev->got_irq) {
2268                 free_irq(platform_get_irq(pdev, 0), dev);
2269                 dev->got_irq = 0;
2270         }
2271 #ifdef CONFIG_ARCH_LUBBOCK
2272         if (machine_is_lubbock()) {
2273                 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2274                 free_irq(LUBBOCK_USB_IRQ, dev);
2275         }
2276 #endif
2277         if (gpio_is_valid(dev->mach->gpio_pullup))
2278                 gpio_free(dev->mach->gpio_pullup);
2279
2280         clk_put(dev->clk);
2281
2282         if (dev->transceiver) {
2283                 usb_put_transceiver(dev->transceiver);
2284                 dev->transceiver = NULL;
2285         }
2286
2287         platform_set_drvdata(pdev, NULL);
2288         the_controller = NULL;
2289         return 0;
2290 }
2291
2292 /*-------------------------------------------------------------------------*/
2293
2294 #ifdef  CONFIG_PM
2295
2296 /* USB suspend (controlled by the host) and system suspend (controlled
2297  * by the PXA) don't necessarily work well together.  If USB is active,
2298  * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2299  * mode, or any deeper PM saving state.
2300  *
2301  * For now, we punt and forcibly disconnect from the USB host when PXA
2302  * enters any suspend state.  While we're disconnected, we always disable
2303  * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2304  * Boards without software pullup control shouldn't use those states.
2305  * VBUS IRQs should probably be ignored so that the PXA device just acts
2306  * "dead" to USB hosts until system resume.
2307  */
2308 static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)
2309 {
2310         struct pxa25x_udc       *udc = platform_get_drvdata(dev);
2311         unsigned long flags;
2312
2313         if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
2314                 WARNING("USB host won't detect disconnect!\n");
2315         udc->suspended = 1;
2316
2317         local_irq_save(flags);
2318         pullup(udc);
2319         local_irq_restore(flags);
2320
2321         return 0;
2322 }
2323
2324 static int pxa25x_udc_resume(struct platform_device *dev)
2325 {
2326         struct pxa25x_udc       *udc = platform_get_drvdata(dev);
2327         unsigned long flags;
2328
2329         udc->suspended = 0;
2330         local_irq_save(flags);
2331         pullup(udc);
2332         local_irq_restore(flags);
2333
2334         return 0;
2335 }
2336
2337 #else
2338 #define pxa25x_udc_suspend      NULL
2339 #define pxa25x_udc_resume       NULL
2340 #endif
2341
2342 /*-------------------------------------------------------------------------*/
2343
2344 static struct platform_driver udc_driver = {
2345         .shutdown       = pxa25x_udc_shutdown,
2346         .remove         = __exit_p(pxa25x_udc_remove),
2347         .suspend        = pxa25x_udc_suspend,
2348         .resume         = pxa25x_udc_resume,
2349         .driver         = {
2350                 .owner  = THIS_MODULE,
2351                 .name   = "pxa25x-udc",
2352         },
2353 };
2354
2355 static int __init udc_init(void)
2356 {
2357         pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
2358         return platform_driver_probe(&udc_driver, pxa25x_udc_probe);
2359 }
2360 module_init(udc_init);
2361
2362 static void __exit udc_exit(void)
2363 {
2364         platform_driver_unregister(&udc_driver);
2365 }
2366 module_exit(udc_exit);
2367
2368 MODULE_DESCRIPTION(DRIVER_DESC);
2369 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2370 MODULE_LICENSE("GPL");
2371 MODULE_ALIAS("platform:pxa25x-udc");