2 * M66592 UDC (USB gadget)
4 * Copyright (C) 2006-2007 Renesas Solutions Corp.
6 * Author : Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
13 #include <linux/module.h>
14 #include <linux/interrupt.h>
15 #include <linux/delay.h>
17 #include <linux/platform_device.h>
18 #include <linux/slab.h>
19 #include <linux/err.h>
20 #include <linux/usb/ch9.h>
21 #include <linux/usb/gadget.h>
23 #include "m66592-udc.h"
25 MODULE_DESCRIPTION("M66592 USB gadget driver");
26 MODULE_LICENSE("GPL");
27 MODULE_AUTHOR("Yoshihiro Shimoda");
28 MODULE_ALIAS("platform:m66592_udc");
30 #define DRIVER_VERSION "21 July 2009"
32 static const char udc_name[] = "m66592_udc";
33 static const char *m66592_ep_name[] = {
34 "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7"
37 static void disable_controller(struct m66592 *m66592);
38 static void irq_ep0_write(struct m66592_ep *ep, struct m66592_request *req);
39 static void irq_packet_write(struct m66592_ep *ep, struct m66592_request *req);
40 static int m66592_queue(struct usb_ep *_ep, struct usb_request *_req,
43 static void transfer_complete(struct m66592_ep *ep,
44 struct m66592_request *req, int status);
46 /*-------------------------------------------------------------------------*/
47 static inline u16 get_usb_speed(struct m66592 *m66592)
49 return (m66592_read(m66592, M66592_DVSTCTR) & M66592_RHST);
52 static void enable_pipe_irq(struct m66592 *m66592, u16 pipenum,
57 tmp = m66592_read(m66592, M66592_INTENB0);
58 m66592_bclr(m66592, M66592_BEMPE | M66592_NRDYE | M66592_BRDYE,
60 m66592_bset(m66592, (1 << pipenum), reg);
61 m66592_write(m66592, tmp, M66592_INTENB0);
64 static void disable_pipe_irq(struct m66592 *m66592, u16 pipenum,
69 tmp = m66592_read(m66592, M66592_INTENB0);
70 m66592_bclr(m66592, M66592_BEMPE | M66592_NRDYE | M66592_BRDYE,
72 m66592_bclr(m66592, (1 << pipenum), reg);
73 m66592_write(m66592, tmp, M66592_INTENB0);
76 static void m66592_usb_connect(struct m66592 *m66592)
78 m66592_bset(m66592, M66592_CTRE, M66592_INTENB0);
79 m66592_bset(m66592, M66592_WDST | M66592_RDST | M66592_CMPL,
81 m66592_bset(m66592, M66592_BEMPE | M66592_BRDYE, M66592_INTENB0);
83 m66592_bset(m66592, M66592_DPRPU, M66592_SYSCFG);
86 static void m66592_usb_disconnect(struct m66592 *m66592)
87 __releases(m66592->lock)
88 __acquires(m66592->lock)
90 m66592_bclr(m66592, M66592_CTRE, M66592_INTENB0);
91 m66592_bclr(m66592, M66592_WDST | M66592_RDST | M66592_CMPL,
93 m66592_bclr(m66592, M66592_BEMPE | M66592_BRDYE, M66592_INTENB0);
94 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
96 m66592->gadget.speed = USB_SPEED_UNKNOWN;
97 spin_unlock(&m66592->lock);
98 m66592->driver->disconnect(&m66592->gadget);
99 spin_lock(&m66592->lock);
101 disable_controller(m66592);
102 INIT_LIST_HEAD(&m66592->ep[0].queue);
105 static inline u16 control_reg_get_pid(struct m66592 *m66592, u16 pipenum)
108 unsigned long offset;
111 pid = m66592_read(m66592, M66592_DCPCTR) & M66592_PID;
112 else if (pipenum < M66592_MAX_NUM_PIPE) {
113 offset = get_pipectr_addr(pipenum);
114 pid = m66592_read(m66592, offset) & M66592_PID;
116 pr_err("unexpect pipe num (%d)\n", pipenum);
121 static inline void control_reg_set_pid(struct m66592 *m66592, u16 pipenum,
124 unsigned long offset;
127 m66592_mdfy(m66592, pid, M66592_PID, M66592_DCPCTR);
128 else if (pipenum < M66592_MAX_NUM_PIPE) {
129 offset = get_pipectr_addr(pipenum);
130 m66592_mdfy(m66592, pid, M66592_PID, offset);
132 pr_err("unexpect pipe num (%d)\n", pipenum);
135 static inline void pipe_start(struct m66592 *m66592, u16 pipenum)
137 control_reg_set_pid(m66592, pipenum, M66592_PID_BUF);
140 static inline void pipe_stop(struct m66592 *m66592, u16 pipenum)
142 control_reg_set_pid(m66592, pipenum, M66592_PID_NAK);
145 static inline void pipe_stall(struct m66592 *m66592, u16 pipenum)
147 control_reg_set_pid(m66592, pipenum, M66592_PID_STALL);
150 static inline u16 control_reg_get(struct m66592 *m66592, u16 pipenum)
153 unsigned long offset;
156 ret = m66592_read(m66592, M66592_DCPCTR);
157 else if (pipenum < M66592_MAX_NUM_PIPE) {
158 offset = get_pipectr_addr(pipenum);
159 ret = m66592_read(m66592, offset);
161 pr_err("unexpect pipe num (%d)\n", pipenum);
166 static inline void control_reg_sqclr(struct m66592 *m66592, u16 pipenum)
168 unsigned long offset;
170 pipe_stop(m66592, pipenum);
173 m66592_bset(m66592, M66592_SQCLR, M66592_DCPCTR);
174 else if (pipenum < M66592_MAX_NUM_PIPE) {
175 offset = get_pipectr_addr(pipenum);
176 m66592_bset(m66592, M66592_SQCLR, offset);
178 pr_err("unexpect pipe num(%d)\n", pipenum);
181 static inline int get_buffer_size(struct m66592 *m66592, u16 pipenum)
187 tmp = m66592_read(m66592, M66592_DCPCFG);
188 if ((tmp & M66592_CNTMD) != 0)
191 tmp = m66592_read(m66592, M66592_DCPMAXP);
192 size = tmp & M66592_MAXP;
195 m66592_write(m66592, pipenum, M66592_PIPESEL);
196 tmp = m66592_read(m66592, M66592_PIPECFG);
197 if ((tmp & M66592_CNTMD) != 0) {
198 tmp = m66592_read(m66592, M66592_PIPEBUF);
199 size = ((tmp >> 10) + 1) * 64;
201 tmp = m66592_read(m66592, M66592_PIPEMAXP);
202 size = tmp & M66592_MXPS;
209 static inline void pipe_change(struct m66592 *m66592, u16 pipenum)
211 struct m66592_ep *ep = m66592->pipenum2ep[pipenum];
217 m66592_mdfy(m66592, pipenum, M66592_CURPIPE, ep->fifosel);
221 if (m66592->pdata->on_chip)
226 m66592_bset(m66592, mbw, ep->fifosel);
229 static int pipe_buffer_setting(struct m66592 *m66592,
230 struct m66592_pipe_info *info)
232 u16 bufnum = 0, buf_bsize = 0;
238 m66592_write(m66592, info->pipe, M66592_PIPESEL);
241 pipecfg |= M66592_DIR;
242 pipecfg |= info->type;
243 pipecfg |= info->epnum;
244 switch (info->type) {
246 bufnum = 4 + (info->pipe - M66592_BASE_PIPENUM_INT);
250 /* isochronous pipes may be used as bulk pipes */
251 if (info->pipe >= M66592_BASE_PIPENUM_BULK)
252 bufnum = info->pipe - M66592_BASE_PIPENUM_BULK;
254 bufnum = info->pipe - M66592_BASE_PIPENUM_ISOC;
256 bufnum = M66592_BASE_BUFNUM + (bufnum * 16);
258 pipecfg |= M66592_DBLB;
260 pipecfg |= M66592_SHTNAK;
263 bufnum = M66592_BASE_BUFNUM +
264 (info->pipe - M66592_BASE_PIPENUM_ISOC) * 16;
269 if (buf_bsize && ((bufnum + 16) >= M66592_MAX_BUFNUM)) {
270 pr_err("m66592 pipe memory is insufficient\n");
274 m66592_write(m66592, pipecfg, M66592_PIPECFG);
275 m66592_write(m66592, (buf_bsize << 10) | (bufnum), M66592_PIPEBUF);
276 m66592_write(m66592, info->maxpacket, M66592_PIPEMAXP);
279 m66592_write(m66592, info->interval, M66592_PIPEPERI);
284 static void pipe_buffer_release(struct m66592 *m66592,
285 struct m66592_pipe_info *info)
290 if (is_bulk_pipe(info->pipe)) {
292 } else if (is_interrupt_pipe(info->pipe))
294 else if (is_isoc_pipe(info->pipe)) {
295 m66592->isochronous--;
296 if (info->type == M66592_BULK)
299 pr_err("ep_release: unexpect pipenum (%d)\n",
303 static void pipe_initialize(struct m66592_ep *ep)
305 struct m66592 *m66592 = ep->m66592;
308 m66592_mdfy(m66592, 0, M66592_CURPIPE, ep->fifosel);
310 m66592_write(m66592, M66592_ACLRM, ep->pipectr);
311 m66592_write(m66592, 0, ep->pipectr);
312 m66592_write(m66592, M66592_SQCLR, ep->pipectr);
314 m66592_mdfy(m66592, ep->pipenum, M66592_CURPIPE, ep->fifosel);
318 if (m66592->pdata->on_chip)
323 m66592_bset(m66592, mbw, ep->fifosel);
327 static void m66592_ep_setting(struct m66592 *m66592, struct m66592_ep *ep,
328 const struct usb_endpoint_descriptor *desc,
329 u16 pipenum, int dma)
331 if ((pipenum != 0) && dma) {
332 if (m66592->num_dma == 0) {
335 ep->fifoaddr = M66592_D0FIFO;
336 ep->fifosel = M66592_D0FIFOSEL;
337 ep->fifoctr = M66592_D0FIFOCTR;
338 ep->fifotrn = M66592_D0FIFOTRN;
339 } else if (!m66592->pdata->on_chip && m66592->num_dma == 1) {
342 ep->fifoaddr = M66592_D1FIFO;
343 ep->fifosel = M66592_D1FIFOSEL;
344 ep->fifoctr = M66592_D1FIFOCTR;
345 ep->fifotrn = M66592_D1FIFOTRN;
348 ep->fifoaddr = M66592_CFIFO;
349 ep->fifosel = M66592_CFIFOSEL;
350 ep->fifoctr = M66592_CFIFOCTR;
355 ep->fifoaddr = M66592_CFIFO;
356 ep->fifosel = M66592_CFIFOSEL;
357 ep->fifoctr = M66592_CFIFOCTR;
361 ep->pipectr = get_pipectr_addr(pipenum);
362 ep->pipenum = pipenum;
363 ep->ep.maxpacket = usb_endpoint_maxp(desc);
364 m66592->pipenum2ep[pipenum] = ep;
365 m66592->epaddr2ep[desc->bEndpointAddress&USB_ENDPOINT_NUMBER_MASK] = ep;
366 INIT_LIST_HEAD(&ep->queue);
369 static void m66592_ep_release(struct m66592_ep *ep)
371 struct m66592 *m66592 = ep->m66592;
372 u16 pipenum = ep->pipenum;
384 static int alloc_pipe_config(struct m66592_ep *ep,
385 const struct usb_endpoint_descriptor *desc)
387 struct m66592 *m66592 = ep->m66592;
388 struct m66592_pipe_info info;
397 switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
398 case USB_ENDPOINT_XFER_BULK:
399 if (m66592->bulk >= M66592_MAX_NUM_BULK) {
400 if (m66592->isochronous >= M66592_MAX_NUM_ISOC) {
401 pr_err("bulk pipe is insufficient\n");
404 info.pipe = M66592_BASE_PIPENUM_ISOC
405 + m66592->isochronous;
406 counter = &m66592->isochronous;
409 info.pipe = M66592_BASE_PIPENUM_BULK + m66592->bulk;
410 counter = &m66592->bulk;
412 info.type = M66592_BULK;
415 case USB_ENDPOINT_XFER_INT:
416 if (m66592->interrupt >= M66592_MAX_NUM_INT) {
417 pr_err("interrupt pipe is insufficient\n");
420 info.pipe = M66592_BASE_PIPENUM_INT + m66592->interrupt;
421 info.type = M66592_INT;
422 counter = &m66592->interrupt;
424 case USB_ENDPOINT_XFER_ISOC:
425 if (m66592->isochronous >= M66592_MAX_NUM_ISOC) {
426 pr_err("isochronous pipe is insufficient\n");
429 info.pipe = M66592_BASE_PIPENUM_ISOC + m66592->isochronous;
430 info.type = M66592_ISO;
431 counter = &m66592->isochronous;
434 pr_err("unexpect xfer type\n");
437 ep->type = info.type;
439 info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
440 info.maxpacket = usb_endpoint_maxp(desc);
441 info.interval = desc->bInterval;
442 if (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK)
447 ret = pipe_buffer_setting(m66592, &info);
449 pr_err("pipe_buffer_setting fail\n");
454 if ((counter == &m66592->isochronous) && info.type == M66592_BULK)
457 m66592_ep_setting(m66592, ep, desc, info.pipe, dma);
463 static int free_pipe_config(struct m66592_ep *ep)
465 struct m66592 *m66592 = ep->m66592;
466 struct m66592_pipe_info info;
468 info.pipe = ep->pipenum;
469 info.type = ep->type;
470 pipe_buffer_release(m66592, &info);
471 m66592_ep_release(ep);
476 /*-------------------------------------------------------------------------*/
477 static void pipe_irq_enable(struct m66592 *m66592, u16 pipenum)
479 enable_irq_ready(m66592, pipenum);
480 enable_irq_nrdy(m66592, pipenum);
483 static void pipe_irq_disable(struct m66592 *m66592, u16 pipenum)
485 disable_irq_ready(m66592, pipenum);
486 disable_irq_nrdy(m66592, pipenum);
489 /* if complete is true, gadget driver complete function is not call */
490 static void control_end(struct m66592 *m66592, unsigned ccpl)
492 m66592->ep[0].internal_ccpl = ccpl;
493 pipe_start(m66592, 0);
494 m66592_bset(m66592, M66592_CCPL, M66592_DCPCTR);
497 static void start_ep0_write(struct m66592_ep *ep, struct m66592_request *req)
499 struct m66592 *m66592 = ep->m66592;
501 pipe_change(m66592, ep->pipenum);
502 m66592_mdfy(m66592, M66592_ISEL | M66592_PIPE0,
503 (M66592_ISEL | M66592_CURPIPE),
505 m66592_write(m66592, M66592_BCLR, ep->fifoctr);
506 if (req->req.length == 0) {
507 m66592_bset(m66592, M66592_BVAL, ep->fifoctr);
508 pipe_start(m66592, 0);
509 transfer_complete(ep, req, 0);
511 m66592_write(m66592, ~M66592_BEMP0, M66592_BEMPSTS);
512 irq_ep0_write(ep, req);
516 static void start_packet_write(struct m66592_ep *ep, struct m66592_request *req)
518 struct m66592 *m66592 = ep->m66592;
521 pipe_change(m66592, ep->pipenum);
522 disable_irq_empty(m66592, ep->pipenum);
523 pipe_start(m66592, ep->pipenum);
525 tmp = m66592_read(m66592, ep->fifoctr);
526 if (unlikely((tmp & M66592_FRDY) == 0))
527 pipe_irq_enable(m66592, ep->pipenum);
529 irq_packet_write(ep, req);
532 static void start_packet_read(struct m66592_ep *ep, struct m66592_request *req)
534 struct m66592 *m66592 = ep->m66592;
535 u16 pipenum = ep->pipenum;
537 if (ep->pipenum == 0) {
538 m66592_mdfy(m66592, M66592_PIPE0,
539 (M66592_ISEL | M66592_CURPIPE),
541 m66592_write(m66592, M66592_BCLR, ep->fifoctr);
542 pipe_start(m66592, pipenum);
543 pipe_irq_enable(m66592, pipenum);
546 m66592_bset(m66592, M66592_TRCLR, ep->fifosel);
547 pipe_change(m66592, pipenum);
548 m66592_bset(m66592, M66592_TRENB, ep->fifosel);
550 (req->req.length + ep->ep.maxpacket - 1)
554 pipe_start(m66592, pipenum); /* trigger once */
555 pipe_irq_enable(m66592, pipenum);
559 static void start_packet(struct m66592_ep *ep, struct m66592_request *req)
561 if (ep->ep.desc->bEndpointAddress & USB_DIR_IN)
562 start_packet_write(ep, req);
564 start_packet_read(ep, req);
567 static void start_ep0(struct m66592_ep *ep, struct m66592_request *req)
571 ctsq = m66592_read(ep->m66592, M66592_INTSTS0) & M66592_CTSQ;
575 start_ep0_write(ep, req);
578 start_packet_read(ep, req);
582 control_end(ep->m66592, 0);
585 pr_err("start_ep0: unexpect ctsq(%x)\n", ctsq);
590 static void init_controller(struct m66592 *m66592)
594 if (m66592->pdata->on_chip) {
595 if (m66592->pdata->endian)
596 endian = 0; /* big endian */
598 endian = M66592_LITTLE; /* little endian */
600 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
601 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
602 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
603 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
605 /* This is a workaound for SH7722 2nd cut */
606 m66592_bset(m66592, 0x8000, M66592_DVSTCTR);
607 m66592_bset(m66592, 0x1000, M66592_TESTMODE);
608 m66592_bclr(m66592, 0x8000, M66592_DVSTCTR);
610 m66592_bset(m66592, M66592_INTL, M66592_INTENB1);
612 m66592_write(m66592, 0, M66592_CFBCFG);
613 m66592_write(m66592, 0, M66592_D0FBCFG);
614 m66592_bset(m66592, endian, M66592_CFBCFG);
615 m66592_bset(m66592, endian, M66592_D0FBCFG);
617 unsigned int clock, vif, irq_sense;
619 if (m66592->pdata->endian)
620 endian = M66592_BIGEND; /* big endian */
622 endian = 0; /* little endian */
624 if (m66592->pdata->vif)
625 vif = M66592_LDRV; /* 3.3v */
629 switch (m66592->pdata->xtal) {
630 case M66592_PLATDATA_XTAL_12MHZ:
631 clock = M66592_XTAL12;
633 case M66592_PLATDATA_XTAL_24MHZ:
634 clock = M66592_XTAL24;
636 case M66592_PLATDATA_XTAL_48MHZ:
637 clock = M66592_XTAL48;
640 pr_warning("m66592-udc: xtal configuration error\n");
644 switch (m66592->irq_trigger) {
645 case IRQF_TRIGGER_LOW:
646 irq_sense = M66592_INTL;
648 case IRQF_TRIGGER_FALLING:
652 pr_warning("m66592-udc: irq trigger config error\n");
657 (vif & M66592_LDRV) | (endian & M66592_BIGEND),
659 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
660 m66592_mdfy(m66592, clock & M66592_XTAL, M66592_XTAL,
662 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
663 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
664 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
666 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);
670 m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG);
674 m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG);
676 m66592_bset(m66592, irq_sense & M66592_INTL, M66592_INTENB1);
677 m66592_write(m66592, M66592_BURST | M66592_CPU_ADR_RD_WR,
682 static void disable_controller(struct m66592 *m66592)
684 m66592_bclr(m66592, M66592_UTST, M66592_TESTMODE);
685 if (!m66592->pdata->on_chip) {
686 m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG);
688 m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG);
690 m66592_bclr(m66592, M66592_RCKE, M66592_SYSCFG);
692 m66592_bclr(m66592, M66592_XCKE, M66592_SYSCFG);
696 static void m66592_start_xclock(struct m66592 *m66592)
700 if (!m66592->pdata->on_chip) {
701 tmp = m66592_read(m66592, M66592_SYSCFG);
702 if (!(tmp & M66592_XCKE))
703 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);
707 /*-------------------------------------------------------------------------*/
708 static void transfer_complete(struct m66592_ep *ep,
709 struct m66592_request *req, int status)
710 __releases(m66592->lock)
711 __acquires(m66592->lock)
715 if (unlikely(ep->pipenum == 0)) {
716 if (ep->internal_ccpl) {
717 ep->internal_ccpl = 0;
722 list_del_init(&req->queue);
723 if (ep->m66592->gadget.speed == USB_SPEED_UNKNOWN)
724 req->req.status = -ESHUTDOWN;
726 req->req.status = status;
728 if (!list_empty(&ep->queue))
731 spin_unlock(&ep->m66592->lock);
732 req->req.complete(&ep->ep, &req->req);
733 spin_lock(&ep->m66592->lock);
736 req = list_entry(ep->queue.next, struct m66592_request, queue);
738 start_packet(ep, req);
742 static void irq_ep0_write(struct m66592_ep *ep, struct m66592_request *req)
749 u16 pipenum = ep->pipenum;
750 struct m66592 *m66592 = ep->m66592;
752 pipe_change(m66592, pipenum);
753 m66592_bset(m66592, M66592_ISEL, ep->fifosel);
757 tmp = m66592_read(m66592, ep->fifoctr);
759 pr_err("pipe0 is busy. maybe cpu i/o bus "
760 "conflict. please power off this controller.");
764 } while ((tmp & M66592_FRDY) == 0);
766 /* prepare parameters */
767 bufsize = get_buffer_size(m66592, pipenum);
768 buf = req->req.buf + req->req.actual;
769 size = min(bufsize, req->req.length - req->req.actual);
774 m66592_write_fifo(m66592, ep, buf, size);
775 if ((size == 0) || ((size % ep->ep.maxpacket) != 0))
776 m66592_bset(m66592, M66592_BVAL, ep->fifoctr);
779 /* update parameters */
780 req->req.actual += size;
782 /* check transfer finish */
783 if ((!req->req.zero && (req->req.actual == req->req.length))
784 || (size % ep->ep.maxpacket)
786 disable_irq_ready(m66592, pipenum);
787 disable_irq_empty(m66592, pipenum);
789 disable_irq_ready(m66592, pipenum);
790 enable_irq_empty(m66592, pipenum);
792 pipe_start(m66592, pipenum);
795 static void irq_packet_write(struct m66592_ep *ep, struct m66592_request *req)
801 u16 pipenum = ep->pipenum;
802 struct m66592 *m66592 = ep->m66592;
804 pipe_change(m66592, pipenum);
805 tmp = m66592_read(m66592, ep->fifoctr);
806 if (unlikely((tmp & M66592_FRDY) == 0)) {
807 pipe_stop(m66592, pipenum);
808 pipe_irq_disable(m66592, pipenum);
809 pr_err("write fifo not ready. pipnum=%d\n", pipenum);
813 /* prepare parameters */
814 bufsize = get_buffer_size(m66592, pipenum);
815 buf = req->req.buf + req->req.actual;
816 size = min(bufsize, req->req.length - req->req.actual);
820 m66592_write_fifo(m66592, ep, buf, size);
822 || ((size % ep->ep.maxpacket) != 0)
823 || ((bufsize != ep->ep.maxpacket)
824 && (bufsize > size)))
825 m66592_bset(m66592, M66592_BVAL, ep->fifoctr);
828 /* update parameters */
829 req->req.actual += size;
830 /* check transfer finish */
831 if ((!req->req.zero && (req->req.actual == req->req.length))
832 || (size % ep->ep.maxpacket)
834 disable_irq_ready(m66592, pipenum);
835 enable_irq_empty(m66592, pipenum);
837 disable_irq_empty(m66592, pipenum);
838 pipe_irq_enable(m66592, pipenum);
842 static void irq_packet_read(struct m66592_ep *ep, struct m66592_request *req)
845 int rcv_len, bufsize, req_len;
848 u16 pipenum = ep->pipenum;
849 struct m66592 *m66592 = ep->m66592;
852 pipe_change(m66592, pipenum);
853 tmp = m66592_read(m66592, ep->fifoctr);
854 if (unlikely((tmp & M66592_FRDY) == 0)) {
855 req->req.status = -EPIPE;
856 pipe_stop(m66592, pipenum);
857 pipe_irq_disable(m66592, pipenum);
858 pr_err("read fifo not ready");
862 /* prepare parameters */
863 rcv_len = tmp & M66592_DTLN;
864 bufsize = get_buffer_size(m66592, pipenum);
866 buf = req->req.buf + req->req.actual;
867 req_len = req->req.length - req->req.actual;
868 if (rcv_len < bufsize)
869 size = min(rcv_len, req_len);
871 size = min(bufsize, req_len);
873 /* update parameters */
874 req->req.actual += size;
876 /* check transfer finish */
877 if ((!req->req.zero && (req->req.actual == req->req.length))
878 || (size % ep->ep.maxpacket)
880 pipe_stop(m66592, pipenum);
881 pipe_irq_disable(m66592, pipenum);
888 m66592_write(m66592, M66592_BCLR, ep->fifoctr);
890 m66592_read_fifo(m66592, ep->fifoaddr, buf, size);
893 if ((ep->pipenum != 0) && finish)
894 transfer_complete(ep, req, 0);
897 static void irq_pipe_ready(struct m66592 *m66592, u16 status, u16 enb)
901 struct m66592_ep *ep;
902 struct m66592_request *req;
904 if ((status & M66592_BRDY0) && (enb & M66592_BRDY0)) {
905 m66592_write(m66592, ~M66592_BRDY0, M66592_BRDYSTS);
906 m66592_mdfy(m66592, M66592_PIPE0, M66592_CURPIPE,
910 req = list_entry(ep->queue.next, struct m66592_request, queue);
911 irq_packet_read(ep, req);
913 for (pipenum = 1; pipenum < M66592_MAX_NUM_PIPE; pipenum++) {
914 check = 1 << pipenum;
915 if ((status & check) && (enb & check)) {
916 m66592_write(m66592, ~check, M66592_BRDYSTS);
917 ep = m66592->pipenum2ep[pipenum];
918 req = list_entry(ep->queue.next,
919 struct m66592_request, queue);
920 if (ep->ep.desc->bEndpointAddress & USB_DIR_IN)
921 irq_packet_write(ep, req);
923 irq_packet_read(ep, req);
929 static void irq_pipe_empty(struct m66592 *m66592, u16 status, u16 enb)
934 struct m66592_ep *ep;
935 struct m66592_request *req;
937 if ((status & M66592_BEMP0) && (enb & M66592_BEMP0)) {
938 m66592_write(m66592, ~M66592_BEMP0, M66592_BEMPSTS);
941 req = list_entry(ep->queue.next, struct m66592_request, queue);
942 irq_ep0_write(ep, req);
944 for (pipenum = 1; pipenum < M66592_MAX_NUM_PIPE; pipenum++) {
945 check = 1 << pipenum;
946 if ((status & check) && (enb & check)) {
947 m66592_write(m66592, ~check, M66592_BEMPSTS);
948 tmp = control_reg_get(m66592, pipenum);
949 if ((tmp & M66592_INBUFM) == 0) {
950 disable_irq_empty(m66592, pipenum);
951 pipe_irq_disable(m66592, pipenum);
952 pipe_stop(m66592, pipenum);
953 ep = m66592->pipenum2ep[pipenum];
954 req = list_entry(ep->queue.next,
955 struct m66592_request,
957 if (!list_empty(&ep->queue))
958 transfer_complete(ep, req, 0);
965 static void get_status(struct m66592 *m66592, struct usb_ctrlrequest *ctrl)
966 __releases(m66592->lock)
967 __acquires(m66592->lock)
969 struct m66592_ep *ep;
972 u16 w_index = le16_to_cpu(ctrl->wIndex);
974 switch (ctrl->bRequestType & USB_RECIP_MASK) {
975 case USB_RECIP_DEVICE:
976 status = 1 << USB_DEVICE_SELF_POWERED;
978 case USB_RECIP_INTERFACE:
981 case USB_RECIP_ENDPOINT:
982 ep = m66592->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
983 pid = control_reg_get_pid(m66592, ep->pipenum);
984 if (pid == M66592_PID_STALL)
985 status = 1 << USB_ENDPOINT_HALT;
990 pipe_stall(m66592, 0);
994 m66592->ep0_data = cpu_to_le16(status);
995 m66592->ep0_req->buf = &m66592->ep0_data;
996 m66592->ep0_req->length = 2;
997 /* AV: what happens if we get called again before that gets through? */
998 spin_unlock(&m66592->lock);
999 m66592_queue(m66592->gadget.ep0, m66592->ep0_req, GFP_KERNEL);
1000 spin_lock(&m66592->lock);
1003 static void clear_feature(struct m66592 *m66592, struct usb_ctrlrequest *ctrl)
1005 switch (ctrl->bRequestType & USB_RECIP_MASK) {
1006 case USB_RECIP_DEVICE:
1007 control_end(m66592, 1);
1009 case USB_RECIP_INTERFACE:
1010 control_end(m66592, 1);
1012 case USB_RECIP_ENDPOINT: {
1013 struct m66592_ep *ep;
1014 struct m66592_request *req;
1015 u16 w_index = le16_to_cpu(ctrl->wIndex);
1017 ep = m66592->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
1018 pipe_stop(m66592, ep->pipenum);
1019 control_reg_sqclr(m66592, ep->pipenum);
1021 control_end(m66592, 1);
1023 req = list_entry(ep->queue.next,
1024 struct m66592_request, queue);
1027 if (list_empty(&ep->queue))
1029 start_packet(ep, req);
1030 } else if (!list_empty(&ep->queue))
1031 pipe_start(m66592, ep->pipenum);
1035 pipe_stall(m66592, 0);
1040 static void set_feature(struct m66592 *m66592, struct usb_ctrlrequest *ctrl)
1045 switch (ctrl->bRequestType & USB_RECIP_MASK) {
1046 case USB_RECIP_DEVICE:
1047 switch (le16_to_cpu(ctrl->wValue)) {
1048 case USB_DEVICE_TEST_MODE:
1049 control_end(m66592, 1);
1050 /* Wait for the completion of status stage */
1052 tmp = m66592_read(m66592, M66592_INTSTS0) &
1055 } while (tmp != M66592_CS_IDST || timeout-- > 0);
1057 if (tmp == M66592_CS_IDST)
1059 le16_to_cpu(ctrl->wIndex >> 8),
1063 pipe_stall(m66592, 0);
1067 case USB_RECIP_INTERFACE:
1068 control_end(m66592, 1);
1070 case USB_RECIP_ENDPOINT: {
1071 struct m66592_ep *ep;
1072 u16 w_index = le16_to_cpu(ctrl->wIndex);
1074 ep = m66592->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
1075 pipe_stall(m66592, ep->pipenum);
1077 control_end(m66592, 1);
1081 pipe_stall(m66592, 0);
1086 /* if return value is true, call class driver's setup() */
1087 static int setup_packet(struct m66592 *m66592, struct usb_ctrlrequest *ctrl)
1089 u16 *p = (u16 *)ctrl;
1090 unsigned long offset = M66592_USBREQ;
1094 m66592_write(m66592, ~M66592_VALID, M66592_INTSTS0);
1096 for (i = 0; i < 4; i++)
1097 p[i] = m66592_read(m66592, offset + i*2);
1100 if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
1101 switch (ctrl->bRequest) {
1102 case USB_REQ_GET_STATUS:
1103 get_status(m66592, ctrl);
1105 case USB_REQ_CLEAR_FEATURE:
1106 clear_feature(m66592, ctrl);
1108 case USB_REQ_SET_FEATURE:
1109 set_feature(m66592, ctrl);
1120 static void m66592_update_usb_speed(struct m66592 *m66592)
1122 u16 speed = get_usb_speed(m66592);
1126 m66592->gadget.speed = USB_SPEED_HIGH;
1129 m66592->gadget.speed = USB_SPEED_FULL;
1132 m66592->gadget.speed = USB_SPEED_UNKNOWN;
1133 pr_err("USB speed unknown\n");
1137 static void irq_device_state(struct m66592 *m66592)
1141 dvsq = m66592_read(m66592, M66592_INTSTS0) & M66592_DVSQ;
1142 m66592_write(m66592, ~M66592_DVST, M66592_INTSTS0);
1144 if (dvsq == M66592_DS_DFLT) { /* bus reset */
1145 m66592->driver->disconnect(&m66592->gadget);
1146 m66592_update_usb_speed(m66592);
1148 if (m66592->old_dvsq == M66592_DS_CNFG && dvsq != M66592_DS_CNFG)
1149 m66592_update_usb_speed(m66592);
1150 if ((dvsq == M66592_DS_CNFG || dvsq == M66592_DS_ADDS)
1151 && m66592->gadget.speed == USB_SPEED_UNKNOWN)
1152 m66592_update_usb_speed(m66592);
1154 m66592->old_dvsq = dvsq;
1157 static void irq_control_stage(struct m66592 *m66592)
1158 __releases(m66592->lock)
1159 __acquires(m66592->lock)
1161 struct usb_ctrlrequest ctrl;
1164 ctsq = m66592_read(m66592, M66592_INTSTS0) & M66592_CTSQ;
1165 m66592_write(m66592, ~M66592_CTRT, M66592_INTSTS0);
1168 case M66592_CS_IDST: {
1169 struct m66592_ep *ep;
1170 struct m66592_request *req;
1171 ep = &m66592->ep[0];
1172 req = list_entry(ep->queue.next, struct m66592_request, queue);
1173 transfer_complete(ep, req, 0);
1177 case M66592_CS_RDDS:
1178 case M66592_CS_WRDS:
1179 case M66592_CS_WRND:
1180 if (setup_packet(m66592, &ctrl)) {
1181 spin_unlock(&m66592->lock);
1182 if (m66592->driver->setup(&m66592->gadget, &ctrl) < 0)
1183 pipe_stall(m66592, 0);
1184 spin_lock(&m66592->lock);
1187 case M66592_CS_RDSS:
1188 case M66592_CS_WRSS:
1189 control_end(m66592, 0);
1192 pr_err("ctrl_stage: unexpect ctsq(%x)\n", ctsq);
1197 static irqreturn_t m66592_irq(int irq, void *_m66592)
1199 struct m66592 *m66592 = _m66592;
1202 u16 brdysts, nrdysts, bempsts;
1203 u16 brdyenb, nrdyenb, bempenb;
1207 spin_lock(&m66592->lock);
1209 intsts0 = m66592_read(m66592, M66592_INTSTS0);
1210 intenb0 = m66592_read(m66592, M66592_INTENB0);
1212 if (m66592->pdata->on_chip && !intsts0 && !intenb0) {
1214 * When USB clock stops, it cannot read register. Even if a
1215 * clock stops, the interrupt occurs. So this driver turn on
1216 * a clock by this timing and do re-reading of register.
1218 m66592_start_xclock(m66592);
1219 intsts0 = m66592_read(m66592, M66592_INTSTS0);
1220 intenb0 = m66592_read(m66592, M66592_INTENB0);
1223 savepipe = m66592_read(m66592, M66592_CFIFOSEL);
1225 mask0 = intsts0 & intenb0;
1227 brdysts = m66592_read(m66592, M66592_BRDYSTS);
1228 nrdysts = m66592_read(m66592, M66592_NRDYSTS);
1229 bempsts = m66592_read(m66592, M66592_BEMPSTS);
1230 brdyenb = m66592_read(m66592, M66592_BRDYENB);
1231 nrdyenb = m66592_read(m66592, M66592_NRDYENB);
1232 bempenb = m66592_read(m66592, M66592_BEMPENB);
1234 if (mask0 & M66592_VBINT) {
1235 m66592_write(m66592, 0xffff & ~M66592_VBINT,
1237 m66592_start_xclock(m66592);
1239 /* start vbus sampling */
1240 m66592->old_vbus = m66592_read(m66592, M66592_INTSTS0)
1242 m66592->scount = M66592_MAX_SAMPLING;
1244 mod_timer(&m66592->timer,
1245 jiffies + msecs_to_jiffies(50));
1247 if (intsts0 & M66592_DVSQ)
1248 irq_device_state(m66592);
1250 if ((intsts0 & M66592_BRDY) && (intenb0 & M66592_BRDYE)
1251 && (brdysts & brdyenb)) {
1252 irq_pipe_ready(m66592, brdysts, brdyenb);
1254 if ((intsts0 & M66592_BEMP) && (intenb0 & M66592_BEMPE)
1255 && (bempsts & bempenb)) {
1256 irq_pipe_empty(m66592, bempsts, bempenb);
1259 if (intsts0 & M66592_CTRT)
1260 irq_control_stage(m66592);
1263 m66592_write(m66592, savepipe, M66592_CFIFOSEL);
1265 spin_unlock(&m66592->lock);
1269 static void m66592_timer(unsigned long _m66592)
1271 struct m66592 *m66592 = (struct m66592 *)_m66592;
1272 unsigned long flags;
1275 spin_lock_irqsave(&m66592->lock, flags);
1276 tmp = m66592_read(m66592, M66592_SYSCFG);
1277 if (!(tmp & M66592_RCKE)) {
1278 m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG);
1280 m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG);
1282 if (m66592->scount > 0) {
1283 tmp = m66592_read(m66592, M66592_INTSTS0) & M66592_VBSTS;
1284 if (tmp == m66592->old_vbus) {
1286 if (m66592->scount == 0) {
1287 if (tmp == M66592_VBSTS)
1288 m66592_usb_connect(m66592);
1290 m66592_usb_disconnect(m66592);
1292 mod_timer(&m66592->timer,
1293 jiffies + msecs_to_jiffies(50));
1296 m66592->scount = M66592_MAX_SAMPLING;
1297 m66592->old_vbus = tmp;
1298 mod_timer(&m66592->timer,
1299 jiffies + msecs_to_jiffies(50));
1302 spin_unlock_irqrestore(&m66592->lock, flags);
1305 /*-------------------------------------------------------------------------*/
1306 static int m66592_enable(struct usb_ep *_ep,
1307 const struct usb_endpoint_descriptor *desc)
1309 struct m66592_ep *ep;
1311 ep = container_of(_ep, struct m66592_ep, ep);
1312 return alloc_pipe_config(ep, desc);
1315 static int m66592_disable(struct usb_ep *_ep)
1317 struct m66592_ep *ep;
1318 struct m66592_request *req;
1319 unsigned long flags;
1321 ep = container_of(_ep, struct m66592_ep, ep);
1324 while (!list_empty(&ep->queue)) {
1325 req = list_entry(ep->queue.next, struct m66592_request, queue);
1326 spin_lock_irqsave(&ep->m66592->lock, flags);
1327 transfer_complete(ep, req, -ECONNRESET);
1328 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1331 pipe_irq_disable(ep->m66592, ep->pipenum);
1332 return free_pipe_config(ep);
1335 static struct usb_request *m66592_alloc_request(struct usb_ep *_ep,
1338 struct m66592_request *req;
1340 req = kzalloc(sizeof(struct m66592_request), gfp_flags);
1344 INIT_LIST_HEAD(&req->queue);
1349 static void m66592_free_request(struct usb_ep *_ep, struct usb_request *_req)
1351 struct m66592_request *req;
1353 req = container_of(_req, struct m66592_request, req);
1357 static int m66592_queue(struct usb_ep *_ep, struct usb_request *_req,
1360 struct m66592_ep *ep;
1361 struct m66592_request *req;
1362 unsigned long flags;
1365 ep = container_of(_ep, struct m66592_ep, ep);
1366 req = container_of(_req, struct m66592_request, req);
1368 if (ep->m66592->gadget.speed == USB_SPEED_UNKNOWN)
1371 spin_lock_irqsave(&ep->m66592->lock, flags);
1373 if (list_empty(&ep->queue))
1376 list_add_tail(&req->queue, &ep->queue);
1377 req->req.actual = 0;
1378 req->req.status = -EINPROGRESS;
1380 if (ep->ep.desc == NULL) /* control */
1383 if (request && !ep->busy)
1384 start_packet(ep, req);
1387 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1392 static int m66592_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1394 struct m66592_ep *ep;
1395 struct m66592_request *req;
1396 unsigned long flags;
1398 ep = container_of(_ep, struct m66592_ep, ep);
1399 req = container_of(_req, struct m66592_request, req);
1401 spin_lock_irqsave(&ep->m66592->lock, flags);
1402 if (!list_empty(&ep->queue))
1403 transfer_complete(ep, req, -ECONNRESET);
1404 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1409 static int m66592_set_halt(struct usb_ep *_ep, int value)
1411 struct m66592_ep *ep;
1412 struct m66592_request *req;
1413 unsigned long flags;
1416 ep = container_of(_ep, struct m66592_ep, ep);
1417 req = list_entry(ep->queue.next, struct m66592_request, queue);
1419 spin_lock_irqsave(&ep->m66592->lock, flags);
1420 if (!list_empty(&ep->queue)) {
1426 pipe_stall(ep->m66592, ep->pipenum);
1429 pipe_stop(ep->m66592, ep->pipenum);
1433 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1437 static void m66592_fifo_flush(struct usb_ep *_ep)
1439 struct m66592_ep *ep;
1440 unsigned long flags;
1442 ep = container_of(_ep, struct m66592_ep, ep);
1443 spin_lock_irqsave(&ep->m66592->lock, flags);
1444 if (list_empty(&ep->queue) && !ep->busy) {
1445 pipe_stop(ep->m66592, ep->pipenum);
1446 m66592_bclr(ep->m66592, M66592_BCLR, ep->fifoctr);
1448 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1451 static struct usb_ep_ops m66592_ep_ops = {
1452 .enable = m66592_enable,
1453 .disable = m66592_disable,
1455 .alloc_request = m66592_alloc_request,
1456 .free_request = m66592_free_request,
1458 .queue = m66592_queue,
1459 .dequeue = m66592_dequeue,
1461 .set_halt = m66592_set_halt,
1462 .fifo_flush = m66592_fifo_flush,
1465 /*-------------------------------------------------------------------------*/
1466 static int m66592_udc_start(struct usb_gadget *g,
1467 struct usb_gadget_driver *driver)
1469 struct m66592 *m66592 = to_m66592(g);
1471 /* hook up the driver */
1472 driver->driver.bus = NULL;
1473 m66592->driver = driver;
1475 m66592_bset(m66592, M66592_VBSE | M66592_URST, M66592_INTENB0);
1476 if (m66592_read(m66592, M66592_INTSTS0) & M66592_VBSTS) {
1477 m66592_start_xclock(m66592);
1478 /* start vbus sampling */
1479 m66592->old_vbus = m66592_read(m66592,
1480 M66592_INTSTS0) & M66592_VBSTS;
1481 m66592->scount = M66592_MAX_SAMPLING;
1482 mod_timer(&m66592->timer, jiffies + msecs_to_jiffies(50));
1488 static int m66592_udc_stop(struct usb_gadget *g,
1489 struct usb_gadget_driver *driver)
1491 struct m66592 *m66592 = to_m66592(g);
1493 m66592_bclr(m66592, M66592_VBSE | M66592_URST, M66592_INTENB0);
1495 driver->unbind(&m66592->gadget);
1497 init_controller(m66592);
1498 disable_controller(m66592);
1500 m66592->driver = NULL;
1505 /*-------------------------------------------------------------------------*/
1506 static int m66592_get_frame(struct usb_gadget *_gadget)
1508 struct m66592 *m66592 = gadget_to_m66592(_gadget);
1509 return m66592_read(m66592, M66592_FRMNUM) & 0x03FF;
1512 static int m66592_pullup(struct usb_gadget *gadget, int is_on)
1514 struct m66592 *m66592 = gadget_to_m66592(gadget);
1515 unsigned long flags;
1517 spin_lock_irqsave(&m66592->lock, flags);
1519 m66592_bset(m66592, M66592_DPRPU, M66592_SYSCFG);
1521 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
1522 spin_unlock_irqrestore(&m66592->lock, flags);
1527 static const struct usb_gadget_ops m66592_gadget_ops = {
1528 .get_frame = m66592_get_frame,
1529 .udc_start = m66592_udc_start,
1530 .udc_stop = m66592_udc_stop,
1531 .pullup = m66592_pullup,
1534 static int __exit m66592_remove(struct platform_device *pdev)
1536 struct m66592 *m66592 = dev_get_drvdata(&pdev->dev);
1538 usb_del_gadget_udc(&m66592->gadget);
1540 del_timer_sync(&m66592->timer);
1541 iounmap(m66592->reg);
1542 free_irq(platform_get_irq(pdev, 0), m66592);
1543 m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req);
1544 if (m66592->pdata->on_chip) {
1545 clk_disable(m66592->clk);
1546 clk_put(m66592->clk);
1552 static void nop_completion(struct usb_ep *ep, struct usb_request *r)
1556 static int __init m66592_probe(struct platform_device *pdev)
1558 struct resource *res, *ires;
1559 void __iomem *reg = NULL;
1560 struct m66592 *m66592 = NULL;
1565 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1568 pr_err("platform_get_resource error.\n");
1572 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1576 "platform_get_resource IORESOURCE_IRQ error.\n");
1580 reg = ioremap(res->start, resource_size(res));
1583 pr_err("ioremap error.\n");
1587 if (pdev->dev.platform_data == NULL) {
1588 dev_err(&pdev->dev, "no platform data\n");
1593 /* initialize ucd */
1594 m66592 = kzalloc(sizeof(struct m66592), GFP_KERNEL);
1595 if (m66592 == NULL) {
1597 pr_err("kzalloc error\n");
1601 m66592->pdata = pdev->dev.platform_data;
1602 m66592->irq_trigger = ires->flags & IRQF_TRIGGER_MASK;
1604 spin_lock_init(&m66592->lock);
1605 dev_set_drvdata(&pdev->dev, m66592);
1607 m66592->gadget.ops = &m66592_gadget_ops;
1608 m66592->gadget.max_speed = USB_SPEED_HIGH;
1609 m66592->gadget.name = udc_name;
1611 init_timer(&m66592->timer);
1612 m66592->timer.function = m66592_timer;
1613 m66592->timer.data = (unsigned long)m66592;
1616 ret = request_irq(ires->start, m66592_irq, IRQF_SHARED,
1619 pr_err("request_irq error (%d)\n", ret);
1623 if (m66592->pdata->on_chip) {
1624 snprintf(clk_name, sizeof(clk_name), "usbf%d", pdev->id);
1625 m66592->clk = clk_get(&pdev->dev, clk_name);
1626 if (IS_ERR(m66592->clk)) {
1627 dev_err(&pdev->dev, "cannot get clock \"%s\"\n",
1629 ret = PTR_ERR(m66592->clk);
1632 clk_enable(m66592->clk);
1635 INIT_LIST_HEAD(&m66592->gadget.ep_list);
1636 m66592->gadget.ep0 = &m66592->ep[0].ep;
1637 INIT_LIST_HEAD(&m66592->gadget.ep0->ep_list);
1638 for (i = 0; i < M66592_MAX_NUM_PIPE; i++) {
1639 struct m66592_ep *ep = &m66592->ep[i];
1642 INIT_LIST_HEAD(&m66592->ep[i].ep.ep_list);
1643 list_add_tail(&m66592->ep[i].ep.ep_list,
1644 &m66592->gadget.ep_list);
1646 ep->m66592 = m66592;
1647 INIT_LIST_HEAD(&ep->queue);
1648 ep->ep.name = m66592_ep_name[i];
1649 ep->ep.ops = &m66592_ep_ops;
1650 ep->ep.maxpacket = 512;
1652 m66592->ep[0].ep.maxpacket = 64;
1653 m66592->ep[0].pipenum = 0;
1654 m66592->ep[0].fifoaddr = M66592_CFIFO;
1655 m66592->ep[0].fifosel = M66592_CFIFOSEL;
1656 m66592->ep[0].fifoctr = M66592_CFIFOCTR;
1657 m66592->ep[0].fifotrn = 0;
1658 m66592->ep[0].pipectr = get_pipectr_addr(0);
1659 m66592->pipenum2ep[0] = &m66592->ep[0];
1660 m66592->epaddr2ep[0] = &m66592->ep[0];
1662 m66592->ep0_req = m66592_alloc_request(&m66592->ep[0].ep, GFP_KERNEL);
1663 if (m66592->ep0_req == NULL)
1665 m66592->ep0_req->complete = nop_completion;
1667 init_controller(m66592);
1669 ret = usb_add_gadget_udc(&pdev->dev, &m66592->gadget);
1673 dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
1677 m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req);
1680 if (m66592->pdata->on_chip) {
1681 clk_disable(m66592->clk);
1682 clk_put(m66592->clk);
1685 free_irq(ires->start, m66592);
1688 if (m66592->ep0_req)
1689 m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req);
1698 /*-------------------------------------------------------------------------*/
1699 static struct platform_driver m66592_driver = {
1700 .remove = __exit_p(m66592_remove),
1702 .name = (char *) udc_name,
1703 .owner = THIS_MODULE,
1707 module_platform_driver_probe(m66592_driver, m66592_probe);