drivers/usb/gadget/langwell_udc.c

   1 /*
   2  * Intel Langwell USB Device Controller driver
   3  * Copyright (C) 2008-2009, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  */
   9
  10
  11 /* #undef       DEBUG */
  12 /* #undef       VERBOSE_DEBUG */
  13
  14 #if defined(CONFIG_USB_LANGWELL_OTG)
  15 #define OTG_TRANSCEIVER
  16 #endif
  17
  18
  19 #include <linux/module.h>
  20 #include <linux/pci.h>
  21 #include <linux/dma-mapping.h>
  22 #include <linux/kernel.h>
  23 #include <linux/delay.h>
  24 #include <linux/ioport.h>
  25 #include <linux/sched.h>
  26 #include <linux/slab.h>
  27 #include <linux/errno.h>
  28 #include <linux/init.h>
  29 #include <linux/timer.h>
  30 #include <linux/list.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/moduleparam.h>
  33 #include <linux/device.h>
  34 #include <linux/usb/ch9.h>
  35 #include <linux/usb/gadget.h>
  36 #include <linux/usb/otg.h>
  37 #include <linux/pm.h>
  38 #include <linux/io.h>
  39 #include <linux/irq.h>
  40 #include <asm/system.h>
  41 #include <asm/unaligned.h>
  42
  43 #include "langwell_udc.h"
  44
  45
  46 #define DRIVER_DESC             "Intel Langwell USB Device Controller driver"
  47 #define DRIVER_VERSION          "16 May 2009"
  48
  49 static const char driver_name[] = "langwell_udc";
  50 static const char driver_desc[] = DRIVER_DESC;
  51
  52
  53 /* controller device global variable */
  54 static struct langwell_udc      *the_controller;
  55
  56 /* for endpoint 0 operations */
  57 static const struct usb_endpoint_descriptor
  58 langwell_ep0_desc = {
  59         .bLength =              USB_DT_ENDPOINT_SIZE,
  60         .bDescriptorType =      USB_DT_ENDPOINT,
  61         .bEndpointAddress =     0,
  62         .bmAttributes =         USB_ENDPOINT_XFER_CONTROL,
  63         .wMaxPacketSize =       EP0_MAX_PKT_SIZE,
  64 };
  65
  66
  67 /*-------------------------------------------------------------------------*/
  68 /* debugging */
  69
  70 #ifdef  VERBOSE_DEBUG
  71 static inline void print_all_registers(struct langwell_udc *dev)
  72 {
  73         int     i;
  74
  75         /* Capability Registers */
  76         dev_dbg(&dev->pdev->dev,
  77                 "Capability Registers (offset: 0x%04x, length: 0x%08x)\n",
  78                 CAP_REG_OFFSET, (u32)sizeof(struct langwell_cap_regs));
  79         dev_dbg(&dev->pdev->dev, "caplength=0x%02x\n",
  80                         readb(&dev->cap_regs->caplength));
  81         dev_dbg(&dev->pdev->dev, "hciversion=0x%04x\n",
  82                         readw(&dev->cap_regs->hciversion));
  83         dev_dbg(&dev->pdev->dev, "hcsparams=0x%08x\n",
  84                         readl(&dev->cap_regs->hcsparams));
  85         dev_dbg(&dev->pdev->dev, "hccparams=0x%08x\n",
  86                         readl(&dev->cap_regs->hccparams));
  87         dev_dbg(&dev->pdev->dev, "dciversion=0x%04x\n",
  88                         readw(&dev->cap_regs->dciversion));
  89         dev_dbg(&dev->pdev->dev, "dccparams=0x%08x\n",
  90                         readl(&dev->cap_regs->dccparams));
  91
  92         /* Operational Registers */
  93         dev_dbg(&dev->pdev->dev,
  94                 "Operational Registers (offset: 0x%04x, length: 0x%08x)\n",
  95                 OP_REG_OFFSET, (u32)sizeof(struct langwell_op_regs));
  96         dev_dbg(&dev->pdev->dev, "extsts=0x%08x\n",
  97                         readl(&dev->op_regs->extsts));
  98         dev_dbg(&dev->pdev->dev, "extintr=0x%08x\n",
  99                         readl(&dev->op_regs->extintr));
 100         dev_dbg(&dev->pdev->dev, "usbcmd=0x%08x\n",
 101                         readl(&dev->op_regs->usbcmd));
 102         dev_dbg(&dev->pdev->dev, "usbsts=0x%08x\n",
 103                         readl(&dev->op_regs->usbsts));
 104         dev_dbg(&dev->pdev->dev, "usbintr=0x%08x\n",
 105                         readl(&dev->op_regs->usbintr));
 106         dev_dbg(&dev->pdev->dev, "frindex=0x%08x\n",
 107                         readl(&dev->op_regs->frindex));
 108         dev_dbg(&dev->pdev->dev, "ctrldssegment=0x%08x\n",
 109                         readl(&dev->op_regs->ctrldssegment));
 110         dev_dbg(&dev->pdev->dev, "deviceaddr=0x%08x\n",
 111                         readl(&dev->op_regs->deviceaddr));
 112         dev_dbg(&dev->pdev->dev, "endpointlistaddr=0x%08x\n",
 113                         readl(&dev->op_regs->endpointlistaddr));
 114         dev_dbg(&dev->pdev->dev, "ttctrl=0x%08x\n",
 115                         readl(&dev->op_regs->ttctrl));
 116         dev_dbg(&dev->pdev->dev, "burstsize=0x%08x\n",
 117                         readl(&dev->op_regs->burstsize));
 118         dev_dbg(&dev->pdev->dev, "txfilltuning=0x%08x\n",
 119                         readl(&dev->op_regs->txfilltuning));
 120         dev_dbg(&dev->pdev->dev, "txttfilltuning=0x%08x\n",
 121                         readl(&dev->op_regs->txttfilltuning));
 122         dev_dbg(&dev->pdev->dev, "ic_usb=0x%08x\n",
 123                         readl(&dev->op_regs->ic_usb));
 124         dev_dbg(&dev->pdev->dev, "ulpi_viewport=0x%08x\n",
 125                         readl(&dev->op_regs->ulpi_viewport));
 126         dev_dbg(&dev->pdev->dev, "configflag=0x%08x\n",
 127                         readl(&dev->op_regs->configflag));
 128         dev_dbg(&dev->pdev->dev, "portsc1=0x%08x\n",
 129                         readl(&dev->op_regs->portsc1));
 130         dev_dbg(&dev->pdev->dev, "devlc=0x%08x\n",
 131                         readl(&dev->op_regs->devlc));
 132         dev_dbg(&dev->pdev->dev, "otgsc=0x%08x\n",
 133                         readl(&dev->op_regs->otgsc));
 134         dev_dbg(&dev->pdev->dev, "usbmode=0x%08x\n",
 135                         readl(&dev->op_regs->usbmode));
 136         dev_dbg(&dev->pdev->dev, "endptnak=0x%08x\n",
 137                         readl(&dev->op_regs->endptnak));
 138         dev_dbg(&dev->pdev->dev, "endptnaken=0x%08x\n",
 139                         readl(&dev->op_regs->endptnaken));
 140         dev_dbg(&dev->pdev->dev, "endptsetupstat=0x%08x\n",
 141                         readl(&dev->op_regs->endptsetupstat));
 142         dev_dbg(&dev->pdev->dev, "endptprime=0x%08x\n",
 143                         readl(&dev->op_regs->endptprime));
 144         dev_dbg(&dev->pdev->dev, "endptflush=0x%08x\n",
 145                         readl(&dev->op_regs->endptflush));
 146         dev_dbg(&dev->pdev->dev, "endptstat=0x%08x\n",
 147                         readl(&dev->op_regs->endptstat));
 148         dev_dbg(&dev->pdev->dev, "endptcomplete=0x%08x\n",
 149                         readl(&dev->op_regs->endptcomplete));
 150
 151         for (i = 0; i < dev->ep_max / 2; i++) {
 152                 dev_dbg(&dev->pdev->dev, "endptctrl[%d]=0x%08x\n",
 153                                 i, readl(&dev->op_regs->endptctrl[i]));
 154         }
 155 }
 156 #else
 157
 158 #define print_all_registers(dev)        do { } while (0)
 159
 160 #endif /* VERBOSE_DEBUG */
 161
 162
 163 /*-------------------------------------------------------------------------*/
 164
 165 #define is_in(ep)       (((ep)->ep_num == 0) ? ((ep)->dev->ep0_dir ==   \
 166                         USB_DIR_IN) : (usb_endpoint_dir_in((ep)->desc)))
 167
 168 #define DIR_STRING(ep)  (is_in(ep) ? "in" : "out")
 169
 170
 171 static char *type_string(const struct usb_endpoint_descriptor *desc)
 172 {
 173         switch (usb_endpoint_type(desc)) {
 174         case USB_ENDPOINT_XFER_BULK:
 175                 return "bulk";
 176         case USB_ENDPOINT_XFER_ISOC:
 177                 return "iso";
 178         case USB_ENDPOINT_XFER_INT:
 179                 return "int";
 180         };
 181
 182         return "control";
 183 }
 184
 185
 186 /* configure endpoint control registers */
 187 static void ep_reset(struct langwell_ep *ep, unsigned char ep_num,
 188                 unsigned char is_in, unsigned char ep_type)
 189 {
 190         struct langwell_udc     *dev;
 191         u32                     endptctrl;
 192
 193         dev = ep->dev;
 194         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
 195
 196         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 197         if (is_in) {    /* TX */
 198                 if (ep_num)
 199                         endptctrl |= EPCTRL_TXR;
 200                 endptctrl |= EPCTRL_TXE;
 201                 endptctrl |= ep_type << EPCTRL_TXT_SHIFT;
 202         } else {        /* RX */
 203                 if (ep_num)
 204                         endptctrl |= EPCTRL_RXR;
 205                 endptctrl |= EPCTRL_RXE;
 206                 endptctrl |= ep_type << EPCTRL_RXT_SHIFT;
 207         }
 208
 209         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
 210
 211         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
 212 }
 213
 214
 215 /* reset ep0 dQH and endptctrl */
 216 static void ep0_reset(struct langwell_udc *dev)
 217 {
 218         struct langwell_ep      *ep;
 219         int                     i;
 220
 221         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
 222
 223         /* ep0 in and out */
 224         for (i = 0; i < 2; i++) {
 225                 ep = &dev->ep[i];
 226                 ep->dev = dev;
 227
 228                 /* ep0 dQH */
 229                 ep->dqh = &dev->ep_dqh[i];
 230
 231                 /* configure ep0 endpoint capabilities in dQH */
 232                 ep->dqh->dqh_ios = 1;
 233                 ep->dqh->dqh_mpl = EP0_MAX_PKT_SIZE;
 234
 235                 /* enable ep0-in HW zero length termination select */
 236                 if (is_in(ep))
 237                         ep->dqh->dqh_zlt = 0;
 238                 ep->dqh->dqh_mult = 0;
 239
 240                 ep->dqh->dtd_next = DTD_TERM;
 241
 242                 /* configure ep0 control registers */
 243                 ep_reset(&dev->ep[0], 0, i, USB_ENDPOINT_XFER_CONTROL);
 244         }
 245
 246         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
 247 }
 248
 249
 250 /*-------------------------------------------------------------------------*/
 251
 252 /* endpoints operations */
 253
 254 /* configure endpoint, making it usable */
 255 static int langwell_ep_enable(struct usb_ep *_ep,
 256                 const struct usb_endpoint_descriptor *desc)
 257 {
 258         struct langwell_udc     *dev;
 259         struct langwell_ep      *ep;
 260         u16                     max = 0;
 261         unsigned long           flags;
 262         int                     i, retval = 0;
 263         unsigned char           zlt, ios = 0, mult = 0;
 264
 265         ep = container_of(_ep, struct langwell_ep, ep);
 266         dev = ep->dev;
 267         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
 268
 269         if (!_ep || !desc || ep->desc
 270                         || desc->bDescriptorType != USB_DT_ENDPOINT)
 271                 return -EINVAL;
 272
 273         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
 274                 return -ESHUTDOWN;
 275
 276         max = usb_endpoint_maxp(desc);
 277
 278         /*
 279          * disable HW zero length termination select
 280          * driver handles zero length packet through req->req.zero
 281          */
 282         zlt = 1;
 283
 284         /*
 285          * sanity check type, direction, address, and then
 286          * initialize the endpoint capabilities fields in dQH
 287          */
 288         switch (usb_endpoint_type(desc)) {
 289         case USB_ENDPOINT_XFER_CONTROL:
 290                 ios = 1;
 291                 break;
 292         case USB_ENDPOINT_XFER_BULK:
 293                 if ((dev->gadget.speed == USB_SPEED_HIGH
 294                                         && max != 512)
 295                                 || (dev->gadget.speed == USB_SPEED_FULL
 296                                         && max > 64)) {
 297                         goto done;
 298                 }
 299                 break;
 300         case USB_ENDPOINT_XFER_INT:
 301                 if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
 302                         goto done;
 303
 304                 switch (dev->gadget.speed) {
 305                 case USB_SPEED_HIGH:
 306                         if (max <= 1024)
 307                                 break;
 308                 case USB_SPEED_FULL:
 309                         if (max <= 64)
 310                                 break;
 311                 default:
 312                         if (max <= 8)
 313                                 break;
 314                         goto done;
 315                 }
 316                 break;
 317         case USB_ENDPOINT_XFER_ISOC:
 318                 if (strstr(ep->ep.name, "-bulk")
 319                                 || strstr(ep->ep.name, "-int"))
 320                         goto done;
 321
 322                 switch (dev->gadget.speed) {
 323                 case USB_SPEED_HIGH:
 324                         if (max <= 1024)
 325                                 break;
 326                 case USB_SPEED_FULL:
 327                         if (max <= 1023)
 328                                 break;
 329                 default:
 330                         goto done;
 331                 }
 332                 /*
 333                  * FIXME:
 334                  * calculate transactions needed for high bandwidth iso
 335                  */
 336                 mult = (unsigned char)(1 + ((max >> 11) & 0x03));
 337                 max = max & 0x8ff;      /* bit 0~10 */
 338                 /* 3 transactions at most */
 339                 if (mult > 3)
 340                         goto done;
 341                 break;
 342         default:
 343                 goto done;
 344         }
 345
 346         spin_lock_irqsave(&dev->lock, flags);
 347
 348         ep->ep.maxpacket = max;
 349         ep->desc = desc;
 350         ep->stopped = 0;
 351         ep->ep_num = usb_endpoint_num(desc);
 352
 353         /* ep_type */
 354         ep->ep_type = usb_endpoint_type(desc);
 355
 356         /* configure endpoint control registers */
 357         ep_reset(ep, ep->ep_num, is_in(ep), ep->ep_type);
 358
 359         /* configure endpoint capabilities in dQH */
 360         i = ep->ep_num * 2 + is_in(ep);
 361         ep->dqh = &dev->ep_dqh[i];
 362         ep->dqh->dqh_ios = ios;
 363         ep->dqh->dqh_mpl = cpu_to_le16(max);
 364         ep->dqh->dqh_zlt = zlt;
 365         ep->dqh->dqh_mult = mult;
 366         ep->dqh->dtd_next = DTD_TERM;
 367
 368         dev_dbg(&dev->pdev->dev, "enabled %s (ep%d%s-%s), max %04x\n",
 369                         _ep->name,
 370                         ep->ep_num,
 371                         DIR_STRING(ep),
 372                         type_string(desc),
 373                         max);
 374
 375         spin_unlock_irqrestore(&dev->lock, flags);
 376 done:
 377         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
 378         return retval;
 379 }
 380
 381
 382 /*-------------------------------------------------------------------------*/
 383
 384 /* retire a request */
 385 static void done(struct langwell_ep *ep, struct langwell_request *req,
 386                 int status)
 387 {
 388         struct langwell_udc     *dev = ep->dev;
 389         unsigned                stopped = ep->stopped;
 390         struct langwell_dtd     *curr_dtd, *next_dtd;
 391         int                     i;
 392
 393         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
 394
 395         /* remove the req from ep->queue */
 396         list_del_init(&req->queue);
 397
 398         if (req->req.status == -EINPROGRESS)
 399                 req->req.status = status;
 400         else
 401                 status = req->req.status;
 402
 403         /* free dTD for the request */
 404         next_dtd = req->head;
 405         for (i = 0; i < req->dtd_count; i++) {
 406                 curr_dtd = next_dtd;
 407                 if (i != req->dtd_count - 1)
 408                         next_dtd = curr_dtd->next_dtd_virt;
 409                 dma_pool_free(dev->dtd_pool, curr_dtd, curr_dtd->dtd_dma);
 410         }
 411
 412         if (req->mapped) {
 413                 dma_unmap_single(&dev->pdev->dev,
 414                         req->req.dma, req->req.length,
 415                         is_in(ep) ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
 416                 req->req.dma = DMA_ADDR_INVALID;
 417                 req->mapped = 0;
 418         } else
 419                 dma_sync_single_for_cpu(&dev->pdev->dev, req->req.dma,
 420                                 req->req.length,
 421                                 is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 422
 423         if (status != -ESHUTDOWN)
 424                 dev_dbg(&dev->pdev->dev,
 425                                 "complete %s, req %p, stat %d, len %u/%u\n",
 426                                 ep->ep.name, &req->req, status,
 427                                 req->req.actual, req->req.length);
 428
 429         /* don't modify queue heads during completion callback */
 430         ep->stopped = 1;
 431
 432         spin_unlock(&dev->lock);
 433         /* complete routine from gadget driver */
 434         if (req->req.complete)
 435                 req->req.complete(&ep->ep, &req->req);
 436
 437         spin_lock(&dev->lock);
 438         ep->stopped = stopped;
 439
 440         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
 441 }
 442
 443
 444 static void langwell_ep_fifo_flush(struct usb_ep *_ep);
 445
 446 /* delete all endpoint requests, called with spinlock held */
 447 static void nuke(struct langwell_ep *ep, int status)
 448 {
 449         /* called with spinlock held */
 450         ep->stopped = 1;
 451
 452         /* endpoint fifo flush */
 453         if (&ep->ep && ep->desc)
 454                 langwell_ep_fifo_flush(&ep->ep);
 455
 456         while (!list_empty(&ep->queue)) {
 457                 struct langwell_request *req = NULL;
 458                 req = list_entry(ep->queue.next, struct langwell_request,
 459                                 queue);
 460                 done(ep, req, status);
 461         }
 462 }
 463
 464
 465 /*-------------------------------------------------------------------------*/
 466
 467 /* endpoint is no longer usable */
 468 static int langwell_ep_disable(struct usb_ep *_ep)
 469 {
 470         struct langwell_ep      *ep;
 471         unsigned long           flags;
 472         struct langwell_udc     *dev;
 473         int                     ep_num;
 474         u32                     endptctrl;
 475
 476         ep = container_of(_ep, struct langwell_ep, ep);
 477         dev = ep->dev;
 478         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
 479
 480         if (!_ep || !ep->desc)
 481                 return -EINVAL;
 482
 483         spin_lock_irqsave(&dev->lock, flags);
 484
 485         /* disable endpoint control register */
 486         ep_num = ep->ep_num;
 487         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 488         if (is_in(ep))
 489                 endptctrl &= ~EPCTRL_TXE;
 490         else
 491                 endptctrl &= ~EPCTRL_RXE;
 492         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
 493
 494         /* nuke all pending requests (does flush) */
 495         nuke(ep, -ESHUTDOWN);
 496
 497         ep->desc = NULL;
 498         ep->stopped = 1;
 499
 500         spin_unlock_irqrestore(&dev->lock, flags);
 501
 502         dev_dbg(&dev->pdev->dev, "disabled %s\n", _ep->name);
 503         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
 504
 505         return 0;
 506 }
 507
 508
 509 /* allocate a request object to use with this endpoint */
 510 static struct usb_request *langwell_alloc_request(struct usb_ep *_ep,
 511                 gfp_t gfp_flags)
 512 {
 513         struct langwell_ep      *ep;
 514         struct langwell_udc     *dev;
 515         struct langwell_request *req = NULL;
 516
 517         if (!_ep)
 518                 return NULL;
 519
 520         ep = container_of(_ep, struct langwell_ep, ep);
 521         dev = ep->dev;
 522         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
 523
 524         req = kzalloc(sizeof(*req), gfp_flags);
 525         if (!req)
 526                 return NULL;
 527
 528         req->req.dma = DMA_ADDR_INVALID;
 529         INIT_LIST_HEAD(&req->queue);
 530
 531         dev_vdbg(&dev->pdev->dev, "alloc request for %s\n", _ep->name);
 532         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
 533         return &req->req;
 534 }
 535
 536
 537 /* free a request object */
 538 static void langwell_free_request(struct usb_ep *_ep,
 539                 struct usb_request *_req)
 540 {
 541         struct langwell_ep      *ep;
 542         struct langwell_udc     *dev;
 543         struct langwell_request *req = NULL;
 544
 545         ep = container_of(_ep, struct langwell_ep, ep);
 546         dev = ep->dev;
 547         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
 548
 549         if (!_ep || !_req)
 550                 return;
 551
 552         req = container_of(_req, struct langwell_request, req);
 553         WARN_ON(!list_empty(&req->queue));
 554
 555         if (_req)
 556                 kfree(req);
 557
 558         dev_vdbg(&dev->pdev->dev, "free request for %s\n", _ep->name);
 559         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
 560 }
 561
 562
 563 /*-------------------------------------------------------------------------*/
 564
 565 /* queue dTD and PRIME endpoint */
 566 static int queue_dtd(struct langwell_ep *ep, struct langwell_request *req)
 567 {
 568         u32                     bit_mask, usbcmd, endptstat, dtd_dma;
 569         u8                      dtd_status;
 570         int                     i;
 571         struct langwell_dqh     *dqh;
 572         struct langwell_udc     *dev;
 573
 574         dev = ep->dev;
 575         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
 576
 577         i = ep->ep_num * 2 + is_in(ep);
 578         dqh = &dev->ep_dqh[i];
 579
 580         if (ep->ep_num)
 581                 dev_vdbg(&dev->pdev->dev, "%s\n", ep->name);
 582         else
 583                 /* ep0 */
 584                 dev_vdbg(&dev->pdev->dev, "%s-%s\n", ep->name, DIR_STRING(ep));
 585
 586         dev_vdbg(&dev->pdev->dev, "ep_dqh[%d] addr: 0x%p\n",
 587                         i, &(dev->ep_dqh[i]));
 588
 589         bit_mask = is_in(ep) ?
 590                 (1 << (ep->ep_num + 16)) : (1 << (ep->ep_num));
 591
 592         dev_vdbg(&dev->pdev->dev, "bit_mask = 0x%08x\n", bit_mask);
 593
 594         /* check if the pipe is empty */
 595         if (!(list_empty(&ep->queue))) {
 596                 /* add dTD to the end of linked list */
 597                 struct langwell_request *lastreq;
 598                 lastreq = list_entry(ep->queue.prev,
 599                                 struct langwell_request, queue);
 600
 601                 lastreq->tail->dtd_next =
 602                         cpu_to_le32(req->head->dtd_dma & DTD_NEXT_MASK);
 603
 604                 /* read prime bit, if 1 goto out */
 605                 if (readl(&dev->op_regs->endptprime) & bit_mask)
 606                         goto out;
 607
 608                 do {
 609                         /* set ATDTW bit in USBCMD */
 610                         usbcmd = readl(&dev->op_regs->usbcmd);
 611                         writel(usbcmd | CMD_ATDTW, &dev->op_regs->usbcmd);
 612
 613                         /* read correct status bit */
 614                         endptstat = readl(&dev->op_regs->endptstat) & bit_mask;
 615
 616                 } while (!(readl(&dev->op_regs->usbcmd) & CMD_ATDTW));
 617
 618                 /* write ATDTW bit to 0 */
 619                 usbcmd = readl(&dev->op_regs->usbcmd);
 620                 writel(usbcmd & ~CMD_ATDTW, &dev->op_regs->usbcmd);
 621
 622                 if (endptstat)
 623                         goto out;
 624         }
 625
 626         /* write dQH next pointer and terminate bit to 0 */
 627         dtd_dma = req->head->dtd_dma & DTD_NEXT_MASK;
 628         dqh->dtd_next = cpu_to_le32(dtd_dma);
 629
 630         /* clear active and halt bit */
 631         dtd_status = (u8) ~(DTD_STS_ACTIVE | DTD_STS_HALTED);
 632         dqh->dtd_status &= dtd_status;
 633         dev_vdbg(&dev->pdev->dev, "dqh->dtd_status = 0x%x\n", dqh->dtd_status);
 634
 635         /* ensure that updates to the dQH will occur before priming */
 636         wmb();
 637
 638         /* write 1 to endptprime register to PRIME endpoint */
 639         bit_mask = is_in(ep) ? (1 << (ep->ep_num + 16)) : (1 << ep->ep_num);
 640         dev_vdbg(&dev->pdev->dev, "endprime bit_mask = 0x%08x\n", bit_mask);
 641         writel(bit_mask, &dev->op_regs->endptprime);
 642 out:
 643         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
 644         return 0;
 645 }
 646
 647
 648 /* fill in the dTD structure to build a transfer descriptor */
 649 static struct langwell_dtd *build_dtd(struct langwell_request *req,
 650                 unsigned *length, dma_addr_t *dma, int *is_last)
 651 {
 652         u32                      buf_ptr;
 653         struct langwell_dtd     *dtd;
 654         struct langwell_udc     *dev;
 655         int                     i;
 656
 657         dev = req->ep->dev;
 658         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
 659
 660         /* the maximum transfer length, up to 16k bytes */
 661         *length = min(req->req.length - req->req.actual,
 662                         (unsigned)DTD_MAX_TRANSFER_LENGTH);
 663
 664         /* create dTD dma_pool resource */
 665         dtd = dma_pool_alloc(dev->dtd_pool, GFP_KERNEL, dma);
 666         if (dtd == NULL)
 667                 return dtd;
 668         dtd->dtd_dma = *dma;
 669
 670         /* initialize buffer page pointers */
 671         buf_ptr = (u32)(req->req.dma + req->req.actual);
 672         for (i = 0; i < 5; i++)
 673                 dtd->dtd_buf[i] = cpu_to_le32(buf_ptr + i * PAGE_SIZE);
 674
 675         req->req.actual += *length;
 676
 677         /* fill in total bytes with transfer size */
 678         dtd->dtd_total = cpu_to_le16(*length);
 679         dev_vdbg(&dev->pdev->dev, "dtd->dtd_total = %d\n", dtd->dtd_total);
 680
 681         /* set is_last flag if req->req.zero is set or not */
 682         if (req->req.zero) {
 683                 if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0)
 684                         *is_last = 1;
 685                 else
 686                         *is_last = 0;
 687         } else if (req->req.length == req->req.actual) {
 688                 *is_last = 1;
 689         } else
 690                 *is_last = 0;
 691
 692         if (*is_last == 0)
 693                 dev_vdbg(&dev->pdev->dev, "multi-dtd request!\n");
 694
 695         /* set interrupt on complete bit for the last dTD */
 696         if (*is_last && !req->req.no_interrupt)
 697                 dtd->dtd_ioc = 1;
 698
 699         /* set multiplier override 0 for non-ISO and non-TX endpoint */
 700         dtd->dtd_multo = 0;
 701
 702         /* set the active bit of status field to 1 */
 703         dtd->dtd_status = DTD_STS_ACTIVE;
 704         dev_vdbg(&dev->pdev->dev, "dtd->dtd_status = 0x%02x\n",
 705                         dtd->dtd_status);
 706
 707         dev_vdbg(&dev->pdev->dev, "length = %d, dma addr= 0x%08x\n",
 708                         *length, (int)*dma);
 709         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
 710         return dtd;
 711 }
 712
 713
 714 /* generate dTD linked list for a request */
 715 static int req_to_dtd(struct langwell_request *req)
 716 {
 717         unsigned                count;
 718         int                     is_last, is_first = 1;
 719         struct langwell_dtd     *dtd, *last_dtd = NULL;
 720         struct langwell_udc     *dev;
 721         dma_addr_t              dma;
 722
 723         dev = req->ep->dev;
 724         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
 725         do {
 726                 dtd = build_dtd(req, &count, &dma, &is_last);
 727                 if (dtd == NULL)
 728                         return -ENOMEM;
 729
 730                 if (is_first) {
 731                         is_first = 0;
 732                         req->head = dtd;
 733                 } else {
 734                         last_dtd->dtd_next = cpu_to_le32(dma);
 735                         last_dtd->next_dtd_virt = dtd;
 736                 }
 737                 last_dtd = dtd;
 738                 req->dtd_count++;
 739         } while (!is_last);
 740
 741         /* set terminate bit to 1 for the last dTD */
 742         dtd->dtd_next = DTD_TERM;
 743
 744         req->tail = dtd;
 745
 746         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
 747         return 0;
 748 }
 749
 750 /*-------------------------------------------------------------------------*/
 751
 752 /* queue (submits) an I/O requests to an endpoint */
 753 static int langwell_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
 754                 gfp_t gfp_flags)
 755 {
 756         struct langwell_request *req;
 757         struct langwell_ep      *ep;
 758         struct langwell_udc     *dev;
 759         unsigned long           flags;
 760         int                     is_iso = 0, zlflag = 0;
 761
 762         /* always require a cpu-view buffer */
 763         req = container_of(_req, struct langwell_request, req);
 764         ep = container_of(_ep, struct langwell_ep, ep);
 765
 766         if (!_req || !_req->complete || !_req->buf
 767                         || !list_empty(&req->queue)) {
 768                 return -EINVAL;
 769         }
 770
 771         if (unlikely(!_ep || !ep->desc))
 772                 return -EINVAL;
 773
 774         dev = ep->dev;
 775         req->ep = ep;
 776         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
 777
 778         if (usb_endpoint_xfer_isoc(ep->desc)) {
 779                 if (req->req.length > ep->ep.maxpacket)
 780                         return -EMSGSIZE;
 781                 is_iso = 1;
 782         }
 783
 784         if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN))
 785                 return -ESHUTDOWN;
 786
 787         /* set up dma mapping in case the caller didn't */
 788         if (_req->dma == DMA_ADDR_INVALID) {
 789                 /* WORKAROUND: WARN_ON(size == 0) */
 790                 if (_req->length == 0) {
 791                         dev_vdbg(&dev->pdev->dev, "req->length: 0->1\n");
 792                         zlflag = 1;
 793                         _req->length++;
 794                 }
 795
 796                 _req->dma = dma_map_single(&dev->pdev->dev,
 797                                 _req->buf, _req->length,
 798                                 is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 799                 if (zlflag && (_req->length == 1)) {
 800                         dev_vdbg(&dev->pdev->dev, "req->length: 1->0\n");
 801                         zlflag = 0;
 802                         _req->length = 0;
 803                 }
 804
 805                 req->mapped = 1;
 806                 dev_vdbg(&dev->pdev->dev, "req->mapped = 1\n");
 807         } else {
 808                 dma_sync_single_for_device(&dev->pdev->dev,
 809                                 _req->dma, _req->length,
 810                                 is_in(ep) ?  DMA_TO_DEVICE : DMA_FROM_DEVICE);
 811                 req->mapped = 0;
 812                 dev_vdbg(&dev->pdev->dev, "req->mapped = 0\n");
 813         }
 814
 815         dev_dbg(&dev->pdev->dev,
 816                         "%s queue req %p, len %u, buf %p, dma 0x%08x\n",
 817                         _ep->name,
 818                         _req, _req->length, _req->buf, (int)_req->dma);
 819
 820         _req->status = -EINPROGRESS;
 821         _req->actual = 0;
 822         req->dtd_count = 0;
 823
 824         spin_lock_irqsave(&dev->lock, flags);
 825
 826         /* build and put dTDs to endpoint queue */
 827         if (!req_to_dtd(req)) {
 828                 queue_dtd(ep, req);
 829         } else {
 830                 spin_unlock_irqrestore(&dev->lock, flags);
 831                 return -ENOMEM;
 832         }
 833
 834         /* update ep0 state */
 835         if (ep->ep_num == 0)
 836                 dev->ep0_state = DATA_STATE_XMIT;
 837
 838         if (likely(req != NULL)) {
 839                 list_add_tail(&req->queue, &ep->queue);
 840                 dev_vdbg(&dev->pdev->dev, "list_add_tail()\n");
 841         }
 842
 843         spin_unlock_irqrestore(&dev->lock, flags);
 844
 845         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
 846         return 0;
 847 }
 848
 849
 850 /* dequeue (cancels, unlinks) an I/O request from an endpoint */
 851 static int langwell_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 852 {
 853         struct langwell_ep      *ep;
 854         struct langwell_udc     *dev;
 855         struct langwell_request *req;
 856         unsigned long           flags;
 857         int                     stopped, ep_num, retval = 0;
 858         u32                     endptctrl;
 859
 860         ep = container_of(_ep, struct langwell_ep, ep);
 861         dev = ep->dev;
 862         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
 863
 864         if (!_ep || !ep->desc || !_req)
 865                 return -EINVAL;
 866
 867         if (!dev->driver)
 868                 return -ESHUTDOWN;
 869
 870         spin_lock_irqsave(&dev->lock, flags);
 871         stopped = ep->stopped;
 872
 873         /* quiesce dma while we patch the queue */
 874         ep->stopped = 1;
 875         ep_num = ep->ep_num;
 876
 877         /* disable endpoint control register */
 878         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 879         if (is_in(ep))
 880                 endptctrl &= ~EPCTRL_TXE;
 881         else
 882                 endptctrl &= ~EPCTRL_RXE;
 883         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
 884
 885         /* make sure it's still queued on this endpoint */
 886         list_for_each_entry(req, &ep->queue, queue) {
 887                 if (&req->req == _req)
 888                         break;
 889         }
 890
 891         if (&req->req != _req) {
 892                 retval = -EINVAL;
 893                 goto done;
 894         }
 895
 896         /* queue head may be partially complete. */
 897         if (ep->queue.next == &req->queue) {
 898                 dev_dbg(&dev->pdev->dev, "unlink (%s) dma\n", _ep->name);
 899                 _req->status = -ECONNRESET;
 900                 langwell_ep_fifo_flush(&ep->ep);
 901
 902                 /* not the last request in endpoint queue */
 903                 if (likely(ep->queue.next == &req->queue)) {
 904                         struct langwell_dqh     *dqh;
 905                         struct langwell_request *next_req;
 906
 907                         dqh = ep->dqh;
 908                         next_req = list_entry(req->queue.next,
 909                                         struct langwell_request, queue);
 910
 911                         /* point the dQH to the first dTD of next request */
 912                         writel((u32) next_req->head, &dqh->dqh_current);
 913                 }
 914         } else {
 915                 struct langwell_request *prev_req;
 916
 917                 prev_req = list_entry(req->queue.prev,
 918                                 struct langwell_request, queue);
 919                 writel(readl(&req->tail->dtd_next),
 920                                 &prev_req->tail->dtd_next);
 921         }
 922
 923         done(ep, req, -ECONNRESET);
 924
 925 done:
 926         /* enable endpoint again */
 927         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 928         if (is_in(ep))
 929                 endptctrl |= EPCTRL_TXE;
 930         else
 931                 endptctrl |= EPCTRL_RXE;
 932         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
 933
 934         ep->stopped = stopped;
 935         spin_unlock_irqrestore(&dev->lock, flags);
 936
 937         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
 938         return retval;
 939 }
 940
 941
 942 /*-------------------------------------------------------------------------*/
 943
 944 /* endpoint set/clear halt */
 945 static void ep_set_halt(struct langwell_ep *ep, int value)
 946 {
 947         u32                     endptctrl = 0;
 948         int                     ep_num;
 949         struct langwell_udc     *dev = ep->dev;
 950         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
 951
 952         ep_num = ep->ep_num;
 953         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 954
 955         /* value: 1 - set halt, 0 - clear halt */
 956         if (value) {
 957                 /* set the stall bit */
 958                 if (is_in(ep))
 959                         endptctrl |= EPCTRL_TXS;
 960                 else
 961                         endptctrl |= EPCTRL_RXS;
 962         } else {
 963                 /* clear the stall bit and reset data toggle */
 964                 if (is_in(ep)) {
 965                         endptctrl &= ~EPCTRL_TXS;
 966                         endptctrl |= EPCTRL_TXR;
 967                 } else {
 968                         endptctrl &= ~EPCTRL_RXS;
 969                         endptctrl |= EPCTRL_RXR;
 970                 }
 971         }
 972
 973         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
 974
 975         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
 976 }
 977
 978
 979 /* set the endpoint halt feature */
 980 static int langwell_ep_set_halt(struct usb_ep *_ep, int value)
 981 {
 982         struct langwell_ep      *ep;
 983         struct langwell_udc     *dev;
 984         unsigned long           flags;
 985         int                     retval = 0;
 986
 987         ep = container_of(_ep, struct langwell_ep, ep);
 988         dev = ep->dev;
 989
 990         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
 991
 992         if (!_ep || !ep->desc)
 993                 return -EINVAL;
 994
 995         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
 996                 return -ESHUTDOWN;
 997
 998         if (usb_endpoint_xfer_isoc(ep->desc))
 999                 return  -EOPNOTSUPP;
1000
1001         spin_lock_irqsave(&dev->lock, flags);
1002
1003         /*
1004          * attempt to halt IN ep will fail if any transfer requests
1005          * are still queue
1006          */
1007         if (!list_empty(&ep->queue) && is_in(ep) && value) {
1008                 /* IN endpoint FIFO holds bytes */
1009                 dev_dbg(&dev->pdev->dev, "%s FIFO holds bytes\n", _ep->name);
1010                 retval = -EAGAIN;
1011                 goto done;
1012         }
1013
1014         /* endpoint set/clear halt */
1015         if (ep->ep_num) {
1016                 ep_set_halt(ep, value);
1017         } else { /* endpoint 0 */
1018                 dev->ep0_state = WAIT_FOR_SETUP;
1019                 dev->ep0_dir = USB_DIR_OUT;
1020         }
1021 done:
1022         spin_unlock_irqrestore(&dev->lock, flags);
1023         dev_dbg(&dev->pdev->dev, "%s %s halt\n",
1024                         _ep->name, value ? "set" : "clear");
1025         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1026         return retval;
1027 }
1028
1029
1030 /* set the halt feature and ignores clear requests */
1031 static int langwell_ep_set_wedge(struct usb_ep *_ep)
1032 {
1033         struct langwell_ep      *ep;
1034         struct langwell_udc     *dev;
1035
1036         ep = container_of(_ep, struct langwell_ep, ep);
1037         dev = ep->dev;
1038
1039         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1040
1041         if (!_ep || !ep->desc)
1042                 return -EINVAL;
1043
1044         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1045         return usb_ep_set_halt(_ep);
1046 }
1047
1048
1049 /* flush contents of a fifo */
1050 static void langwell_ep_fifo_flush(struct usb_ep *_ep)
1051 {
1052         struct langwell_ep      *ep;
1053         struct langwell_udc     *dev;
1054         u32                     flush_bit;
1055         unsigned long           timeout;
1056
1057         ep = container_of(_ep, struct langwell_ep, ep);
1058         dev = ep->dev;
1059
1060         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1061
1062         if (!_ep || !ep->desc) {
1063                 dev_vdbg(&dev->pdev->dev, "ep or ep->desc is NULL\n");
1064                 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1065                 return;
1066         }
1067
1068         dev_vdbg(&dev->pdev->dev, "%s-%s fifo flush\n",
1069                         _ep->name, DIR_STRING(ep));
1070
1071         /* flush endpoint buffer */
1072         if (ep->ep_num == 0)
1073                 flush_bit = (1 << 16) | 1;
1074         else if (is_in(ep))
1075                 flush_bit = 1 << (ep->ep_num + 16);     /* TX */
1076         else
1077                 flush_bit = 1 << ep->ep_num;            /* RX */
1078
1079         /* wait until flush complete */
1080         timeout = jiffies + FLUSH_TIMEOUT;
1081         do {
1082                 writel(flush_bit, &dev->op_regs->endptflush);
1083                 while (readl(&dev->op_regs->endptflush)) {
1084                         if (time_after(jiffies, timeout)) {
1085                                 dev_err(&dev->pdev->dev, "ep flush timeout\n");
1086                                 goto done;
1087                         }
1088                         cpu_relax();
1089                 }
1090         } while (readl(&dev->op_regs->endptstat) & flush_bit);
1091 done:
1092         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1093 }
1094
1095
1096 /* endpoints operations structure */
1097 static const struct usb_ep_ops langwell_ep_ops = {
1098
1099         /* configure endpoint, making it usable */
1100         .enable         = langwell_ep_enable,
1101
1102         /* endpoint is no longer usable */
1103         .disable        = langwell_ep_disable,
1104
1105         /* allocate a request object to use with this endpoint */
1106         .alloc_request  = langwell_alloc_request,
1107
1108         /* free a request object */
1109         .free_request   = langwell_free_request,
1110
1111         /* queue (submits) an I/O requests to an endpoint */
1112         .queue          = langwell_ep_queue,
1113
1114         /* dequeue (cancels, unlinks) an I/O request from an endpoint */
1115         .dequeue        = langwell_ep_dequeue,
1116
1117         /* set the endpoint halt feature */
1118         .set_halt       = langwell_ep_set_halt,
1119
1120         /* set the halt feature and ignores clear requests */
1121         .set_wedge      = langwell_ep_set_wedge,
1122
1123         /* flush contents of a fifo */
1124         .fifo_flush     = langwell_ep_fifo_flush,
1125 };
1126
1127
1128 /*-------------------------------------------------------------------------*/
1129
1130 /* device controller usb_gadget_ops structure */
1131
1132 /* returns the current frame number */
1133 static int langwell_get_frame(struct usb_gadget *_gadget)
1134 {
1135         struct langwell_udc     *dev;
1136         u16                     retval;
1137
1138         if (!_gadget)
1139                 return -ENODEV;
1140
1141         dev = container_of(_gadget, struct langwell_udc, gadget);
1142         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1143
1144         retval = readl(&dev->op_regs->frindex) & FRINDEX_MASK;
1145
1146         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1147         return retval;
1148 }
1149
1150
1151 /* enter or exit PHY low power state */
1152 static void langwell_phy_low_power(struct langwell_udc *dev, bool flag)
1153 {
1154         u32             devlc;
1155         u8              devlc_byte2;
1156         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1157
1158         devlc = readl(&dev->op_regs->devlc);
1159         dev_vdbg(&dev->pdev->dev, "devlc = 0x%08x\n", devlc);
1160
1161         if (flag)
1162                 devlc |= LPM_PHCD;
1163         else
1164                 devlc &= ~LPM_PHCD;
1165
1166         /* FIXME: workaround for Langwell A1/A2/A3 sighting */
1167         devlc_byte2 = (devlc >> 16) & 0xff;
1168         writeb(devlc_byte2, (u8 *)&dev->op_regs->devlc + 2);
1169
1170         devlc = readl(&dev->op_regs->devlc);
1171         dev_vdbg(&dev->pdev->dev,
1172                         "%s PHY low power suspend, devlc = 0x%08x\n",
1173                         flag ? "enter" : "exit", devlc);
1174 }
1175
1176
1177 /* tries to wake up the host connected to this gadget */
1178 static int langwell_wakeup(struct usb_gadget *_gadget)
1179 {
1180         struct langwell_udc     *dev;
1181         u32                     portsc1;
1182         unsigned long           flags;
1183
1184         if (!_gadget)
1185                 return 0;
1186
1187         dev = container_of(_gadget, struct langwell_udc, gadget);
1188         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1189
1190         /* remote wakeup feature not enabled by host */
1191         if (!dev->remote_wakeup) {
1192                 dev_info(&dev->pdev->dev, "remote wakeup is disabled\n");
1193                 return -ENOTSUPP;
1194         }
1195
1196         spin_lock_irqsave(&dev->lock, flags);
1197
1198         portsc1 = readl(&dev->op_regs->portsc1);
1199         if (!(portsc1 & PORTS_SUSP)) {
1200                 spin_unlock_irqrestore(&dev->lock, flags);
1201                 return 0;
1202         }
1203
1204         /* LPM L1 to L0 or legacy remote wakeup */
1205         if (dev->lpm && dev->lpm_state == LPM_L1)
1206                 dev_info(&dev->pdev->dev, "LPM L1 to L0 remote wakeup\n");
1207         else
1208                 dev_info(&dev->pdev->dev, "device remote wakeup\n");
1209
1210         /* exit PHY low power suspend */
1211         if (dev->pdev->device != 0x0829)
1212                 langwell_phy_low_power(dev, 0);
1213
1214         /* force port resume */
1215         portsc1 |= PORTS_FPR;
1216         writel(portsc1, &dev->op_regs->portsc1);
1217
1218         spin_unlock_irqrestore(&dev->lock, flags);
1219
1220         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1221         return 0;
1222 }
1223
1224
1225 /* notify controller that VBUS is powered or not */
1226 static int langwell_vbus_session(struct usb_gadget *_gadget, int is_active)
1227 {
1228         struct langwell_udc     *dev;
1229         unsigned long           flags;
1230         u32                     usbcmd;
1231
1232         if (!_gadget)
1233                 return -ENODEV;
1234
1235         dev = container_of(_gadget, struct langwell_udc, gadget);
1236         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1237
1238         spin_lock_irqsave(&dev->lock, flags);
1239         dev_vdbg(&dev->pdev->dev, "VBUS status: %s\n",
1240                         is_active ? "on" : "off");
1241
1242         dev->vbus_active = (is_active != 0);
1243         if (dev->driver && dev->softconnected && dev->vbus_active) {
1244                 usbcmd = readl(&dev->op_regs->usbcmd);
1245                 usbcmd |= CMD_RUNSTOP;
1246                 writel(usbcmd, &dev->op_regs->usbcmd);
1247         } else {
1248                 usbcmd = readl(&dev->op_regs->usbcmd);
1249                 usbcmd &= ~CMD_RUNSTOP;
1250                 writel(usbcmd, &dev->op_regs->usbcmd);
1251         }
1252
1253         spin_unlock_irqrestore(&dev->lock, flags);
1254
1255         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1256         return 0;
1257 }
1258
1259
1260 /* constrain controller's VBUS power usage */
1261 static int langwell_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1262 {
1263         struct langwell_udc     *dev;
1264
1265         if (!_gadget)
1266                 return -ENODEV;
1267
1268         dev = container_of(_gadget, struct langwell_udc, gadget);
1269         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1270
1271         if (dev->transceiver) {
1272                 dev_vdbg(&dev->pdev->dev, "otg_set_power\n");
1273                 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1274                 return otg_set_power(dev->transceiver, mA);
1275         }
1276
1277         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1278         return -ENOTSUPP;
1279 }
1280
1281
1282 /* D+ pullup, software-controlled connect/disconnect to USB host */
1283 static int langwell_pullup(struct usb_gadget *_gadget, int is_on)
1284 {
1285         struct langwell_udc     *dev;
1286         u32                     usbcmd;
1287         unsigned long           flags;
1288
1289         if (!_gadget)
1290                 return -ENODEV;
1291
1292         dev = container_of(_gadget, struct langwell_udc, gadget);
1293
1294         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1295
1296         spin_lock_irqsave(&dev->lock, flags);
1297         dev->softconnected = (is_on != 0);
1298
1299         if (dev->driver && dev->softconnected && dev->vbus_active) {
1300                 usbcmd = readl(&dev->op_regs->usbcmd);
1301                 usbcmd |= CMD_RUNSTOP;
1302                 writel(usbcmd, &dev->op_regs->usbcmd);
1303         } else {
1304                 usbcmd = readl(&dev->op_regs->usbcmd);
1305                 usbcmd &= ~CMD_RUNSTOP;
1306                 writel(usbcmd, &dev->op_regs->usbcmd);
1307         }
1308         spin_unlock_irqrestore(&dev->lock, flags);
1309
1310         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1311         return 0;
1312 }
1313
1314 static int langwell_start(struct usb_gadget_driver *driver,
1315                 int (*bind)(struct usb_gadget *));
1316 static int langwell_stop(struct usb_gadget_driver *driver);
1317 /* device controller usb_gadget_ops structure */
1318 static const struct usb_gadget_ops langwell_ops = {
1319
1320         /* returns the current frame number */
1321         .get_frame      = langwell_get_frame,
1322
1323         /* tries to wake up the host connected to this gadget */
1324         .wakeup         = langwell_wakeup,
1325
1326         /* set the device selfpowered feature, always selfpowered */
1327         /* .set_selfpowered = langwell_set_selfpowered, */
1328
1329         /* notify controller that VBUS is powered or not */
1330         .vbus_session   = langwell_vbus_session,
1331
1332         /* constrain controller's VBUS power usage */
1333         .vbus_draw      = langwell_vbus_draw,
1334
1335         /* D+ pullup, software-controlled connect/disconnect to USB host */
1336         .pullup         = langwell_pullup,
1337
1338         .start          = langwell_start,
1339         .stop           = langwell_stop,
1340 };
1341
1342
1343 /*-------------------------------------------------------------------------*/
1344
1345 /* device controller operations */
1346
1347 /* reset device controller */
1348 static int langwell_udc_reset(struct langwell_udc *dev)
1349 {
1350         u32             usbcmd, usbmode, devlc, endpointlistaddr;
1351         u8              devlc_byte0, devlc_byte2;
1352         unsigned long   timeout;
1353
1354         if (!dev)
1355                 return -EINVAL;
1356
1357         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1358
1359         /* set controller to stop state */
1360         usbcmd = readl(&dev->op_regs->usbcmd);
1361         usbcmd &= ~CMD_RUNSTOP;
1362         writel(usbcmd, &dev->op_regs->usbcmd);
1363
1364         /* reset device controller */
1365         usbcmd = readl(&dev->op_regs->usbcmd);
1366         usbcmd |= CMD_RST;
1367         writel(usbcmd, &dev->op_regs->usbcmd);
1368
1369         /* wait for reset to complete */
1370         timeout = jiffies + RESET_TIMEOUT;
1371         while (readl(&dev->op_regs->usbcmd) & CMD_RST) {
1372                 if (time_after(jiffies, timeout)) {
1373                         dev_err(&dev->pdev->dev, "device reset timeout\n");
1374                         return -ETIMEDOUT;
1375                 }
1376                 cpu_relax();
1377         }
1378
1379         /* set controller to device mode */
1380         usbmode = readl(&dev->op_regs->usbmode);
1381         usbmode |= MODE_DEVICE;
1382
1383         /* turn setup lockout off, require setup tripwire in usbcmd */
1384         usbmode |= MODE_SLOM;
1385
1386         writel(usbmode, &dev->op_regs->usbmode);
1387         usbmode = readl(&dev->op_regs->usbmode);
1388         dev_vdbg(&dev->pdev->dev, "usbmode=0x%08x\n", usbmode);
1389
1390         /* Write-Clear setup status */
1391         writel(0, &dev->op_regs->usbsts);
1392
1393         /* if support USB LPM, ACK all LPM token */
1394         if (dev->lpm) {
1395                 devlc = readl(&dev->op_regs->devlc);
1396                 dev_vdbg(&dev->pdev->dev, "devlc = 0x%08x\n", devlc);
1397                 /* FIXME: workaround for Langwell A1/A2/A3 sighting */
1398                 devlc &= ~LPM_STL;      /* don't STALL LPM token */
1399                 devlc &= ~LPM_NYT_ACK;  /* ACK LPM token */
1400                 devlc_byte0 = devlc & 0xff;
1401                 devlc_byte2 = (devlc >> 16) & 0xff;
1402                 writeb(devlc_byte0, (u8 *)&dev->op_regs->devlc);
1403                 writeb(devlc_byte2, (u8 *)&dev->op_regs->devlc + 2);
1404                 devlc = readl(&dev->op_regs->devlc);
1405                 dev_vdbg(&dev->pdev->dev,
1406                                 "ACK LPM token, devlc = 0x%08x\n", devlc);
1407         }
1408
1409         /* fill endpointlistaddr register */
1410         endpointlistaddr = dev->ep_dqh_dma;
1411         endpointlistaddr &= ENDPOINTLISTADDR_MASK;
1412         writel(endpointlistaddr, &dev->op_regs->endpointlistaddr);
1413
1414         dev_vdbg(&dev->pdev->dev,
1415                 "dQH base (vir: %p, phy: 0x%08x), endpointlistaddr=0x%08x\n",
1416                 dev->ep_dqh, endpointlistaddr,
1417                 readl(&dev->op_regs->endpointlistaddr));
1418         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1419         return 0;
1420 }
1421
1422
1423 /* reinitialize device controller endpoints */
1424 static int eps_reinit(struct langwell_udc *dev)
1425 {
1426         struct langwell_ep      *ep;
1427         char                    name[14];
1428         int                     i;
1429
1430         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1431
1432         /* initialize ep0 */
1433         ep = &dev->ep[0];
1434         ep->dev = dev;
1435         strncpy(ep->name, "ep0", sizeof(ep->name));
1436         ep->ep.name = ep->name;
1437         ep->ep.ops = &langwell_ep_ops;
1438         ep->stopped = 0;
1439         ep->ep.maxpacket = EP0_MAX_PKT_SIZE;
1440         ep->ep_num = 0;
1441         ep->desc = &langwell_ep0_desc;
1442         INIT_LIST_HEAD(&ep->queue);
1443
1444         ep->ep_type = USB_ENDPOINT_XFER_CONTROL;
1445
1446         /* initialize other endpoints */
1447         for (i = 2; i < dev->ep_max; i++) {
1448                 ep = &dev->ep[i];
1449                 if (i % 2)
1450                         snprintf(name, sizeof(name), "ep%din", i / 2);
1451                 else
1452                         snprintf(name, sizeof(name), "ep%dout", i / 2);
1453                 ep->dev = dev;
1454                 strncpy(ep->name, name, sizeof(ep->name));
1455                 ep->ep.name = ep->name;
1456
1457                 ep->ep.ops = &langwell_ep_ops;
1458                 ep->stopped = 0;
1459                 ep->ep.maxpacket = (unsigned short) ~0;
1460                 ep->ep_num = i / 2;
1461
1462                 INIT_LIST_HEAD(&ep->queue);
1463                 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
1464         }
1465
1466         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1467         return 0;
1468 }
1469
1470
1471 /* enable interrupt and set controller to run state */
1472 static void langwell_udc_start(struct langwell_udc *dev)
1473 {
1474         u32     usbintr, usbcmd;
1475         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1476
1477         /* enable interrupts */
1478         usbintr = INTR_ULPIE    /* ULPI */
1479                 | INTR_SLE      /* suspend */
1480                 /* | INTR_SRE   SOF received */
1481                 | INTR_URE      /* USB reset */
1482                 | INTR_AAE      /* async advance */
1483                 | INTR_SEE      /* system error */
1484                 | INTR_FRE      /* frame list rollover */
1485                 | INTR_PCE      /* port change detect */
1486                 | INTR_UEE      /* USB error interrupt */
1487                 | INTR_UE;      /* USB interrupt */
1488         writel(usbintr, &dev->op_regs->usbintr);
1489
1490         /* clear stopped bit */
1491         dev->stopped = 0;
1492
1493         /* set controller to run */
1494         usbcmd = readl(&dev->op_regs->usbcmd);
1495         usbcmd |= CMD_RUNSTOP;
1496         writel(usbcmd, &dev->op_regs->usbcmd);
1497
1498         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1499 }
1500
1501
1502 /* disable interrupt and set controller to stop state */
1503 static void langwell_udc_stop(struct langwell_udc *dev)
1504 {
1505         u32     usbcmd;
1506
1507         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1508
1509         /* disable all interrupts */
1510         writel(0, &dev->op_regs->usbintr);
1511
1512         /* set stopped bit */
1513         dev->stopped = 1;
1514
1515         /* set controller to stop state */
1516         usbcmd = readl(&dev->op_regs->usbcmd);
1517         usbcmd &= ~CMD_RUNSTOP;
1518         writel(usbcmd, &dev->op_regs->usbcmd);
1519
1520         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1521 }
1522
1523
1524 /* stop all USB activities */
1525 static void stop_activity(struct langwell_udc *dev,
1526                 struct usb_gadget_driver *driver)
1527 {
1528         struct langwell_ep      *ep;
1529         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1530
1531         nuke(&dev->ep[0], -ESHUTDOWN);
1532
1533         list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
1534                 nuke(ep, -ESHUTDOWN);
1535         }
1536
1537         /* report disconnect; the driver is already quiesced */
1538         if (driver) {
1539                 spin_unlock(&dev->lock);
1540                 driver->disconnect(&dev->gadget);
1541                 spin_lock(&dev->lock);
1542         }
1543
1544         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1545 }
1546
1547
1548 /*-------------------------------------------------------------------------*/
1549
1550 /* device "function" sysfs attribute file */
1551 static ssize_t show_function(struct device *_dev,
1552                 struct device_attribute *attr, char *buf)
1553 {
1554         struct langwell_udc     *dev = the_controller;
1555
1556         if (!dev->driver || !dev->driver->function
1557                         || strlen(dev->driver->function) > PAGE_SIZE)
1558                 return 0;
1559
1560         return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function);
1561 }
1562 static DEVICE_ATTR(function, S_IRUGO, show_function, NULL);
1563
1564
1565 /* device "langwell_udc" sysfs attribute file */
1566 static ssize_t show_langwell_udc(struct device *_dev,
1567                 struct device_attribute *attr, char *buf)
1568 {
1569         struct langwell_udc     *dev = the_controller;
1570         struct langwell_request *req;
1571         struct langwell_ep      *ep = NULL;
1572         char                    *next;
1573         unsigned                size;
1574         unsigned                t;
1575         unsigned                i;
1576         unsigned long           flags;
1577         u32                     tmp_reg;
1578
1579         next = buf;
1580         size = PAGE_SIZE;
1581         spin_lock_irqsave(&dev->lock, flags);
1582
1583         /* driver basic information */
1584         t = scnprintf(next, size,
1585                         DRIVER_DESC "\n"
1586                         "%s version: %s\n"
1587                         "Gadget driver: %s\n\n",
1588                         driver_name, DRIVER_VERSION,
1589                         dev->driver ? dev->driver->driver.name : "(none)");
1590         size -= t;
1591         next += t;
1592
1593         /* device registers */
1594         tmp_reg = readl(&dev->op_regs->usbcmd);
1595         t = scnprintf(next, size,
1596                         "USBCMD reg:\n"
1597                         "SetupTW: %d\n"
1598                         "Run/Stop: %s\n\n",
1599                         (tmp_reg & CMD_SUTW) ? 1 : 0,
1600                         (tmp_reg & CMD_RUNSTOP) ? "Run" : "Stop");
1601         size -= t;
1602         next += t;
1603
1604         tmp_reg = readl(&dev->op_regs->usbsts);
1605         t = scnprintf(next, size,
1606                         "USB Status Reg:\n"
1607                         "Device Suspend: %d\n"
1608                         "Reset Received: %d\n"
1609                         "System Error: %s\n"
1610                         "USB Error Interrupt: %s\n\n",
1611                         (tmp_reg & STS_SLI) ? 1 : 0,
1612                         (tmp_reg & STS_URI) ? 1 : 0,
1613                         (tmp_reg & STS_SEI) ? "Error" : "No error",
1614                         (tmp_reg & STS_UEI) ? "Error detected" : "No error");
1615         size -= t;
1616         next += t;
1617
1618         tmp_reg = readl(&dev->op_regs->usbintr);
1619         t = scnprintf(next, size,
1620                         "USB Intrrupt Enable Reg:\n"
1621                         "Sleep Enable: %d\n"
1622                         "SOF Received Enable: %d\n"
1623                         "Reset Enable: %d\n"
1624                         "System Error Enable: %d\n"
1625                         "Port Change Dectected Enable: %d\n"
1626                         "USB Error Intr Enable: %d\n"
1627                         "USB Intr Enable: %d\n\n",
1628                         (tmp_reg & INTR_SLE) ? 1 : 0,
1629                         (tmp_reg & INTR_SRE) ? 1 : 0,
1630                         (tmp_reg & INTR_URE) ? 1 : 0,
1631                         (tmp_reg & INTR_SEE) ? 1 : 0,
1632                         (tmp_reg & INTR_PCE) ? 1 : 0,
1633                         (tmp_reg & INTR_UEE) ? 1 : 0,
1634                         (tmp_reg & INTR_UE) ? 1 : 0);
1635         size -= t;
1636         next += t;
1637
1638         tmp_reg = readl(&dev->op_regs->frindex);
1639         t = scnprintf(next, size,
1640                         "USB Frame Index Reg:\n"
1641                         "Frame Number is 0x%08x\n\n",
1642                         (tmp_reg & FRINDEX_MASK));
1643         size -= t;
1644         next += t;
1645
1646         tmp_reg = readl(&dev->op_regs->deviceaddr);
1647         t = scnprintf(next, size,
1648                         "USB Device Address Reg:\n"
1649                         "Device Addr is 0x%x\n\n",
1650                         USBADR(tmp_reg));
1651         size -= t;
1652         next += t;
1653
1654         tmp_reg = readl(&dev->op_regs->endpointlistaddr);
1655         t = scnprintf(next, size,
1656                         "USB Endpoint List Address Reg:\n"
1657                         "Endpoint List Pointer is 0x%x\n\n",
1658                         EPBASE(tmp_reg));
1659         size -= t;
1660         next += t;
1661
1662         tmp_reg = readl(&dev->op_regs->portsc1);
1663         t = scnprintf(next, size,
1664                 "USB Port Status & Control Reg:\n"
1665                 "Port Reset: %s\n"
1666                 "Port Suspend Mode: %s\n"
1667                 "Over-current Change: %s\n"
1668                 "Port Enable/Disable Change: %s\n"
1669                 "Port Enabled/Disabled: %s\n"
1670                 "Current Connect Status: %s\n"
1671                 "LPM Suspend Status: %s\n\n",
1672                 (tmp_reg & PORTS_PR) ? "Reset" : "Not Reset",
1673                 (tmp_reg & PORTS_SUSP) ? "Suspend " : "Not Suspend",
1674                 (tmp_reg & PORTS_OCC) ? "Detected" : "No",
1675                 (tmp_reg & PORTS_PEC) ? "Changed" : "Not Changed",
1676                 (tmp_reg & PORTS_PE) ? "Enable" : "Not Correct",
1677                 (tmp_reg & PORTS_CCS) ?  "Attached" : "Not Attached",
1678                 (tmp_reg & PORTS_SLP) ? "LPM L1" : "LPM L0");
1679         size -= t;
1680         next += t;
1681
1682         tmp_reg = readl(&dev->op_regs->devlc);
1683         t = scnprintf(next, size,
1684                 "Device LPM Control Reg:\n"
1685                 "Parallel Transceiver : %d\n"
1686                 "Serial Transceiver : %d\n"
1687                 "Port Speed: %s\n"
1688                 "Port Force Full Speed Connenct: %s\n"
1689                 "PHY Low Power Suspend Clock: %s\n"
1690                 "BmAttributes: %d\n\n",
1691                 LPM_PTS(tmp_reg),
1692                 (tmp_reg & LPM_STS) ? 1 : 0,
1693                 ({
1694                         char    *s;
1695                         switch (LPM_PSPD(tmp_reg)) {
1696                         case LPM_SPEED_FULL:
1697                                 s = "Full Speed"; break;
1698                         case LPM_SPEED_LOW:
1699                                 s = "Low Speed"; break;
1700                         case LPM_SPEED_HIGH:
1701                                 s = "High Speed"; break;
1702                         default:
1703                                 s = "Unknown Speed"; break;
1704                         }
1705                         s;
1706                 }),
1707                 (tmp_reg & LPM_PFSC) ? "Force Full Speed" : "Not Force",
1708                 (tmp_reg & LPM_PHCD) ? "Disabled" : "Enabled",
1709                 LPM_BA(tmp_reg));
1710         size -= t;
1711         next += t;
1712
1713         tmp_reg = readl(&dev->op_regs->usbmode);
1714         t = scnprintf(next, size,
1715                         "USB Mode Reg:\n"
1716                         "Controller Mode is : %s\n\n", ({
1717                                 char *s;
1718                                 switch (MODE_CM(tmp_reg)) {
1719                                 case MODE_IDLE:
1720                                         s = "Idle"; break;
1721                                 case MODE_DEVICE:
1722                                         s = "Device Controller"; break;
1723                                 case MODE_HOST:
1724                                         s = "Host Controller"; break;
1725                                 default:
1726                                         s = "None"; break;
1727                                 }
1728                                 s;
1729                         }));
1730         size -= t;
1731         next += t;
1732
1733         tmp_reg = readl(&dev->op_regs->endptsetupstat);
1734         t = scnprintf(next, size,
1735                         "Endpoint Setup Status Reg:\n"
1736                         "SETUP on ep 0x%04x\n\n",
1737                         tmp_reg & SETUPSTAT_MASK);
1738         size -= t;
1739         next += t;
1740
1741         for (i = 0; i < dev->ep_max / 2; i++) {
1742                 tmp_reg = readl(&dev->op_regs->endptctrl[i]);
1743                 t = scnprintf(next, size, "EP Ctrl Reg [%d]: 0x%08x\n",
1744                                 i, tmp_reg);
1745                 size -= t;
1746                 next += t;
1747         }
1748         tmp_reg = readl(&dev->op_regs->endptprime);
1749         t = scnprintf(next, size, "EP Prime Reg: 0x%08x\n\n", tmp_reg);
1750         size -= t;
1751         next += t;
1752
1753         /* langwell_udc, langwell_ep, langwell_request structure information */
1754         ep = &dev->ep[0];
1755         t = scnprintf(next, size, "%s MaxPacketSize: 0x%x, ep_num: %d\n",
1756                         ep->ep.name, ep->ep.maxpacket, ep->ep_num);
1757         size -= t;
1758         next += t;
1759
1760         if (list_empty(&ep->queue)) {
1761                 t = scnprintf(next, size, "its req queue is empty\n\n");
1762                 size -= t;
1763                 next += t;
1764         } else {
1765                 list_for_each_entry(req, &ep->queue, queue) {
1766                         t = scnprintf(next, size,
1767                                 "req %p actual 0x%x length 0x%x  buf %p\n",
1768                                 &req->req, req->req.actual,
1769                                 req->req.length, req->req.buf);
1770                         size -= t;
1771                         next += t;
1772                 }
1773         }
1774         /* other gadget->eplist ep */
1775         list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
1776                 if (ep->desc) {
1777                         t = scnprintf(next, size,
1778                                         "\n%s MaxPacketSize: 0x%x, "
1779                                         "ep_num: %d\n",
1780                                         ep->ep.name, ep->ep.maxpacket,
1781                                         ep->ep_num);
1782                         size -= t;
1783                         next += t;
1784
1785                         if (list_empty(&ep->queue)) {
1786                                 t = scnprintf(next, size,
1787                                                 "its req queue is empty\n\n");
1788                                 size -= t;
1789                                 next += t;
1790                         } else {
1791                                 list_for_each_entry(req, &ep->queue, queue) {
1792                                         t = scnprintf(next, size,
1793                                                 "req %p actual 0x%x length "
1794                                                 "0x%x  buf %p\n",
1795                                                 &req->req, req->req.actual,
1796                                                 req->req.length, req->req.buf);
1797                                         size -= t;
1798                                         next += t;
1799                                 }
1800                         }
1801                 }
1802         }
1803
1804         spin_unlock_irqrestore(&dev->lock, flags);
1805         return PAGE_SIZE - size;
1806 }
1807 static DEVICE_ATTR(langwell_udc, S_IRUGO, show_langwell_udc, NULL);
1808
1809
1810 /* device "remote_wakeup" sysfs attribute file */
1811 static ssize_t store_remote_wakeup(struct device *_dev,
1812                 struct device_attribute *attr, const char *buf, size_t count)
1813 {
1814         struct langwell_udc     *dev = the_controller;
1815         unsigned long           flags;
1816         ssize_t                 rc = count;
1817
1818         if (count > 2)
1819                 return -EINVAL;
1820
1821         if (count > 0 && buf[count-1] == '\n')
1822                 ((char *) buf)[count-1] = 0;
1823
1824         if (buf[0] != '1')
1825                 return -EINVAL;
1826
1827         /* force remote wakeup enabled in case gadget driver doesn't support */
1828         spin_lock_irqsave(&dev->lock, flags);
1829         dev->remote_wakeup = 1;
1830         dev->dev_status |= (1 << USB_DEVICE_REMOTE_WAKEUP);
1831         spin_unlock_irqrestore(&dev->lock, flags);
1832
1833         langwell_wakeup(&dev->gadget);
1834
1835         return rc;
1836 }
1837 static DEVICE_ATTR(remote_wakeup, S_IWUSR, NULL, store_remote_wakeup);
1838
1839
1840 /*-------------------------------------------------------------------------*/
1841
1842 /*
1843  * when a driver is successfully registered, it will receive
1844  * control requests including set_configuration(), which enables
1845  * non-control requests.  then usb traffic follows until a
1846  * disconnect is reported.  then a host may connect again, or
1847  * the driver might get unbound.
1848  */
1849
1850 static int langwell_start(struct usb_gadget_driver *driver,
1851                 int (*bind)(struct usb_gadget *))
1852 {
1853         struct langwell_udc     *dev = the_controller;
1854         unsigned long           flags;
1855         int                     retval;
1856
1857         if (!dev)
1858                 return -ENODEV;
1859
1860         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1861
1862         if (dev->driver)
1863                 return -EBUSY;
1864
1865         spin_lock_irqsave(&dev->lock, flags);
1866
1867         /* hook up the driver ... */
1868         driver->driver.bus = NULL;
1869         dev->driver = driver;
1870         dev->gadget.dev.driver = &driver->driver;
1871
1872         spin_unlock_irqrestore(&dev->lock, flags);
1873
1874         retval = bind(&dev->gadget);
1875         if (retval) {
1876                 dev_dbg(&dev->pdev->dev, "bind to driver %s --> %d\n",
1877                                 driver->driver.name, retval);
1878                 dev->driver = NULL;
1879                 dev->gadget.dev.driver = NULL;
1880                 return retval;
1881         }
1882
1883         retval = device_create_file(&dev->pdev->dev, &dev_attr_function);
1884         if (retval)
1885                 goto err_unbind;
1886
1887         dev->usb_state = USB_STATE_ATTACHED;
1888         dev->ep0_state = WAIT_FOR_SETUP;
1889         dev->ep0_dir = USB_DIR_OUT;
1890
1891         /* enable interrupt and set controller to run state */
1892         if (dev->got_irq)
1893                 langwell_udc_start(dev);
1894
1895         dev_vdbg(&dev->pdev->dev,
1896                         "After langwell_udc_start(), print all registers:\n");
1897         print_all_registers(dev);
1898
1899         dev_info(&dev->pdev->dev, "register driver: %s\n",
1900                         driver->driver.name);
1901         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1902         return 0;
1903
1904 err_unbind:
1905         driver->unbind(&dev->gadget);
1906         dev->gadget.dev.driver = NULL;
1907         dev->driver = NULL;
1908
1909         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1910         return retval;
1911 }
1912
1913 /* unregister gadget driver */
1914 static int langwell_stop(struct usb_gadget_driver *driver)
1915 {
1916         struct langwell_udc     *dev = the_controller;
1917         unsigned long           flags;
1918
1919         if (!dev)
1920                 return -ENODEV;
1921
1922         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1923
1924         if (unlikely(!driver || !driver->unbind))
1925                 return -EINVAL;
1926
1927         /* exit PHY low power suspend */
1928         if (dev->pdev->device != 0x0829)
1929                 langwell_phy_low_power(dev, 0);
1930
1931         /* unbind OTG transceiver */
1932         if (dev->transceiver)
1933                 (void)otg_set_peripheral(dev->transceiver, 0);
1934
1935         /* disable interrupt and set controller to stop state */
1936         langwell_udc_stop(dev);
1937
1938         dev->usb_state = USB_STATE_ATTACHED;
1939         dev->ep0_state = WAIT_FOR_SETUP;
1940         dev->ep0_dir = USB_DIR_OUT;
1941
1942         spin_lock_irqsave(&dev->lock, flags);
1943
1944         /* stop all usb activities */
1945         dev->gadget.speed = USB_SPEED_UNKNOWN;
1946         stop_activity(dev, driver);
1947         spin_unlock_irqrestore(&dev->lock, flags);
1948
1949         /* unbind gadget driver */
1950         driver->unbind(&dev->gadget);
1951         dev->gadget.dev.driver = NULL;
1952         dev->driver = NULL;
1953
1954         device_remove_file(&dev->pdev->dev, &dev_attr_function);
1955
1956         dev_info(&dev->pdev->dev, "unregistered driver '%s'\n",
1957                         driver->driver.name);
1958         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1959         return 0;
1960 }
1961
1962 /*-------------------------------------------------------------------------*/
1963
1964 /*
1965  * setup tripwire is used as a semaphore to ensure that the setup data
1966  * payload is extracted from a dQH without being corrupted
1967  */
1968 static void setup_tripwire(struct langwell_udc *dev)
1969 {
1970         u32                     usbcmd,
1971                                 endptsetupstat;
1972         unsigned long           timeout;
1973         struct langwell_dqh     *dqh;
1974
1975         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1976
1977         /* ep0 OUT dQH */
1978         dqh = &dev->ep_dqh[EP_DIR_OUT];
1979
1980         /* Write-Clear endptsetupstat */
1981         endptsetupstat = readl(&dev->op_regs->endptsetupstat);
1982         writel(endptsetupstat, &dev->op_regs->endptsetupstat);
1983
1984         /* wait until endptsetupstat is cleared */
1985         timeout = jiffies + SETUPSTAT_TIMEOUT;
1986         while (readl(&dev->op_regs->endptsetupstat)) {
1987                 if (time_after(jiffies, timeout)) {
1988                         dev_err(&dev->pdev->dev, "setup_tripwire timeout\n");
1989                         break;
1990                 }
1991                 cpu_relax();
1992         }
1993
1994         /* while a hazard exists when setup packet arrives */
1995         do {
1996                 /* set setup tripwire bit */
1997                 usbcmd = readl(&dev->op_regs->usbcmd);
1998                 writel(usbcmd | CMD_SUTW, &dev->op_regs->usbcmd);
1999
2000                 /* copy the setup packet to local buffer */
2001                 memcpy(&dev->local_setup_buff, &dqh->dqh_setup, 8);
2002         } while (!(readl(&dev->op_regs->usbcmd) & CMD_SUTW));
2003
2004         /* Write-Clear setup tripwire bit */
2005         usbcmd = readl(&dev->op_regs->usbcmd);
2006         writel(usbcmd & ~CMD_SUTW, &dev->op_regs->usbcmd);
2007
2008         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2009 }
2010
2011
2012 /* protocol ep0 stall, will automatically be cleared on new transaction */
2013 static void ep0_stall(struct langwell_udc *dev)
2014 {
2015         u32     endptctrl;
2016
2017         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2018
2019         /* set TX and RX to stall */
2020         endptctrl = readl(&dev->op_regs->endptctrl[0]);
2021         endptctrl |= EPCTRL_TXS | EPCTRL_RXS;
2022         writel(endptctrl, &dev->op_regs->endptctrl[0]);
2023
2024         /* update ep0 state */
2025         dev->ep0_state = WAIT_FOR_SETUP;
2026         dev->ep0_dir = USB_DIR_OUT;
2027
2028         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2029 }
2030
2031
2032 /* PRIME a status phase for ep0 */
2033 static int prime_status_phase(struct langwell_udc *dev, int dir)
2034 {
2035         struct langwell_request *req;
2036         struct langwell_ep      *ep;
2037         int                     status = 0;
2038
2039         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2040
2041         if (dir == EP_DIR_IN)
2042                 dev->ep0_dir = USB_DIR_IN;
2043         else
2044                 dev->ep0_dir = USB_DIR_OUT;
2045
2046         ep = &dev->ep[0];
2047         dev->ep0_state = WAIT_FOR_OUT_STATUS;
2048
2049         req = dev->status_req;
2050
2051         req->ep = ep;
2052         req->req.length = 0;
2053         req->req.status = -EINPROGRESS;
2054         req->req.actual = 0;
2055         req->req.complete = NULL;
2056         req->dtd_count = 0;
2057
2058         if (!req_to_dtd(req))
2059                 status = queue_dtd(ep, req);
2060         else
2061                 return -ENOMEM;
2062
2063         if (status)
2064                 dev_err(&dev->pdev->dev, "can't queue ep0 status request\n");
2065
2066         list_add_tail(&req->queue, &ep->queue);
2067
2068         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2069         return status;
2070 }
2071
2072
2073 /* SET_ADDRESS request routine */
2074 static void set_address(struct langwell_udc *dev, u16 value,
2075                 u16 index, u16 length)
2076 {
2077         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2078
2079         /* save the new address to device struct */
2080         dev->dev_addr = (u8) value;
2081         dev_vdbg(&dev->pdev->dev, "dev->dev_addr = %d\n", dev->dev_addr);
2082
2083         /* update usb state */
2084         dev->usb_state = USB_STATE_ADDRESS;
2085
2086         /* STATUS phase */
2087         if (prime_status_phase(dev, EP_DIR_IN))
2088                 ep0_stall(dev);
2089
2090         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2091 }
2092
2093
2094 /* return endpoint by windex */
2095 static struct langwell_ep *get_ep_by_windex(struct langwell_udc *dev,
2096                 u16 wIndex)
2097 {
2098         struct langwell_ep              *ep;
2099         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2100
2101         if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
2102                 return &dev->ep[0];
2103
2104         list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
2105                 u8      bEndpointAddress;
2106                 if (!ep->desc)
2107                         continue;
2108
2109                 bEndpointAddress = ep->desc->bEndpointAddress;
2110                 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
2111                         continue;
2112
2113                 if ((wIndex & USB_ENDPOINT_NUMBER_MASK)
2114                         == (bEndpointAddress & USB_ENDPOINT_NUMBER_MASK))
2115                         return ep;
2116         }
2117
2118         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2119         return NULL;
2120 }
2121
2122
2123 /* return whether endpoint is stalled, 0: not stalled; 1: stalled */
2124 static int ep_is_stall(struct langwell_ep *ep)
2125 {
2126         struct langwell_udc     *dev = ep->dev;
2127         u32                     endptctrl;
2128         int                     retval;
2129
2130         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2131
2132         endptctrl = readl(&dev->op_regs->endptctrl[ep->ep_num]);
2133         if (is_in(ep))
2134                 retval = endptctrl & EPCTRL_TXS ? 1 : 0;
2135         else
2136                 retval = endptctrl & EPCTRL_RXS ? 1 : 0;
2137
2138         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2139         return retval;
2140 }
2141
2142
2143 /* GET_STATUS request routine */
2144 static void get_status(struct langwell_udc *dev, u8 request_type, u16 value,
2145                 u16 index, u16 length)
2146 {
2147         struct langwell_request *req;
2148         struct langwell_ep      *ep;
2149         u16     status_data = 0;        /* 16 bits cpu view status data */
2150         int     status = 0;
2151
2152         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2153
2154         ep = &dev->ep[0];
2155
2156         if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
2157                 /* get device status */
2158                 status_data = dev->dev_status;
2159         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
2160                 /* get interface status */
2161                 status_data = 0;
2162         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
2163                 /* get endpoint status */
2164                 struct langwell_ep      *epn;
2165                 epn = get_ep_by_windex(dev, index);
2166                 /* stall if endpoint doesn't exist */
2167                 if (!epn)
2168                         goto stall;
2169
2170                 status_data = ep_is_stall(epn) << USB_ENDPOINT_HALT;
2171         }
2172
2173         dev_dbg(&dev->pdev->dev, "get status data: 0x%04x\n", status_data);
2174
2175         dev->ep0_dir = USB_DIR_IN;
2176
2177         /* borrow the per device status_req */
2178         req = dev->status_req;
2179
2180         /* fill in the reqest structure */
2181         *((u16 *) req->req.buf) = cpu_to_le16(status_data);
2182         req->ep = ep;
2183         req->req.length = 2;
2184         req->req.status = -EINPROGRESS;
2185         req->req.actual = 0;
2186         req->req.complete = NULL;
2187         req->dtd_count = 0;
2188
2189         /* prime the data phase */
2190         if (!req_to_dtd(req))
2191                 status = queue_dtd(ep, req);
2192         else                    /* no mem */
2193                 goto stall;
2194
2195         if (status) {
2196                 dev_err(&dev->pdev->dev,
2197                                 "response error on GET_STATUS request\n");
2198                 goto stall;
2199         }
2200
2201         list_add_tail(&req->queue, &ep->queue);
2202         dev->ep0_state = DATA_STATE_XMIT;
2203
2204         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2205         return;
2206 stall:
2207         ep0_stall(dev);
2208         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2209 }
2210
2211
2212 /* setup packet interrupt handler */
2213 static void handle_setup_packet(struct langwell_udc *dev,
2214                 struct usb_ctrlrequest *setup)
2215 {
2216         u16     wValue = le16_to_cpu(setup->wValue);
2217         u16     wIndex = le16_to_cpu(setup->wIndex);
2218         u16     wLength = le16_to_cpu(setup->wLength);
2219         u32     portsc1;
2220
2221         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2222
2223         /* ep0 fifo flush */
2224         nuke(&dev->ep[0], -ESHUTDOWN);
2225
2226         dev_dbg(&dev->pdev->dev, "SETUP %02x.%02x v%04x i%04x l%04x\n",
2227                         setup->bRequestType, setup->bRequest,
2228                         wValue, wIndex, wLength);
2229
2230         /* RNDIS gadget delegate */
2231         if ((setup->bRequestType == 0x21) && (setup->bRequest == 0x00)) {
2232                 /* USB_CDC_SEND_ENCAPSULATED_COMMAND */
2233                 goto delegate;
2234         }
2235
2236         /* USB_CDC_GET_ENCAPSULATED_RESPONSE */
2237         if ((setup->bRequestType == 0xa1) && (setup->bRequest == 0x01)) {
2238                 /* USB_CDC_GET_ENCAPSULATED_RESPONSE */
2239                 goto delegate;
2240         }
2241
2242         /* We process some stardard setup requests here */
2243         switch (setup->bRequest) {
2244         case USB_REQ_GET_STATUS:
2245                 dev_dbg(&dev->pdev->dev, "SETUP: USB_REQ_GET_STATUS\n");
2246                 /* get status, DATA and STATUS phase */
2247                 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
2248                                         != (USB_DIR_IN | USB_TYPE_STANDARD))
2249                         break;
2250                 get_status(dev, setup->bRequestType, wValue, wIndex, wLength);
2251                 goto end;
2252
2253         case USB_REQ_SET_ADDRESS:
2254                 dev_dbg(&dev->pdev->dev, "SETUP: USB_REQ_SET_ADDRESS\n");
2255                 /* STATUS phase */
2256                 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD
2257                                                 | USB_RECIP_DEVICE))
2258                         break;
2259                 set_address(dev, wValue, wIndex, wLength);
2260                 goto end;
2261
2262         case USB_REQ_CLEAR_FEATURE:
2263         case USB_REQ_SET_FEATURE:
2264                 /* STATUS phase */
2265         {
2266                 int rc = -EOPNOTSUPP;
2267                 if (setup->bRequest == USB_REQ_SET_FEATURE)
2268                         dev_dbg(&dev->pdev->dev,
2269                                         "SETUP: USB_REQ_SET_FEATURE\n");
2270                 else if (setup->bRequest == USB_REQ_CLEAR_FEATURE)
2271                         dev_dbg(&dev->pdev->dev,
2272                                         "SETUP: USB_REQ_CLEAR_FEATURE\n");
2273
2274                 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK))
2275                                 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) {
2276                         struct langwell_ep      *epn;
2277                         epn = get_ep_by_windex(dev, wIndex);
2278                         /* stall if endpoint doesn't exist */
2279                         if (!epn) {
2280                                 ep0_stall(dev);
2281                                 goto end;
2282                         }
2283
2284                         if (wValue != 0 || wLength != 0
2285                                         || epn->ep_num > dev->ep_max)
2286                                 break;
2287
2288                         spin_unlock(&dev->lock);
2289                         rc = langwell_ep_set_halt(&epn->ep,
2290                                 (setup->bRequest == USB_REQ_SET_FEATURE)
2291                                 ? 1 : 0);
2292                         spin_lock(&dev->lock);
2293
2294                 } else if ((setup->bRequestType & (USB_RECIP_MASK
2295                                 | USB_TYPE_MASK)) == (USB_RECIP_DEVICE
2296                                 | USB_TYPE_STANDARD)) {
2297                         rc = 0;
2298                         switch (wValue) {
2299                         case USB_DEVICE_REMOTE_WAKEUP:
2300                                 if (setup->bRequest == USB_REQ_SET_FEATURE) {
2301                                         dev->remote_wakeup = 1;
2302                                         dev->dev_status |= (1 << wValue);
2303                                 } else {
2304                                         dev->remote_wakeup = 0;
2305                                         dev->dev_status &= ~(1 << wValue);
2306                                 }
2307                                 break;
2308                         case USB_DEVICE_TEST_MODE:
2309                                 dev_dbg(&dev->pdev->dev, "SETUP: TEST MODE\n");
2310                                 if ((wIndex & 0xff) ||
2311                                         (dev->gadget.speed != USB_SPEED_HIGH))
2312                                         ep0_stall(dev);
2313
2314                                 switch (wIndex >> 8) {
2315                                 case TEST_J:
2316                                 case TEST_K:
2317                                 case TEST_SE0_NAK:
2318                                 case TEST_PACKET:
2319                                 case TEST_FORCE_EN:
2320                                         if (prime_status_phase(dev, EP_DIR_IN))
2321                                                 ep0_stall(dev);
2322                                         portsc1 = readl(&dev->op_regs->portsc1);
2323                                         portsc1 |= (wIndex & 0xf00) << 8;
2324                                         writel(portsc1, &dev->op_regs->portsc1);
2325                                         goto end;
2326                                 default:
2327                                         rc = -EOPNOTSUPP;
2328                                 }
2329                                 break;
2330                         default:
2331                                 rc = -EOPNOTSUPP;
2332                                 break;
2333                         }
2334
2335                         if (!gadget_is_otg(&dev->gadget))
2336                                 break;
2337                         else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE) {
2338                                 dev->gadget.b_hnp_enable = 1;
2339 #ifdef  OTG_TRANSCEIVER
2340                                 if (!dev->lotg->otg.default_a)
2341                                         dev->lotg->hsm.b_hnp_enable = 1;
2342 #endif
2343                         } else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT)
2344                                 dev->gadget.a_hnp_support = 1;
2345                         else if (setup->bRequest ==
2346                                         USB_DEVICE_A_ALT_HNP_SUPPORT)
2347                                 dev->gadget.a_alt_hnp_support = 1;
2348                         else
2349                                 break;
2350                 } else
2351                         break;
2352
2353                 if (rc == 0) {
2354                         if (prime_status_phase(dev, EP_DIR_IN))
2355                                 ep0_stall(dev);
2356                 }
2357                 goto end;
2358         }
2359
2360         case USB_REQ_GET_DESCRIPTOR:
2361                 dev_dbg(&dev->pdev->dev,
2362                                 "SETUP: USB_REQ_GET_DESCRIPTOR\n");
2363                 goto delegate;
2364
2365         case USB_REQ_SET_DESCRIPTOR:
2366                 dev_dbg(&dev->pdev->dev,
2367                                 "SETUP: USB_REQ_SET_DESCRIPTOR unsupported\n");
2368                 goto delegate;
2369
2370         case USB_REQ_GET_CONFIGURATION:
2371                 dev_dbg(&dev->pdev->dev,
2372                                 "SETUP: USB_REQ_GET_CONFIGURATION\n");
2373                 goto delegate;
2374
2375         case USB_REQ_SET_CONFIGURATION:
2376                 dev_dbg(&dev->pdev->dev,
2377                                 "SETUP: USB_REQ_SET_CONFIGURATION\n");
2378                 goto delegate;
2379
2380         case USB_REQ_GET_INTERFACE:
2381                 dev_dbg(&dev->pdev->dev,
2382                                 "SETUP: USB_REQ_GET_INTERFACE\n");
2383                 goto delegate;
2384
2385         case USB_REQ_SET_INTERFACE:
2386                 dev_dbg(&dev->pdev->dev,
2387                                 "SETUP: USB_REQ_SET_INTERFACE\n");
2388                 goto delegate;
2389
2390         case USB_REQ_SYNCH_FRAME:
2391                 dev_dbg(&dev->pdev->dev,
2392                                 "SETUP: USB_REQ_SYNCH_FRAME unsupported\n");
2393                 goto delegate;
2394
2395         default:
2396                 /* delegate USB standard requests to the gadget driver */
2397                 goto delegate;
2398 delegate:
2399                 /* USB requests handled by gadget */
2400                 if (wLength) {
2401                         /* DATA phase from gadget, STATUS phase from udc */
2402                         dev->ep0_dir = (setup->bRequestType & USB_DIR_IN)
2403                                         ?  USB_DIR_IN : USB_DIR_OUT;
2404                         dev_vdbg(&dev->pdev->dev,
2405                                         "dev->ep0_dir = 0x%x, wLength = %d\n",
2406                                         dev->ep0_dir, wLength);
2407                         spin_unlock(&dev->lock);
2408                         if (dev->driver->setup(&dev->gadget,
2409                                         &dev->local_setup_buff) < 0)
2410                                 ep0_stall(dev);
2411                         spin_lock(&dev->lock);
2412                         dev->ep0_state = (setup->bRequestType & USB_DIR_IN)
2413                                         ?  DATA_STATE_XMIT : DATA_STATE_RECV;
2414                 } else {
2415                         /* no DATA phase, IN STATUS phase from gadget */
2416                         dev->ep0_dir = USB_DIR_IN;
2417                         dev_vdbg(&dev->pdev->dev,
2418                                         "dev->ep0_dir = 0x%x, wLength = %d\n",
2419                                         dev->ep0_dir, wLength);
2420                         spin_unlock(&dev->lock);
2421                         if (dev->driver->setup(&dev->gadget,
2422                                         &dev->local_setup_buff) < 0)
2423                                 ep0_stall(dev);
2424                         spin_lock(&dev->lock);
2425                         dev->ep0_state = WAIT_FOR_OUT_STATUS;
2426                 }
2427                 break;
2428         }
2429 end:
2430         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2431 }
2432
2433
2434 /* transfer completion, process endpoint request and free the completed dTDs
2435  * for this request
2436  */
2437 static int process_ep_req(struct langwell_udc *dev, int index,
2438                 struct langwell_request *curr_req)
2439 {
2440         struct langwell_dtd     *curr_dtd;
2441         struct langwell_dqh     *curr_dqh;
2442         int                     td_complete, actual, remaining_length;
2443         int                     i, dir;
2444         u8                      dtd_status = 0;
2445         int                     retval = 0;
2446
2447         curr_dqh = &dev->ep_dqh[index];
2448         dir = index % 2;
2449
2450         curr_dtd = curr_req->head;
2451         td_complete = 0;
2452         actual = curr_req->req.length;
2453
2454         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2455
2456         for (i = 0; i < curr_req->dtd_count; i++) {
2457
2458                 /* command execution states by dTD */
2459                 dtd_status = curr_dtd->dtd_status;
2460
2461                 barrier();
2462                 remaining_length = le16_to_cpu(curr_dtd->dtd_total);
2463                 actual -= remaining_length;
2464
2465                 if (!dtd_status) {
2466                         /* transfers completed successfully */
2467                         if (!remaining_length) {
2468                                 td_complete++;
2469                                 dev_vdbg(&dev->pdev->dev,
2470                                         "dTD transmitted successfully\n");
2471                         } else {
2472                                 if (dir) {
2473                                         dev_vdbg(&dev->pdev->dev,
2474                                                 "TX dTD remains data\n");
2475                                         retval = -EPROTO;
2476                                         break;
2477
2478                                 } else {
2479                                         td_complete++;
2480                                         break;
2481                                 }
2482                         }
2483                 } else {
2484                         /* transfers completed with errors */
2485                         if (dtd_status & DTD_STS_ACTIVE) {
2486                                 dev_dbg(&dev->pdev->dev,
2487                                         "dTD status ACTIVE dQH[%d]\n", index);
2488                                 retval = 1;
2489                                 return retval;
2490                         } else if (dtd_status & DTD_STS_HALTED) {
2491                                 dev_err(&dev->pdev->dev,
2492                                         "dTD error %08x dQH[%d]\n",
2493                                         dtd_status, index);
2494                                 /* clear the errors and halt condition */
2495                                 curr_dqh->dtd_status = 0;
2496                                 retval = -EPIPE;
2497                                 break;
2498                         } else if (dtd_status & DTD_STS_DBE) {
2499                                 dev_dbg(&dev->pdev->dev,
2500                                         "data buffer (overflow) error\n");
2501                                 retval = -EPROTO;
2502                                 break;
2503                         } else if (dtd_status & DTD_STS_TRE) {
2504                                 dev_dbg(&dev->pdev->dev,
2505                                         "transaction(ISO) error\n");
2506                                 retval = -EILSEQ;
2507                                 break;
2508                         } else
2509                                 dev_err(&dev->pdev->dev,
2510                                         "unknown error (0x%x)!\n",
2511                                         dtd_status);
2512                 }
2513
2514                 if (i != curr_req->dtd_count - 1)
2515                         curr_dtd = (struct langwell_dtd *)
2516                                 curr_dtd->next_dtd_virt;
2517         }
2518
2519         if (retval)
2520                 return retval;
2521
2522         curr_req->req.actual = actual;
2523
2524         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2525         return 0;
2526 }
2527
2528
2529 /* complete DATA or STATUS phase of ep0 prime status phase if needed */
2530 static void ep0_req_complete(struct langwell_udc *dev,
2531                 struct langwell_ep *ep0, struct langwell_request *req)
2532 {
2533         u32     new_addr;
2534         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2535
2536         if (dev->usb_state == USB_STATE_ADDRESS) {
2537                 /* set the new address */
2538                 new_addr = (u32)dev->dev_addr;
2539                 writel(new_addr << USBADR_SHIFT, &dev->op_regs->deviceaddr);
2540
2541                 new_addr = USBADR(readl(&dev->op_regs->deviceaddr));
2542                 dev_vdbg(&dev->pdev->dev, "new_addr = %d\n", new_addr);
2543         }
2544
2545         done(ep0, req, 0);
2546
2547         switch (dev->ep0_state) {
2548         case DATA_STATE_XMIT:
2549                 /* receive status phase */
2550                 if (prime_status_phase(dev, EP_DIR_OUT))
2551                         ep0_stall(dev);
2552                 break;
2553         case DATA_STATE_RECV:
2554                 /* send status phase */
2555                 if (prime_status_phase(dev, EP_DIR_IN))
2556                         ep0_stall(dev);
2557                 break;
2558         case WAIT_FOR_OUT_STATUS:
2559                 dev->ep0_state = WAIT_FOR_SETUP;
2560                 break;
2561         case WAIT_FOR_SETUP:
2562                 dev_err(&dev->pdev->dev, "unexpect ep0 packets\n");
2563                 break;
2564         default:
2565                 ep0_stall(dev);
2566                 break;
2567         }
2568
2569         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2570 }
2571
2572
2573 /* USB transfer completion interrupt */
2574 static void handle_trans_complete(struct langwell_udc *dev)
2575 {
2576         u32                     complete_bits;
2577         int                     i, ep_num, dir, bit_mask, status;
2578         struct langwell_ep      *epn;
2579         struct langwell_request *curr_req, *temp_req;
2580
2581         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2582
2583         complete_bits = readl(&dev->op_regs->endptcomplete);
2584         dev_vdbg(&dev->pdev->dev, "endptcomplete register: 0x%08x\n",
2585                         complete_bits);
2586
2587         /* Write-Clear the bits in endptcomplete register */
2588         writel(complete_bits, &dev->op_regs->endptcomplete);
2589
2590         if (!complete_bits) {
2591                 dev_dbg(&dev->pdev->dev, "complete_bits = 0\n");
2592                 goto done;
2593         }
2594
2595         for (i = 0; i < dev->ep_max; i++) {
2596                 ep_num = i / 2;
2597                 dir = i % 2;
2598
2599                 bit_mask = 1 << (ep_num + 16 * dir);
2600
2601                 if (!(complete_bits & bit_mask))
2602                         continue;
2603
2604                 /* ep0 */
2605                 if (i == 1)
2606                         epn = &dev->ep[0];
2607                 else
2608                         epn = &dev->ep[i];
2609
2610                 if (epn->name == NULL) {
2611                         dev_warn(&dev->pdev->dev, "invalid endpoint\n");
2612                         continue;
2613                 }
2614
2615                 if (i < 2)
2616                         /* ep0 in and out */
2617                         dev_dbg(&dev->pdev->dev, "%s-%s transfer completed\n",
2618                                         epn->name,
2619                                         is_in(epn) ? "in" : "out");
2620                 else
2621                         dev_dbg(&dev->pdev->dev, "%s transfer completed\n",
2622                                         epn->name);
2623
2624                 /* process the req queue until an uncomplete request */
2625                 list_for_each_entry_safe(curr_req, temp_req,
2626                                 &epn->queue, queue) {
2627                         status = process_ep_req(dev, i, curr_req);
2628                         dev_vdbg(&dev->pdev->dev, "%s req status: %d\n",
2629                                         epn->name, status);
2630
2631                         if (status)
2632                                 break;
2633
2634                         /* write back status to req */
2635                         curr_req->req.status = status;
2636
2637                         /* ep0 request completion */
2638                         if (ep_num == 0) {
2639                                 ep0_req_complete(dev, epn, curr_req);
2640                                 break;
2641                         } else {
2642                                 done(epn, curr_req, status);
2643                         }
2644                 }
2645         }
2646 done:
2647         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2648 }
2649
2650
2651 /* port change detect interrupt handler */
2652 static void handle_port_change(struct langwell_udc *dev)
2653 {
2654         u32     portsc1, devlc;
2655         u32     speed;
2656
2657         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2658
2659         if (dev->bus_reset)
2660                 dev->bus_reset = 0;
2661
2662         portsc1 = readl(&dev->op_regs->portsc1);
2663         devlc = readl(&dev->op_regs->devlc);
2664         dev_vdbg(&dev->pdev->dev, "portsc1 = 0x%08x, devlc = 0x%08x\n",
2665                         portsc1, devlc);
2666
2667         /* bus reset is finished */
2668         if (!(portsc1 & PORTS_PR)) {
2669                 /* get the speed */
2670                 speed = LPM_PSPD(devlc);
2671                 switch (speed) {
2672                 case LPM_SPEED_HIGH:
2673                         dev->gadget.speed = USB_SPEED_HIGH;
2674                         break;
2675                 case LPM_SPEED_FULL:
2676                         dev->gadget.speed = USB_SPEED_FULL;
2677                         break;
2678                 case LPM_SPEED_LOW:
2679                         dev->gadget.speed = USB_SPEED_LOW;
2680                         break;
2681                 default:
2682                         dev->gadget.speed = USB_SPEED_UNKNOWN;
2683                         break;
2684                 }
2685                 dev_vdbg(&dev->pdev->dev,
2686                                 "speed = %d, dev->gadget.speed = %d\n",
2687                                 speed, dev->gadget.speed);
2688         }
2689
2690         /* LPM L0 to L1 */
2691         if (dev->lpm && dev->lpm_state == LPM_L0)
2692                 if (portsc1 & PORTS_SUSP && portsc1 & PORTS_SLP) {
2693                         dev_info(&dev->pdev->dev, "LPM L0 to L1\n");
2694                         dev->lpm_state = LPM_L1;
2695                 }
2696
2697         /* LPM L1 to L0, force resume or remote wakeup finished */
2698         if (dev->lpm && dev->lpm_state == LPM_L1)
2699                 if (!(portsc1 & PORTS_SUSP)) {
2700                         dev_info(&dev->pdev->dev, "LPM L1 to L0\n");
2701                         dev->lpm_state = LPM_L0;
2702                 }
2703
2704         /* update USB state */
2705         if (!dev->resume_state)
2706                 dev->usb_state = USB_STATE_DEFAULT;
2707
2708         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2709 }
2710
2711
2712 /* USB reset interrupt handler */
2713 static void handle_usb_reset(struct langwell_udc *dev)
2714 {
2715         u32             deviceaddr,
2716                         endptsetupstat,
2717                         endptcomplete;
2718         unsigned long   timeout;
2719
2720         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2721
2722         /* Write-Clear the device address */
2723         deviceaddr = readl(&dev->op_regs->deviceaddr);
2724         writel(deviceaddr & ~USBADR_MASK, &dev->op_regs->deviceaddr);
2725
2726         dev->dev_addr = 0;
2727
2728         /* clear usb state */
2729         dev->resume_state = 0;
2730
2731         /* LPM L1 to L0, reset */
2732         if (dev->lpm)
2733                 dev->lpm_state = LPM_L0;
2734
2735         dev->ep0_dir = USB_DIR_OUT;
2736         dev->ep0_state = WAIT_FOR_SETUP;
2737
2738         /* remote wakeup reset to 0 when the device is reset */
2739         dev->remote_wakeup = 0;
2740         dev->dev_status = 1 << USB_DEVICE_SELF_POWERED;
2741         dev->gadget.b_hnp_enable = 0;
2742         dev->gadget.a_hnp_support = 0;
2743         dev->gadget.a_alt_hnp_support = 0;
2744
2745         /* Write-Clear all the setup token semaphores */
2746         endptsetupstat = readl(&dev->op_regs->endptsetupstat);
2747         writel(endptsetupstat, &dev->op_regs->endptsetupstat);
2748
2749         /* Write-Clear all the endpoint complete status bits */
2750         endptcomplete = readl(&dev->op_regs->endptcomplete);
2751         writel(endptcomplete, &dev->op_regs->endptcomplete);
2752
2753         /* wait until all endptprime bits cleared */
2754         timeout = jiffies + PRIME_TIMEOUT;
2755         while (readl(&dev->op_regs->endptprime)) {
2756                 if (time_after(jiffies, timeout)) {
2757                         dev_err(&dev->pdev->dev, "USB reset timeout\n");
2758                         break;
2759                 }
2760                 cpu_relax();
2761         }
2762
2763         /* write 1s to endptflush register to clear any primed buffers */
2764         writel((u32) ~0, &dev->op_regs->endptflush);
2765
2766         if (readl(&dev->op_regs->portsc1) & PORTS_PR) {
2767                 dev_vdbg(&dev->pdev->dev, "USB bus reset\n");
2768                 /* bus is reseting */
2769                 dev->bus_reset = 1;
2770
2771                 /* reset all the queues, stop all USB activities */
2772                 stop_activity(dev, dev->driver);
2773                 dev->usb_state = USB_STATE_DEFAULT;
2774         } else {
2775                 dev_vdbg(&dev->pdev->dev, "device controller reset\n");
2776                 /* controller reset */
2777                 langwell_udc_reset(dev);
2778
2779                 /* reset all the queues, stop all USB activities */
2780                 stop_activity(dev, dev->driver);
2781
2782                 /* reset ep0 dQH and endptctrl */
2783                 ep0_reset(dev);
2784
2785                 /* enable interrupt and set controller to run state */
2786                 langwell_udc_start(dev);
2787
2788                 dev->usb_state = USB_STATE_ATTACHED;
2789         }
2790
2791 #ifdef  OTG_TRANSCEIVER
2792         /* refer to USB OTG 6.6.2.3 b_hnp_en is cleared */
2793         if (!dev->lotg->otg.default_a)
2794                 dev->lotg->hsm.b_hnp_enable = 0;
2795 #endif
2796
2797         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2798 }
2799
2800
2801 /* USB bus suspend/resume interrupt */
2802 static void handle_bus_suspend(struct langwell_udc *dev)
2803 {
2804         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
2805
2806         dev->resume_state = dev->usb_state;
2807         dev->usb_state = USB_STATE_SUSPENDED;
2808
2809 #ifdef  OTG_TRANSCEIVER
2810         if (dev->lotg->otg.default_a) {
2811                 if (dev->lotg->hsm.b_bus_suspend_vld == 1) {
2812                         dev->lotg->hsm.b_bus_suspend = 1;
2813                         /* notify transceiver the state changes */
2814                         if (spin_trylock(&dev->lotg->wq_lock)) {
2815                                 langwell_update_transceiver();
2816                                 spin_unlock(&dev->lotg->wq_lock);
2817                         }
2818                 }
2819                 dev->lotg->hsm.b_bus_suspend_vld++;
2820         } else {
2821                 if (!dev->lotg->hsm.a_bus_suspend) {
2822                         dev->lotg->hsm.a_bus_suspend = 1;
2823                         /* notify transceiver the state changes */
2824                         if (spin_trylock(&dev->lotg->wq_lock)) {
2825                                 langwell_update_transceiver();
2826                                 spin_unlock(&dev->lotg->wq_lock);
2827                         }
2828                 }
2829         }
2830 #endif
2831
2832         /* report suspend to the driver */
2833         if (dev->driver) {
2834                 if (dev->driver->suspend) {
2835                         spin_unlock(&dev->lock);
2836                         dev->driver->suspend(&dev->gadget);
2837                         spin_lock(&dev->lock);
2838                         dev_dbg(&dev->pdev->dev, "suspend %s\n",
2839                                         dev->driver->driver.name);
2840                 }
2841         }
2842
2843         /* enter PHY low power suspend */
2844         if (dev->pdev->device != 0x0829)
2845                 langwell_phy_low_power(dev, 0);
2846
2847         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2848 }
2849
2850
2851 static void handle_bus_resume(struct langwell_udc *dev)
2852 {
2853         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
2854
2855         dev->usb_state = dev->resume_state;
2856         dev->resume_state = 0;
2857
2858         /* exit PHY low power suspend */
2859         if (dev->pdev->device != 0x0829)
2860                 langwell_phy_low_power(dev, 0);
2861
2862 #ifdef  OTG_TRANSCEIVER
2863         if (dev->lotg->otg.default_a == 0)
2864                 dev->lotg->hsm.a_bus_suspend = 0;
2865 #endif
2866
2867         /* report resume to the driver */
2868         if (dev->driver) {
2869                 if (dev->driver->resume) {
2870                         spin_unlock(&dev->lock);
2871                         dev->driver->resume(&dev->gadget);
2872                         spin_lock(&dev->lock);
2873                         dev_dbg(&dev->pdev->dev, "resume %s\n",
2874                                         dev->driver->driver.name);
2875                 }
2876         }
2877
2878         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2879 }
2880
2881
2882 /* USB device controller interrupt handler */
2883 static irqreturn_t langwell_irq(int irq, void *_dev)
2884 {
2885         struct langwell_udc     *dev = _dev;
2886         u32                     usbsts,
2887                                 usbintr,
2888                                 irq_sts,
2889                                 portsc1;
2890
2891         dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2892
2893         if (dev->stopped) {
2894                 dev_vdbg(&dev->pdev->dev, "handle IRQ_NONE\n");
2895                 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2896                 return IRQ_NONE;
2897         }
2898
2899         spin_lock(&dev->lock);
2900
2901         /* USB status */
2902         usbsts = readl(&dev->op_regs->usbsts);
2903
2904         /* USB interrupt enable */
2905         usbintr = readl(&dev->op_regs->usbintr);
2906
2907         irq_sts = usbsts & usbintr;
2908         dev_vdbg(&dev->pdev->dev,
2909                         "usbsts = 0x%08x, usbintr = 0x%08x, irq_sts = 0x%08x\n",
2910                         usbsts, usbintr, irq_sts);
2911
2912         if (!irq_sts) {
2913                 dev_vdbg(&dev->pdev->dev, "handle IRQ_NONE\n");
2914                 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2915                 spin_unlock(&dev->lock);
2916                 return IRQ_NONE;
2917         }
2918
2919         /* Write-Clear interrupt status bits */
2920         writel(irq_sts, &dev->op_regs->usbsts);
2921
2922         /* resume from suspend */
2923         portsc1 = readl(&dev->op_regs->portsc1);
2924         if (dev->usb_state == USB_STATE_SUSPENDED)
2925                 if (!(portsc1 & PORTS_SUSP))
2926                         handle_bus_resume(dev);
2927
2928         /* USB interrupt */
2929         if (irq_sts & STS_UI) {
2930                 dev_vdbg(&dev->pdev->dev, "USB interrupt\n");
2931
2932                 /* setup packet received from ep0 */
2933                 if (readl(&dev->op_regs->endptsetupstat)
2934                                 & EP0SETUPSTAT_MASK) {
2935                         dev_vdbg(&dev->pdev->dev,
2936                                 "USB SETUP packet received interrupt\n");
2937                         /* setup tripwire semaphone */
2938                         setup_tripwire(dev);
2939                         handle_setup_packet(dev, &dev->local_setup_buff);
2940                 }
2941
2942                 /* USB transfer completion */
2943                 if (readl(&dev->op_regs->endptcomplete)) {
2944                         dev_vdbg(&dev->pdev->dev,
2945                                 "USB transfer completion interrupt\n");
2946                         handle_trans_complete(dev);
2947                 }
2948         }
2949
2950         /* SOF received interrupt (for ISO transfer) */
2951         if (irq_sts & STS_SRI) {
2952                 /* FIXME */
2953                 /* dev_vdbg(&dev->pdev->dev, "SOF received interrupt\n"); */
2954         }
2955
2956         /* port change detect interrupt */
2957         if (irq_sts & STS_PCI) {
2958                 dev_vdbg(&dev->pdev->dev, "port change detect interrupt\n");
2959                 handle_port_change(dev);
2960         }
2961
2962         /* suspend interrrupt */
2963         if (irq_sts & STS_SLI) {
2964                 dev_vdbg(&dev->pdev->dev, "suspend interrupt\n");
2965                 handle_bus_suspend(dev);
2966         }
2967
2968         /* USB reset interrupt */
2969         if (irq_sts & STS_URI) {
2970                 dev_vdbg(&dev->pdev->dev, "USB reset interrupt\n");
2971                 handle_usb_reset(dev);
2972         }
2973
2974         /* USB error or system error interrupt */
2975         if (irq_sts & (STS_UEI | STS_SEI)) {
2976                 /* FIXME */
2977                 dev_warn(&dev->pdev->dev, "error IRQ, irq_sts: %x\n", irq_sts);
2978         }
2979
2980         spin_unlock(&dev->lock);
2981
2982         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2983         return IRQ_HANDLED;
2984 }
2985
2986
2987 /*-------------------------------------------------------------------------*/
2988
2989 /* release device structure */
2990 static void gadget_release(struct device *_dev)
2991 {
2992         struct langwell_udc     *dev = the_controller;
2993
2994         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
2995
2996         complete(dev->done);
2997
2998         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2999         kfree(dev);
3000 }
3001
3002
3003 /* enable SRAM caching if SRAM detected */
3004 static void sram_init(struct langwell_udc *dev)
3005 {
3006         struct pci_dev          *pdev = dev->pdev;
3007
3008         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
3009
3010         dev->sram_addr = pci_resource_start(pdev, 1);
3011         dev->sram_size = pci_resource_len(pdev, 1);
3012         dev_info(&dev->pdev->dev, "Found private SRAM at %x size:%x\n",
3013                         dev->sram_addr, dev->sram_size);
3014         dev->got_sram = 1;
3015
3016         if (pci_request_region(pdev, 1, kobject_name(&pdev->dev.kobj))) {
3017                 dev_warn(&dev->pdev->dev, "SRAM request failed\n");
3018                 dev->got_sram = 0;
3019         } else if (!dma_declare_coherent_memory(&pdev->dev, dev->sram_addr,
3020                         dev->sram_addr, dev->sram_size, DMA_MEMORY_MAP)) {
3021                 dev_warn(&dev->pdev->dev, "SRAM DMA declare failed\n");
3022                 pci_release_region(pdev, 1);
3023                 dev->got_sram = 0;
3024         }
3025
3026         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3027 }
3028
3029
3030 /* release SRAM caching */
3031 static void sram_deinit(struct langwell_udc *dev)
3032 {
3033         struct pci_dev *pdev = dev->pdev;
3034
3035         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
3036
3037         dma_release_declared_memory(&pdev->dev);
3038         pci_release_region(pdev, 1);
3039
3040         dev->got_sram = 0;
3041
3042         dev_info(&dev->pdev->dev, "release SRAM caching\n");
3043         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3044 }
3045
3046
3047 /* tear down the binding between this driver and the pci device */
3048 static void langwell_udc_remove(struct pci_dev *pdev)
3049 {
3050         struct langwell_udc     *dev = the_controller;
3051
3052         DECLARE_COMPLETION(done);
3053
3054         BUG_ON(dev->driver);
3055         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
3056
3057         dev->done = &done;
3058
3059 #ifndef OTG_TRANSCEIVER
3060         /* free dTD dma_pool and dQH */
3061         if (dev->dtd_pool)
3062                 dma_pool_destroy(dev->dtd_pool);
3063
3064         if (dev->ep_dqh)
3065                 dma_free_coherent(&pdev->dev, dev->ep_dqh_size,
3066                         dev->ep_dqh, dev->ep_dqh_dma);
3067
3068         /* release SRAM caching */
3069         if (dev->has_sram && dev->got_sram)
3070                 sram_deinit(dev);
3071 #endif
3072
3073         if (dev->status_req) {
3074                 kfree(dev->status_req->req.buf);
3075                 kfree(dev->status_req);
3076         }
3077
3078         kfree(dev->ep);
3079
3080         /* disable IRQ handler */
3081         if (dev->got_irq)
3082                 free_irq(pdev->irq, dev);
3083
3084 #ifndef OTG_TRANSCEIVER
3085         if (dev->cap_regs)
3086                 iounmap(dev->cap_regs);
3087
3088         if (dev->region)
3089                 release_mem_region(pci_resource_start(pdev, 0),
3090                                 pci_resource_len(pdev, 0));
3091
3092         if (dev->enabled)
3093                 pci_disable_device(pdev);
3094 #else
3095         if (dev->transceiver) {
3096                 otg_put_transceiver(dev->transceiver);
3097                 dev->transceiver = NULL;
3098                 dev->lotg = NULL;
3099         }
3100 #endif
3101
3102         dev->cap_regs = NULL;
3103
3104         dev_info(&dev->pdev->dev, "unbind\n");
3105         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3106
3107         device_unregister(&dev->gadget.dev);
3108         device_remove_file(&pdev->dev, &dev_attr_langwell_udc);
3109         device_remove_file(&pdev->dev, &dev_attr_remote_wakeup);
3110
3111 #ifndef OTG_TRANSCEIVER
3112         pci_set_drvdata(pdev, NULL);
3113 #endif
3114
3115         /* free dev, wait for the release() finished */
3116         wait_for_completion(&done);
3117
3118         the_controller = NULL;
3119 }
3120
3121
3122 /*
3123  * wrap this driver around the specified device, but
3124  * don't respond over USB until a gadget driver binds to us.
3125  */
3126 static int langwell_udc_probe(struct pci_dev *pdev,
3127                 const struct pci_device_id *id)
3128 {
3129         struct langwell_udc     *dev;
3130 #ifndef OTG_TRANSCEIVER
3131         unsigned long           resource, len;
3132 #endif
3133         void                    __iomem *base = NULL;
3134         size_t                  size;
3135         int                     retval;
3136
3137         if (the_controller) {
3138                 dev_warn(&pdev->dev, "ignoring\n");
3139                 return -EBUSY;
3140         }
3141
3142         /* alloc, and start init */
3143         dev = kzalloc(sizeof *dev, GFP_KERNEL);
3144         if (dev == NULL) {
3145                 retval = -ENOMEM;
3146                 goto error;
3147         }
3148
3149         /* initialize device spinlock */
3150         spin_lock_init(&dev->lock);
3151
3152         dev->pdev = pdev;
3153         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
3154
3155 #ifdef  OTG_TRANSCEIVER
3156         /* PCI device is already enabled by otg_transceiver driver */
3157         dev->enabled = 1;
3158
3159         /* mem region and register base */
3160         dev->region = 1;
3161         dev->transceiver = otg_get_transceiver();
3162         dev->lotg = otg_to_langwell(dev->transceiver);
3163         base = dev->lotg->regs;
3164 #else
3165         pci_set_drvdata(pdev, dev);
3166
3167         /* now all the pci goodies ... */
3168         if (pci_enable_device(pdev) < 0) {
3169                 retval = -ENODEV;
3170                 goto error;
3171         }
3172         dev->enabled = 1;
3173
3174         /* control register: BAR 0 */
3175         resource = pci_resource_start(pdev, 0);
3176         len = pci_resource_len(pdev, 0);
3177         if (!request_mem_region(resource, len, driver_name)) {
3178                 dev_err(&dev->pdev->dev, "controller already in use\n");
3179                 retval = -EBUSY;
3180                 goto error;
3181         }
3182         dev->region = 1;
3183
3184         base = ioremap_nocache(resource, len);
3185 #endif
3186         if (base == NULL) {
3187                 dev_err(&dev->pdev->dev, "can't map memory\n");
3188                 retval = -EFAULT;
3189                 goto error;
3190         }
3191
3192         dev->cap_regs = (struct langwell_cap_regs __iomem *) base;
3193         dev_vdbg(&dev->pdev->dev, "dev->cap_regs: %p\n", dev->cap_regs);
3194         dev->op_regs = (struct langwell_op_regs __iomem *)
3195                 (base + OP_REG_OFFSET);
3196         dev_vdbg(&dev->pdev->dev, "dev->op_regs: %p\n", dev->op_regs);
3197
3198         /* irq setup after old hardware is cleaned up */
3199         if (!pdev->irq) {
3200                 dev_err(&dev->pdev->dev, "No IRQ. Check PCI setup!\n");
3201                 retval = -ENODEV;
3202                 goto error;
3203         }
3204
3205         dev->has_sram = 1;
3206         dev->got_sram = 0;
3207         dev_vdbg(&dev->pdev->dev, "dev->has_sram: %d\n", dev->has_sram);
3208
3209 #ifndef OTG_TRANSCEIVER
3210         /* enable SRAM caching if detected */
3211         if (dev->has_sram && !dev->got_sram)
3212                 sram_init(dev);
3213
3214         dev_info(&dev->pdev->dev,
3215                         "irq %d, io mem: 0x%08lx, len: 0x%08lx, pci mem 0x%p\n",
3216                         pdev->irq, resource, len, base);
3217         /* enables bus-mastering for device dev */
3218         pci_set_master(pdev);
3219
3220         if (request_irq(pdev->irq, langwell_irq, IRQF_SHARED,
3221                                 driver_name, dev) != 0) {
3222                 dev_err(&dev->pdev->dev,
3223                                 "request interrupt %d failed\n", pdev->irq);
3224                 retval = -EBUSY;
3225                 goto error;
3226         }
3227         dev->got_irq = 1;
3228 #endif
3229
3230         /* set stopped bit */
3231         dev->stopped = 1;
3232
3233         /* capabilities and endpoint number */
3234         dev->lpm = (readl(&dev->cap_regs->hccparams) & HCC_LEN) ? 1 : 0;
3235         dev->dciversion = readw(&dev->cap_regs->dciversion);
3236         dev->devcap = (readl(&dev->cap_regs->dccparams) & DEVCAP) ? 1 : 0;
3237         dev_vdbg(&dev->pdev->dev, "dev->lpm: %d\n", dev->lpm);
3238         dev_vdbg(&dev->pdev->dev, "dev->dciversion: 0x%04x\n",
3239                         dev->dciversion);
3240         dev_vdbg(&dev->pdev->dev, "dccparams: 0x%08x\n",
3241                         readl(&dev->cap_regs->dccparams));
3242         dev_vdbg(&dev->pdev->dev, "dev->devcap: %d\n", dev->devcap);
3243         if (!dev->devcap) {
3244                 dev_err(&dev->pdev->dev, "can't support device mode\n");
3245                 retval = -ENODEV;
3246                 goto error;
3247         }
3248
3249         /* a pair of endpoints (out/in) for each address */
3250         dev->ep_max = DEN(readl(&dev->cap_regs->dccparams)) * 2;
3251         dev_vdbg(&dev->pdev->dev, "dev->ep_max: %d\n", dev->ep_max);
3252
3253         /* allocate endpoints memory */
3254         dev->ep = kzalloc(sizeof(struct langwell_ep) * dev->ep_max,
3255                         GFP_KERNEL);
3256         if (!dev->ep) {
3257                 dev_err(&dev->pdev->dev, "allocate endpoints memory failed\n");
3258                 retval = -ENOMEM;
3259                 goto error;
3260         }
3261
3262         /* allocate device dQH memory */
3263         size = dev->ep_max * sizeof(struct langwell_dqh);
3264         dev_vdbg(&dev->pdev->dev, "orig size = %zd\n", size);
3265         if (size < DQH_ALIGNMENT)
3266                 size = DQH_ALIGNMENT;
3267         else if ((size % DQH_ALIGNMENT) != 0) {
3268                 size += DQH_ALIGNMENT + 1;
3269                 size &= ~(DQH_ALIGNMENT - 1);
3270         }
3271         dev->ep_dqh = dma_alloc_coherent(&pdev->dev, size,
3272                                         &dev->ep_dqh_dma, GFP_KERNEL);
3273         if (!dev->ep_dqh) {
3274                 dev_err(&dev->pdev->dev, "allocate dQH memory failed\n");
3275                 retval = -ENOMEM;
3276                 goto error;
3277         }
3278         dev->ep_dqh_size = size;
3279         dev_vdbg(&dev->pdev->dev, "ep_dqh_size = %zd\n", dev->ep_dqh_size);
3280
3281         /* initialize ep0 status request structure */
3282         dev->status_req = kzalloc(sizeof(struct langwell_request), GFP_KERNEL);
3283         if (!dev->status_req) {
3284                 dev_err(&dev->pdev->dev,
3285                                 "allocate status_req memory failed\n");
3286                 retval = -ENOMEM;
3287                 goto error;
3288         }
3289         INIT_LIST_HEAD(&dev->status_req->queue);
3290
3291         /* allocate a small amount of memory to get valid address */
3292         dev->status_req->req.buf = kmalloc(8, GFP_KERNEL);
3293         dev->status_req->req.dma = virt_to_phys(dev->status_req->req.buf);
3294
3295         dev->resume_state = USB_STATE_NOTATTACHED;
3296         dev->usb_state = USB_STATE_POWERED;
3297         dev->ep0_dir = USB_DIR_OUT;
3298
3299         /* remote wakeup reset to 0 when the device is reset */
3300         dev->remote_wakeup = 0;
3301         dev->dev_status = 1 << USB_DEVICE_SELF_POWERED;
3302
3303 #ifndef OTG_TRANSCEIVER
3304         /* reset device controller */
3305         langwell_udc_reset(dev);
3306 #endif
3307
3308         /* initialize gadget structure */
3309         dev->gadget.ops = &langwell_ops;        /* usb_gadget_ops */
3310         dev->gadget.ep0 = &dev->ep[0].ep;       /* gadget ep0 */
3311         INIT_LIST_HEAD(&dev->gadget.ep_list);   /* ep_list */
3312         dev->gadget.speed = USB_SPEED_UNKNOWN;  /* speed */
3313         dev->gadget.is_dualspeed = 1;           /* support dual speed */
3314 #ifdef  OTG_TRANSCEIVER
3315         dev->gadget.is_otg = 1;                 /* support otg mode */
3316 #endif
3317
3318         /* the "gadget" abstracts/virtualizes the controller */
3319         dev_set_name(&dev->gadget.dev, "gadget");
3320         dev->gadget.dev.parent = &pdev->dev;
3321         dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
3322         dev->gadget.dev.release = gadget_release;
3323         dev->gadget.name = driver_name;         /* gadget name */
3324
3325         /* controller endpoints reinit */
3326         eps_reinit(dev);
3327
3328 #ifndef OTG_TRANSCEIVER
3329         /* reset ep0 dQH and endptctrl */
3330         ep0_reset(dev);
3331 #endif
3332
3333         /* create dTD dma_pool resource */
3334         dev->dtd_pool = dma_pool_create("langwell_dtd",
3335                         &dev->pdev->dev,
3336                         sizeof(struct langwell_dtd),
3337                         DTD_ALIGNMENT,
3338                         DMA_BOUNDARY);
3339
3340         if (!dev->dtd_pool) {
3341                 retval = -ENOMEM;
3342                 goto error;
3343         }
3344
3345         /* done */
3346         dev_info(&dev->pdev->dev, "%s\n", driver_desc);
3347         dev_info(&dev->pdev->dev, "irq %d, pci mem %p\n", pdev->irq, base);
3348         dev_info(&dev->pdev->dev, "Driver version: " DRIVER_VERSION "\n");
3349         dev_info(&dev->pdev->dev, "Support (max) %d endpoints\n", dev->ep_max);
3350         dev_info(&dev->pdev->dev, "Device interface version: 0x%04x\n",
3351                         dev->dciversion);
3352         dev_info(&dev->pdev->dev, "Controller mode: %s\n",
3353                         dev->devcap ? "Device" : "Host");
3354         dev_info(&dev->pdev->dev, "Support USB LPM: %s\n",
3355                         dev->lpm ? "Yes" : "No");
3356
3357         dev_vdbg(&dev->pdev->dev,
3358                         "After langwell_udc_probe(), print all registers:\n");
3359         print_all_registers(dev);
3360
3361         the_controller = dev;
3362
3363         retval = device_register(&dev->gadget.dev);
3364         if (retval)
3365                 goto error;
3366
3367         retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);
3368         if (retval)
3369                 goto error;
3370
3371         retval = device_create_file(&pdev->dev, &dev_attr_langwell_udc);
3372         if (retval)
3373                 goto error;
3374
3375         retval = device_create_file(&pdev->dev, &dev_attr_remote_wakeup);
3376         if (retval)
3377                 goto error_attr1;
3378
3379         dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3380         return 0;
3381
3382 error_attr1:
3383         device_remove_file(&pdev->dev, &dev_attr_langwell_udc);
3384 error:
3385         if (dev) {
3386                 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3387                 langwell_udc_remove(pdev);
3388         }
3389
3390         return retval;
3391 }
3392
3393
3394 /* device controller suspend */
3395 static int langwell_udc_suspend(struct pci_dev *pdev, pm_message_t state)
3396 {
3397         struct langwell_udc     *dev = the_controller;
3398
3399         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
3400
3401         usb_del_gadget_udc(&dev->gadget);
3402         /* disable interrupt and set controller to stop state */
3403         langwell_udc_stop(dev);
3404
3405         /* disable IRQ handler */
3406         if (dev->got_irq)
3407                 free_irq(pdev->irq, dev);
3408         dev->got_irq = 0;
3409
3410         /* save PCI state */
3411         pci_save_state(pdev);
3412
3413         spin_lock_irq(&dev->lock);
3414         /* stop all usb activities */
3415         stop_activity(dev, dev->driver);
3416         spin_unlock_irq(&dev->lock);
3417
3418         /* free dTD dma_pool and dQH */
3419         if (dev->dtd_pool)
3420                 dma_pool_destroy(dev->dtd_pool);
3421
3422         if (dev->ep_dqh)
3423                 dma_free_coherent(&pdev->dev, dev->ep_dqh_size,
3424                         dev->ep_dqh, dev->ep_dqh_dma);
3425
3426         /* release SRAM caching */
3427         if (dev->has_sram && dev->got_sram)
3428                 sram_deinit(dev);
3429
3430         /* set device power state */
3431         pci_set_power_state(pdev, PCI_D3hot);
3432
3433         /* enter PHY low power suspend */
3434         if (dev->pdev->device != 0x0829)
3435                 langwell_phy_low_power(dev, 1);
3436
3437         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3438         return 0;
3439 }
3440
3441
3442 /* device controller resume */
3443 static int langwell_udc_resume(struct pci_dev *pdev)
3444 {
3445         struct langwell_udc     *dev = the_controller;
3446         size_t                  size;
3447
3448         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
3449
3450         /* exit PHY low power suspend */
3451         if (dev->pdev->device != 0x0829)
3452                 langwell_phy_low_power(dev, 0);
3453
3454         /* set device D0 power state */
3455         pci_set_power_state(pdev, PCI_D0);
3456
3457         /* enable SRAM caching if detected */
3458         if (dev->has_sram && !dev->got_sram)
3459                 sram_init(dev);
3460
3461         /* allocate device dQH memory */
3462         size = dev->ep_max * sizeof(struct langwell_dqh);
3463         dev_vdbg(&dev->pdev->dev, "orig size = %zd\n", size);
3464         if (size < DQH_ALIGNMENT)
3465                 size = DQH_ALIGNMENT;
3466         else if ((size % DQH_ALIGNMENT) != 0) {
3467                 size += DQH_ALIGNMENT + 1;
3468                 size &= ~(DQH_ALIGNMENT - 1);
3469         }
3470         dev->ep_dqh = dma_alloc_coherent(&pdev->dev, size,
3471                                         &dev->ep_dqh_dma, GFP_KERNEL);
3472         if (!dev->ep_dqh) {
3473                 dev_err(&dev->pdev->dev, "allocate dQH memory failed\n");
3474                 return -ENOMEM;
3475         }
3476         dev->ep_dqh_size = size;
3477         dev_vdbg(&dev->pdev->dev, "ep_dqh_size = %zd\n", dev->ep_dqh_size);
3478
3479         /* create dTD dma_pool resource */
3480         dev->dtd_pool = dma_pool_create("langwell_dtd",
3481                         &dev->pdev->dev,
3482                         sizeof(struct langwell_dtd),
3483                         DTD_ALIGNMENT,
3484                         DMA_BOUNDARY);
3485
3486         if (!dev->dtd_pool)
3487                 return -ENOMEM;
3488
3489         /* restore PCI state */
3490         pci_restore_state(pdev);
3491
3492         /* enable IRQ handler */
3493         if (request_irq(pdev->irq, langwell_irq, IRQF_SHARED,
3494                                 driver_name, dev) != 0) {
3495                 dev_err(&dev->pdev->dev, "request interrupt %d failed\n",
3496                                 pdev->irq);
3497                 return -EBUSY;
3498         }
3499         dev->got_irq = 1;
3500
3501         /* reset and start controller to run state */
3502         if (dev->stopped) {
3503                 /* reset device controller */
3504                 langwell_udc_reset(dev);
3505
3506                 /* reset ep0 dQH and endptctrl */
3507                 ep0_reset(dev);
3508
3509                 /* start device if gadget is loaded */
3510                 if (dev->driver)
3511                         langwell_udc_start(dev);
3512         }
3513
3514         /* reset USB status */
3515         dev->usb_state = USB_STATE_ATTACHED;
3516         dev->ep0_state = WAIT_FOR_SETUP;
3517         dev->ep0_dir = USB_DIR_OUT;
3518
3519         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3520         return 0;
3521 }
3522
3523
3524 /* pci driver shutdown */
3525 static void langwell_udc_shutdown(struct pci_dev *pdev)
3526 {
3527         struct langwell_udc     *dev = the_controller;
3528         u32                     usbmode;
3529
3530         dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
3531
3532         /* reset controller mode to IDLE */
3533         usbmode = readl(&dev->op_regs->usbmode);
3534         dev_dbg(&dev->pdev->dev, "usbmode = 0x%08x\n", usbmode);
3535         usbmode &= (~3 | MODE_IDLE);
3536         writel(usbmode, &dev->op_regs->usbmode);
3537
3538         dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3539 }
3540
3541 /*-------------------------------------------------------------------------*/
3542
3543 static const struct pci_device_id pci_ids[] = { {
3544         .class =        ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
3545         .class_mask =   ~0,
3546         .vendor =       0x8086,
3547         .device =       0x0811,
3548         .subvendor =    PCI_ANY_ID,
3549         .subdevice =    PCI_ANY_ID,
3550 }, { /* end: all zeroes */ }
3551 };
3552
3553 MODULE_DEVICE_TABLE(pci, pci_ids);
3554
3555
3556 static struct pci_driver langwell_pci_driver = {
3557         .name =         (char *) driver_name,
3558         .id_table =     pci_ids,
3559
3560         .probe =        langwell_udc_probe,
3561         .remove =       langwell_udc_remove,
3562
3563         /* device controller suspend/resume */
3564         .suspend =      langwell_udc_suspend,
3565         .resume =       langwell_udc_resume,
3566
3567         .shutdown =     langwell_udc_shutdown,
3568 };
3569
3570
3571 static int __init init(void)
3572 {
3573 #ifdef  OTG_TRANSCEIVER
3574         return langwell_register_peripheral(&langwell_pci_driver);
3575 #else
3576         return pci_register_driver(&langwell_pci_driver);
3577 #endif
3578 }
3579 module_init(init);
3580
3581
3582 static void __exit cleanup(void)
3583 {
3584 #ifdef  OTG_TRANSCEIVER
3585         return langwell_unregister_peripheral(&langwell_pci_driver);
3586 #else
3587         pci_unregister_driver(&langwell_pci_driver);
3588 #endif
3589 }
3590 module_exit(cleanup);
3591
3592
3593 MODULE_DESCRIPTION(DRIVER_DESC);
3594 MODULE_AUTHOR("Xiaochen Shen <xiaochen.shen@intel.com>");
3595 MODULE_VERSION(DRIVER_VERSION);
3596 MODULE_LICENSE("GPL");
3597