1 // SPDX-License-Identifier: GPL-2.0+
3 * drivers/usb/gadget/dwc2_udc_otg.c
4 * Designware DWC2 on-chip full/high speed USB OTG 2.0 device controllers
6 * Copyright (C) 2008 for Samsung Electronics
8 * BSP Support for Samsung's UDC driver
10 * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git
12 * State machine bugfixes:
13 * Marek Szyprowski <m.szyprowski@samsung.com>
16 * Marek Szyprowski <m.szyprowski@samsung.com>
17 * Lukasz Majewski <l.majewski@samsumg.com>
23 #include <generic-phy.h>
26 #include <dm/device_compat.h>
27 #include <dm/devres.h>
29 #include <linux/errno.h>
30 #include <linux/list.h>
32 #include <linux/usb/ch9.h>
33 #include <linux/usb/otg.h>
34 #include <linux/usb/gadget.h>
37 #include <asm/byteorder.h>
38 #include <asm/unaligned.h>
41 #include <asm/mach-types.h>
43 #include <power/regulator.h>
45 #include "dwc2_udc_otg_regs.h"
46 #include "dwc2_udc_otg_priv.h"
48 /***********************************************************/
50 #define OTG_DMA_MODE 1
55 #define DEBUG_OUT_EP 0
58 #include <usb/dwc2_udc.h>
63 static char *state_names[] = {
66 "DATA_STATE_NEED_ZLP",
67 "WAIT_FOR_OUT_STATUS",
70 "WAIT_FOR_OUT_COMPLETE",
71 "WAIT_FOR_IN_COMPLETE",
72 "WAIT_FOR_NULL_COMPLETE",
75 #define DRIVER_VERSION "15 March 2009"
77 struct dwc2_udc *the_controller;
79 static const char driver_name[] = "dwc2-udc";
80 static const char ep0name[] = "ep0-control";
83 static unsigned int ep0_fifo_size = 64;
84 static unsigned int ep_fifo_size = 512;
85 static unsigned int ep_fifo_size2 = 1024;
86 static int reset_available = 1;
88 static struct usb_ctrlrequest *usb_ctrl;
89 static dma_addr_t usb_ctrl_dma_addr;
94 static int dwc2_ep_enable(struct usb_ep *ep,
95 const struct usb_endpoint_descriptor *);
96 static int dwc2_ep_disable(struct usb_ep *ep);
97 static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,
99 static void dwc2_free_request(struct usb_ep *ep, struct usb_request *);
101 static int dwc2_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags);
102 static int dwc2_dequeue(struct usb_ep *ep, struct usb_request *);
103 static int dwc2_fifo_status(struct usb_ep *ep);
104 static void dwc2_fifo_flush(struct usb_ep *ep);
105 static void dwc2_ep0_read(struct dwc2_udc *dev);
106 static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep);
107 static void dwc2_handle_ep0(struct dwc2_udc *dev);
108 static int dwc2_ep0_write(struct dwc2_udc *dev);
109 static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req);
110 static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status);
111 static void stop_activity(struct dwc2_udc *dev,
112 struct usb_gadget_driver *driver);
113 static int udc_enable(struct dwc2_udc *dev);
114 static void udc_set_address(struct dwc2_udc *dev, unsigned char address);
115 static void reconfig_usbd(struct dwc2_udc *dev);
116 static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed);
117 static void nuke(struct dwc2_ep *ep, int status);
118 static int dwc2_udc_set_halt(struct usb_ep *_ep, int value);
119 static void dwc2_udc_set_nak(struct dwc2_ep *ep);
121 void set_udc_gadget_private_data(void *p)
123 debug_cond(DEBUG_SETUP != 0,
124 "%s: the_controller: 0x%p, p: 0x%p\n", __func__,
126 the_controller->gadget.dev.device_data = p;
129 void *get_udc_gadget_private_data(struct usb_gadget *gadget)
131 return gadget->dev.device_data;
134 static struct usb_ep_ops dwc2_ep_ops = {
135 .enable = dwc2_ep_enable,
136 .disable = dwc2_ep_disable,
138 .alloc_request = dwc2_alloc_request,
139 .free_request = dwc2_free_request,
142 .dequeue = dwc2_dequeue,
144 .set_halt = dwc2_udc_set_halt,
145 .fifo_status = dwc2_fifo_status,
146 .fifo_flush = dwc2_fifo_flush,
149 #define create_proc_files() do {} while (0)
150 #define remove_proc_files() do {} while (0)
152 /***********************************************************/
154 struct dwc2_usbotg_reg *reg;
156 bool dfu_usb_get_reset(void)
158 return !!(readl(®->gintsts) & INT_RESET);
161 __weak void otg_phy_init(struct dwc2_udc *dev) {}
162 __weak void otg_phy_off(struct dwc2_udc *dev) {}
164 /***********************************************************/
166 #include "dwc2_udc_otg_xfer_dma.c"
169 * udc_disable - disable USB device controller
171 static void udc_disable(struct dwc2_udc *dev)
173 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
175 udc_set_address(dev, 0);
177 dev->ep0state = WAIT_FOR_SETUP;
178 dev->gadget.speed = USB_SPEED_UNKNOWN;
179 dev->usb_address = 0;
185 * udc_reinit - initialize software state
187 static void udc_reinit(struct dwc2_udc *dev)
191 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
193 /* device/ep0 records init */
194 INIT_LIST_HEAD(&dev->gadget.ep_list);
195 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
196 dev->ep0state = WAIT_FOR_SETUP;
198 /* basic endpoint records init */
199 for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
200 struct dwc2_ep *ep = &dev->ep[i];
203 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
207 INIT_LIST_HEAD(&ep->queue);
211 /* the rest was statically initialized, and is read-only */
214 #define BYTES2MAXP(x) (x / 8)
215 #define MAXP2BYTES(x) (x * 8)
217 /* until it's enabled, this UDC should be completely invisible
220 static int udc_enable(struct dwc2_udc *dev)
222 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
227 debug_cond(DEBUG_SETUP != 0,
228 "DWC2 USB 2.0 OTG Controller Core Initialized : 0x%x\n",
229 readl(®->gintmsk));
231 dev->gadget.speed = USB_SPEED_UNKNOWN;
236 #if !CONFIG_IS_ENABLED(DM_USB_GADGET)
238 Register entry point for the peripheral controller driver.
240 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
242 struct dwc2_udc *dev = the_controller;
244 unsigned long flags = 0;
246 debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
249 || (driver->speed != USB_SPEED_FULL
250 && driver->speed != USB_SPEED_HIGH)
251 || !driver->bind || !driver->disconnect || !driver->setup)
258 spin_lock_irqsave(&dev->lock, flags);
259 /* first hook up the driver ... */
260 dev->driver = driver;
261 spin_unlock_irqrestore(&dev->lock, flags);
263 if (retval) { /* TODO */
264 printf("target device_add failed, error %d\n", retval);
268 retval = driver->bind(&dev->gadget);
270 debug_cond(DEBUG_SETUP != 0,
271 "%s: bind to driver --> error %d\n",
272 dev->gadget.name, retval);
279 debug_cond(DEBUG_SETUP != 0,
280 "Registered gadget driver %s\n", dev->gadget.name);
287 * Unregister entry point for the peripheral controller driver.
289 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
291 struct dwc2_udc *dev = the_controller;
292 unsigned long flags = 0;
296 if (!driver || driver != dev->driver)
299 spin_lock_irqsave(&dev->lock, flags);
301 stop_activity(dev, driver);
302 spin_unlock_irqrestore(&dev->lock, flags);
304 driver->unbind(&dev->gadget);
306 disable_irq(IRQ_OTG);
311 #else /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
313 static int dwc2_gadget_start(struct usb_gadget *g,
314 struct usb_gadget_driver *driver)
316 struct dwc2_udc *dev = the_controller;
318 debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
321 (driver->speed != USB_SPEED_FULL &&
322 driver->speed != USB_SPEED_HIGH) ||
323 !driver->bind || !driver->disconnect || !driver->setup)
332 /* first hook up the driver ... */
333 dev->driver = driver;
335 debug_cond(DEBUG_SETUP != 0,
336 "Registered gadget driver %s\n", dev->gadget.name);
337 return udc_enable(dev);
340 static int dwc2_gadget_stop(struct usb_gadget *g)
342 struct dwc2_udc *dev = the_controller;
351 stop_activity(dev, dev->driver);
358 #endif /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
361 * done - retire a request; caller blocked irqs
363 static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status)
365 unsigned int stopped = ep->stopped;
367 debug("%s: %s %p, req = %p, stopped = %d\n",
368 __func__, ep->ep.name, ep, &req->req, stopped);
370 list_del_init(&req->queue);
372 if (likely(req->req.status == -EINPROGRESS))
373 req->req.status = status;
375 status = req->req.status;
377 if (status && status != -ESHUTDOWN) {
378 debug("complete %s req %p stat %d len %u/%u\n",
379 ep->ep.name, &req->req, status,
380 req->req.actual, req->req.length);
383 /* don't modify queue heads during completion callback */
387 printf("calling complete callback\n");
389 int i, len = req->req.length;
391 printf("pkt[%d] = ", req->req.length);
394 for (i = 0; i < len; i++) {
395 printf("%02x", ((u8 *)req->req.buf)[i]);
402 spin_unlock(&ep->dev->lock);
403 req->req.complete(&ep->ep, &req->req);
404 spin_lock(&ep->dev->lock);
406 debug("callback completed\n");
408 ep->stopped = stopped;
412 * nuke - dequeue ALL requests
414 static void nuke(struct dwc2_ep *ep, int status)
416 struct dwc2_request *req;
418 debug("%s: %s %p\n", __func__, ep->ep.name, ep);
420 /* called with irqs blocked */
421 while (!list_empty(&ep->queue)) {
422 req = list_entry(ep->queue.next, struct dwc2_request, queue);
423 done(ep, req, status);
427 static void stop_activity(struct dwc2_udc *dev,
428 struct usb_gadget_driver *driver)
432 /* don't disconnect drivers more than once */
433 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
435 dev->gadget.speed = USB_SPEED_UNKNOWN;
437 /* prevent new request submissions, kill any outstanding requests */
438 for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
439 struct dwc2_ep *ep = &dev->ep[i];
441 nuke(ep, -ESHUTDOWN);
444 /* report disconnect; the driver is already quiesced */
446 spin_unlock(&dev->lock);
447 driver->disconnect(&dev->gadget);
448 spin_lock(&dev->lock);
451 /* re-init driver-visible data structures */
455 static void reconfig_usbd(struct dwc2_udc *dev)
457 /* 2. Soft-reset OTG Core and then unreset again. */
459 unsigned int uTemp = writel(CORE_SOFT_RESET, ®->grstctl);
460 uint32_t dflt_gusbcfg;
461 uint32_t rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz;
465 debug("Reseting OTG controller\n");
468 0<<15 /* PHY Low Power Clock sel*/
469 |1<<14 /* Non-Periodic TxFIFO Rewind Enable*/
470 |0x5<<10 /* Turnaround time*/
471 |0<<9 | 0<<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
472 /* 1:SRP enable] H1= 1,1*/
473 |0<<7 /* Ulpi DDR sel*/
474 |0<<6 /* 0: high speed utmi+, 1: full speed serial*/
475 |0<<4 /* 0: utmi+, 1:ulpi*/
476 #ifdef CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8
477 |0<<3 /* phy i/f 0:8bit, 1:16bit*/
479 |1<<3 /* phy i/f 0:8bit, 1:16bit*/
481 |0x7<<0; /* HS/FS Timeout**/
483 if (dev->pdata->usb_gusbcfg)
484 dflt_gusbcfg = dev->pdata->usb_gusbcfg;
486 writel(dflt_gusbcfg, ®->gusbcfg);
488 /* 3. Put the OTG device core in the disconnected state.*/
489 uTemp = readl(®->dctl);
490 uTemp |= SOFT_DISCONNECT;
491 writel(uTemp, ®->dctl);
495 /* 4. Make the OTG device core exit from the disconnected state.*/
496 uTemp = readl(®->dctl);
497 uTemp = uTemp & ~SOFT_DISCONNECT;
498 writel(uTemp, ®->dctl);
500 /* 5. Configure OTG Core to initial settings of device mode.*/
501 /* [][1: full speed(30Mhz) 0:high speed]*/
502 writel(EP_MISS_CNT(1) | DEV_SPEED_HIGH_SPEED_20, ®->dcfg);
506 /* 6. Unmask the core interrupts*/
507 writel(GINTMSK_INIT, ®->gintmsk);
509 /* 7. Set NAK bit of EP0, EP1, EP2*/
510 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[EP0_CON].doepctl);
511 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[EP0_CON].diepctl);
513 for (i = 1; i < DWC2_MAX_ENDPOINTS; i++) {
514 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[i].doepctl);
515 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[i].diepctl);
518 /* 8. Unmask EPO interrupts*/
519 writel(((1 << EP0_CON) << DAINT_OUT_BIT)
520 | (1 << EP0_CON), ®->daintmsk);
522 /* 9. Unmask device OUT EP common interrupts*/
523 writel(DOEPMSK_INIT, ®->doepmsk);
525 /* 10. Unmask device IN EP common interrupts*/
526 writel(DIEPMSK_INIT, ®->diepmsk);
528 rx_fifo_sz = RX_FIFO_SIZE;
529 np_tx_fifo_sz = NPTX_FIFO_SIZE;
530 tx_fifo_sz = PTX_FIFO_SIZE;
532 if (dev->pdata->rx_fifo_sz)
533 rx_fifo_sz = dev->pdata->rx_fifo_sz;
534 if (dev->pdata->np_tx_fifo_sz)
535 np_tx_fifo_sz = dev->pdata->np_tx_fifo_sz;
536 if (dev->pdata->tx_fifo_sz)
537 tx_fifo_sz = dev->pdata->tx_fifo_sz;
539 /* 11. Set Rx FIFO Size (in 32-bit words) */
540 writel(rx_fifo_sz, ®->grxfsiz);
542 /* 12. Set Non Periodic Tx FIFO Size */
543 writel((np_tx_fifo_sz << 16) | rx_fifo_sz,
546 /* retrieve the number of IN Endpoints (excluding ep0) */
547 max_hw_ep = (readl(®->ghwcfg4) & GHWCFG4_NUM_IN_EPS_MASK) >>
548 GHWCFG4_NUM_IN_EPS_SHIFT;
549 pdata_hw_ep = dev->pdata->tx_fifo_sz_nb;
551 /* tx_fifo_sz_nb should equal to number of IN Endpoint */
552 if (pdata_hw_ep && max_hw_ep != pdata_hw_ep)
553 pr_warn("Got %d hw endpoint but %d tx-fifo-size in array !!\n",
554 max_hw_ep, pdata_hw_ep);
556 for (i = 0; i < max_hw_ep; i++) {
558 tx_fifo_sz = dev->pdata->tx_fifo_sz_array[i];
560 writel((rx_fifo_sz + np_tx_fifo_sz + (tx_fifo_sz * i)) |
561 tx_fifo_sz << 16, ®->dieptxf[i]);
563 /* Flush the RX FIFO */
564 writel(RX_FIFO_FLUSH, ®->grstctl);
565 while (readl(®->grstctl) & RX_FIFO_FLUSH)
566 debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__);
568 /* Flush all the Tx FIFO's */
569 writel(TX_FIFO_FLUSH_ALL, ®->grstctl);
570 writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, ®->grstctl);
571 while (readl(®->grstctl) & TX_FIFO_FLUSH)
572 debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__);
574 /* 13. Clear NAK bit of EP0, EP1, EP2*/
576 /* EP0: Control OUT */
577 writel(DEPCTL_EPDIS | DEPCTL_CNAK,
578 ®->out_endp[EP0_CON].doepctl);
580 /* 14. Initialize OTG Link Core.*/
581 writel(GAHBCFG_INIT, ®->gahbcfg);
584 static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed)
586 unsigned int ep_ctrl;
589 if (speed == USB_SPEED_HIGH) {
592 ep_fifo_size2 = 1024;
593 dev->gadget.speed = USB_SPEED_HIGH;
598 dev->gadget.speed = USB_SPEED_FULL;
601 dev->ep[0].ep.maxpacket = ep0_fifo_size;
602 for (i = 1; i < DWC2_MAX_ENDPOINTS; i++)
603 dev->ep[i].ep.maxpacket = ep_fifo_size;
605 /* EP0 - Control IN (64 bytes)*/
606 ep_ctrl = readl(®->in_endp[EP0_CON].diepctl);
607 writel(ep_ctrl|(0<<0), ®->in_endp[EP0_CON].diepctl);
609 /* EP0 - Control OUT (64 bytes)*/
610 ep_ctrl = readl(®->out_endp[EP0_CON].doepctl);
611 writel(ep_ctrl|(0<<0), ®->out_endp[EP0_CON].doepctl);
614 static int dwc2_ep_enable(struct usb_ep *_ep,
615 const struct usb_endpoint_descriptor *desc)
618 struct dwc2_udc *dev;
619 unsigned long flags = 0;
621 debug("%s: %p\n", __func__, _ep);
623 ep = container_of(_ep, struct dwc2_ep, ep);
624 if (!_ep || !desc || ep->desc || _ep->name == ep0name
625 || desc->bDescriptorType != USB_DT_ENDPOINT
626 || ep->bEndpointAddress != desc->bEndpointAddress
627 || ep_maxpacket(ep) <
628 le16_to_cpu(get_unaligned(&desc->wMaxPacketSize))) {
630 debug("%s: bad ep or descriptor\n", __func__);
634 /* xfer types must match, except that interrupt ~= bulk */
635 if (ep->bmAttributes != desc->bmAttributes
636 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
637 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
639 debug("%s: %s type mismatch\n", __func__, _ep->name);
643 /* hardware _could_ do smaller, but driver doesn't */
644 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK &&
645 le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) >
646 ep_maxpacket(ep)) || !get_unaligned(&desc->wMaxPacketSize)) {
648 debug("%s: bad %s maxpacket\n", __func__, _ep->name);
653 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
655 debug("%s: bogus device state\n", __func__);
662 ep->ep.maxpacket = le16_to_cpu(get_unaligned(&desc->wMaxPacketSize));
664 /* Reset halt state */
665 dwc2_udc_set_nak(ep);
666 dwc2_udc_set_halt(_ep, 0);
668 spin_lock_irqsave(&ep->dev->lock, flags);
669 dwc2_udc_ep_activate(ep);
670 spin_unlock_irqrestore(&ep->dev->lock, flags);
672 debug("%s: enabled %s, stopped = %d, maxpacket = %d\n",
673 __func__, _ep->name, ep->stopped, ep->ep.maxpacket);
680 static int dwc2_ep_disable(struct usb_ep *_ep)
683 unsigned long flags = 0;
685 debug("%s: %p\n", __func__, _ep);
687 ep = container_of(_ep, struct dwc2_ep, ep);
688 if (!_ep || !ep->desc) {
689 debug("%s: %s not enabled\n", __func__,
690 _ep ? ep->ep.name : NULL);
694 spin_lock_irqsave(&ep->dev->lock, flags);
696 /* Nuke all pending requests */
697 nuke(ep, -ESHUTDOWN);
702 spin_unlock_irqrestore(&ep->dev->lock, flags);
704 debug("%s: disabled %s\n", __func__, _ep->name);
708 static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,
711 struct dwc2_request *req;
713 debug("%s: %s %p\n", __func__, ep->name, ep);
715 req = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*req));
719 memset(req, 0, sizeof *req);
720 INIT_LIST_HEAD(&req->queue);
725 static void dwc2_free_request(struct usb_ep *ep, struct usb_request *_req)
727 struct dwc2_request *req;
729 debug("%s: %p\n", __func__, ep);
731 req = container_of(_req, struct dwc2_request, req);
732 WARN_ON(!list_empty(&req->queue));
736 /* dequeue JUST ONE request */
737 static int dwc2_dequeue(struct usb_ep *_ep, struct usb_request *_req)
740 struct dwc2_request *req;
741 unsigned long flags = 0;
743 debug("%s: %p\n", __func__, _ep);
745 ep = container_of(_ep, struct dwc2_ep, ep);
746 if (!_ep || ep->ep.name == ep0name)
749 spin_lock_irqsave(&ep->dev->lock, flags);
751 /* make sure it's actually queued on this endpoint */
752 list_for_each_entry(req, &ep->queue, queue) {
753 if (&req->req == _req)
756 if (&req->req != _req) {
757 spin_unlock_irqrestore(&ep->dev->lock, flags);
761 done(ep, req, -ECONNRESET);
763 spin_unlock_irqrestore(&ep->dev->lock, flags);
768 * Return bytes in EP FIFO
770 static int dwc2_fifo_status(struct usb_ep *_ep)
775 ep = container_of(_ep, struct dwc2_ep, ep);
777 debug("%s: bad ep\n", __func__);
781 debug("%s: %d\n", __func__, ep_index(ep));
783 /* LPD can't report unclaimed bytes from IN fifos */
793 static void dwc2_fifo_flush(struct usb_ep *_ep)
797 ep = container_of(_ep, struct dwc2_ep, ep);
798 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
799 debug("%s: bad ep\n", __func__);
803 debug("%s: %d\n", __func__, ep_index(ep));
806 static const struct usb_gadget_ops dwc2_udc_ops = {
807 /* current versions must always be self-powered */
808 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
809 .udc_start = dwc2_gadget_start,
810 .udc_stop = dwc2_gadget_stop,
814 static struct dwc2_udc memory = {
817 .ops = &dwc2_udc_ops,
818 .ep0 = &memory.ep[0].ep,
822 /* control endpoint */
827 .maxpacket = EP0_FIFO_SIZE,
831 .bEndpointAddress = 0,
834 .ep_type = ep_control,
837 /* first group of endpoints */
840 .name = "ep1in-bulk",
842 .maxpacket = EP_FIFO_SIZE,
846 .bEndpointAddress = USB_DIR_IN | 1,
847 .bmAttributes = USB_ENDPOINT_XFER_BULK,
849 .ep_type = ep_bulk_out,
855 .name = "ep2out-bulk",
857 .maxpacket = EP_FIFO_SIZE,
861 .bEndpointAddress = USB_DIR_OUT | 2,
862 .bmAttributes = USB_ENDPOINT_XFER_BULK,
864 .ep_type = ep_bulk_in,
872 .maxpacket = EP_FIFO_SIZE,
876 .bEndpointAddress = USB_DIR_IN | 3,
877 .bmAttributes = USB_ENDPOINT_XFER_INT,
879 .ep_type = ep_interrupt,
885 * probe - binds to the platform device
888 int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata)
890 struct dwc2_udc *dev = &memory;
893 debug("%s: %p\n", __func__, pdata);
897 reg = (struct dwc2_usbotg_reg *)pdata->regs_otg;
899 dev->gadget.is_dualspeed = 1; /* Hack only*/
900 dev->gadget.is_otg = 0;
901 dev->gadget.is_a_peripheral = 0;
902 dev->gadget.b_hnp_enable = 0;
903 dev->gadget.a_hnp_support = 0;
904 dev->gadget.a_alt_hnp_support = 0;
906 the_controller = dev;
908 usb_ctrl = memalign(CONFIG_SYS_CACHELINE_SIZE,
909 ROUND(sizeof(struct usb_ctrlrequest),
910 CONFIG_SYS_CACHELINE_SIZE));
912 pr_err("No memory available for UDC!\n");
916 usb_ctrl_dma_addr = (dma_addr_t) usb_ctrl;
923 int dwc2_udc_handle_interrupt(void)
925 u32 intr_status = readl(®->gintsts);
926 u32 gintmsk = readl(®->gintmsk);
928 if (intr_status & gintmsk)
929 return dwc2_udc_irq(1, (void *)the_controller);
934 #if !CONFIG_IS_ENABLED(DM_USB_GADGET)
936 int usb_gadget_handle_interrupts(int index)
938 return dwc2_udc_handle_interrupt();
941 #else /* CONFIG_IS_ENABLED(DM_USB_GADGET) */
943 struct dwc2_priv_data {
944 struct clk_bulk clks;
945 struct reset_ctl_bulk resets;
948 struct udevice *usb33d_supply;
951 int dm_usb_gadget_handle_interrupts(struct udevice *dev)
953 return dwc2_udc_handle_interrupt();
956 int dwc2_phy_setup(struct udevice *dev, struct phy **array, int *num_phys)
959 struct phy *usb_phys;
961 /* Return if no phy declared */
962 if (!dev_read_prop(dev, "phys", NULL))
965 count = dev_count_phandle_with_args(dev, "phys", "#phy-cells");
969 usb_phys = devm_kcalloc(dev, count, sizeof(struct phy),
974 for (i = 0; i < count; i++) {
975 ret = generic_phy_get_by_index(dev, i, &usb_phys[i]);
976 if (ret && ret != -ENOENT) {
977 dev_err(dev, "Failed to get USB PHY%d for %s\n",
983 for (i = 0; i < count; i++) {
984 ret = generic_phy_init(&usb_phys[i]);
986 dev_err(dev, "Can't init USB PHY%d for %s\n",
992 for (i = 0; i < count; i++) {
993 ret = generic_phy_power_on(&usb_phys[i]);
995 dev_err(dev, "Can't power USB PHY%d for %s\n",
997 goto phys_poweron_err;
1007 for (i = count - 1; i >= 0; i--)
1008 generic_phy_power_off(&usb_phys[i]);
1010 for (i = 0; i < count; i++)
1011 generic_phy_exit(&usb_phys[i]);
1017 generic_phy_exit(&usb_phys[i]);
1022 void dwc2_phy_shutdown(struct udevice *dev, struct phy *usb_phys, int num_phys)
1026 for (i = 0; i < num_phys; i++) {
1027 if (!generic_phy_valid(&usb_phys[i]))
1030 ret = generic_phy_power_off(&usb_phys[i]);
1031 ret |= generic_phy_exit(&usb_phys[i]);
1033 dev_err(dev, "Can't shutdown USB PHY%d for %s\n",
1039 static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
1041 struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
1043 void (*set_params)(struct dwc2_plat_otg_data *data);
1046 if (usb_get_dr_mode(dev->node) != USB_DR_MODE_PERIPHERAL &&
1047 usb_get_dr_mode(dev->node) != USB_DR_MODE_OTG) {
1048 dev_dbg(dev, "Invalid mode\n");
1052 platdata->regs_otg = dev_read_addr(dev);
1054 platdata->rx_fifo_sz = dev_read_u32_default(dev, "g-rx-fifo-size", 0);
1055 platdata->np_tx_fifo_sz = dev_read_u32_default(dev,
1056 "g-np-tx-fifo-size", 0);
1058 platdata->tx_fifo_sz_nb =
1059 dev_read_size(dev, "g-tx-fifo-size") / sizeof(u32);
1060 if (platdata->tx_fifo_sz_nb > DWC2_MAX_HW_ENDPOINTS)
1061 platdata->tx_fifo_sz_nb = DWC2_MAX_HW_ENDPOINTS;
1062 if (platdata->tx_fifo_sz_nb) {
1063 ret = dev_read_u32_array(dev, "g-tx-fifo-size",
1064 platdata->tx_fifo_sz_array,
1065 platdata->tx_fifo_sz_nb);
1070 platdata->force_b_session_valid =
1071 dev_read_bool(dev, "u-boot,force-b-session-valid");
1073 /* force platdata according compatible */
1074 drvdata = dev_get_driver_data(dev);
1076 set_params = (void *)drvdata;
1077 set_params(platdata);
1083 static void dwc2_set_stm32mp1_hsotg_params(struct dwc2_plat_otg_data *p)
1085 p->activate_stm_id_vb_detection = true;
1087 0 << 15 /* PHY Low Power Clock sel*/
1088 | 0x9 << 10 /* USB Turnaround time (0x9 for HS phy) */
1089 | 0 << 9 /* [0:HNP disable,1:HNP enable]*/
1090 | 0 << 8 /* [0:SRP disable 1:SRP enable]*/
1091 | 0 << 6 /* 0: high speed utmi+, 1: full speed serial*/
1092 | 0x7 << 0; /* FS timeout calibration**/
1094 if (p->force_b_session_valid)
1095 p->usb_gusbcfg |= 1 << 30; /* FDMOD: Force device mode */
1098 static int dwc2_udc_otg_reset_init(struct udevice *dev,
1099 struct reset_ctl_bulk *resets)
1103 ret = reset_get_bulk(dev, resets);
1104 if (ret == -ENOTSUPP)
1110 ret = reset_assert_bulk(resets);
1114 ret = reset_deassert_bulk(resets);
1117 reset_release_bulk(resets);
1124 static int dwc2_udc_otg_clk_init(struct udevice *dev,
1125 struct clk_bulk *clks)
1129 ret = clk_get_bulk(dev, clks);
1136 ret = clk_enable_bulk(clks);
1138 clk_release_bulk(clks);
1145 static int dwc2_udc_otg_probe(struct udevice *dev)
1147 struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
1148 struct dwc2_priv_data *priv = dev_get_priv(dev);
1149 struct dwc2_usbotg_reg *usbotg_reg =
1150 (struct dwc2_usbotg_reg *)platdata->regs_otg;
1153 ret = dwc2_udc_otg_clk_init(dev, &priv->clks);
1157 ret = dwc2_udc_otg_reset_init(dev, &priv->resets);
1161 ret = dwc2_phy_setup(dev, &priv->phys, &priv->num_phys);
1165 if (CONFIG_IS_ENABLED(DM_REGULATOR) &&
1166 platdata->activate_stm_id_vb_detection &&
1167 !platdata->force_b_session_valid) {
1168 ret = device_get_supply_regulator(dev, "usb33d-supply",
1169 &priv->usb33d_supply);
1171 dev_err(dev, "can't get voltage level detector supply\n");
1174 ret = regulator_set_enable(priv->usb33d_supply, true);
1176 dev_err(dev, "can't enable voltage level detector supply\n");
1179 /* Enable vbus sensing */
1180 setbits_le32(&usbotg_reg->ggpio,
1181 GGPIO_STM32_OTG_GCCFG_VBDEN |
1182 GGPIO_STM32_OTG_GCCFG_IDEN);
1185 if (platdata->force_b_session_valid)
1186 /* Override B session bits : value and enable */
1187 setbits_le32(&usbotg_reg->gotgctl,
1188 A_VALOEN | A_VALOVAL | B_VALOEN | B_VALOVAL);
1190 ret = dwc2_udc_probe(platdata);
1194 the_controller->driver = 0;
1196 ret = usb_add_gadget_udc((struct device *)dev, &the_controller->gadget);
1201 static int dwc2_udc_otg_remove(struct udevice *dev)
1203 struct dwc2_priv_data *priv = dev_get_priv(dev);
1205 usb_del_gadget_udc(&the_controller->gadget);
1207 reset_release_bulk(&priv->resets);
1209 clk_release_bulk(&priv->clks);
1211 dwc2_phy_shutdown(dev, priv->phys, priv->num_phys);
1213 return dm_scan_fdt_dev(dev);
1216 static const struct udevice_id dwc2_udc_otg_ids[] = {
1217 { .compatible = "snps,dwc2" },
1218 { .compatible = "brcm,bcm2835-usb" },
1219 { .compatible = "st,stm32mp1-hsotg",
1220 .data = (ulong)dwc2_set_stm32mp1_hsotg_params },
1224 U_BOOT_DRIVER(dwc2_udc_otg) = {
1225 .name = "dwc2-udc-otg",
1226 .id = UCLASS_USB_GADGET_GENERIC,
1227 .of_match = dwc2_udc_otg_ids,
1228 .ofdata_to_platdata = dwc2_udc_otg_ofdata_to_platdata,
1229 .probe = dwc2_udc_otg_probe,
1230 .remove = dwc2_udc_otg_remove,
1231 .platdata_auto_alloc_size = sizeof(struct dwc2_plat_otg_data),
1232 .priv_auto_alloc_size = sizeof(struct dwc2_priv_data),
1235 int dwc2_udc_B_session_valid(struct udevice *dev)
1237 struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
1238 struct dwc2_usbotg_reg *usbotg_reg =
1239 (struct dwc2_usbotg_reg *)platdata->regs_otg;
1241 return readl(&usbotg_reg->gotgctl) & B_SESSION_VALID;
1243 #endif /* CONFIG_IS_ENABLED(DM_USB_GADGET) */