1 // SPDX-License-Identifier: GPL-2.0+
3 * drivers/usb/gadget/dwc2_udc_otg.c
4 * Designware DWC2 on-chip full/high speed USB OTG 2.0 device controllers
6 * Copyright (C) 2008 for Samsung Electronics
8 * BSP Support for Samsung's UDC driver
10 * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git
12 * State machine bugfixes:
13 * Marek Szyprowski <m.szyprowski@samsung.com>
16 * Marek Szyprowski <m.szyprowski@samsung.com>
17 * Lukasz Majewski <l.majewski@samsumg.com>
23 #include <generic-phy.h>
27 #include <dm/device_compat.h>
28 #include <dm/devres.h>
29 #include <linux/bug.h>
30 #include <linux/delay.h>
32 #include <linux/errno.h>
33 #include <linux/list.h>
35 #include <linux/usb/ch9.h>
36 #include <linux/usb/otg.h>
37 #include <linux/usb/gadget.h>
40 #include <asm/byteorder.h>
41 #include <asm/unaligned.h>
44 #include <asm/mach-types.h>
46 #include <power/regulator.h>
48 #include "dwc2_udc_otg_regs.h"
49 #include "dwc2_udc_otg_priv.h"
51 /***********************************************************/
53 #define OTG_DMA_MODE 1
58 #define DEBUG_OUT_EP 0
61 #include <usb/dwc2_udc.h>
66 static char *state_names[] = {
69 "DATA_STATE_NEED_ZLP",
70 "WAIT_FOR_OUT_STATUS",
73 "WAIT_FOR_OUT_COMPLETE",
74 "WAIT_FOR_IN_COMPLETE",
75 "WAIT_FOR_NULL_COMPLETE",
78 #define DRIVER_VERSION "15 March 2009"
80 struct dwc2_udc *the_controller;
82 static const char driver_name[] = "dwc2-udc";
83 static const char ep0name[] = "ep0-control";
86 static unsigned int ep0_fifo_size = 64;
87 static unsigned int ep_fifo_size = 512;
88 static unsigned int ep_fifo_size2 = 1024;
89 static int reset_available = 1;
91 static struct usb_ctrlrequest *usb_ctrl;
92 static dma_addr_t usb_ctrl_dma_addr;
97 static int dwc2_ep_enable(struct usb_ep *ep,
98 const struct usb_endpoint_descriptor *);
99 static int dwc2_ep_disable(struct usb_ep *ep);
100 static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,
102 static void dwc2_free_request(struct usb_ep *ep, struct usb_request *);
104 static int dwc2_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags);
105 static int dwc2_dequeue(struct usb_ep *ep, struct usb_request *);
106 static int dwc2_fifo_status(struct usb_ep *ep);
107 static void dwc2_fifo_flush(struct usb_ep *ep);
108 static void dwc2_ep0_read(struct dwc2_udc *dev);
109 static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep);
110 static void dwc2_handle_ep0(struct dwc2_udc *dev);
111 static int dwc2_ep0_write(struct dwc2_udc *dev);
112 static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req);
113 static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status);
114 static void stop_activity(struct dwc2_udc *dev,
115 struct usb_gadget_driver *driver);
116 static int udc_enable(struct dwc2_udc *dev);
117 static void udc_set_address(struct dwc2_udc *dev, unsigned char address);
118 static void reconfig_usbd(struct dwc2_udc *dev);
119 static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed);
120 static void nuke(struct dwc2_ep *ep, int status);
121 static int dwc2_udc_set_halt(struct usb_ep *_ep, int value);
122 static void dwc2_udc_set_nak(struct dwc2_ep *ep);
124 void set_udc_gadget_private_data(void *p)
126 debug_cond(DEBUG_SETUP != 0,
127 "%s: the_controller: 0x%p, p: 0x%p\n", __func__,
129 the_controller->gadget.dev.device_data = p;
132 void *get_udc_gadget_private_data(struct usb_gadget *gadget)
134 return gadget->dev.device_data;
137 static struct usb_ep_ops dwc2_ep_ops = {
138 .enable = dwc2_ep_enable,
139 .disable = dwc2_ep_disable,
141 .alloc_request = dwc2_alloc_request,
142 .free_request = dwc2_free_request,
145 .dequeue = dwc2_dequeue,
147 .set_halt = dwc2_udc_set_halt,
148 .fifo_status = dwc2_fifo_status,
149 .fifo_flush = dwc2_fifo_flush,
152 #define create_proc_files() do {} while (0)
153 #define remove_proc_files() do {} while (0)
155 /***********************************************************/
157 struct dwc2_usbotg_reg *reg;
159 bool dfu_usb_get_reset(void)
161 return !!(readl(®->gintsts) & INT_RESET);
164 __weak void otg_phy_init(struct dwc2_udc *dev) {}
165 __weak void otg_phy_off(struct dwc2_udc *dev) {}
167 /***********************************************************/
169 #include "dwc2_udc_otg_xfer_dma.c"
172 * udc_disable - disable USB device controller
174 static void udc_disable(struct dwc2_udc *dev)
176 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
178 udc_set_address(dev, 0);
180 dev->ep0state = WAIT_FOR_SETUP;
181 dev->gadget.speed = USB_SPEED_UNKNOWN;
182 dev->usb_address = 0;
188 * udc_reinit - initialize software state
190 static void udc_reinit(struct dwc2_udc *dev)
194 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
196 /* device/ep0 records init */
197 INIT_LIST_HEAD(&dev->gadget.ep_list);
198 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
199 dev->ep0state = WAIT_FOR_SETUP;
201 /* basic endpoint records init */
202 for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
203 struct dwc2_ep *ep = &dev->ep[i];
206 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
210 INIT_LIST_HEAD(&ep->queue);
214 /* the rest was statically initialized, and is read-only */
217 #define BYTES2MAXP(x) (x / 8)
218 #define MAXP2BYTES(x) (x * 8)
220 /* until it's enabled, this UDC should be completely invisible
223 static int udc_enable(struct dwc2_udc *dev)
225 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
230 debug_cond(DEBUG_SETUP != 0,
231 "DWC2 USB 2.0 OTG Controller Core Initialized : 0x%x\n",
232 readl(®->gintmsk));
234 dev->gadget.speed = USB_SPEED_UNKNOWN;
239 #if !CONFIG_IS_ENABLED(DM_USB_GADGET)
241 Register entry point for the peripheral controller driver.
243 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
245 struct dwc2_udc *dev = the_controller;
247 unsigned long flags = 0;
249 debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
251 if (!driver || driver->speed < USB_SPEED_FULL
252 || !driver->bind || !driver->disconnect || !driver->setup)
259 spin_lock_irqsave(&dev->lock, flags);
260 /* first hook up the driver ... */
261 dev->driver = driver;
262 spin_unlock_irqrestore(&dev->lock, flags);
264 if (retval) { /* TODO */
265 printf("target device_add failed, error %d\n", retval);
269 retval = driver->bind(&dev->gadget);
271 debug_cond(DEBUG_SETUP != 0,
272 "%s: bind to driver --> error %d\n",
273 dev->gadget.name, retval);
280 debug_cond(DEBUG_SETUP != 0,
281 "Registered gadget driver %s\n", dev->gadget.name);
288 * Unregister entry point for the peripheral controller driver.
290 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
292 struct dwc2_udc *dev = the_controller;
293 unsigned long flags = 0;
297 if (!driver || driver != dev->driver)
300 spin_lock_irqsave(&dev->lock, flags);
302 stop_activity(dev, driver);
303 spin_unlock_irqrestore(&dev->lock, flags);
305 driver->unbind(&dev->gadget);
307 disable_irq(IRQ_OTG);
312 #else /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
314 static int dwc2_gadget_start(struct usb_gadget *g,
315 struct usb_gadget_driver *driver)
317 struct dwc2_udc *dev = the_controller;
319 debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
321 if (!driver || driver->speed < USB_SPEED_FULL ||
322 !driver->bind || !driver->disconnect || !driver->setup)
331 /* first hook up the driver ... */
332 dev->driver = driver;
334 debug_cond(DEBUG_SETUP != 0,
335 "Registered gadget driver %s\n", dev->gadget.name);
336 return udc_enable(dev);
339 static int dwc2_gadget_stop(struct usb_gadget *g)
341 struct dwc2_udc *dev = the_controller;
350 stop_activity(dev, dev->driver);
357 #endif /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
360 * done - retire a request; caller blocked irqs
362 static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status)
364 unsigned int stopped = ep->stopped;
366 debug("%s: %s %p, req = %p, stopped = %d\n",
367 __func__, ep->ep.name, ep, &req->req, stopped);
369 list_del_init(&req->queue);
371 if (likely(req->req.status == -EINPROGRESS))
372 req->req.status = status;
374 status = req->req.status;
376 if (status && status != -ESHUTDOWN) {
377 debug("complete %s req %p stat %d len %u/%u\n",
378 ep->ep.name, &req->req, status,
379 req->req.actual, req->req.length);
382 /* don't modify queue heads during completion callback */
386 printf("calling complete callback\n");
388 int i, len = req->req.length;
390 printf("pkt[%d] = ", req->req.length);
393 for (i = 0; i < len; i++) {
394 printf("%02x", ((u8 *)req->req.buf)[i]);
401 spin_unlock(&ep->dev->lock);
402 req->req.complete(&ep->ep, &req->req);
403 spin_lock(&ep->dev->lock);
405 debug("callback completed\n");
407 ep->stopped = stopped;
411 * nuke - dequeue ALL requests
413 static void nuke(struct dwc2_ep *ep, int status)
415 struct dwc2_request *req;
417 debug("%s: %s %p\n", __func__, ep->ep.name, ep);
419 /* called with irqs blocked */
420 while (!list_empty(&ep->queue)) {
421 req = list_entry(ep->queue.next, struct dwc2_request, queue);
422 done(ep, req, status);
426 static void stop_activity(struct dwc2_udc *dev,
427 struct usb_gadget_driver *driver)
431 /* don't disconnect drivers more than once */
432 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
434 dev->gadget.speed = USB_SPEED_UNKNOWN;
436 /* prevent new request submissions, kill any outstanding requests */
437 for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
438 struct dwc2_ep *ep = &dev->ep[i];
440 nuke(ep, -ESHUTDOWN);
443 /* report disconnect; the driver is already quiesced */
445 spin_unlock(&dev->lock);
446 driver->disconnect(&dev->gadget);
447 spin_lock(&dev->lock);
450 /* re-init driver-visible data structures */
454 static void reconfig_usbd(struct dwc2_udc *dev)
456 /* 2. Soft-reset OTG Core and then unreset again. */
458 unsigned int uTemp = writel(CORE_SOFT_RESET, ®->grstctl);
459 uint32_t dflt_gusbcfg;
460 uint32_t rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz;
464 debug("Reseting OTG controller\n");
467 0<<15 /* PHY Low Power Clock sel*/
468 |1<<14 /* Non-Periodic TxFIFO Rewind Enable*/
469 |0x5<<10 /* Turnaround time*/
470 |0<<9 | 0<<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
471 /* 1:SRP enable] H1= 1,1*/
472 |0<<7 /* Ulpi DDR sel*/
473 |0<<6 /* 0: high speed utmi+, 1: full speed serial*/
474 |0<<4 /* 0: utmi+, 1:ulpi*/
475 #ifdef CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8
476 |0<<3 /* phy i/f 0:8bit, 1:16bit*/
478 |1<<3 /* phy i/f 0:8bit, 1:16bit*/
480 |0x7<<0; /* HS/FS Timeout**/
482 if (dev->pdata->usb_gusbcfg)
483 dflt_gusbcfg = dev->pdata->usb_gusbcfg;
485 writel(dflt_gusbcfg, ®->gusbcfg);
487 /* 3. Put the OTG device core in the disconnected state.*/
488 uTemp = readl(®->dctl);
489 uTemp |= SOFT_DISCONNECT;
490 writel(uTemp, ®->dctl);
494 /* 4. Make the OTG device core exit from the disconnected state.*/
495 uTemp = readl(®->dctl);
496 uTemp = uTemp & ~SOFT_DISCONNECT;
497 writel(uTemp, ®->dctl);
499 /* 5. Configure OTG Core to initial settings of device mode.*/
500 /* [][1: full speed(30Mhz) 0:high speed]*/
501 writel(EP_MISS_CNT(1) | DEV_SPEED_HIGH_SPEED_20, ®->dcfg);
505 /* 6. Unmask the core interrupts*/
506 writel(GINTMSK_INIT, ®->gintmsk);
508 /* 7. Set NAK bit of EP0, EP1, EP2*/
509 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[EP0_CON].doepctl);
510 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[EP0_CON].diepctl);
512 for (i = 1; i < DWC2_MAX_ENDPOINTS; i++) {
513 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[i].doepctl);
514 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[i].diepctl);
517 /* 8. Unmask EPO interrupts*/
518 writel(((1 << EP0_CON) << DAINT_OUT_BIT)
519 | (1 << EP0_CON), ®->daintmsk);
521 /* 9. Unmask device OUT EP common interrupts*/
522 writel(DOEPMSK_INIT, ®->doepmsk);
524 /* 10. Unmask device IN EP common interrupts*/
525 writel(DIEPMSK_INIT, ®->diepmsk);
527 rx_fifo_sz = RX_FIFO_SIZE;
528 np_tx_fifo_sz = NPTX_FIFO_SIZE;
529 tx_fifo_sz = PTX_FIFO_SIZE;
531 if (dev->pdata->rx_fifo_sz)
532 rx_fifo_sz = dev->pdata->rx_fifo_sz;
533 if (dev->pdata->np_tx_fifo_sz)
534 np_tx_fifo_sz = dev->pdata->np_tx_fifo_sz;
535 if (dev->pdata->tx_fifo_sz)
536 tx_fifo_sz = dev->pdata->tx_fifo_sz;
538 /* 11. Set Rx FIFO Size (in 32-bit words) */
539 writel(rx_fifo_sz, ®->grxfsiz);
541 /* 12. Set Non Periodic Tx FIFO Size */
542 writel((np_tx_fifo_sz << 16) | rx_fifo_sz,
545 /* retrieve the number of IN Endpoints (excluding ep0) */
546 max_hw_ep = (readl(®->ghwcfg4) & GHWCFG4_NUM_IN_EPS_MASK) >>
547 GHWCFG4_NUM_IN_EPS_SHIFT;
548 pdata_hw_ep = dev->pdata->tx_fifo_sz_nb;
550 /* tx_fifo_sz_nb should equal to number of IN Endpoint */
551 if (pdata_hw_ep && max_hw_ep != pdata_hw_ep)
552 pr_warn("Got %d hw endpoint but %d tx-fifo-size in array !!\n",
553 max_hw_ep, pdata_hw_ep);
555 for (i = 0; i < max_hw_ep; i++) {
557 tx_fifo_sz = dev->pdata->tx_fifo_sz_array[i];
559 writel((rx_fifo_sz + np_tx_fifo_sz + (tx_fifo_sz * i)) |
560 tx_fifo_sz << 16, ®->dieptxf[i]);
562 /* Flush the RX FIFO */
563 writel(RX_FIFO_FLUSH, ®->grstctl);
564 while (readl(®->grstctl) & RX_FIFO_FLUSH)
565 debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__);
567 /* Flush all the Tx FIFO's */
568 writel(TX_FIFO_FLUSH_ALL, ®->grstctl);
569 writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, ®->grstctl);
570 while (readl(®->grstctl) & TX_FIFO_FLUSH)
571 debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__);
573 /* 13. Clear NAK bit of EP0, EP1, EP2*/
575 /* EP0: Control OUT */
576 writel(DEPCTL_EPDIS | DEPCTL_CNAK,
577 ®->out_endp[EP0_CON].doepctl);
579 /* 14. Initialize OTG Link Core.*/
580 writel(GAHBCFG_INIT, ®->gahbcfg);
583 static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed)
585 unsigned int ep_ctrl;
588 if (speed == USB_SPEED_HIGH) {
591 ep_fifo_size2 = 1024;
592 dev->gadget.speed = USB_SPEED_HIGH;
597 dev->gadget.speed = USB_SPEED_FULL;
600 dev->ep[0].ep.maxpacket = ep0_fifo_size;
601 for (i = 1; i < DWC2_MAX_ENDPOINTS; i++)
602 dev->ep[i].ep.maxpacket = ep_fifo_size;
604 /* EP0 - Control IN (64 bytes)*/
605 ep_ctrl = readl(®->in_endp[EP0_CON].diepctl);
606 writel(ep_ctrl|(0<<0), ®->in_endp[EP0_CON].diepctl);
608 /* EP0 - Control OUT (64 bytes)*/
609 ep_ctrl = readl(®->out_endp[EP0_CON].doepctl);
610 writel(ep_ctrl|(0<<0), ®->out_endp[EP0_CON].doepctl);
613 static int dwc2_ep_enable(struct usb_ep *_ep,
614 const struct usb_endpoint_descriptor *desc)
617 struct dwc2_udc *dev;
618 unsigned long flags = 0;
620 debug("%s: %p\n", __func__, _ep);
622 ep = container_of(_ep, struct dwc2_ep, ep);
623 if (!_ep || !desc || ep->desc || _ep->name == ep0name
624 || desc->bDescriptorType != USB_DT_ENDPOINT
625 || ep->bEndpointAddress != desc->bEndpointAddress
626 || ep_maxpacket(ep) <
627 le16_to_cpu(get_unaligned(&desc->wMaxPacketSize))) {
629 debug("%s: bad ep or descriptor\n", __func__);
633 /* xfer types must match, except that interrupt ~= bulk */
634 if (ep->bmAttributes != desc->bmAttributes
635 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
636 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
638 debug("%s: %s type mismatch\n", __func__, _ep->name);
642 /* hardware _could_ do smaller, but driver doesn't */
643 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK &&
644 le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) >
645 ep_maxpacket(ep)) || !get_unaligned(&desc->wMaxPacketSize)) {
647 debug("%s: bad %s maxpacket\n", __func__, _ep->name);
652 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
654 debug("%s: bogus device state\n", __func__);
661 ep->ep.maxpacket = le16_to_cpu(get_unaligned(&desc->wMaxPacketSize));
663 /* Reset halt state */
664 dwc2_udc_set_nak(ep);
665 dwc2_udc_set_halt(_ep, 0);
667 spin_lock_irqsave(&ep->dev->lock, flags);
668 dwc2_udc_ep_activate(ep);
669 spin_unlock_irqrestore(&ep->dev->lock, flags);
671 debug("%s: enabled %s, stopped = %d, maxpacket = %d\n",
672 __func__, _ep->name, ep->stopped, ep->ep.maxpacket);
679 static int dwc2_ep_disable(struct usb_ep *_ep)
682 unsigned long flags = 0;
684 debug("%s: %p\n", __func__, _ep);
686 ep = container_of(_ep, struct dwc2_ep, ep);
687 if (!_ep || !ep->desc) {
688 debug("%s: %s not enabled\n", __func__,
689 _ep ? ep->ep.name : NULL);
693 spin_lock_irqsave(&ep->dev->lock, flags);
695 /* Nuke all pending requests */
696 nuke(ep, -ESHUTDOWN);
701 spin_unlock_irqrestore(&ep->dev->lock, flags);
703 debug("%s: disabled %s\n", __func__, _ep->name);
707 static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,
710 struct dwc2_request *req;
712 debug("%s: %s %p\n", __func__, ep->name, ep);
714 req = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*req));
718 memset(req, 0, sizeof *req);
719 INIT_LIST_HEAD(&req->queue);
724 static void dwc2_free_request(struct usb_ep *ep, struct usb_request *_req)
726 struct dwc2_request *req;
728 debug("%s: %p\n", __func__, ep);
730 req = container_of(_req, struct dwc2_request, req);
731 WARN_ON(!list_empty(&req->queue));
735 /* dequeue JUST ONE request */
736 static int dwc2_dequeue(struct usb_ep *_ep, struct usb_request *_req)
739 struct dwc2_request *req;
740 unsigned long flags = 0;
742 debug("%s: %p\n", __func__, _ep);
744 ep = container_of(_ep, struct dwc2_ep, ep);
745 if (!_ep || ep->ep.name == ep0name)
748 spin_lock_irqsave(&ep->dev->lock, flags);
750 /* make sure it's actually queued on this endpoint */
751 list_for_each_entry(req, &ep->queue, queue) {
752 if (&req->req == _req)
755 if (&req->req != _req) {
756 spin_unlock_irqrestore(&ep->dev->lock, flags);
760 done(ep, req, -ECONNRESET);
762 spin_unlock_irqrestore(&ep->dev->lock, flags);
767 * Return bytes in EP FIFO
769 static int dwc2_fifo_status(struct usb_ep *_ep)
774 ep = container_of(_ep, struct dwc2_ep, ep);
776 debug("%s: bad ep\n", __func__);
780 debug("%s: %d\n", __func__, ep_index(ep));
782 /* LPD can't report unclaimed bytes from IN fifos */
792 static void dwc2_fifo_flush(struct usb_ep *_ep)
796 ep = container_of(_ep, struct dwc2_ep, ep);
797 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
798 debug("%s: bad ep\n", __func__);
802 debug("%s: %d\n", __func__, ep_index(ep));
805 static const struct usb_gadget_ops dwc2_udc_ops = {
806 /* current versions must always be self-powered */
807 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
808 .udc_start = dwc2_gadget_start,
809 .udc_stop = dwc2_gadget_stop,
813 static struct dwc2_udc memory = {
816 .ops = &dwc2_udc_ops,
817 .ep0 = &memory.ep[0].ep,
821 /* control endpoint */
826 .maxpacket = EP0_FIFO_SIZE,
830 .bEndpointAddress = 0,
833 .ep_type = ep_control,
836 /* first group of endpoints */
839 .name = "ep1in-bulk",
841 .maxpacket = EP_FIFO_SIZE,
845 .bEndpointAddress = USB_DIR_IN | 1,
846 .bmAttributes = USB_ENDPOINT_XFER_BULK,
848 .ep_type = ep_bulk_out,
854 .name = "ep2out-bulk",
856 .maxpacket = EP_FIFO_SIZE,
860 .bEndpointAddress = USB_DIR_OUT | 2,
861 .bmAttributes = USB_ENDPOINT_XFER_BULK,
863 .ep_type = ep_bulk_in,
871 .maxpacket = EP_FIFO_SIZE,
875 .bEndpointAddress = USB_DIR_IN | 3,
876 .bmAttributes = USB_ENDPOINT_XFER_INT,
878 .ep_type = ep_interrupt,
884 * probe - binds to the platform device
887 int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata)
889 struct dwc2_udc *dev = &memory;
892 debug("%s: %p\n", __func__, pdata);
896 reg = (struct dwc2_usbotg_reg *)pdata->regs_otg;
898 dev->gadget.is_dualspeed = 1; /* Hack only*/
899 dev->gadget.is_otg = 0;
900 dev->gadget.is_a_peripheral = 0;
901 dev->gadget.b_hnp_enable = 0;
902 dev->gadget.a_hnp_support = 0;
903 dev->gadget.a_alt_hnp_support = 0;
905 the_controller = dev;
907 usb_ctrl = memalign(CONFIG_SYS_CACHELINE_SIZE,
908 ROUND(sizeof(struct usb_ctrlrequest),
909 CONFIG_SYS_CACHELINE_SIZE));
911 pr_err("No memory available for UDC!\n");
915 usb_ctrl_dma_addr = (dma_addr_t) usb_ctrl;
922 int dwc2_udc_handle_interrupt(void)
924 u32 intr_status = readl(®->gintsts);
925 u32 gintmsk = readl(®->gintmsk);
927 if (intr_status & gintmsk)
928 return dwc2_udc_irq(1, (void *)the_controller);
933 #if !CONFIG_IS_ENABLED(DM_USB_GADGET)
935 int usb_gadget_handle_interrupts(int index)
937 return dwc2_udc_handle_interrupt();
940 #else /* CONFIG_IS_ENABLED(DM_USB_GADGET) */
942 struct dwc2_priv_data {
943 struct clk_bulk clks;
944 struct reset_ctl_bulk resets;
945 struct phy_bulk phys;
946 struct udevice *usb33d_supply;
949 int dm_usb_gadget_handle_interrupts(struct udevice *dev)
951 return dwc2_udc_handle_interrupt();
954 static int dwc2_phy_setup(struct udevice *dev, struct phy_bulk *phys)
958 ret = generic_phy_get_bulk(dev, phys);
962 ret = generic_phy_init_bulk(phys);
966 ret = generic_phy_power_on_bulk(phys);
968 generic_phy_exit_bulk(phys);
973 static void dwc2_phy_shutdown(struct udevice *dev, struct phy_bulk *phys)
975 generic_phy_power_off_bulk(phys);
976 generic_phy_exit_bulk(phys);
979 static int dwc2_udc_otg_of_to_plat(struct udevice *dev)
981 struct dwc2_plat_otg_data *plat = dev_get_plat(dev);
983 void (*set_params)(struct dwc2_plat_otg_data *data);
986 if (usb_get_dr_mode(dev_ofnode(dev)) != USB_DR_MODE_PERIPHERAL &&
987 usb_get_dr_mode(dev_ofnode(dev)) != USB_DR_MODE_OTG) {
988 dev_dbg(dev, "Invalid mode\n");
992 plat->regs_otg = dev_read_addr(dev);
994 plat->rx_fifo_sz = dev_read_u32_default(dev, "g-rx-fifo-size", 0);
995 plat->np_tx_fifo_sz = dev_read_u32_default(dev, "g-np-tx-fifo-size", 0);
997 plat->tx_fifo_sz_nb =
998 dev_read_size(dev, "g-tx-fifo-size") / sizeof(u32);
999 if (plat->tx_fifo_sz_nb > DWC2_MAX_HW_ENDPOINTS)
1000 plat->tx_fifo_sz_nb = DWC2_MAX_HW_ENDPOINTS;
1001 if (plat->tx_fifo_sz_nb) {
1002 ret = dev_read_u32_array(dev, "g-tx-fifo-size",
1003 plat->tx_fifo_sz_array,
1004 plat->tx_fifo_sz_nb);
1009 plat->force_b_session_valid =
1010 dev_read_bool(dev, "u-boot,force-b-session-valid");
1012 plat->force_vbus_detection =
1013 dev_read_bool(dev, "u-boot,force-vbus-detection");
1015 /* force plat according compatible */
1016 drvdata = dev_get_driver_data(dev);
1018 set_params = (void *)drvdata;
1025 static void dwc2_set_stm32mp1_hsotg_params(struct dwc2_plat_otg_data *p)
1027 p->activate_stm_id_vb_detection = true;
1029 0 << 15 /* PHY Low Power Clock sel*/
1030 | 0x9 << 10 /* USB Turnaround time (0x9 for HS phy) */
1031 | 0 << 9 /* [0:HNP disable,1:HNP enable]*/
1032 | 0 << 8 /* [0:SRP disable 1:SRP enable]*/
1033 | 0 << 6 /* 0: high speed utmi+, 1: full speed serial*/
1034 | 0x7 << 0; /* FS timeout calibration**/
1036 if (p->force_b_session_valid)
1037 p->usb_gusbcfg |= 1 << 30; /* FDMOD: Force device mode */
1040 static int dwc2_udc_otg_reset_init(struct udevice *dev,
1041 struct reset_ctl_bulk *resets)
1045 ret = reset_get_bulk(dev, resets);
1046 if (ret == -ENOTSUPP || ret == -ENOENT)
1052 ret = reset_assert_bulk(resets);
1056 ret = reset_deassert_bulk(resets);
1059 reset_release_bulk(resets);
1066 static int dwc2_udc_otg_clk_init(struct udevice *dev,
1067 struct clk_bulk *clks)
1071 ret = clk_get_bulk(dev, clks);
1078 ret = clk_enable_bulk(clks);
1080 clk_release_bulk(clks);
1087 static int dwc2_udc_otg_probe(struct udevice *dev)
1089 struct dwc2_plat_otg_data *plat = dev_get_plat(dev);
1090 struct dwc2_priv_data *priv = dev_get_priv(dev);
1091 struct dwc2_usbotg_reg *usbotg_reg =
1092 (struct dwc2_usbotg_reg *)plat->regs_otg;
1095 ret = dwc2_udc_otg_clk_init(dev, &priv->clks);
1099 ret = dwc2_udc_otg_reset_init(dev, &priv->resets);
1103 ret = dwc2_phy_setup(dev, &priv->phys);
1107 if (plat->activate_stm_id_vb_detection) {
1108 if (CONFIG_IS_ENABLED(DM_REGULATOR) &&
1109 (!plat->force_b_session_valid ||
1110 plat->force_vbus_detection)) {
1111 ret = device_get_supply_regulator(dev, "usb33d-supply",
1112 &priv->usb33d_supply);
1114 dev_err(dev, "can't get voltage level detector supply\n");
1117 ret = regulator_set_enable(priv->usb33d_supply, true);
1119 dev_err(dev, "can't enable voltage level detector supply\n");
1124 if (plat->force_b_session_valid &&
1125 !plat->force_vbus_detection) {
1126 /* Override VBUS detection: enable then value*/
1127 setbits_le32(&usbotg_reg->gotgctl, VB_VALOEN);
1128 setbits_le32(&usbotg_reg->gotgctl, VB_VALOVAL);
1130 /* Enable VBUS sensing */
1131 setbits_le32(&usbotg_reg->ggpio,
1132 GGPIO_STM32_OTG_GCCFG_VBDEN);
1134 if (plat->force_b_session_valid) {
1135 /* Override B session bits: enable then value */
1136 setbits_le32(&usbotg_reg->gotgctl, A_VALOEN | B_VALOEN);
1137 setbits_le32(&usbotg_reg->gotgctl,
1138 A_VALOVAL | B_VALOVAL);
1140 /* Enable ID detection */
1141 setbits_le32(&usbotg_reg->ggpio,
1142 GGPIO_STM32_OTG_GCCFG_IDEN);
1146 ret = dwc2_udc_probe(plat);
1150 the_controller->driver = 0;
1152 ret = usb_add_gadget_udc((struct device *)dev, &the_controller->gadget);
1157 static int dwc2_udc_otg_remove(struct udevice *dev)
1159 struct dwc2_priv_data *priv = dev_get_priv(dev);
1161 usb_del_gadget_udc(&the_controller->gadget);
1163 reset_release_bulk(&priv->resets);
1165 clk_release_bulk(&priv->clks);
1167 dwc2_phy_shutdown(dev, &priv->phys);
1169 return dm_scan_fdt_dev(dev);
1172 static const struct udevice_id dwc2_udc_otg_ids[] = {
1173 { .compatible = "snps,dwc2" },
1174 { .compatible = "brcm,bcm2835-usb" },
1175 { .compatible = "st,stm32mp15-hsotg",
1176 .data = (ulong)dwc2_set_stm32mp1_hsotg_params },
1180 U_BOOT_DRIVER(dwc2_udc_otg) = {
1181 .name = "dwc2-udc-otg",
1182 .id = UCLASS_USB_GADGET_GENERIC,
1183 .of_match = dwc2_udc_otg_ids,
1184 .of_to_plat = dwc2_udc_otg_of_to_plat,
1185 .probe = dwc2_udc_otg_probe,
1186 .remove = dwc2_udc_otg_remove,
1187 .plat_auto = sizeof(struct dwc2_plat_otg_data),
1188 .priv_auto = sizeof(struct dwc2_priv_data),
1191 int dwc2_udc_B_session_valid(struct udevice *dev)
1193 struct dwc2_plat_otg_data *plat = dev_get_plat(dev);
1194 struct dwc2_usbotg_reg *usbotg_reg =
1195 (struct dwc2_usbotg_reg *)plat->regs_otg;
1197 return readl(&usbotg_reg->gotgctl) & B_SESSION_VALID;
1199 #endif /* CONFIG_IS_ENABLED(DM_USB_GADGET) */