1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2011, Marvell Semiconductor Inc.
4 * Lei Wen <leiwen@marvell.com>
6 * Back ported to the 8xx platform (from the 8260 platform) by
7 * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
16 #include <asm/byteorder.h>
17 #include <asm/cache.h>
18 #include <linux/delay.h>
19 #include <linux/errno.h>
21 #include <asm/unaligned.h>
22 #include <linux/types.h>
23 #include <linux/usb/ch9.h>
24 #include <linux/usb/gadget.h>
25 #include <usb/ci_udc.h>
26 #include "../host/ehci.h"
30 * Check if the system has too long cachelines. If the cachelines are
31 * longer then 128b, the driver will not be able flush/invalidate data
32 * cache over separate QH entries. We use 128b because one QH entry is
33 * 64b long and there are always two QH list entries for each endpoint.
35 #if ARCH_DMA_MINALIGN > 128
36 #error This driver can not work on systems with caches longer than 128b
40 * Every QTD must be individually aligned, since we can program any
41 * QTD's address into HW. Cache flushing requires ARCH_DMA_MINALIGN,
42 * and the USB HW requires 32-byte alignment. Align to both:
44 #define ILIST_ALIGN roundup(ARCH_DMA_MINALIGN, 32)
45 /* Each QTD is this size */
46 #define ILIST_ENT_RAW_SZ sizeof(struct ept_queue_item)
48 * Align the size of the QTD too, so we can add this value to each
49 * QTD's address to get another aligned address.
51 #define ILIST_ENT_SZ roundup(ILIST_ENT_RAW_SZ, ILIST_ALIGN)
52 /* For each endpoint, we need 2 QTDs, one for each of IN and OUT */
53 #define ILIST_SZ (NUM_ENDPOINTS * 2 * ILIST_ENT_SZ)
55 #define EP_MAX_LENGTH_TRANSFER 0x4000
58 #define DBG(x...) do {} while (0)
60 #define DBG(x...) printf(x)
61 static const char *reqname(unsigned r)
64 case USB_REQ_GET_STATUS: return "GET_STATUS";
65 case USB_REQ_CLEAR_FEATURE: return "CLEAR_FEATURE";
66 case USB_REQ_SET_FEATURE: return "SET_FEATURE";
67 case USB_REQ_SET_ADDRESS: return "SET_ADDRESS";
68 case USB_REQ_GET_DESCRIPTOR: return "GET_DESCRIPTOR";
69 case USB_REQ_SET_DESCRIPTOR: return "SET_DESCRIPTOR";
70 case USB_REQ_GET_CONFIGURATION: return "GET_CONFIGURATION";
71 case USB_REQ_SET_CONFIGURATION: return "SET_CONFIGURATION";
72 case USB_REQ_GET_INTERFACE: return "GET_INTERFACE";
73 case USB_REQ_SET_INTERFACE: return "SET_INTERFACE";
74 default: return "*UNKNOWN*";
79 static struct usb_endpoint_descriptor ep0_desc = {
80 .bLength = sizeof(struct usb_endpoint_descriptor),
81 .bDescriptorType = USB_DT_ENDPOINT,
82 .bEndpointAddress = USB_DIR_IN,
83 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
86 static int ci_pullup(struct usb_gadget *gadget, int is_on);
87 static int ci_ep_enable(struct usb_ep *ep,
88 const struct usb_endpoint_descriptor *desc);
89 static int ci_ep_disable(struct usb_ep *ep);
90 static int ci_ep_queue(struct usb_ep *ep,
91 struct usb_request *req, gfp_t gfp_flags);
92 static int ci_ep_dequeue(struct usb_ep *ep, struct usb_request *req);
93 static struct usb_request *
94 ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags);
95 static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *_req);
97 static const struct usb_gadget_ops ci_udc_ops = {
101 static const struct usb_ep_ops ci_ep_ops = {
102 .enable = ci_ep_enable,
103 .disable = ci_ep_disable,
104 .queue = ci_ep_queue,
105 .dequeue = ci_ep_dequeue,
106 .alloc_request = ci_ep_alloc_request,
107 .free_request = ci_ep_free_request,
110 __weak void ci_init_after_reset(struct ehci_ctrl *ctrl)
114 /* Init values for USB endpoints. */
115 static const struct usb_ep ci_ep_init[5] = {
123 .name = "ep1in-bulk",
128 .name = "ep2out-bulk",
143 static struct ci_drv controller = {
148 .max_speed = USB_SPEED_HIGH,
153 * ci_get_qh() - return queue head for endpoint
154 * @ep_num: Endpoint number
155 * @dir_in: Direction of the endpoint (IN = 1, OUT = 0)
157 * This function returns the QH associated with particular endpoint
158 * and it's direction.
160 static struct ept_queue_head *ci_get_qh(int ep_num, int dir_in)
162 return &controller.epts[(ep_num * 2) + dir_in];
166 * ci_get_qtd() - return queue item for endpoint
167 * @ep_num: Endpoint number
168 * @dir_in: Direction of the endpoint (IN = 1, OUT = 0)
170 * This function returns the QH associated with particular endpoint
171 * and it's direction.
173 static struct ept_queue_item *ci_get_qtd(int ep_num, int dir_in)
175 int index = (ep_num * 2) + dir_in;
176 uint8_t *imem = controller.items_mem + (index * ILIST_ENT_SZ);
177 return (struct ept_queue_item *)imem;
181 * ci_flush_qh - flush cache over queue head
182 * @ep_num: Endpoint number
184 * This function flushes cache over QH for particular endpoint.
186 static void ci_flush_qh(int ep_num)
188 struct ept_queue_head *head = ci_get_qh(ep_num, 0);
189 const unsigned long start = (unsigned long)head;
190 const unsigned long end = start + 2 * sizeof(*head);
192 flush_dcache_range(start, end);
196 * ci_invalidate_qh - invalidate cache over queue head
197 * @ep_num: Endpoint number
199 * This function invalidates cache over QH for particular endpoint.
201 static void ci_invalidate_qh(int ep_num)
203 struct ept_queue_head *head = ci_get_qh(ep_num, 0);
204 unsigned long start = (unsigned long)head;
205 unsigned long end = start + 2 * sizeof(*head);
207 invalidate_dcache_range(start, end);
211 * ci_flush_qtd - flush cache over queue item
212 * @ep_num: Endpoint number
214 * This function flushes cache over qTD pair for particular endpoint.
216 static void ci_flush_qtd(int ep_num)
218 struct ept_queue_item *item = ci_get_qtd(ep_num, 0);
219 const unsigned long start = (unsigned long)item;
220 const unsigned long end = start + 2 * ILIST_ENT_SZ;
222 flush_dcache_range(start, end);
226 * ci_flush_td - flush cache over queue item
229 * This function flushes cache for particular transfer descriptor.
231 static void ci_flush_td(struct ept_queue_item *td)
233 const unsigned long start = (unsigned long)td;
234 const unsigned long end = (unsigned long)td + ILIST_ENT_SZ;
235 flush_dcache_range(start, end);
239 * ci_invalidate_qtd - invalidate cache over queue item
240 * @ep_num: Endpoint number
242 * This function invalidates cache over qTD pair for particular endpoint.
244 static void ci_invalidate_qtd(int ep_num)
246 struct ept_queue_item *item = ci_get_qtd(ep_num, 0);
247 const unsigned long start = (unsigned long)item;
248 const unsigned long end = start + 2 * ILIST_ENT_SZ;
250 invalidate_dcache_range(start, end);
254 * ci_invalidate_td - invalidate cache over queue item
257 * This function invalidates cache for particular transfer descriptor.
259 static void ci_invalidate_td(struct ept_queue_item *td)
261 const unsigned long start = (unsigned long)td;
262 const unsigned long end = start + ILIST_ENT_SZ;
263 invalidate_dcache_range(start, end);
266 static struct usb_request *
267 ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags)
269 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
271 struct ci_req *ci_req;
274 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
276 if (num == 0 && controller.ep0_req)
277 return &controller.ep0_req->req;
279 ci_req = calloc(1, sizeof(*ci_req));
283 INIT_LIST_HEAD(&ci_req->queue);
286 controller.ep0_req = ci_req;
291 static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *req)
293 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
294 struct ci_req *ci_req = container_of(req, struct ci_req, req);
298 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
301 if (!controller.ep0_req)
303 controller.ep0_req = 0;
311 static void ep_enable(int num, int in, int maxpacket)
313 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
316 n = readl(&udc->epctrl[num]);
318 n |= (CTRL_TXE | CTRL_TXR | CTRL_TXT_BULK);
320 n |= (CTRL_RXE | CTRL_RXR | CTRL_RXT_BULK);
323 struct ept_queue_head *head = ci_get_qh(num, in);
325 head->config = CFG_MAX_PKT(maxpacket) | CFG_ZLT;
328 writel(n, &udc->epctrl[num]);
331 static int ci_ep_enable(struct usb_ep *ep,
332 const struct usb_endpoint_descriptor *desc)
334 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
336 num = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
337 in = (desc->bEndpointAddress & USB_DIR_IN) != 0;
342 int max = get_unaligned_le16(&desc->wMaxPacketSize);
344 if ((max > 64) && (controller.gadget.speed == USB_SPEED_FULL))
346 if (ep->maxpacket != max) {
347 DBG("%s: from %d to %d\n", __func__,
352 ep_enable(num, in, ep->maxpacket);
353 DBG("%s: num=%d maxpacket=%d\n", __func__, num, ep->maxpacket);
357 static int ci_ep_disable(struct usb_ep *ep)
359 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
366 static int ci_bounce(struct ci_req *ci_req, int in)
368 struct usb_request *req = &ci_req->req;
369 unsigned long addr = (unsigned long)req->buf;
370 unsigned long hwaddr;
371 uint32_t aligned_used_len;
373 /* Input buffer address is not aligned. */
374 if (addr & (ARCH_DMA_MINALIGN - 1))
377 /* Input buffer length is not aligned. */
378 if (req->length & (ARCH_DMA_MINALIGN - 1))
381 /* The buffer is well aligned, only flush cache. */
382 ci_req->hw_len = req->length;
383 ci_req->hw_buf = req->buf;
387 if (ci_req->b_buf && req->length > ci_req->b_len) {
391 if (!ci_req->b_buf) {
392 ci_req->b_len = roundup(req->length, ARCH_DMA_MINALIGN);
393 ci_req->b_buf = memalign(ARCH_DMA_MINALIGN, ci_req->b_len);
397 ci_req->hw_len = ci_req->b_len;
398 ci_req->hw_buf = ci_req->b_buf;
401 memcpy(ci_req->hw_buf, req->buf, req->length);
404 hwaddr = (unsigned long)ci_req->hw_buf;
408 aligned_used_len = roundup(req->length, ARCH_DMA_MINALIGN);
409 flush_dcache_range(hwaddr, hwaddr + aligned_used_len);
414 static void ci_debounce(struct ci_req *ci_req, int in)
416 struct usb_request *req = &ci_req->req;
417 unsigned long addr = (unsigned long)req->buf;
418 unsigned long hwaddr = (unsigned long)ci_req->hw_buf;
419 uint32_t aligned_used_len;
424 aligned_used_len = roundup(req->actual, ARCH_DMA_MINALIGN);
425 invalidate_dcache_range(hwaddr, hwaddr + aligned_used_len);
428 return; /* not a bounce */
430 memcpy(req->buf, ci_req->hw_buf, req->actual);
433 static void ci_ep_submit_next_request(struct ci_ep *ci_ep)
435 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
436 struct ept_queue_item *item;
437 struct ept_queue_head *head;
438 int bit, num, len, in;
439 struct ci_req *ci_req;
441 uint32_t len_left, len_this_dtd;
442 struct ept_queue_item *dtd, *qtd;
444 ci_ep->req_primed = true;
446 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
447 in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
448 item = ci_get_qtd(num, in);
449 head = ci_get_qh(num, in);
451 ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue);
452 len = ci_req->req.length;
454 head->next = (unsigned long)item;
457 ci_req->dtd_count = 0;
458 buf = ci_req->hw_buf;
463 len_this_dtd = min(len_left, (unsigned)EP_MAX_LENGTH_TRANSFER);
465 dtd->info = INFO_BYTES(len_this_dtd) | INFO_ACTIVE;
466 dtd->page0 = (unsigned long)buf;
467 dtd->page1 = ((unsigned long)buf & 0xfffff000) + 0x1000;
468 dtd->page2 = ((unsigned long)buf & 0xfffff000) + 0x2000;
469 dtd->page3 = ((unsigned long)buf & 0xfffff000) + 0x3000;
470 dtd->page4 = ((unsigned long)buf & 0xfffff000) + 0x4000;
472 len_left -= len_this_dtd;
476 qtd = (struct ept_queue_item *)
477 memalign(ILIST_ALIGN, ILIST_ENT_SZ);
478 dtd->next = (unsigned long)qtd;
480 memset(dtd, 0, ILIST_ENT_SZ);
488 * When sending the data for an IN transaction, the attached host
489 * knows that all data for the IN is sent when one of the following
491 * a) A zero-length packet is transmitted.
492 * b) A packet with length that isn't an exact multiple of the ep's
493 * maxpacket is transmitted.
494 * c) Enough data is sent to exactly fill the host's maximum expected
495 * IN transaction size.
497 * One of these conditions MUST apply at the end of an IN transaction,
498 * or the transaction will not be considered complete by the host. If
499 * none of (a)..(c) already applies, then we must force (a) to apply
500 * by explicitly sending an extra zero-length packet.
503 if (in && len && !(len % ci_ep->ep.maxpacket) && ci_req->req.zero) {
505 * Each endpoint has 2 items allocated, even though typically
506 * only 1 is used at a time since either an IN or an OUT but
507 * not both is queued. For an IN transaction, item currently
508 * points at the second of these items, so we know that we
509 * can use the other to transmit the extra zero-length packet.
511 struct ept_queue_item *other_item = ci_get_qtd(num, 0);
512 item->next = (unsigned long)other_item;
514 item->info = INFO_ACTIVE;
517 item->next = TERMINATE;
518 item->info |= INFO_IOC;
522 item = (struct ept_queue_item *)(unsigned long)head->next;
523 while (item->next != TERMINATE) {
524 ci_flush_td((struct ept_queue_item *)(unsigned long)item->next);
525 item = (struct ept_queue_item *)(unsigned long)item->next;
528 DBG("ept%d %s queue len %x, req %p, buffer %p\n",
529 num, in ? "in" : "out", len, ci_req, ci_req->hw_buf);
537 writel(bit, &udc->epprime);
540 static int ci_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
542 struct ci_ep *ci_ep = container_of(_ep, struct ci_ep, ep);
543 struct ci_req *ci_req;
545 list_for_each_entry(ci_req, &ci_ep->queue, queue) {
546 if (&ci_req->req == _req)
550 if (&ci_req->req != _req)
553 list_del_init(&ci_req->queue);
555 if (ci_req->req.status == -EINPROGRESS) {
556 ci_req->req.status = -ECONNRESET;
557 if (ci_req->req.complete)
558 ci_req->req.complete(_ep, _req);
564 static int ci_ep_queue(struct usb_ep *ep,
565 struct usb_request *req, gfp_t gfp_flags)
567 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
568 struct ci_req *ci_req = container_of(req, struct ci_req, req);
570 int __maybe_unused num;
572 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
573 in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
575 if (!num && ci_ep->req_primed) {
577 * The flipping of ep0 between IN and OUT relies on
578 * ci_ep_queue consuming the current IN/OUT setting
579 * immediately. If this is deferred to a later point when the
580 * req is pulled out of ci_req->queue, then the IN/OUT setting
581 * may have been changed since the req was queued, and state
582 * will get out of sync. This condition doesn't occur today,
583 * but could if bugs were introduced later, and this error
584 * check will save a lot of debugging time.
586 printf("%s: ep0 transaction already in progress\n", __func__);
590 ret = ci_bounce(ci_req, in);
594 DBG("ept%d %s pre-queue req %p, buffer %p\n",
595 num, in ? "in" : "out", ci_req, ci_req->hw_buf);
596 list_add_tail(&ci_req->queue, &ci_ep->queue);
598 if (!ci_ep->req_primed)
599 ci_ep_submit_next_request(ci_ep);
604 static void flip_ep0_direction(void)
606 if (ep0_desc.bEndpointAddress == USB_DIR_IN) {
607 DBG("%s: Flipping ep0 to OUT\n", __func__);
608 ep0_desc.bEndpointAddress = 0;
610 DBG("%s: Flipping ep0 to IN\n", __func__);
611 ep0_desc.bEndpointAddress = USB_DIR_IN;
615 static void handle_ep_complete(struct ci_ep *ci_ep)
617 struct ept_queue_item *item, *next_td;
619 struct ci_req *ci_req;
621 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
622 in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
623 item = ci_get_qtd(num, in);
624 ci_invalidate_qtd(num);
625 ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue);
629 for (j = 0; j < ci_req->dtd_count; j++) {
630 ci_invalidate_td(next_td);
632 len += (item->info >> 16) & 0x7fff;
633 if (item->info & 0xff)
634 printf("EP%d/%s FAIL info=%x pg0=%x\n",
635 num, in ? "in" : "out", item->info, item->page0);
636 if (j != ci_req->dtd_count - 1)
637 next_td = (struct ept_queue_item *)(unsigned long)
643 list_del_init(&ci_req->queue);
644 ci_ep->req_primed = false;
646 if (!list_empty(&ci_ep->queue))
647 ci_ep_submit_next_request(ci_ep);
649 ci_req->req.actual = ci_req->req.length - len;
650 ci_debounce(ci_req, in);
652 DBG("ept%d %s req %p, complete %x\n",
653 num, in ? "in" : "out", ci_req, len);
654 if (num != 0 || controller.ep0_data_phase)
655 ci_req->req.complete(&ci_ep->ep, &ci_req->req);
656 if (num == 0 && controller.ep0_data_phase) {
658 * Data Stage is complete, so flip ep0 dir for Status Stage,
659 * which always transfers a packet in the opposite direction.
661 DBG("%s: flip ep0 dir for Status Stage\n", __func__);
662 flip_ep0_direction();
663 controller.ep0_data_phase = false;
664 ci_req->req.length = 0;
665 usb_ep_queue(&ci_ep->ep, &ci_req->req, 0);
669 #define SETUP(type, request) (((type) << 8) | (request))
671 static void handle_setup(void)
673 struct ci_ep *ci_ep = &controller.ep[0];
674 struct ci_req *ci_req;
675 struct usb_request *req;
676 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
677 struct ept_queue_head *head;
678 struct usb_ctrlrequest r;
680 int num, in, _num, _in, i;
683 ci_req = controller.ep0_req;
685 head = ci_get_qh(0, 0); /* EP0 OUT */
688 memcpy(&r, head->setup_data, sizeof(struct usb_ctrlrequest));
689 #ifdef CONFIG_CI_UDC_HAS_HOSTPC
690 writel(EPT_RX(0), &udc->epsetupstat);
692 writel(EPT_RX(0), &udc->epstat);
694 DBG("handle setup %s, %x, %x index %x value %x length %x\n",
695 reqname(r.bRequest), r.bRequestType, r.bRequest, r.wIndex,
696 r.wValue, r.wLength);
698 /* Set EP0 dir for Data Stage based on Setup Stage data */
699 if (r.bRequestType & USB_DIR_IN) {
700 DBG("%s: Set ep0 to IN for Data Stage\n", __func__);
701 ep0_desc.bEndpointAddress = USB_DIR_IN;
703 DBG("%s: Set ep0 to OUT for Data Stage\n", __func__);
704 ep0_desc.bEndpointAddress = 0;
707 controller.ep0_data_phase = true;
709 /* 0 length -> no Data Stage. Flip dir for Status Stage */
710 DBG("%s: 0 length: flip ep0 dir for Status Stage\n", __func__);
711 flip_ep0_direction();
712 controller.ep0_data_phase = false;
715 list_del_init(&ci_req->queue);
716 ci_ep->req_primed = false;
718 switch (SETUP(r.bRequestType, r.bRequest)) {
719 case SETUP(USB_RECIP_ENDPOINT, USB_REQ_CLEAR_FEATURE):
720 _num = r.wIndex & 15;
721 _in = !!(r.wIndex & 0x80);
723 if ((r.wValue == 0) && (r.wLength == 0)) {
725 for (i = 0; i < NUM_ENDPOINTS; i++) {
726 struct ci_ep *ep = &controller.ep[i];
730 num = ep->desc->bEndpointAddress
731 & USB_ENDPOINT_NUMBER_MASK;
732 in = (ep->desc->bEndpointAddress
734 if ((num == _num) && (in == _in)) {
735 ep_enable(num, in, ep->ep.maxpacket);
736 usb_ep_queue(controller.gadget.ep0,
744 case SETUP(USB_RECIP_DEVICE, USB_REQ_SET_ADDRESS):
746 * write address delayed (will take effect
747 * after the next IN txn)
749 writel((r.wValue << 25) | (1 << 24), &udc->devaddr);
751 usb_ep_queue(controller.gadget.ep0, req, 0);
754 case SETUP(USB_DIR_IN | USB_RECIP_DEVICE, USB_REQ_GET_STATUS):
756 buf = (char *)req->buf;
757 buf[0] = 1 << USB_DEVICE_SELF_POWERED;
759 usb_ep_queue(controller.gadget.ep0, req, 0);
762 /* pass request up to the gadget driver */
763 if (controller.driver)
764 status = controller.driver->setup(&controller.gadget, &r);
770 DBG("STALL reqname %s type %x value %x, index %x\n",
771 reqname(r.bRequest), r.bRequestType, r.wValue, r.wIndex);
772 writel((1<<16) | (1 << 0), &udc->epctrl[0]);
775 static void stop_activity(void)
778 struct ept_queue_head *head;
779 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
780 writel(readl(&udc->epcomp), &udc->epcomp);
781 #ifdef CONFIG_CI_UDC_HAS_HOSTPC
782 writel(readl(&udc->epsetupstat), &udc->epsetupstat);
784 writel(readl(&udc->epstat), &udc->epstat);
785 writel(0xffffffff, &udc->epflush);
787 /* error out any pending reqs */
788 for (i = 0; i < NUM_ENDPOINTS; i++) {
790 writel(0, &udc->epctrl[i]);
791 if (controller.ep[i].desc) {
792 num = controller.ep[i].desc->bEndpointAddress
793 & USB_ENDPOINT_NUMBER_MASK;
794 in = (controller.ep[i].desc->bEndpointAddress
796 head = ci_get_qh(num, in);
797 head->info = INFO_ACTIVE;
805 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
806 unsigned n = readl(&udc->usbsts);
807 writel(n, &udc->usbsts);
810 n &= (STS_SLI | STS_URI | STS_PCI | STS_UI | STS_UEI);
815 DBG("-- reset --\n");
819 DBG("-- suspend --\n");
823 int speed = USB_SPEED_FULL;
825 #ifdef CONFIG_CI_UDC_HAS_HOSTPC
826 bit = (readl(&udc->hostpc1_devlc) >> 25) & 3;
828 bit = (readl(&udc->portsc) >> 26) & 3;
830 DBG("-- portchange %x %s\n", bit, (bit == 2) ? "High" : "Full");
832 speed = USB_SPEED_HIGH;
835 controller.gadget.speed = speed;
836 for (i = 1; i < NUM_ENDPOINTS; i++) {
837 if (controller.ep[i].ep.maxpacket > max)
838 controller.ep[i].ep.maxpacket = max;
843 printf("<UEI %x>\n", readl(&udc->epcomp));
845 if ((n & STS_UI) || (n & STS_UEI)) {
846 #ifdef CONFIG_CI_UDC_HAS_HOSTPC
847 n = readl(&udc->epsetupstat);
849 n = readl(&udc->epstat);
854 n = readl(&udc->epcomp);
856 writel(n, &udc->epcomp);
858 for (i = 0; i < NUM_ENDPOINTS && n; i++) {
859 if (controller.ep[i].desc) {
860 num = controller.ep[i].desc->bEndpointAddress
861 & USB_ENDPOINT_NUMBER_MASK;
862 in = (controller.ep[i].desc->bEndpointAddress
864 bit = (in) ? EPT_TX(num) : EPT_RX(num);
866 handle_ep_complete(&controller.ep[i]);
872 int usb_gadget_handle_interrupts(int index)
875 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
877 value = readl(&udc->usbsts);
884 void udc_disconnect(void)
886 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
889 writel(USBCMD_FS2, &udc->usbcmd);
891 if (controller.driver)
892 controller.driver->disconnect(&controller.gadget);
895 static int ci_pullup(struct usb_gadget *gadget, int is_on)
897 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
900 writel(USBCMD_ITC(MICRO_8FRAME) | USBCMD_RST, &udc->usbcmd);
903 ci_init_after_reset(controller.ctrl);
905 writel((unsigned long)controller.epts, &udc->epinitaddr);
907 /* select DEVICE mode */
908 writel(USBMODE_DEVICE, &udc->usbmode);
910 #if !defined(CONFIG_USB_GADGET_DUALSPEED)
911 /* Port force Full-Speed Connect */
912 setbits_le32(&udc->portsc, PFSC);
915 writel(0xffffffff, &udc->epflush);
917 /* Turn on the USB connection by enabling the pullup resistor */
918 setbits_le32(&udc->usbcmd, USBCMD_ITC(MICRO_8FRAME) |
927 static int ci_udc_probe(void)
929 struct ept_queue_head *head;
932 const int num = 2 * NUM_ENDPOINTS;
934 const int eplist_min_align = 4096;
935 const int eplist_align = roundup(eplist_min_align, ARCH_DMA_MINALIGN);
936 const int eplist_raw_sz = num * sizeof(struct ept_queue_head);
937 const int eplist_sz = roundup(eplist_raw_sz, ARCH_DMA_MINALIGN);
939 /* The QH list must be aligned to 4096 bytes. */
940 controller.epts = memalign(eplist_align, eplist_sz);
941 if (!controller.epts)
943 memset(controller.epts, 0, eplist_sz);
945 controller.items_mem = memalign(ILIST_ALIGN, ILIST_SZ);
946 if (!controller.items_mem) {
947 free(controller.epts);
950 memset(controller.items_mem, 0, ILIST_SZ);
952 for (i = 0; i < 2 * NUM_ENDPOINTS; i++) {
954 * Configure QH for each endpoint. The structure of the QH list
955 * is such that each two subsequent fields, N and N+1 where N is
956 * even, in the QH list represent QH for one endpoint. The Nth
957 * entry represents OUT configuration and the N+1th entry does
958 * represent IN configuration of the endpoint.
960 head = controller.epts + i;
962 head->config = CFG_MAX_PKT(EP0_MAX_PACKET_SIZE)
965 head->config = CFG_MAX_PKT(EP_MAX_PACKET_SIZE)
967 head->next = TERMINATE;
976 INIT_LIST_HEAD(&controller.gadget.ep_list);
979 memcpy(&controller.ep[0].ep, &ci_ep_init[0], sizeof(*ci_ep_init));
980 controller.ep[0].desc = &ep0_desc;
981 INIT_LIST_HEAD(&controller.ep[0].queue);
982 controller.ep[0].req_primed = false;
983 controller.gadget.ep0 = &controller.ep[0].ep;
984 INIT_LIST_HEAD(&controller.gadget.ep0->ep_list);
987 for (i = 1; i < 4; i++) {
988 memcpy(&controller.ep[i].ep, &ci_ep_init[i],
989 sizeof(*ci_ep_init));
990 INIT_LIST_HEAD(&controller.ep[i].queue);
991 controller.ep[i].req_primed = false;
992 list_add_tail(&controller.ep[i].ep.ep_list,
993 &controller.gadget.ep_list);
997 for (i = 4; i < NUM_ENDPOINTS; i++) {
998 memcpy(&controller.ep[i].ep, &ci_ep_init[4],
999 sizeof(*ci_ep_init));
1000 INIT_LIST_HEAD(&controller.ep[i].queue);
1001 controller.ep[i].req_primed = false;
1002 list_add_tail(&controller.ep[i].ep.ep_list,
1003 &controller.gadget.ep_list);
1006 ci_ep_alloc_request(&controller.ep[0].ep, 0);
1007 if (!controller.ep0_req) {
1008 free(controller.items_mem);
1009 free(controller.epts);
1016 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1022 if (!driver->bind || !driver->setup || !driver->disconnect)
1025 #if CONFIG_IS_ENABLED(DM_USB)
1026 ret = usb_setup_ehci_gadget(&controller.ctrl);
1028 ret = usb_lowlevel_init(0, USB_INIT_DEVICE, (void **)&controller.ctrl);
1033 ret = ci_udc_probe();
1035 DBG("udc probe failed, returned %d\n", ret);
1039 ret = driver->bind(&controller.gadget);
1041 DBG("driver->bind() returned %d\n", ret);
1044 controller.driver = driver;
1049 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1053 driver->unbind(&controller.gadget);
1054 controller.driver = NULL;
1056 ci_ep_free_request(&controller.ep[0].ep, &controller.ep0_req->req);
1057 free(controller.items_mem);
1058 free(controller.epts);
1060 #if CONFIG_IS_ENABLED(DM_USB)
1061 usb_remove_ehci_gadget(&controller.ctrl);
1063 usb_lowlevel_stop(0);
1064 controller.ctrl = NULL;
1070 bool dfu_usb_get_reset(void)
1072 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
1074 return !!(readl(&udc->usbsts) & STS_URI);