2 * Copyright (c) 2015 Google, Inc
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * Copyright (C) 2009 NVIDIA, Corporation
5 * Copyright (C) 2007-2008 SMSC (Steve Glendinning)
7 * SPDX-License-Identifier: GPL-2.0+
16 #include <asm/unaligned.h>
17 #include <linux/mii.h>
18 #include "usb_ether.h"
20 /* SMSC LAN95xx based USB 2.0 Ethernet Devices */
23 #define LED_GPIO_CFG (0x24)
24 #define LED_GPIO_CFG_SPD_LED (0x01000000)
25 #define LED_GPIO_CFG_LNK_LED (0x00100000)
26 #define LED_GPIO_CFG_FDX_LED (0x00010000)
28 /* Tx command words */
29 #define TX_CMD_A_FIRST_SEG_ 0x00002000
30 #define TX_CMD_A_LAST_SEG_ 0x00001000
33 #define RX_STS_FL_ 0x3FFF0000 /* Frame Length */
34 #define RX_STS_ES_ 0x00008000 /* Error Summary */
42 #define TX_CFG_ON_ 0x00000004
45 #define HW_CFG_BIR_ 0x00001000
46 #define HW_CFG_RXDOFF_ 0x00000600
47 #define HW_CFG_MEF_ 0x00000020
48 #define HW_CFG_BCE_ 0x00000002
49 #define HW_CFG_LRST_ 0x00000008
52 #define PM_CTL_PHY_RST_ 0x00000010
57 * Hi watermark = 15.5Kb (~10 mtu pkts)
58 * low watermark = 3k (~2 mtu pkts)
59 * backpressure duration = ~ 350us
60 * Apply FC on any frame.
62 #define AFC_CFG_DEFAULT 0x00F830A1
65 #define E2P_CMD_BUSY_ 0x80000000
66 #define E2P_CMD_READ_ 0x00000000
67 #define E2P_CMD_TIMEOUT_ 0x00000400
68 #define E2P_CMD_LOADED_ 0x00000200
69 #define E2P_CMD_ADDR_ 0x000001FF
73 #define BURST_CAP 0x38
75 #define INT_EP_CTL 0x68
76 #define INT_EP_CTL_PHY_INT_ 0x00008000
78 #define BULK_IN_DLY 0x6C
82 #define MAC_CR_MCPAS_ 0x00080000
83 #define MAC_CR_PRMS_ 0x00040000
84 #define MAC_CR_HPFILT_ 0x00002000
85 #define MAC_CR_TXEN_ 0x00000008
86 #define MAC_CR_RXEN_ 0x00000004
92 #define MII_ADDR 0x114
93 #define MII_WRITE_ 0x02
94 #define MII_BUSY_ 0x01
95 #define MII_READ_ 0x00 /* ~of MII Write bit */
97 #define MII_DATA 0x118
104 #define Tx_COE_EN_ 0x00010000
105 #define Rx_COE_EN_ 0x00000001
107 /* Vendor-specific PHY Definitions */
108 #define PHY_INT_SRC 29
110 #define PHY_INT_MASK 30
111 #define PHY_INT_MASK_ANEG_COMP_ ((u16)0x0040)
112 #define PHY_INT_MASK_LINK_DOWN_ ((u16)0x0010)
113 #define PHY_INT_MASK_DEFAULT_ (PHY_INT_MASK_ANEG_COMP_ | \
114 PHY_INT_MASK_LINK_DOWN_)
116 /* USB Vendor Requests */
117 #define USB_VENDOR_REQUEST_WRITE_REGISTER 0xA0
118 #define USB_VENDOR_REQUEST_READ_REGISTER 0xA1
120 /* Some extra defines */
121 #define HS_USB_PKT_SIZE 512
122 #define FS_USB_PKT_SIZE 64
123 /* 5/33 is lower limit for BURST_CAP to work */
124 #define DEFAULT_HS_BURST_CAP_SIZE (5 * HS_USB_PKT_SIZE)
125 #define DEFAULT_FS_BURST_CAP_SIZE (33 * FS_USB_PKT_SIZE)
126 #define DEFAULT_BULK_IN_DELAY 0x00002000
127 #define MAX_SINGLE_PACKET_SIZE 2048
128 #define EEPROM_MAC_OFFSET 0x01
129 #define SMSC95XX_INTERNAL_PHY_ID 1
130 #define ETH_P_8021Q 0x8100 /* 802.1Q VLAN Extended Header */
133 #define SMSC95XX_BASE_NAME "sms"
134 #define USB_CTRL_SET_TIMEOUT 5000
135 #define USB_CTRL_GET_TIMEOUT 5000
136 #define USB_BULK_SEND_TIMEOUT 5000
137 #define USB_BULK_RECV_TIMEOUT 5000
139 #define RX_URB_SIZE DEFAULT_HS_BURST_CAP_SIZE
140 #define PHY_CONNECT_TIMEOUT 5000
144 #ifndef CONFIG_DM_ETH
146 static int curr_eth_dev; /* index for name of next device detected */
150 struct smsc95xx_private {
152 struct ueth_data ueth;
154 size_t rx_urb_size; /* maximum USB URB size */
155 u32 mac_cr; /* MAC control register value */
156 int have_hwaddr; /* 1 if we have a hardware MAC address */
160 * Smsc95xx infrastructure commands
162 static int smsc95xx_write_reg(struct usb_device *udev, u32 index, u32 data)
165 ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
170 len = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
171 USB_VENDOR_REQUEST_WRITE_REGISTER,
172 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
173 0, index, tmpbuf, sizeof(data),
174 USB_CTRL_SET_TIMEOUT);
175 if (len != sizeof(data)) {
176 debug("smsc95xx_write_reg failed: index=%d, data=%d, len=%d",
183 static int smsc95xx_read_reg(struct usb_device *udev, u32 index, u32 *data)
186 ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
188 len = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
189 USB_VENDOR_REQUEST_READ_REGISTER,
190 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
191 0, index, tmpbuf, sizeof(*data),
192 USB_CTRL_GET_TIMEOUT);
194 if (len != sizeof(*data)) {
195 debug("smsc95xx_read_reg failed: index=%d, len=%d",
204 /* Loop until the read is completed with timeout */
205 static int smsc95xx_phy_wait_not_busy(struct usb_device *udev)
207 unsigned long start_time = get_timer(0);
211 smsc95xx_read_reg(udev, MII_ADDR, &val);
212 if (!(val & MII_BUSY_))
214 } while (get_timer(start_time) < 1000);
219 static int smsc95xx_mdio_read(struct usb_device *udev, int phy_id, int idx)
223 /* confirm MII not busy */
224 if (smsc95xx_phy_wait_not_busy(udev)) {
225 debug("MII is busy in smsc95xx_mdio_read\n");
229 /* set the address, index & direction (read from PHY) */
230 addr = (phy_id << 11) | (idx << 6) | MII_READ_;
231 smsc95xx_write_reg(udev, MII_ADDR, addr);
233 if (smsc95xx_phy_wait_not_busy(udev)) {
234 debug("Timed out reading MII reg %02X\n", idx);
238 smsc95xx_read_reg(udev, MII_DATA, &val);
240 return (u16)(val & 0xFFFF);
243 static void smsc95xx_mdio_write(struct usb_device *udev, int phy_id, int idx,
248 /* confirm MII not busy */
249 if (smsc95xx_phy_wait_not_busy(udev)) {
250 debug("MII is busy in smsc95xx_mdio_write\n");
255 smsc95xx_write_reg(udev, MII_DATA, val);
257 /* set the address, index & direction (write to PHY) */
258 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
259 smsc95xx_write_reg(udev, MII_ADDR, addr);
261 if (smsc95xx_phy_wait_not_busy(udev))
262 debug("Timed out writing MII reg %02X\n", idx);
265 static int smsc95xx_eeprom_confirm_not_busy(struct usb_device *udev)
267 unsigned long start_time = get_timer(0);
271 smsc95xx_read_reg(udev, E2P_CMD, &val);
272 if (!(val & E2P_CMD_BUSY_))
275 } while (get_timer(start_time) < 1 * 1000 * 1000);
277 debug("EEPROM is busy\n");
281 static int smsc95xx_wait_eeprom(struct usb_device *udev)
283 unsigned long start_time = get_timer(0);
287 smsc95xx_read_reg(udev, E2P_CMD, &val);
288 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
291 } while (get_timer(start_time) < 1 * 1000 * 1000);
293 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
294 debug("EEPROM read operation timeout\n");
300 static int smsc95xx_read_eeprom(struct usb_device *udev, u32 offset, u32 length,
306 ret = smsc95xx_eeprom_confirm_not_busy(udev);
310 for (i = 0; i < length; i++) {
311 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
312 smsc95xx_write_reg(udev, E2P_CMD, val);
314 ret = smsc95xx_wait_eeprom(udev);
318 smsc95xx_read_reg(udev, E2P_DATA, &val);
319 data[i] = val & 0xFF;
326 * mii_nway_restart - restart NWay (autonegotiation) for this interface
328 * Returns 0 on success, negative on error.
330 static int mii_nway_restart(struct usb_device *udev, struct ueth_data *dev)
335 /* if autoneg is off, it's an error */
336 bmcr = smsc95xx_mdio_read(udev, dev->phy_id, MII_BMCR);
338 if (bmcr & BMCR_ANENABLE) {
339 bmcr |= BMCR_ANRESTART;
340 smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, bmcr);
346 static int smsc95xx_phy_initialize(struct usb_device *udev,
347 struct ueth_data *dev)
349 smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, BMCR_RESET);
350 smsc95xx_mdio_write(udev, dev->phy_id, MII_ADVERTISE,
351 ADVERTISE_ALL | ADVERTISE_CSMA |
352 ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
355 smsc95xx_mdio_read(udev, dev->phy_id, PHY_INT_SRC);
357 smsc95xx_mdio_write(udev, dev->phy_id, PHY_INT_MASK,
358 PHY_INT_MASK_DEFAULT_);
359 mii_nway_restart(udev, dev);
361 debug("phy initialised succesfully\n");
365 static int smsc95xx_init_mac_address(unsigned char *enetaddr,
366 struct usb_device *udev)
370 /* try reading mac address from EEPROM */
371 ret = smsc95xx_read_eeprom(udev, EEPROM_MAC_OFFSET, ETH_ALEN, enetaddr);
375 if (is_valid_ethaddr(enetaddr)) {
376 /* eeprom values are valid so use them */
377 debug("MAC address read from EEPROM\n");
382 * No eeprom, or eeprom values are invalid. Generating a random MAC
383 * address is not safe. Just return an error.
385 debug("Invalid MAC address read from EEPROM\n");
390 static int smsc95xx_write_hwaddr_common(struct usb_device *udev,
391 struct smsc95xx_private *priv,
392 unsigned char *enetaddr)
394 u32 addr_lo = get_unaligned_le32(&enetaddr[0]);
395 u32 addr_hi = get_unaligned_le16(&enetaddr[4]);
398 /* set hardware address */
399 debug("** %s()\n", __func__);
400 ret = smsc95xx_write_reg(udev, ADDRL, addr_lo);
404 ret = smsc95xx_write_reg(udev, ADDRH, addr_hi);
408 debug("MAC %pM\n", enetaddr);
409 priv->have_hwaddr = 1;
414 /* Enable or disable Tx & Rx checksum offload engines */
415 static int smsc95xx_set_csums(struct usb_device *udev, int use_tx_csum,
419 int ret = smsc95xx_read_reg(udev, COE_CR, &read_buf);
424 read_buf |= Tx_COE_EN_;
426 read_buf &= ~Tx_COE_EN_;
429 read_buf |= Rx_COE_EN_;
431 read_buf &= ~Rx_COE_EN_;
433 ret = smsc95xx_write_reg(udev, COE_CR, read_buf);
437 debug("COE_CR = 0x%08x\n", read_buf);
441 static void smsc95xx_set_multicast(struct smsc95xx_private *priv)
443 /* No multicast in u-boot */
444 priv->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
447 /* starts the TX path */
448 static void smsc95xx_start_tx_path(struct usb_device *udev,
449 struct smsc95xx_private *priv)
453 /* Enable Tx at MAC */
454 priv->mac_cr |= MAC_CR_TXEN_;
456 smsc95xx_write_reg(udev, MAC_CR, priv->mac_cr);
458 /* Enable Tx at SCSRs */
459 reg_val = TX_CFG_ON_;
460 smsc95xx_write_reg(udev, TX_CFG, reg_val);
463 /* Starts the Receive path */
464 static void smsc95xx_start_rx_path(struct usb_device *udev,
465 struct smsc95xx_private *priv)
467 priv->mac_cr |= MAC_CR_RXEN_;
468 smsc95xx_write_reg(udev, MAC_CR, priv->mac_cr);
471 static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev,
472 struct smsc95xx_private *priv,
473 unsigned char *enetaddr)
480 #define TIMEOUT_RESOLUTION 50 /* ms */
483 debug("** %s()\n", __func__);
484 dev->phy_id = SMSC95XX_INTERNAL_PHY_ID; /* fixed phy id */
486 write_buf = HW_CFG_LRST_;
487 ret = smsc95xx_write_reg(udev, HW_CFG, write_buf);
493 ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
498 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
500 if (timeout >= 100) {
501 debug("timeout waiting for completion of Lite Reset\n");
505 write_buf = PM_CTL_PHY_RST_;
506 ret = smsc95xx_write_reg(udev, PM_CTRL, write_buf);
512 ret = smsc95xx_read_reg(udev, PM_CTRL, &read_buf);
517 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
518 if (timeout >= 100) {
519 debug("timeout waiting for PHY Reset\n");
522 #ifndef CONFIG_DM_ETH
523 if (!priv->have_hwaddr && smsc95xx_init_mac_address(enetaddr, udev) ==
525 priv->have_hwaddr = 1;
527 if (!priv->have_hwaddr) {
528 puts("Error: SMSC95xx: No MAC address set - set usbethaddr\n");
529 return -EADDRNOTAVAIL;
531 ret = smsc95xx_write_hwaddr_common(udev, priv, enetaddr);
536 if (dev->pusb_dev->speed == USB_SPEED_HIGH) {
537 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
538 priv->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
540 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
541 priv->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
545 priv->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
547 debug("rx_urb_size=%ld\n", (ulong)priv->rx_urb_size);
549 ret = smsc95xx_write_reg(udev, BURST_CAP, burst_cap);
553 ret = smsc95xx_read_reg(udev, BURST_CAP, &read_buf);
556 debug("Read Value from BURST_CAP after writing: 0x%08x\n", read_buf);
558 read_buf = DEFAULT_BULK_IN_DELAY;
559 ret = smsc95xx_write_reg(udev, BULK_IN_DLY, read_buf);
563 ret = smsc95xx_read_reg(udev, BULK_IN_DLY, &read_buf);
566 debug("Read Value from BULK_IN_DLY after writing: "
567 "0x%08x\n", read_buf);
569 ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
572 debug("Read Value from HW_CFG: 0x%08x\n", read_buf);
575 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
577 read_buf &= ~HW_CFG_RXDOFF_;
579 #define NET_IP_ALIGN 0
580 read_buf |= NET_IP_ALIGN << 9;
582 ret = smsc95xx_write_reg(udev, HW_CFG, read_buf);
586 ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
589 debug("Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
591 write_buf = 0xFFFFFFFF;
592 ret = smsc95xx_write_reg(udev, INT_STS, write_buf);
596 ret = smsc95xx_read_reg(udev, ID_REV, &read_buf);
599 debug("ID_REV = 0x%08x\n", read_buf);
601 /* Configure GPIO pins as LED outputs */
602 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
603 LED_GPIO_CFG_FDX_LED;
604 ret = smsc95xx_write_reg(udev, LED_GPIO_CFG, write_buf);
607 debug("LED_GPIO_CFG set\n");
611 ret = smsc95xx_write_reg(udev, FLOW, write_buf);
615 read_buf = AFC_CFG_DEFAULT;
616 ret = smsc95xx_write_reg(udev, AFC_CFG, read_buf);
620 ret = smsc95xx_read_reg(udev, MAC_CR, &priv->mac_cr);
624 /* Init Rx. Set Vlan */
625 write_buf = (u32)ETH_P_8021Q;
626 ret = smsc95xx_write_reg(udev, VLAN1, write_buf);
630 /* Disable checksum offload engines */
631 ret = smsc95xx_set_csums(udev, 0, 0);
633 debug("Failed to set csum offload: %d\n", ret);
636 smsc95xx_set_multicast(priv);
638 ret = smsc95xx_phy_initialize(udev, dev);
641 ret = smsc95xx_read_reg(udev, INT_EP_CTL, &read_buf);
645 /* enable PHY interrupts */
646 read_buf |= INT_EP_CTL_PHY_INT_;
648 ret = smsc95xx_write_reg(udev, INT_EP_CTL, read_buf);
652 smsc95xx_start_tx_path(udev, priv);
653 smsc95xx_start_rx_path(udev, priv);
657 link_detected = smsc95xx_mdio_read(udev, dev->phy_id, MII_BMSR)
659 if (!link_detected) {
661 printf("Waiting for Ethernet connection... ");
662 udelay(TIMEOUT_RESOLUTION * 1000);
663 timeout += TIMEOUT_RESOLUTION;
665 } while (!link_detected && timeout < PHY_CONNECT_TIMEOUT);
670 printf("unable to connect.\n");
676 static int smsc95xx_send_common(struct ueth_data *dev, void *packet, int length)
682 ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg,
683 PKTSIZE + sizeof(tx_cmd_a) + sizeof(tx_cmd_b));
685 debug("** %s(), len %d, buf %#x\n", __func__, length,
686 (unsigned int)(ulong)msg);
687 if (length > PKTSIZE)
690 tx_cmd_a = (u32)length | TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
691 tx_cmd_b = (u32)length;
692 cpu_to_le32s(&tx_cmd_a);
693 cpu_to_le32s(&tx_cmd_b);
695 /* prepend cmd_a and cmd_b */
696 memcpy(msg, &tx_cmd_a, sizeof(tx_cmd_a));
697 memcpy(msg + sizeof(tx_cmd_a), &tx_cmd_b, sizeof(tx_cmd_b));
698 memcpy(msg + sizeof(tx_cmd_a) + sizeof(tx_cmd_b), (void *)packet,
700 err = usb_bulk_msg(dev->pusb_dev,
701 usb_sndbulkpipe(dev->pusb_dev, dev->ep_out),
703 length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b),
705 USB_BULK_SEND_TIMEOUT);
706 debug("Tx: len = %u, actual = %u, err = %d\n",
707 (unsigned int)(length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b)),
708 (unsigned int)actual_len, err);
713 #ifndef CONFIG_DM_ETH
717 static int smsc95xx_init(struct eth_device *eth, bd_t *bd)
719 struct ueth_data *dev = (struct ueth_data *)eth->priv;
720 struct usb_device *udev = dev->pusb_dev;
721 struct smsc95xx_private *priv =
722 (struct smsc95xx_private *)dev->dev_priv;
724 return smsc95xx_init_common(udev, dev, priv, eth->enetaddr);
727 static int smsc95xx_send(struct eth_device *eth, void *packet, int length)
729 struct ueth_data *dev = (struct ueth_data *)eth->priv;
731 return smsc95xx_send_common(dev, packet, length);
734 static int smsc95xx_recv(struct eth_device *eth)
736 struct ueth_data *dev = (struct ueth_data *)eth->priv;
737 DEFINE_CACHE_ALIGN_BUFFER(unsigned char, recv_buf, RX_URB_SIZE);
738 unsigned char *buf_ptr;
744 debug("** %s()\n", __func__);
745 err = usb_bulk_msg(dev->pusb_dev,
746 usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in),
747 (void *)recv_buf, RX_URB_SIZE, &actual_len,
748 USB_BULK_RECV_TIMEOUT);
749 debug("Rx: len = %u, actual = %u, err = %d\n", RX_URB_SIZE,
752 debug("Rx: failed to receive\n");
755 if (actual_len > RX_URB_SIZE) {
756 debug("Rx: received too many bytes %d\n", actual_len);
761 while (actual_len > 0) {
763 * 1st 4 bytes contain the length of the actual data plus error
764 * info. Extract data length.
766 if (actual_len < sizeof(packet_len)) {
767 debug("Rx: incomplete packet length\n");
770 memcpy(&packet_len, buf_ptr, sizeof(packet_len));
771 le32_to_cpus(&packet_len);
772 if (packet_len & RX_STS_ES_) {
773 debug("Rx: Error header=%#x", packet_len);
776 packet_len = ((packet_len & RX_STS_FL_) >> 16);
778 if (packet_len > actual_len - sizeof(packet_len)) {
779 debug("Rx: too large packet: %d\n", packet_len);
783 /* Notify net stack */
784 net_process_received_packet(buf_ptr + sizeof(packet_len),
787 /* Adjust for next iteration */
788 actual_len -= sizeof(packet_len) + packet_len;
789 buf_ptr += sizeof(packet_len) + packet_len;
790 cur_buf_align = (ulong)buf_ptr - (ulong)recv_buf;
792 if (cur_buf_align & 0x03) {
793 int align = 4 - (cur_buf_align & 0x03);
802 static void smsc95xx_halt(struct eth_device *eth)
804 debug("** %s()\n", __func__);
807 static int smsc95xx_write_hwaddr(struct eth_device *eth)
809 struct ueth_data *dev = eth->priv;
810 struct usb_device *udev = dev->pusb_dev;
811 struct smsc95xx_private *priv = dev->dev_priv;
813 return smsc95xx_write_hwaddr_common(udev, priv, eth->enetaddr);
817 * SMSC probing functions
819 void smsc95xx_eth_before_probe(void)
824 struct smsc95xx_dongle {
825 unsigned short vendor;
826 unsigned short product;
829 static const struct smsc95xx_dongle smsc95xx_dongles[] = {
830 { 0x0424, 0xec00 }, /* LAN9512/LAN9514 Ethernet */
831 { 0x0424, 0x9500 }, /* LAN9500 Ethernet */
832 { 0x0424, 0x9730 }, /* LAN9730 Ethernet (HSIC) */
833 { 0x0424, 0x9900 }, /* SMSC9500 USB Ethernet Device (SAL10) */
834 { 0x0424, 0x9e00 }, /* LAN9500A Ethernet */
835 { 0x0000, 0x0000 } /* END - Do not remove */
838 /* Probe to see if a new device is actually an SMSC device */
839 int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum,
840 struct ueth_data *ss)
842 struct usb_interface *iface;
843 struct usb_interface_descriptor *iface_desc;
846 /* let's examine the device now */
847 iface = &dev->config.if_desc[ifnum];
848 iface_desc = &dev->config.if_desc[ifnum].desc;
850 for (i = 0; smsc95xx_dongles[i].vendor != 0; i++) {
851 if (dev->descriptor.idVendor == smsc95xx_dongles[i].vendor &&
852 dev->descriptor.idProduct == smsc95xx_dongles[i].product)
853 /* Found a supported dongle */
856 if (smsc95xx_dongles[i].vendor == 0)
859 /* At this point, we know we've got a live one */
860 debug("\n\nUSB Ethernet device detected\n");
861 memset(ss, '\0', sizeof(struct ueth_data));
863 /* Initialize the ueth_data structure with some useful info */
866 ss->subclass = iface_desc->bInterfaceSubClass;
867 ss->protocol = iface_desc->bInterfaceProtocol;
870 * We are expecting a minimum of 3 endpoints - in, out (bulk), and int.
871 * We will ignore any others.
873 for (i = 0; i < iface_desc->bNumEndpoints; i++) {
874 /* is it an BULK endpoint? */
875 if ((iface->ep_desc[i].bmAttributes &
876 USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK) {
877 if (iface->ep_desc[i].bEndpointAddress & USB_DIR_IN)
879 iface->ep_desc[i].bEndpointAddress &
880 USB_ENDPOINT_NUMBER_MASK;
883 iface->ep_desc[i].bEndpointAddress &
884 USB_ENDPOINT_NUMBER_MASK;
887 /* is it an interrupt endpoint? */
888 if ((iface->ep_desc[i].bmAttributes &
889 USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) {
890 ss->ep_int = iface->ep_desc[i].bEndpointAddress &
891 USB_ENDPOINT_NUMBER_MASK;
892 ss->irqinterval = iface->ep_desc[i].bInterval;
895 debug("Endpoints In %d Out %d Int %d\n",
896 ss->ep_in, ss->ep_out, ss->ep_int);
898 /* Do some basic sanity checks, and bail if we find a problem */
899 if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) ||
900 !ss->ep_in || !ss->ep_out || !ss->ep_int) {
901 debug("Problems with device\n");
904 dev->privptr = (void *)ss;
906 /* alloc driver private */
907 ss->dev_priv = calloc(1, sizeof(struct smsc95xx_private));
914 int smsc95xx_eth_get_info(struct usb_device *dev, struct ueth_data *ss,
915 struct eth_device *eth)
917 debug("** %s()\n", __func__);
919 debug("%s: missing parameter.\n", __func__);
922 sprintf(eth->name, "%s%d", SMSC95XX_BASE_NAME, curr_eth_dev++);
923 eth->init = smsc95xx_init;
924 eth->send = smsc95xx_send;
925 eth->recv = smsc95xx_recv;
926 eth->halt = smsc95xx_halt;
927 eth->write_hwaddr = smsc95xx_write_hwaddr;
931 #endif /* !CONFIG_DM_ETH */
934 static int smsc95xx_eth_start(struct udevice *dev)
936 struct usb_device *udev = dev_get_parent_priv(dev);
937 struct smsc95xx_private *priv = dev_get_priv(dev);
938 struct eth_pdata *pdata = dev_get_platdata(dev);
940 /* Driver-model Ethernet ensures we have this */
941 priv->have_hwaddr = 1;
943 return smsc95xx_init_common(udev, &priv->ueth, priv, pdata->enetaddr);
946 void smsc95xx_eth_stop(struct udevice *dev)
948 debug("** %s()\n", __func__);
951 int smsc95xx_eth_send(struct udevice *dev, void *packet, int length)
953 struct smsc95xx_private *priv = dev_get_priv(dev);
955 return smsc95xx_send_common(&priv->ueth, packet, length);
958 int smsc95xx_eth_recv(struct udevice *dev, int flags, uchar **packetp)
960 struct smsc95xx_private *priv = dev_get_priv(dev);
961 struct ueth_data *ueth = &priv->ueth;
966 len = usb_ether_get_rx_bytes(ueth, &ptr);
967 debug("%s: first try, len=%d\n", __func__, len);
969 if (!(flags & ETH_RECV_CHECK_DEVICE))
971 ret = usb_ether_receive(ueth, RX_URB_SIZE);
975 len = usb_ether_get_rx_bytes(ueth, &ptr);
976 debug("%s: second try, len=%d\n", __func__, len);
980 * 1st 4 bytes contain the length of the actual data plus error info.
981 * Extract data length.
983 if (len < sizeof(packet_len)) {
984 debug("Rx: incomplete packet length\n");
987 memcpy(&packet_len, ptr, sizeof(packet_len));
988 le32_to_cpus(&packet_len);
989 if (packet_len & RX_STS_ES_) {
990 debug("Rx: Error header=%#x", packet_len);
993 packet_len = ((packet_len & RX_STS_FL_) >> 16);
995 if (packet_len > len - sizeof(packet_len)) {
996 debug("Rx: too large packet: %d\n", packet_len);
1000 *packetp = ptr + sizeof(packet_len);
1001 return packet_len - 4;
1004 usb_ether_advance_rxbuf(ueth, -1);
1008 static int smsc95xx_free_pkt(struct udevice *dev, uchar *packet, int packet_len)
1010 struct smsc95xx_private *priv = dev_get_priv(dev);
1012 packet_len = ALIGN(packet_len + sizeof(u32), 4);
1013 usb_ether_advance_rxbuf(&priv->ueth, sizeof(u32) + packet_len);
1018 int smsc95xx_write_hwaddr(struct udevice *dev)
1020 struct usb_device *udev = dev_get_parent_priv(dev);
1021 struct eth_pdata *pdata = dev_get_platdata(dev);
1022 struct smsc95xx_private *priv = dev_get_priv(dev);
1024 return smsc95xx_write_hwaddr_common(udev, priv, pdata->enetaddr);
1027 int smsc95xx_read_rom_hwaddr(struct udevice *dev)
1029 struct usb_device *udev = dev_get_parent_priv(dev);
1030 struct eth_pdata *pdata = dev_get_platdata(dev);
1033 ret = smsc95xx_init_mac_address(pdata->enetaddr, udev);
1035 memset(pdata->enetaddr, 0, 6);
1040 static int smsc95xx_eth_probe(struct udevice *dev)
1042 struct smsc95xx_private *priv = dev_get_priv(dev);
1043 struct ueth_data *ueth = &priv->ueth;
1045 return usb_ether_register(dev, ueth, RX_URB_SIZE);
1048 static const struct eth_ops smsc95xx_eth_ops = {
1049 .start = smsc95xx_eth_start,
1050 .send = smsc95xx_eth_send,
1051 .recv = smsc95xx_eth_recv,
1052 .free_pkt = smsc95xx_free_pkt,
1053 .stop = smsc95xx_eth_stop,
1054 .write_hwaddr = smsc95xx_write_hwaddr,
1055 .read_rom_hwaddr = smsc95xx_read_rom_hwaddr,
1058 U_BOOT_DRIVER(smsc95xx_eth) = {
1059 .name = "smsc95xx_eth",
1061 .probe = smsc95xx_eth_probe,
1062 .ops = &smsc95xx_eth_ops,
1063 .priv_auto_alloc_size = sizeof(struct smsc95xx_private),
1064 .platdata_auto_alloc_size = sizeof(struct eth_pdata),
1067 static const struct usb_device_id smsc95xx_eth_id_table[] = {
1068 { USB_DEVICE(0x05ac, 0x1402) },
1069 { USB_DEVICE(0x0424, 0xec00) }, /* LAN9512/LAN9514 Ethernet */
1070 { USB_DEVICE(0x0424, 0x9500) }, /* LAN9500 Ethernet */
1071 { USB_DEVICE(0x0424, 0x9730) }, /* LAN9730 Ethernet (HSIC) */
1072 { USB_DEVICE(0x0424, 0x9900) }, /* SMSC9500 USB Ethernet (SAL10) */
1073 { USB_DEVICE(0x0424, 0x9e00) }, /* LAN9500A Ethernet */
1074 { } /* Terminating entry */
1077 U_BOOT_USB_DEVICE(smsc95xx_eth, smsc95xx_eth_id_table);