drivers/usb/dwc3/dwc3-generic.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Generic DWC3 Glue layer
   4  *
   5  * Copyright (C) 2016 - 2018 Xilinx, Inc.
   6  *
   7  * Based on dwc3-omap.c.
   8  */
   9
  10 #include <common.h>
  11 #include <cpu_func.h>
  12 #include <log.h>
  13 #include <dm.h>
  14 #include <dm/device-internal.h>
  15 #include <dm/lists.h>
  16 #include <dwc3-uboot.h>
  17 #include <generic-phy.h>
  18 #include <linux/bitops.h>
  19 #include <linux/delay.h>
  20 #include <linux/usb/ch9.h>
  21 #include <linux/usb/gadget.h>
  22 #include <malloc.h>
  23 #include <usb.h>
  24 #include "core.h"
  25 #include "gadget.h"
  26 #include <reset.h>
  27 #include <clk.h>
  28 #include <usb/xhci.h>
  29
  30 struct dwc3_glue_data {
  31         struct clk_bulk         clks;
  32         struct reset_ctl_bulk   resets;
  33         fdt_addr_t regs;
  34 };
  35
  36 struct dwc3_generic_plat {
  37         fdt_addr_t base;
  38         u32 maximum_speed;
  39         enum usb_dr_mode dr_mode;
  40 };
  41
  42 struct dwc3_generic_priv {
  43         void *base;
  44         struct dwc3 dwc3;
  45         struct phy_bulk phys;
  46 };
  47
  48 struct dwc3_generic_host_priv {
  49         struct xhci_ctrl xhci_ctrl;
  50         struct dwc3_generic_priv gen_priv;
  51 };
  52
  53 static int dwc3_generic_probe(struct udevice *dev,
  54                               struct dwc3_generic_priv *priv)
  55 {
  56         int rc;
  57         struct dwc3_generic_plat *plat = dev_get_plat(dev);
  58         struct dwc3 *dwc3 = &priv->dwc3;
  59         struct dwc3_glue_data *glue = dev_get_plat(dev->parent);
  60
  61         dwc3->dev = dev;
  62         dwc3->maximum_speed = plat->maximum_speed;
  63         dwc3->dr_mode = plat->dr_mode;
  64 #if CONFIG_IS_ENABLED(OF_CONTROL)
  65         dwc3_of_parse(dwc3);
  66 #endif
  67
  68         /*
  69          * It must hold whole USB3.0 OTG controller in resetting to hold pipe
  70          * power state in P2 before initializing TypeC PHY on RK3399 platform.
  71          */
  72         if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3")) {
  73                 reset_assert_bulk(&glue->resets);
  74                 udelay(1);
  75         }
  76
  77         rc = dwc3_setup_phy(dev, &priv->phys);
  78         if (rc && rc != -ENOTSUPP)
  79                 return rc;
  80
  81         if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3"))
  82                 reset_deassert_bulk(&glue->resets);
  83
  84         priv->base = map_physmem(plat->base, DWC3_OTG_REGS_END, MAP_NOCACHE);
  85         dwc3->regs = priv->base + DWC3_GLOBALS_REGS_START;
  86
  87
  88         rc =  dwc3_init(dwc3);
  89         if (rc) {
  90                 unmap_physmem(priv->base, MAP_NOCACHE);
  91                 return rc;
  92         }
  93
  94         return 0;
  95 }
  96
  97 static int dwc3_generic_remove(struct udevice *dev,
  98                                struct dwc3_generic_priv *priv)
  99 {
 100         struct dwc3 *dwc3 = &priv->dwc3;
 101
 102         dwc3_remove(dwc3);
 103         dwc3_shutdown_phy(dev, &priv->phys);
 104         unmap_physmem(dwc3->regs, MAP_NOCACHE);
 105
 106         return 0;
 107 }
 108
 109 static int dwc3_generic_of_to_plat(struct udevice *dev)
 110 {
 111         struct dwc3_generic_plat *plat = dev_get_plat(dev);
 112         ofnode node = dev_ofnode(dev);
 113
 114         if (!strncmp(dev->name, "port", 4) || !strncmp(dev->name, "hub", 3)) {
 115                 /* This is a leaf so check the parent */
 116                 plat->base = dev_read_addr(dev->parent);
 117         } else {
 118                 plat->base = dev_read_addr(dev);
 119         }
 120
 121         plat->maximum_speed = usb_get_maximum_speed(node);
 122         if (plat->maximum_speed == USB_SPEED_UNKNOWN) {
 123                 pr_info("No USB maximum speed specified. Using super speed\n");
 124                 plat->maximum_speed = USB_SPEED_SUPER;
 125         }
 126
 127         plat->dr_mode = usb_get_dr_mode(node);
 128         if (plat->dr_mode == USB_DR_MODE_UNKNOWN) {
 129                 /* might be a leaf so check the parent for mode */
 130                 node = dev_ofnode(dev->parent);
 131                 plat->dr_mode = usb_get_dr_mode(node);
 132                 if (plat->dr_mode == USB_DR_MODE_UNKNOWN) {
 133                         pr_err("Invalid usb mode setup\n");
 134                         return -ENODEV;
 135                 }
 136         }
 137
 138         return 0;
 139 }
 140
 141 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
 142 int dm_usb_gadget_handle_interrupts(struct udevice *dev)
 143 {
 144         struct dwc3_generic_priv *priv = dev_get_priv(dev);
 145         struct dwc3 *dwc3 = &priv->dwc3;
 146
 147         dwc3_gadget_uboot_handle_interrupt(dwc3);
 148
 149         return 0;
 150 }
 151
 152 static int dwc3_generic_peripheral_probe(struct udevice *dev)
 153 {
 154         struct dwc3_generic_priv *priv = dev_get_priv(dev);
 155
 156         return dwc3_generic_probe(dev, priv);
 157 }
 158
 159 static int dwc3_generic_peripheral_remove(struct udevice *dev)
 160 {
 161         struct dwc3_generic_priv *priv = dev_get_priv(dev);
 162
 163         return dwc3_generic_remove(dev, priv);
 164 }
 165
 166 U_BOOT_DRIVER(dwc3_generic_peripheral) = {
 167         .name   = "dwc3-generic-peripheral",
 168         .id     = UCLASS_USB_GADGET_GENERIC,
 169         .of_to_plat = dwc3_generic_of_to_plat,
 170         .probe = dwc3_generic_peripheral_probe,
 171         .remove = dwc3_generic_peripheral_remove,
 172         .priv_auto      = sizeof(struct dwc3_generic_priv),
 173         .plat_auto      = sizeof(struct dwc3_generic_plat),
 174 };
 175 #endif
 176
 177 #if defined(CONFIG_SPL_USB_HOST) || \
 178         !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST)
 179 static int dwc3_generic_host_probe(struct udevice *dev)
 180 {
 181         struct xhci_hcor *hcor;
 182         struct xhci_hccr *hccr;
 183         struct dwc3_generic_host_priv *priv = dev_get_priv(dev);
 184         int rc;
 185
 186         rc = dwc3_generic_probe(dev, &priv->gen_priv);
 187         if (rc)
 188                 return rc;
 189
 190         hccr = (struct xhci_hccr *)priv->gen_priv.base;
 191         hcor = (struct xhci_hcor *)(priv->gen_priv.base +
 192                         HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
 193
 194         return xhci_register(dev, hccr, hcor);
 195 }
 196
 197 static int dwc3_generic_host_remove(struct udevice *dev)
 198 {
 199         struct dwc3_generic_host_priv *priv = dev_get_priv(dev);
 200         int rc;
 201
 202         rc = xhci_deregister(dev);
 203         if (rc)
 204                 return rc;
 205
 206         return dwc3_generic_remove(dev, &priv->gen_priv);
 207 }
 208
 209 U_BOOT_DRIVER(dwc3_generic_host) = {
 210         .name   = "dwc3-generic-host",
 211         .id     = UCLASS_USB,
 212         .of_to_plat = dwc3_generic_of_to_plat,
 213         .probe = dwc3_generic_host_probe,
 214         .remove = dwc3_generic_host_remove,
 215         .priv_auto      = sizeof(struct dwc3_generic_host_priv),
 216         .plat_auto      = sizeof(struct dwc3_generic_plat),
 217         .ops = &xhci_usb_ops,
 218         .flags = DM_FLAG_ALLOC_PRIV_DMA,
 219 };
 220 #endif
 221
 222 struct dwc3_glue_ops {
 223         void (*glue_configure)(struct udevice *dev, int index,
 224                                enum usb_dr_mode mode);
 225 };
 226
 227 void dwc3_imx8mp_glue_configure(struct udevice *dev, int index,
 228                                 enum usb_dr_mode mode)
 229 {
 230 /* USB glue registers */
 231 #define USB_CTRL0               0x00
 232 #define USB_CTRL1               0x04
 233
 234 #define USB_CTRL0_PORTPWR_EN    BIT(12) /* 1 - PPC enabled (default) */
 235 #define USB_CTRL0_USB3_FIXED    BIT(22) /* 1 - USB3 permanent attached */
 236 #define USB_CTRL0_USB2_FIXED    BIT(23) /* 1 - USB2 permanent attached */
 237
 238 #define USB_CTRL1_OC_POLARITY   BIT(16) /* 0 - HIGH / 1 - LOW */
 239 #define USB_CTRL1_PWR_POLARITY  BIT(17) /* 0 - HIGH / 1 - LOW */
 240         fdt_addr_t regs = dev_read_addr_index(dev, 1);
 241         void *base = map_physmem(regs, 0x8, MAP_NOCACHE);
 242         u32 value;
 243
 244         value = readl(base + USB_CTRL0);
 245
 246         if (dev_read_bool(dev, "fsl,permanently-attached"))
 247                 value |= (USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED);
 248         else
 249                 value &= ~(USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED);
 250
 251         if (dev_read_bool(dev, "fsl,disable-port-power-control"))
 252                 value &= ~(USB_CTRL0_PORTPWR_EN);
 253         else
 254                 value |= USB_CTRL0_PORTPWR_EN;
 255
 256         writel(value, base + USB_CTRL0);
 257
 258         value = readl(base + USB_CTRL1);
 259         if (dev_read_bool(dev, "fsl,over-current-active-low"))
 260                 value |= USB_CTRL1_OC_POLARITY;
 261         else
 262                 value &= ~USB_CTRL1_OC_POLARITY;
 263
 264         if (dev_read_bool(dev, "fsl,power-active-low"))
 265                 value |= USB_CTRL1_PWR_POLARITY;
 266         else
 267                 value &= ~USB_CTRL1_PWR_POLARITY;
 268
 269         writel(value, base + USB_CTRL1);
 270
 271         unmap_physmem(base, MAP_NOCACHE);
 272 }
 273
 274 struct dwc3_glue_ops imx8mp_ops = {
 275         .glue_configure = dwc3_imx8mp_glue_configure,
 276 };
 277
 278 void dwc3_ti_glue_configure(struct udevice *dev, int index,
 279                             enum usb_dr_mode mode)
 280 {
 281 #define USBOTGSS_UTMI_OTG_STATUS                0x0084
 282 #define USBOTGSS_UTMI_OTG_OFFSET                0x0480
 283
 284 /* UTMI_OTG_STATUS REGISTER */
 285 #define USBOTGSS_UTMI_OTG_STATUS_SW_MODE        BIT(31)
 286 #define USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT   BIT(9)
 287 #define USBOTGSS_UTMI_OTG_STATUS_TXBITSTUFFENABLE BIT(8)
 288 #define USBOTGSS_UTMI_OTG_STATUS_IDDIG          BIT(4)
 289 #define USBOTGSS_UTMI_OTG_STATUS_SESSEND        BIT(3)
 290 #define USBOTGSS_UTMI_OTG_STATUS_SESSVALID      BIT(2)
 291 #define USBOTGSS_UTMI_OTG_STATUS_VBUSVALID      BIT(1)
 292 enum dwc3_omap_utmi_mode {
 293         DWC3_OMAP_UTMI_MODE_UNKNOWN = 0,
 294         DWC3_OMAP_UTMI_MODE_HW,
 295         DWC3_OMAP_UTMI_MODE_SW,
 296 };
 297
 298         u32 use_id_pin;
 299         u32 host_mode;
 300         u32 reg;
 301         u32 utmi_mode;
 302         u32 utmi_status_offset = USBOTGSS_UTMI_OTG_STATUS;
 303
 304         struct dwc3_glue_data *glue = dev_get_plat(dev);
 305         void *base = map_physmem(glue->regs, 0x10000, MAP_NOCACHE);
 306
 307         if (device_is_compatible(dev, "ti,am437x-dwc3"))
 308                 utmi_status_offset += USBOTGSS_UTMI_OTG_OFFSET;
 309
 310         utmi_mode = dev_read_u32_default(dev, "utmi-mode",
 311                                          DWC3_OMAP_UTMI_MODE_UNKNOWN);
 312         if (utmi_mode != DWC3_OMAP_UTMI_MODE_HW) {
 313                 debug("%s: OTG is not supported. defaulting to PERIPHERAL\n",
 314                       dev->name);
 315                 mode = USB_DR_MODE_PERIPHERAL;
 316         }
 317
 318         switch (mode)  {
 319         case USB_DR_MODE_PERIPHERAL:
 320                 use_id_pin = 0;
 321                 host_mode = 0;
 322                 break;
 323         case USB_DR_MODE_HOST:
 324                 use_id_pin = 0;
 325                 host_mode = 1;
 326                 break;
 327         case USB_DR_MODE_OTG:
 328         default:
 329                 use_id_pin = 1;
 330                 host_mode = 0;
 331                 break;
 332         }
 333
 334         reg = readl(base + utmi_status_offset);
 335
 336         reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SW_MODE);
 337         if (!use_id_pin)
 338                 reg |= USBOTGSS_UTMI_OTG_STATUS_SW_MODE;
 339
 340         writel(reg, base + utmi_status_offset);
 341
 342         reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SESSEND |
 343                 USBOTGSS_UTMI_OTG_STATUS_VBUSVALID |
 344                 USBOTGSS_UTMI_OTG_STATUS_IDDIG);
 345
 346         reg |= USBOTGSS_UTMI_OTG_STATUS_SESSVALID |
 347                 USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT;
 348
 349         if (!host_mode)
 350                 reg |= USBOTGSS_UTMI_OTG_STATUS_IDDIG |
 351                         USBOTGSS_UTMI_OTG_STATUS_VBUSVALID;
 352
 353         writel(reg, base + utmi_status_offset);
 354
 355         unmap_physmem(base, MAP_NOCACHE);
 356 }
 357
 358 struct dwc3_glue_ops ti_ops = {
 359         .glue_configure = dwc3_ti_glue_configure,
 360 };
 361
 362 static int dwc3_glue_bind(struct udevice *parent)
 363 {
 364         ofnode node;
 365         int ret;
 366         enum usb_dr_mode dr_mode;
 367
 368         dr_mode = usb_get_dr_mode(dev_ofnode(parent));
 369
 370         ofnode_for_each_subnode(node, dev_ofnode(parent)) {
 371                 const char *name = ofnode_get_name(node);
 372                 struct udevice *dev;
 373                 const char *driver = NULL;
 374
 375                 debug("%s: subnode name: %s\n", __func__, name);
 376
 377                 /* if the parent node doesn't have a mode check the leaf */
 378                 if (!dr_mode)
 379                         dr_mode = usb_get_dr_mode(node);
 380
 381                 switch (dr_mode) {
 382                 case USB_DR_MODE_PERIPHERAL:
 383                 case USB_DR_MODE_OTG:
 384 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
 385                         debug("%s: dr_mode: OTG or Peripheral\n", __func__);
 386                         driver = "dwc3-generic-peripheral";
 387 #endif
 388                         break;
 389 #if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD)
 390                 case USB_DR_MODE_HOST:
 391                         debug("%s: dr_mode: HOST\n", __func__);
 392                         driver = "dwc3-generic-host";
 393                         break;
 394 #endif
 395                 default:
 396                         debug("%s: unsupported dr_mode\n", __func__);
 397                         return -ENODEV;
 398                 };
 399
 400                 if (!driver)
 401                         continue;
 402
 403                 ret = device_bind_driver_to_node(parent, driver, name,
 404                                                  node, &dev);
 405                 if (ret) {
 406                         debug("%s: not able to bind usb device mode\n",
 407                               __func__);
 408                         return ret;
 409                 }
 410         }
 411
 412         return 0;
 413 }
 414
 415 static int dwc3_glue_reset_init(struct udevice *dev,
 416                                 struct dwc3_glue_data *glue)
 417 {
 418         int ret;
 419
 420         ret = reset_get_bulk(dev, &glue->resets);
 421         if (ret == -ENOTSUPP || ret == -ENOENT)
 422                 return 0;
 423         else if (ret)
 424                 return ret;
 425
 426         ret = reset_deassert_bulk(&glue->resets);
 427         if (ret) {
 428                 reset_release_bulk(&glue->resets);
 429                 return ret;
 430         }
 431
 432         return 0;
 433 }
 434
 435 static int dwc3_glue_clk_init(struct udevice *dev,
 436                               struct dwc3_glue_data *glue)
 437 {
 438         int ret;
 439
 440         ret = clk_get_bulk(dev, &glue->clks);
 441         if (ret == -ENOSYS || ret == -ENOENT)
 442                 return 0;
 443         if (ret)
 444                 return ret;
 445
 446 #if CONFIG_IS_ENABLED(CLK)
 447         ret = clk_enable_bulk(&glue->clks);
 448         if (ret) {
 449                 clk_release_bulk(&glue->clks);
 450                 return ret;
 451         }
 452 #endif
 453
 454         return 0;
 455 }
 456
 457 static int dwc3_glue_probe(struct udevice *dev)
 458 {
 459         struct dwc3_glue_ops *ops = (struct dwc3_glue_ops *)dev_get_driver_data(dev);
 460         struct dwc3_glue_data *glue = dev_get_plat(dev);
 461         struct udevice *child = NULL;
 462         int index = 0;
 463         int ret;
 464         struct phy phy;
 465
 466         ret = generic_phy_get_by_name(dev, "usb3-phy", &phy);
 467         if (!ret) {
 468                 ret = generic_phy_init(&phy);
 469                 if (ret)
 470                         return ret;
 471         } else if (ret != -ENOENT) {
 472                 debug("could not get phy (err %d)\n", ret);
 473                 return ret;
 474         }
 475
 476         glue->regs = dev_read_addr(dev);
 477
 478         ret = dwc3_glue_clk_init(dev, glue);
 479         if (ret)
 480                 return ret;
 481
 482         ret = dwc3_glue_reset_init(dev, glue);
 483         if (ret)
 484                 return ret;
 485
 486         if (phy.dev) {
 487                 ret = generic_phy_power_on(&phy);
 488                 if (ret)
 489                         return ret;
 490         }
 491
 492         ret = device_find_first_child(dev, &child);
 493         if (ret)
 494                 return ret;
 495
 496         if (glue->resets.count == 0) {
 497                 ret = dwc3_glue_reset_init(child, glue);
 498                 if (ret)
 499                         return ret;
 500         }
 501
 502         while (child) {
 503                 enum usb_dr_mode dr_mode;
 504
 505                 dr_mode = usb_get_dr_mode(dev_ofnode(child));
 506                 device_find_next_child(&child);
 507                 if (ops && ops->glue_configure)
 508                         ops->glue_configure(dev, index, dr_mode);
 509                 index++;
 510         }
 511
 512         return 0;
 513 }
 514
 515 static int dwc3_glue_remove(struct udevice *dev)
 516 {
 517         struct dwc3_glue_data *glue = dev_get_plat(dev);
 518
 519         reset_release_bulk(&glue->resets);
 520
 521         clk_release_bulk(&glue->clks);
 522
 523         return 0;
 524 }
 525
 526 static const struct udevice_id dwc3_glue_ids[] = {
 527         { .compatible = "xlnx,zynqmp-dwc3" },
 528         { .compatible = "xlnx,versal-dwc3" },
 529         { .compatible = "ti,keystone-dwc3"},
 530         { .compatible = "ti,dwc3", .data = (ulong)&ti_ops },
 531         { .compatible = "ti,am437x-dwc3", .data = (ulong)&ti_ops },
 532         { .compatible = "ti,am654-dwc3" },
 533         { .compatible = "rockchip,rk3328-dwc3" },
 534         { .compatible = "rockchip,rk3399-dwc3" },
 535         { .compatible = "qcom,dwc3" },
 536         { .compatible = "fsl,imx8mp-dwc3", .data = (ulong)&imx8mp_ops },
 537         { .compatible = "fsl,imx8mq-dwc3" },
 538         { .compatible = "intel,tangier-dwc3" },
 539         { }
 540 };
 541
 542 U_BOOT_DRIVER(dwc3_generic_wrapper) = {
 543         .name   = "dwc3-generic-wrapper",
 544         .id     = UCLASS_NOP,
 545         .of_match = dwc3_glue_ids,
 546         .bind = dwc3_glue_bind,
 547         .probe = dwc3_glue_probe,
 548         .remove = dwc3_glue_remove,
 549         .plat_auto      = sizeof(struct dwc3_glue_data),
 550
 551 };