drivers/usb/dwc3/dwc3-generic.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Generic DWC3 Glue layer
   4  *
   5  * Copyright (C) 2016 - 2018 Xilinx, Inc.
   6  *
   7  * Based on dwc3-omap.c.
   8  */
   9
  10 #include <common.h>
  11 #include <cpu_func.h>
  12 #include <log.h>
  13 #include <dm.h>
  14 #include <dm/device-internal.h>
  15 #include <dm/lists.h>
  16 #include <dwc3-uboot.h>
  17 #include <linux/bitops.h>
  18 #include <linux/delay.h>
  19 #include <linux/usb/ch9.h>
  20 #include <linux/usb/gadget.h>
  21 #include <malloc.h>
  22 #include <usb.h>
  23 #include "core.h"
  24 #include "gadget.h"
  25 #include <reset.h>
  26 #include <clk.h>
  27 #include <usb/xhci.h>
  28
  29 struct dwc3_glue_data {
  30         struct clk_bulk         clks;
  31         struct reset_ctl_bulk   resets;
  32         fdt_addr_t regs;
  33 };
  34
  35 struct dwc3_generic_plat {
  36         fdt_addr_t base;
  37         u32 maximum_speed;
  38         enum usb_dr_mode dr_mode;
  39 };
  40
  41 struct dwc3_generic_priv {
  42         void *base;
  43         struct dwc3 dwc3;
  44         struct phy_bulk phys;
  45 };
  46
  47 struct dwc3_generic_host_priv {
  48         struct xhci_ctrl xhci_ctrl;
  49         struct dwc3_generic_priv gen_priv;
  50 };
  51
  52 static int dwc3_generic_probe(struct udevice *dev,
  53                               struct dwc3_generic_priv *priv)
  54 {
  55         int rc;
  56         struct dwc3_generic_plat *plat = dev_get_plat(dev);
  57         struct dwc3 *dwc3 = &priv->dwc3;
  58         struct dwc3_glue_data *glue = dev_get_plat(dev->parent);
  59
  60         dwc3->dev = dev;
  61         dwc3->maximum_speed = plat->maximum_speed;
  62         dwc3->dr_mode = plat->dr_mode;
  63 #if CONFIG_IS_ENABLED(OF_CONTROL)
  64         dwc3_of_parse(dwc3);
  65 #endif
  66
  67         /*
  68          * It must hold whole USB3.0 OTG controller in resetting to hold pipe
  69          * power state in P2 before initializing TypeC PHY on RK3399 platform.
  70          */
  71         if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3")) {
  72                 reset_assert_bulk(&glue->resets);
  73                 udelay(1);
  74         }
  75
  76         rc = dwc3_setup_phy(dev, &priv->phys);
  77         if (rc && rc != -ENOTSUPP)
  78                 return rc;
  79
  80         if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3"))
  81                 reset_deassert_bulk(&glue->resets);
  82
  83         priv->base = map_physmem(plat->base, DWC3_OTG_REGS_END, MAP_NOCACHE);
  84         dwc3->regs = priv->base + DWC3_GLOBALS_REGS_START;
  85
  86
  87         rc =  dwc3_init(dwc3);
  88         if (rc) {
  89                 unmap_physmem(priv->base, MAP_NOCACHE);
  90                 return rc;
  91         }
  92
  93         return 0;
  94 }
  95
  96 static int dwc3_generic_remove(struct udevice *dev,
  97                                struct dwc3_generic_priv *priv)
  98 {
  99         struct dwc3 *dwc3 = &priv->dwc3;
 100
 101         dwc3_remove(dwc3);
 102         dwc3_shutdown_phy(dev, &priv->phys);
 103         unmap_physmem(dwc3->regs, MAP_NOCACHE);
 104
 105         return 0;
 106 }
 107
 108 static int dwc3_generic_of_to_plat(struct udevice *dev)
 109 {
 110         struct dwc3_generic_plat *plat = dev_get_plat(dev);
 111         ofnode node = dev_ofnode(dev);
 112
 113         if (!strncmp(dev->name, "port", 4) || !strncmp(dev->name, "hub", 3)) {
 114                 /* This is a leaf so check the parent */
 115                 plat->base = dev_read_addr(dev->parent);
 116         } else {
 117                 plat->base = dev_read_addr(dev);
 118         }
 119
 120         plat->maximum_speed = usb_get_maximum_speed(node);
 121         if (plat->maximum_speed == USB_SPEED_UNKNOWN) {
 122                 pr_info("No USB maximum speed specified. Using super speed\n");
 123                 plat->maximum_speed = USB_SPEED_SUPER;
 124         }
 125
 126         plat->dr_mode = usb_get_dr_mode(node);
 127         if (plat->dr_mode == USB_DR_MODE_UNKNOWN) {
 128                 /* might be a leaf so check the parent for mode */
 129                 node = dev_ofnode(dev->parent);
 130                 plat->dr_mode = usb_get_dr_mode(node);
 131                 if (plat->dr_mode == USB_DR_MODE_UNKNOWN) {
 132                         pr_err("Invalid usb mode setup\n");
 133                         return -ENODEV;
 134                 }
 135         }
 136
 137         return 0;
 138 }
 139
 140 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
 141 int dm_usb_gadget_handle_interrupts(struct udevice *dev)
 142 {
 143         struct dwc3_generic_priv *priv = dev_get_priv(dev);
 144         struct dwc3 *dwc3 = &priv->dwc3;
 145
 146         dwc3_gadget_uboot_handle_interrupt(dwc3);
 147
 148         return 0;
 149 }
 150
 151 static int dwc3_generic_peripheral_probe(struct udevice *dev)
 152 {
 153         struct dwc3_generic_priv *priv = dev_get_priv(dev);
 154
 155         return dwc3_generic_probe(dev, priv);
 156 }
 157
 158 static int dwc3_generic_peripheral_remove(struct udevice *dev)
 159 {
 160         struct dwc3_generic_priv *priv = dev_get_priv(dev);
 161
 162         return dwc3_generic_remove(dev, priv);
 163 }
 164
 165 U_BOOT_DRIVER(dwc3_generic_peripheral) = {
 166         .name   = "dwc3-generic-peripheral",
 167         .id     = UCLASS_USB_GADGET_GENERIC,
 168         .of_to_plat = dwc3_generic_of_to_plat,
 169         .probe = dwc3_generic_peripheral_probe,
 170         .remove = dwc3_generic_peripheral_remove,
 171         .priv_auto      = sizeof(struct dwc3_generic_priv),
 172         .plat_auto      = sizeof(struct dwc3_generic_plat),
 173 };
 174 #endif
 175
 176 #if defined(CONFIG_SPL_USB_HOST) || \
 177         !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST)
 178 static int dwc3_generic_host_probe(struct udevice *dev)
 179 {
 180         struct xhci_hcor *hcor;
 181         struct xhci_hccr *hccr;
 182         struct dwc3_generic_host_priv *priv = dev_get_priv(dev);
 183         int rc;
 184
 185         rc = dwc3_generic_probe(dev, &priv->gen_priv);
 186         if (rc)
 187                 return rc;
 188
 189         hccr = (struct xhci_hccr *)priv->gen_priv.base;
 190         hcor = (struct xhci_hcor *)(priv->gen_priv.base +
 191                         HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
 192
 193         return xhci_register(dev, hccr, hcor);
 194 }
 195
 196 static int dwc3_generic_host_remove(struct udevice *dev)
 197 {
 198         struct dwc3_generic_host_priv *priv = dev_get_priv(dev);
 199         int rc;
 200
 201         rc = xhci_deregister(dev);
 202         if (rc)
 203                 return rc;
 204
 205         return dwc3_generic_remove(dev, &priv->gen_priv);
 206 }
 207
 208 U_BOOT_DRIVER(dwc3_generic_host) = {
 209         .name   = "dwc3-generic-host",
 210         .id     = UCLASS_USB,
 211         .of_to_plat = dwc3_generic_of_to_plat,
 212         .probe = dwc3_generic_host_probe,
 213         .remove = dwc3_generic_host_remove,
 214         .priv_auto      = sizeof(struct dwc3_generic_host_priv),
 215         .plat_auto      = sizeof(struct dwc3_generic_plat),
 216         .ops = &xhci_usb_ops,
 217         .flags = DM_FLAG_ALLOC_PRIV_DMA,
 218 };
 219 #endif
 220
 221 struct dwc3_glue_ops {
 222         void (*glue_configure)(struct udevice *dev, int index,
 223                                enum usb_dr_mode mode);
 224 };
 225
 226 void dwc3_imx8mp_glue_configure(struct udevice *dev, int index,
 227                                 enum usb_dr_mode mode)
 228 {
 229 /* USB glue registers */
 230 #define USB_CTRL0               0x00
 231 #define USB_CTRL1               0x04
 232
 233 #define USB_CTRL0_PORTPWR_EN    BIT(12) /* 1 - PPC enabled (default) */
 234 #define USB_CTRL0_USB3_FIXED    BIT(22) /* 1 - USB3 permanent attached */
 235 #define USB_CTRL0_USB2_FIXED    BIT(23) /* 1 - USB2 permanent attached */
 236
 237 #define USB_CTRL1_OC_POLARITY   BIT(16) /* 0 - HIGH / 1 - LOW */
 238 #define USB_CTRL1_PWR_POLARITY  BIT(17) /* 0 - HIGH / 1 - LOW */
 239         fdt_addr_t regs = dev_read_addr_index(dev, 1);
 240         void *base = map_physmem(regs, 0x8, MAP_NOCACHE);
 241         u32 value;
 242
 243         value = readl(base + USB_CTRL0);
 244
 245         if (dev_read_bool(dev, "fsl,permanently-attached"))
 246                 value |= (USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED);
 247         else
 248                 value &= ~(USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED);
 249
 250         if (dev_read_bool(dev, "fsl,disable-port-power-control"))
 251                 value &= ~(USB_CTRL0_PORTPWR_EN);
 252         else
 253                 value |= USB_CTRL0_PORTPWR_EN;
 254
 255         writel(value, base + USB_CTRL0);
 256
 257         value = readl(base + USB_CTRL1);
 258         if (dev_read_bool(dev, "fsl,over-current-active-low"))
 259                 value |= USB_CTRL1_OC_POLARITY;
 260         else
 261                 value &= ~USB_CTRL1_OC_POLARITY;
 262
 263         if (dev_read_bool(dev, "fsl,power-active-low"))
 264                 value |= USB_CTRL1_PWR_POLARITY;
 265         else
 266                 value &= ~USB_CTRL1_PWR_POLARITY;
 267
 268         writel(value, base + USB_CTRL1);
 269
 270         unmap_physmem(base, MAP_NOCACHE);
 271 }
 272
 273 struct dwc3_glue_ops imx8mp_ops = {
 274         .glue_configure = dwc3_imx8mp_glue_configure,
 275 };
 276
 277 void dwc3_ti_glue_configure(struct udevice *dev, int index,
 278                             enum usb_dr_mode mode)
 279 {
 280 #define USBOTGSS_UTMI_OTG_STATUS                0x0084
 281 #define USBOTGSS_UTMI_OTG_OFFSET                0x0480
 282
 283 /* UTMI_OTG_STATUS REGISTER */
 284 #define USBOTGSS_UTMI_OTG_STATUS_SW_MODE        BIT(31)
 285 #define USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT   BIT(9)
 286 #define USBOTGSS_UTMI_OTG_STATUS_TXBITSTUFFENABLE BIT(8)
 287 #define USBOTGSS_UTMI_OTG_STATUS_IDDIG          BIT(4)
 288 #define USBOTGSS_UTMI_OTG_STATUS_SESSEND        BIT(3)
 289 #define USBOTGSS_UTMI_OTG_STATUS_SESSVALID      BIT(2)
 290 #define USBOTGSS_UTMI_OTG_STATUS_VBUSVALID      BIT(1)
 291 enum dwc3_omap_utmi_mode {
 292         DWC3_OMAP_UTMI_MODE_UNKNOWN = 0,
 293         DWC3_OMAP_UTMI_MODE_HW,
 294         DWC3_OMAP_UTMI_MODE_SW,
 295 };
 296
 297         u32 use_id_pin;
 298         u32 host_mode;
 299         u32 reg;
 300         u32 utmi_mode;
 301         u32 utmi_status_offset = USBOTGSS_UTMI_OTG_STATUS;
 302
 303         struct dwc3_glue_data *glue = dev_get_plat(dev);
 304         void *base = map_physmem(glue->regs, 0x10000, MAP_NOCACHE);
 305
 306         if (device_is_compatible(dev, "ti,am437x-dwc3"))
 307                 utmi_status_offset += USBOTGSS_UTMI_OTG_OFFSET;
 308
 309         utmi_mode = dev_read_u32_default(dev, "utmi-mode",
 310                                          DWC3_OMAP_UTMI_MODE_UNKNOWN);
 311         if (utmi_mode != DWC3_OMAP_UTMI_MODE_HW) {
 312                 debug("%s: OTG is not supported. defaulting to PERIPHERAL\n",
 313                       dev->name);
 314                 mode = USB_DR_MODE_PERIPHERAL;
 315         }
 316
 317         switch (mode)  {
 318         case USB_DR_MODE_PERIPHERAL:
 319                 use_id_pin = 0;
 320                 host_mode = 0;
 321                 break;
 322         case USB_DR_MODE_HOST:
 323                 use_id_pin = 0;
 324                 host_mode = 1;
 325                 break;
 326         case USB_DR_MODE_OTG:
 327         default:
 328                 use_id_pin = 1;
 329                 host_mode = 0;
 330                 break;
 331         }
 332
 333         reg = readl(base + utmi_status_offset);
 334
 335         reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SW_MODE);
 336         if (!use_id_pin)
 337                 reg |= USBOTGSS_UTMI_OTG_STATUS_SW_MODE;
 338
 339         writel(reg, base + utmi_status_offset);
 340
 341         reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SESSEND |
 342                 USBOTGSS_UTMI_OTG_STATUS_VBUSVALID |
 343                 USBOTGSS_UTMI_OTG_STATUS_IDDIG);
 344
 345         reg |= USBOTGSS_UTMI_OTG_STATUS_SESSVALID |
 346                 USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT;
 347
 348         if (!host_mode)
 349                 reg |= USBOTGSS_UTMI_OTG_STATUS_IDDIG |
 350                         USBOTGSS_UTMI_OTG_STATUS_VBUSVALID;
 351
 352         writel(reg, base + utmi_status_offset);
 353
 354         unmap_physmem(base, MAP_NOCACHE);
 355 }
 356
 357 struct dwc3_glue_ops ti_ops = {
 358         .glue_configure = dwc3_ti_glue_configure,
 359 };
 360
 361 static int dwc3_glue_bind(struct udevice *parent)
 362 {
 363         ofnode node;
 364         int ret;
 365         enum usb_dr_mode dr_mode;
 366
 367         dr_mode = usb_get_dr_mode(dev_ofnode(parent));
 368
 369         ofnode_for_each_subnode(node, dev_ofnode(parent)) {
 370                 const char *name = ofnode_get_name(node);
 371                 struct udevice *dev;
 372                 const char *driver = NULL;
 373
 374                 debug("%s: subnode name: %s\n", __func__, name);
 375
 376                 /* if the parent node doesn't have a mode check the leaf */
 377                 if (!dr_mode)
 378                         dr_mode = usb_get_dr_mode(node);
 379
 380                 switch (dr_mode) {
 381                 case USB_DR_MODE_PERIPHERAL:
 382                 case USB_DR_MODE_OTG:
 383 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
 384                         debug("%s: dr_mode: OTG or Peripheral\n", __func__);
 385                         driver = "dwc3-generic-peripheral";
 386 #endif
 387                         break;
 388 #if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD)
 389                 case USB_DR_MODE_HOST:
 390                         debug("%s: dr_mode: HOST\n", __func__);
 391                         driver = "dwc3-generic-host";
 392                         break;
 393 #endif
 394                 default:
 395                         debug("%s: unsupported dr_mode\n", __func__);
 396                         return -ENODEV;
 397                 };
 398
 399                 if (!driver)
 400                         continue;
 401
 402                 ret = device_bind_driver_to_node(parent, driver, name,
 403                                                  node, &dev);
 404                 if (ret) {
 405                         debug("%s: not able to bind usb device mode\n",
 406                               __func__);
 407                         return ret;
 408                 }
 409         }
 410
 411         return 0;
 412 }
 413
 414 static int dwc3_glue_reset_init(struct udevice *dev,
 415                                 struct dwc3_glue_data *glue)
 416 {
 417         int ret;
 418
 419         ret = reset_get_bulk(dev, &glue->resets);
 420         if (ret == -ENOTSUPP || ret == -ENOENT)
 421                 return 0;
 422         else if (ret)
 423                 return ret;
 424
 425         ret = reset_deassert_bulk(&glue->resets);
 426         if (ret) {
 427                 reset_release_bulk(&glue->resets);
 428                 return ret;
 429         }
 430
 431         return 0;
 432 }
 433
 434 static int dwc3_glue_clk_init(struct udevice *dev,
 435                               struct dwc3_glue_data *glue)
 436 {
 437         int ret;
 438
 439         ret = clk_get_bulk(dev, &glue->clks);
 440         if (ret == -ENOSYS || ret == -ENOENT)
 441                 return 0;
 442         if (ret)
 443                 return ret;
 444
 445 #if CONFIG_IS_ENABLED(CLK)
 446         ret = clk_enable_bulk(&glue->clks);
 447         if (ret) {
 448                 clk_release_bulk(&glue->clks);
 449                 return ret;
 450         }
 451 #endif
 452
 453         return 0;
 454 }
 455
 456 static int dwc3_glue_probe(struct udevice *dev)
 457 {
 458         struct dwc3_glue_ops *ops = (struct dwc3_glue_ops *)dev_get_driver_data(dev);
 459         struct dwc3_glue_data *glue = dev_get_plat(dev);
 460         struct udevice *child = NULL;
 461         int index = 0;
 462         int ret;
 463
 464         glue->regs = dev_read_addr(dev);
 465
 466         ret = dwc3_glue_clk_init(dev, glue);
 467         if (ret)
 468                 return ret;
 469
 470         ret = dwc3_glue_reset_init(dev, glue);
 471         if (ret)
 472                 return ret;
 473
 474         ret = device_find_first_child(dev, &child);
 475         if (ret)
 476                 return ret;
 477
 478         if (glue->resets.count == 0) {
 479                 ret = dwc3_glue_reset_init(child, glue);
 480                 if (ret)
 481                         return ret;
 482         }
 483
 484         while (child) {
 485                 enum usb_dr_mode dr_mode;
 486
 487                 dr_mode = usb_get_dr_mode(dev_ofnode(child));
 488                 device_find_next_child(&child);
 489                 if (ops && ops->glue_configure)
 490                         ops->glue_configure(dev, index, dr_mode);
 491                 index++;
 492         }
 493
 494         return 0;
 495 }
 496
 497 static int dwc3_glue_remove(struct udevice *dev)
 498 {
 499         struct dwc3_glue_data *glue = dev_get_plat(dev);
 500
 501         reset_release_bulk(&glue->resets);
 502
 503         clk_release_bulk(&glue->clks);
 504
 505         return 0;
 506 }
 507
 508 static const struct udevice_id dwc3_glue_ids[] = {
 509         { .compatible = "xlnx,zynqmp-dwc3" },
 510         { .compatible = "xlnx,versal-dwc3" },
 511         { .compatible = "ti,keystone-dwc3"},
 512         { .compatible = "ti,dwc3", .data = (ulong)&ti_ops },
 513         { .compatible = "ti,am437x-dwc3", .data = (ulong)&ti_ops },
 514         { .compatible = "ti,am654-dwc3" },
 515         { .compatible = "rockchip,rk3328-dwc3" },
 516         { .compatible = "rockchip,rk3399-dwc3" },
 517         { .compatible = "qcom,dwc3" },
 518         { .compatible = "fsl,imx8mp-dwc3", .data = (ulong)&imx8mp_ops },
 519         { .compatible = "fsl,imx8mq-dwc3" },
 520         { .compatible = "intel,tangier-dwc3" },
 521         { }
 522 };
 523
 524 U_BOOT_DRIVER(dwc3_generic_wrapper) = {
 525         .name   = "dwc3-generic-wrapper",
 526         .id     = UCLASS_NOP,
 527         .of_match = dwc3_glue_ids,
 528         .bind = dwc3_glue_bind,
 529         .probe = dwc3_glue_probe,
 530         .remove = dwc3_glue_remove,
 531         .plat_auto      = sizeof(struct dwc3_glue_data),
 532
 533 };