drivers/usb/dwc3/core.c

   1 /**
   2  * core.c - DesignWare USB3 DRD Controller Core file
   3  *
   4  * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
   5  *
   6  * Authors: Felipe Balbi <balbi@ti.com>,
   7  *          Sebastian Andrzej Siewior <bigeasy@linutronix.de>
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions, and the following disclaimer,
  14  *    without modification.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  * 3. The names of the above-listed copyright holders may not be used
  19  *    to endorse or promote products derived from this software without
  20  *    specific prior written permission.
  21  *
  22  * ALTERNATIVELY, this software may be distributed under the terms of the
  23  * GNU General Public License ("GPL") version 2, as published by the Free
  24  * Software Foundation.
  25  *
  26  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
  27  * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  28  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  29  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  30  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  31  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  32  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  33  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  34  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  35  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  36  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  37  */
  38
  39 #include <linux/module.h>
  40 #include <linux/kernel.h>
  41 #include <linux/slab.h>
  42 #include <linux/spinlock.h>
  43 #include <linux/platform_device.h>
  44 #include <linux/pm_runtime.h>
  45 #include <linux/interrupt.h>
  46 #include <linux/ioport.h>
  47 #include <linux/io.h>
  48 #include <linux/list.h>
  49 #include <linux/delay.h>
  50 #include <linux/dma-mapping.h>
  51
  52 #include <linux/usb/ch9.h>
  53 #include <linux/usb/gadget.h>
  54 #include <linux/module.h>
  55
  56 #include "core.h"
  57 #include "gadget.h"
  58 #include "io.h"
  59
  60 #include "debug.h"
  61
  62 static char *maximum_speed = "super";
  63 module_param(maximum_speed, charp, 0);
  64 MODULE_PARM_DESC(maximum_speed, "Maximum supported speed.");
  65
  66 /* -------------------------------------------------------------------------- */
  67
  68 #define DWC3_DEVS_POSSIBLE      32
  69
  70 static DECLARE_BITMAP(dwc3_devs, DWC3_DEVS_POSSIBLE);
  71
  72 int dwc3_get_device_id(void)
  73 {
  74         int             id;
  75
  76 again:
  77         id = find_first_zero_bit(dwc3_devs, DWC3_DEVS_POSSIBLE);
  78         if (id < DWC3_DEVS_POSSIBLE) {
  79                 int old;
  80
  81                 old = test_and_set_bit(id, dwc3_devs);
  82                 if (old)
  83                         goto again;
  84         } else {
  85                 pr_err("dwc3: no space for new device\n");
  86                 id = -ENOMEM;
  87         }
  88
  89         return 0;
  90 }
  91 EXPORT_SYMBOL_GPL(dwc3_get_device_id);
  92
  93 void dwc3_put_device_id(int id)
  94 {
  95         int                     ret;
  96
  97         if (id < 0)
  98                 return;
  99
 100         ret = test_bit(id, dwc3_devs);
 101         WARN(!ret, "dwc3: ID %d not in use\n", id);
 102         clear_bit(id, dwc3_devs);
 103 }
 104 EXPORT_SYMBOL_GPL(dwc3_put_device_id);
 105
 106 /* -------------------------------------------------------------------------- */
 107
 108 /**
 109  * dwc3_core_soft_reset - Issues core soft reset and PHY reset
 110  * @dwc: pointer to our context structure
 111  */
 112 static void dwc3_core_soft_reset(struct dwc3 *dwc)
 113 {
 114         u32             reg;
 115
 116         /* Before Resetting PHY, put Core in Reset */
 117         reg = dwc3_readl(dwc->regs, DWC3_GCTL);
 118         reg |= DWC3_GCTL_CORESOFTRESET;
 119         dwc3_writel(dwc->regs, DWC3_GCTL, reg);
 120
 121         /* Assert USB3 PHY reset */
 122         reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
 123         reg |= DWC3_GUSB3PIPECTL_PHYSOFTRST;
 124         dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
 125
 126         /* Assert USB2 PHY reset */
 127         reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
 128         reg |= DWC3_GUSB2PHYCFG_PHYSOFTRST;
 129         dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
 130
 131         mdelay(100);
 132
 133         /* Clear USB3 PHY reset */
 134         reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
 135         reg &= ~DWC3_GUSB3PIPECTL_PHYSOFTRST;
 136         dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
 137
 138         /* Clear USB2 PHY reset */
 139         reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
 140         reg &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
 141         dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
 142
 143         /* After PHYs are stable we can take Core out of reset state */
 144         reg = dwc3_readl(dwc->regs, DWC3_GCTL);
 145         reg &= ~DWC3_GCTL_CORESOFTRESET;
 146         dwc3_writel(dwc->regs, DWC3_GCTL, reg);
 147 }
 148
 149 /**
 150  * dwc3_free_one_event_buffer - Frees one event buffer
 151  * @dwc: Pointer to our controller context structure
 152  * @evt: Pointer to event buffer to be freed
 153  */
 154 static void dwc3_free_one_event_buffer(struct dwc3 *dwc,
 155                 struct dwc3_event_buffer *evt)
 156 {
 157         dma_free_coherent(dwc->dev, evt->length, evt->buf, evt->dma);
 158         kfree(evt);
 159 }
 160
 161 /**
 162  * dwc3_alloc_one_event_buffer - Allocated one event buffer structure
 163  * @dwc: Pointer to our controller context structure
 164  * @length: size of the event buffer
 165  *
 166  * Returns a pointer to the allocated event buffer structure on succes
 167  * otherwise ERR_PTR(errno).
 168  */
 169 static struct dwc3_event_buffer *__devinit
 170 dwc3_alloc_one_event_buffer(struct dwc3 *dwc, unsigned length)
 171 {
 172         struct dwc3_event_buffer        *evt;
 173
 174         evt = kzalloc(sizeof(*evt), GFP_KERNEL);
 175         if (!evt)
 176                 return ERR_PTR(-ENOMEM);
 177
 178         evt->dwc        = dwc;
 179         evt->length     = length;
 180         evt->buf        = dma_alloc_coherent(dwc->dev, length,
 181                         &evt->dma, GFP_KERNEL);
 182         if (!evt->buf) {
 183                 kfree(evt);
 184                 return ERR_PTR(-ENOMEM);
 185         }
 186
 187         return evt;
 188 }
 189
 190 /**
 191  * dwc3_free_event_buffers - frees all allocated event buffers
 192  * @dwc: Pointer to our controller context structure
 193  */
 194 static void dwc3_free_event_buffers(struct dwc3 *dwc)
 195 {
 196         struct dwc3_event_buffer        *evt;
 197         int i;
 198
 199         for (i = 0; i < dwc->num_event_buffers; i++) {
 200                 evt = dwc->ev_buffs[i];
 201                 if (evt) {
 202                         dwc3_free_one_event_buffer(dwc, evt);
 203                         dwc->ev_buffs[i] = NULL;
 204                 }
 205         }
 206 }
 207
 208 /**
 209  * dwc3_alloc_event_buffers - Allocates @num event buffers of size @length
 210  * @dwc: Pointer to out controller context structure
 211  * @length: size of event buffer
 212  *
 213  * Returns 0 on success otherwise negative errno. In error the case, dwc
 214  * may contain some buffers allocated but not all which were requested.
 215  */
 216 static int __devinit dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned length)
 217 {
 218         int                     num;
 219         int                     i;
 220
 221         num = DWC3_NUM_INT(dwc->hwparams.hwparams1);
 222         dwc->num_event_buffers = num;
 223
 224         dwc->ev_buffs = kzalloc(sizeof(*dwc->ev_buffs) * num, GFP_KERNEL);
 225         if (!dwc->ev_buffs) {
 226                 dev_err(dwc->dev, "can't allocate event buffers array\n");
 227                 return -ENOMEM;
 228         }
 229
 230         for (i = 0; i < num; i++) {
 231                 struct dwc3_event_buffer        *evt;
 232
 233                 evt = dwc3_alloc_one_event_buffer(dwc, length);
 234                 if (IS_ERR(evt)) {
 235                         dev_err(dwc->dev, "can't allocate event buffer\n");
 236                         return PTR_ERR(evt);
 237                 }
 238                 dwc->ev_buffs[i] = evt;
 239         }
 240
 241         return 0;
 242 }
 243
 244 /**
 245  * dwc3_event_buffers_setup - setup our allocated event buffers
 246  * @dwc: Pointer to out controller context structure
 247  *
 248  * Returns 0 on success otherwise negative errno.
 249  */
 250 static int __devinit dwc3_event_buffers_setup(struct dwc3 *dwc)
 251 {
 252         struct dwc3_event_buffer        *evt;
 253         int                             n;
 254
 255         for (n = 0; n < dwc->num_event_buffers; n++) {
 256                 evt = dwc->ev_buffs[n];
 257                 dev_dbg(dwc->dev, "Event buf %p dma %08llx length %d\n",
 258                                 evt->buf, (unsigned long long) evt->dma,
 259                                 evt->length);
 260
 261                 dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(n),
 262                                 lower_32_bits(evt->dma));
 263                 dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(n),
 264                                 upper_32_bits(evt->dma));
 265                 dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(n),
 266                                 evt->length & 0xffff);
 267                 dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(n), 0);
 268         }
 269
 270         return 0;
 271 }
 272
 273 static void dwc3_event_buffers_cleanup(struct dwc3 *dwc)
 274 {
 275         struct dwc3_event_buffer        *evt;
 276         int                             n;
 277
 278         for (n = 0; n < dwc->num_event_buffers; n++) {
 279                 evt = dwc->ev_buffs[n];
 280                 dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(n), 0);
 281                 dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(n), 0);
 282                 dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(n), 0);
 283                 dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(n), 0);
 284         }
 285 }
 286
 287 static void __devinit dwc3_cache_hwparams(struct dwc3 *dwc)
 288 {
 289         struct dwc3_hwparams    *parms = &dwc->hwparams;
 290
 291         parms->hwparams0 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS0);
 292         parms->hwparams1 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS1);
 293         parms->hwparams2 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS2);
 294         parms->hwparams3 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS3);
 295         parms->hwparams4 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS4);
 296         parms->hwparams5 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS5);
 297         parms->hwparams6 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS6);
 298         parms->hwparams7 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS7);
 299         parms->hwparams8 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS8);
 300 }
 301
 302 /**
 303  * dwc3_core_init - Low-level initialization of DWC3 Core
 304  * @dwc: Pointer to our controller context structure
 305  *
 306  * Returns 0 on success otherwise negative errno.
 307  */
 308 static int __devinit dwc3_core_init(struct dwc3 *dwc)
 309 {
 310         unsigned long           timeout;
 311         u32                     reg;
 312         int                     ret;
 313
 314         reg = dwc3_readl(dwc->regs, DWC3_GSNPSID);
 315         /* This should read as U3 followed by revision number */
 316         if ((reg & DWC3_GSNPSID_MASK) != 0x55330000) {
 317                 dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n");
 318                 ret = -ENODEV;
 319                 goto err0;
 320         }
 321         dwc->revision = reg & DWC3_GSNPSREV_MASK;
 322
 323         dwc3_core_soft_reset(dwc);
 324
 325         /* issue device SoftReset too */
 326         timeout = jiffies + msecs_to_jiffies(500);
 327         dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_CSFTRST);
 328         do {
 329                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
 330                 if (!(reg & DWC3_DCTL_CSFTRST))
 331                         break;
 332
 333                 if (time_after(jiffies, timeout)) {
 334                         dev_err(dwc->dev, "Reset Timed Out\n");
 335                         ret = -ETIMEDOUT;
 336                         goto err0;
 337                 }
 338
 339                 cpu_relax();
 340         } while (true);
 341
 342         dwc3_cache_hwparams(dwc);
 343
 344         ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE);
 345         if (ret) {
 346                 dev_err(dwc->dev, "failed to allocate event buffers\n");
 347                 ret = -ENOMEM;
 348                 goto err1;
 349         }
 350
 351         ret = dwc3_event_buffers_setup(dwc);
 352         if (ret) {
 353                 dev_err(dwc->dev, "failed to setup event buffers\n");
 354                 goto err1;
 355         }
 356
 357         return 0;
 358
 359 err1:
 360         dwc3_free_event_buffers(dwc);
 361
 362 err0:
 363         return ret;
 364 }
 365
 366 static void dwc3_core_exit(struct dwc3 *dwc)
 367 {
 368         dwc3_event_buffers_cleanup(dwc);
 369         dwc3_free_event_buffers(dwc);
 370 }
 371
 372 #define DWC3_ALIGN_MASK         (16 - 1)
 373
 374 static int __devinit dwc3_probe(struct platform_device *pdev)
 375 {
 376         struct resource         *res;
 377         struct dwc3             *dwc;
 378
 379         int                     ret = -ENOMEM;
 380         int                     irq;
 381
 382         void __iomem            *regs;
 383         void                    *mem;
 384
 385         u8                      mode;
 386
 387         mem = kzalloc(sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL);
 388         if (!mem) {
 389                 dev_err(&pdev->dev, "not enough memory\n");
 390                 goto err0;
 391         }
 392         dwc = PTR_ALIGN(mem, DWC3_ALIGN_MASK + 1);
 393         dwc->mem = mem;
 394
 395         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 396         if (!res) {
 397                 dev_err(&pdev->dev, "missing resource\n");
 398                 goto err1;
 399         }
 400
 401         dwc->res = res;
 402
 403         res = request_mem_region(res->start, resource_size(res),
 404                         dev_name(&pdev->dev));
 405         if (!res) {
 406                 dev_err(&pdev->dev, "can't request mem region\n");
 407                 goto err1;
 408         }
 409
 410         regs = ioremap(res->start, resource_size(res));
 411         if (!regs) {
 412                 dev_err(&pdev->dev, "ioremap failed\n");
 413                 goto err2;
 414         }
 415
 416         irq = platform_get_irq(pdev, 0);
 417         if (irq < 0) {
 418                 dev_err(&pdev->dev, "missing IRQ\n");
 419                 goto err3;
 420         }
 421
 422         spin_lock_init(&dwc->lock);
 423         platform_set_drvdata(pdev, dwc);
 424
 425         dwc->regs       = regs;
 426         dwc->regs_size  = resource_size(res);
 427         dwc->dev        = &pdev->dev;
 428         dwc->irq        = irq;
 429
 430         if (!strncmp("super", maximum_speed, 5))
 431                 dwc->maximum_speed = DWC3_DCFG_SUPERSPEED;
 432         else if (!strncmp("high", maximum_speed, 4))
 433                 dwc->maximum_speed = DWC3_DCFG_HIGHSPEED;
 434         else if (!strncmp("full", maximum_speed, 4))
 435                 dwc->maximum_speed = DWC3_DCFG_FULLSPEED1;
 436         else if (!strncmp("low", maximum_speed, 3))
 437                 dwc->maximum_speed = DWC3_DCFG_LOWSPEED;
 438         else
 439                 dwc->maximum_speed = DWC3_DCFG_SUPERSPEED;
 440
 441         pm_runtime_enable(&pdev->dev);
 442         pm_runtime_get_sync(&pdev->dev);
 443         pm_runtime_forbid(&pdev->dev);
 444
 445         ret = dwc3_core_init(dwc);
 446         if (ret) {
 447                 dev_err(&pdev->dev, "failed to initialize core\n");
 448                 goto err3;
 449         }
 450
 451         mode = DWC3_MODE(dwc->hwparams.hwparams0);
 452
 453         switch (mode) {
 454         case DWC3_MODE_DEVICE:
 455                 ret = dwc3_gadget_init(dwc);
 456                 if (ret) {
 457                         dev_err(&pdev->dev, "failed to initialize gadget\n");
 458                         goto err4;
 459                 }
 460                 break;
 461         case DWC3_MODE_HOST:
 462                 ret = dwc3_host_init(dwc);
 463                 if (ret) {
 464                         dev_err(&pdev->dev, "failed to initialize host\n");
 465                         goto err4;
 466                 }
 467                 break;
 468         case DWC3_MODE_DRD:
 469                 ret = dwc3_host_init(dwc);
 470                 if (ret) {
 471                         dev_err(&pdev->dev, "failed to initialize host\n");
 472                         goto err4;
 473                 }
 474
 475                 ret = dwc3_gadget_init(dwc);
 476                 if (ret) {
 477                         dev_err(&pdev->dev, "failed to initialize gadget\n");
 478                         goto err4;
 479                 }
 480                 break;
 481         default:
 482                 dev_err(&pdev->dev, "Unsupported mode of operation %d\n", mode);
 483                 goto err4;
 484         }
 485         dwc->mode = mode;
 486
 487         ret = dwc3_debugfs_init(dwc);
 488         if (ret) {
 489                 dev_err(&pdev->dev, "failed to initialize debugfs\n");
 490                 goto err5;
 491         }
 492
 493         pm_runtime_allow(&pdev->dev);
 494
 495         return 0;
 496
 497 err5:
 498         switch (mode) {
 499         case DWC3_MODE_DEVICE:
 500                 dwc3_gadget_exit(dwc);
 501                 break;
 502         case DWC3_MODE_HOST:
 503                 dwc3_host_exit(dwc);
 504                 break;
 505         case DWC3_MODE_DRD:
 506                 dwc3_host_exit(dwc);
 507                 dwc3_gadget_exit(dwc);
 508                 break;
 509         default:
 510                 /* do nothing */
 511                 break;
 512         }
 513
 514 err4:
 515         dwc3_core_exit(dwc);
 516
 517 err3:
 518         iounmap(regs);
 519
 520 err2:
 521         release_mem_region(res->start, resource_size(res));
 522
 523 err1:
 524         kfree(dwc->mem);
 525
 526 err0:
 527         return ret;
 528 }
 529
 530 static int __devexit dwc3_remove(struct platform_device *pdev)
 531 {
 532         struct dwc3     *dwc = platform_get_drvdata(pdev);
 533         struct resource *res;
 534
 535         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 536
 537         pm_runtime_put(&pdev->dev);
 538         pm_runtime_disable(&pdev->dev);
 539
 540         dwc3_debugfs_exit(dwc);
 541
 542         switch (dwc->mode) {
 543         case DWC3_MODE_DEVICE:
 544                 dwc3_gadget_exit(dwc);
 545                 break;
 546         case DWC3_MODE_HOST:
 547                 dwc3_host_exit(dwc);
 548                 break;
 549         case DWC3_MODE_DRD:
 550                 dwc3_host_exit(dwc);
 551                 dwc3_gadget_exit(dwc);
 552                 break;
 553         default:
 554                 /* do nothing */
 555                 break;
 556         }
 557
 558         dwc3_core_exit(dwc);
 559         release_mem_region(res->start, resource_size(res));
 560         iounmap(dwc->regs);
 561         kfree(dwc->mem);
 562
 563         return 0;
 564 }
 565
 566 static struct platform_driver dwc3_driver = {
 567         .probe          = dwc3_probe,
 568         .remove         = __devexit_p(dwc3_remove),
 569         .driver         = {
 570                 .name   = "dwc3",
 571         },
 572 };
 573
 574 MODULE_ALIAS("platform:dwc3");
 575 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
 576 MODULE_LICENSE("Dual BSD/GPL");
 577 MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver");
 578
 579 static int __devinit dwc3_init(void)
 580 {
 581         return platform_driver_register(&dwc3_driver);
 582 }
 583 module_init(dwc3_init);
 584
 585 static void __exit dwc3_exit(void)
 586 {
 587         platform_driver_unregister(&dwc3_driver);
 588 }
 589 module_exit(dwc3_exit);