27c601296130e23f5b3d740d2b2944ccb2bbe586
[platform/kernel/linux-starfive.git] / drivers / usb / chipidea / core.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * core.c - ChipIdea USB IP core family device controller
4  *
5  * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
6  * Copyright (C) 2020 NXP
7  *
8  * Author: David Lopo
9  *         Peter Chen <peter.chen@nxp.com>
10  *
11  * Main Features:
12  * - Four transfers are supported, usbtest is passed
13  * - USB Certification for gadget: CH9 and Mass Storage are passed
14  * - Low power mode
15  * - USB wakeup
16  */
17 #include <linux/delay.h>
18 #include <linux/device.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/extcon.h>
21 #include <linux/phy/phy.h>
22 #include <linux/platform_device.h>
23 #include <linux/module.h>
24 #include <linux/idr.h>
25 #include <linux/interrupt.h>
26 #include <linux/io.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/pm_runtime.h>
30 #include <linux/pinctrl/consumer.h>
31 #include <linux/usb/ch9.h>
32 #include <linux/usb/gadget.h>
33 #include <linux/usb/otg.h>
34 #include <linux/usb/chipidea.h>
35 #include <linux/usb/of.h>
36 #include <linux/of.h>
37 #include <linux/regulator/consumer.h>
38 #include <linux/usb/ehci_def.h>
39
40 #include "ci.h"
41 #include "udc.h"
42 #include "bits.h"
43 #include "host.h"
44 #include "otg.h"
45 #include "otg_fsm.h"
46
47 /* Controller register map */
48 static const u8 ci_regs_nolpm[] = {
49         [CAP_CAPLENGTH]         = 0x00U,
50         [CAP_HCCPARAMS]         = 0x08U,
51         [CAP_DCCPARAMS]         = 0x24U,
52         [CAP_TESTMODE]          = 0x38U,
53         [OP_USBCMD]             = 0x00U,
54         [OP_USBSTS]             = 0x04U,
55         [OP_USBINTR]            = 0x08U,
56         [OP_FRINDEX]            = 0x0CU,
57         [OP_DEVICEADDR]         = 0x14U,
58         [OP_ENDPTLISTADDR]      = 0x18U,
59         [OP_TTCTRL]             = 0x1CU,
60         [OP_BURSTSIZE]          = 0x20U,
61         [OP_ULPI_VIEWPORT]      = 0x30U,
62         [OP_PORTSC]             = 0x44U,
63         [OP_DEVLC]              = 0x84U,
64         [OP_OTGSC]              = 0x64U,
65         [OP_USBMODE]            = 0x68U,
66         [OP_ENDPTSETUPSTAT]     = 0x6CU,
67         [OP_ENDPTPRIME]         = 0x70U,
68         [OP_ENDPTFLUSH]         = 0x74U,
69         [OP_ENDPTSTAT]          = 0x78U,
70         [OP_ENDPTCOMPLETE]      = 0x7CU,
71         [OP_ENDPTCTRL]          = 0x80U,
72 };
73
74 static const u8 ci_regs_lpm[] = {
75         [CAP_CAPLENGTH]         = 0x00U,
76         [CAP_HCCPARAMS]         = 0x08U,
77         [CAP_DCCPARAMS]         = 0x24U,
78         [CAP_TESTMODE]          = 0xFCU,
79         [OP_USBCMD]             = 0x00U,
80         [OP_USBSTS]             = 0x04U,
81         [OP_USBINTR]            = 0x08U,
82         [OP_FRINDEX]            = 0x0CU,
83         [OP_DEVICEADDR]         = 0x14U,
84         [OP_ENDPTLISTADDR]      = 0x18U,
85         [OP_TTCTRL]             = 0x1CU,
86         [OP_BURSTSIZE]          = 0x20U,
87         [OP_ULPI_VIEWPORT]      = 0x30U,
88         [OP_PORTSC]             = 0x44U,
89         [OP_DEVLC]              = 0x84U,
90         [OP_OTGSC]              = 0xC4U,
91         [OP_USBMODE]            = 0xC8U,
92         [OP_ENDPTSETUPSTAT]     = 0xD8U,
93         [OP_ENDPTPRIME]         = 0xDCU,
94         [OP_ENDPTFLUSH]         = 0xE0U,
95         [OP_ENDPTSTAT]          = 0xE4U,
96         [OP_ENDPTCOMPLETE]      = 0xE8U,
97         [OP_ENDPTCTRL]          = 0xECU,
98 };
99
100 static void hw_alloc_regmap(struct ci_hdrc *ci, bool is_lpm)
101 {
102         int i;
103
104         for (i = 0; i < OP_ENDPTCTRL; i++)
105                 ci->hw_bank.regmap[i] =
106                         (i <= CAP_LAST ? ci->hw_bank.cap : ci->hw_bank.op) +
107                         (is_lpm ? ci_regs_lpm[i] : ci_regs_nolpm[i]);
108
109         for (; i <= OP_LAST; i++)
110                 ci->hw_bank.regmap[i] = ci->hw_bank.op +
111                         4 * (i - OP_ENDPTCTRL) +
112                         (is_lpm
113                          ? ci_regs_lpm[OP_ENDPTCTRL]
114                          : ci_regs_nolpm[OP_ENDPTCTRL]);
115
116 }
117
118 static enum ci_revision ci_get_revision(struct ci_hdrc *ci)
119 {
120         int ver = hw_read_id_reg(ci, ID_ID, VERSION) >> __ffs(VERSION);
121         enum ci_revision rev = CI_REVISION_UNKNOWN;
122
123         if (ver == 0x2) {
124                 rev = hw_read_id_reg(ci, ID_ID, REVISION)
125                         >> __ffs(REVISION);
126                 rev += CI_REVISION_20;
127         } else if (ver == 0x0) {
128                 rev = CI_REVISION_1X;
129         }
130
131         return rev;
132 }
133
134 /**
135  * hw_read_intr_enable: returns interrupt enable register
136  *
137  * @ci: the controller
138  *
139  * This function returns register data
140  */
141 u32 hw_read_intr_enable(struct ci_hdrc *ci)
142 {
143         return hw_read(ci, OP_USBINTR, ~0);
144 }
145
146 /**
147  * hw_read_intr_status: returns interrupt status register
148  *
149  * @ci: the controller
150  *
151  * This function returns register data
152  */
153 u32 hw_read_intr_status(struct ci_hdrc *ci)
154 {
155         return hw_read(ci, OP_USBSTS, ~0);
156 }
157
158 /**
159  * hw_port_test_set: writes port test mode (execute without interruption)
160  * @ci: the controller
161  * @mode: new value
162  *
163  * This function returns an error code
164  */
165 int hw_port_test_set(struct ci_hdrc *ci, u8 mode)
166 {
167         const u8 TEST_MODE_MAX = 7;
168
169         if (mode > TEST_MODE_MAX)
170                 return -EINVAL;
171
172         hw_write(ci, OP_PORTSC, PORTSC_PTC, mode << __ffs(PORTSC_PTC));
173         return 0;
174 }
175
176 /**
177  * hw_port_test_get: reads port test mode value
178  *
179  * @ci: the controller
180  *
181  * This function returns port test mode value
182  */
183 u8 hw_port_test_get(struct ci_hdrc *ci)
184 {
185         return hw_read(ci, OP_PORTSC, PORTSC_PTC) >> __ffs(PORTSC_PTC);
186 }
187
188 static void hw_wait_phy_stable(void)
189 {
190         /*
191          * The phy needs some delay to output the stable status from low
192          * power mode. And for OTGSC, the status inputs are debounced
193          * using a 1 ms time constant, so, delay 2ms for controller to get
194          * the stable status, like vbus and id when the phy leaves low power.
195          */
196         usleep_range(2000, 2500);
197 }
198
199 /* The PHY enters/leaves low power mode */
200 static void ci_hdrc_enter_lpm_common(struct ci_hdrc *ci, bool enable)
201 {
202         enum ci_hw_regs reg = ci->hw_bank.lpm ? OP_DEVLC : OP_PORTSC;
203         bool lpm = !!(hw_read(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm)));
204
205         if (enable && !lpm)
206                 hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm),
207                                 PORTSC_PHCD(ci->hw_bank.lpm));
208         else if (!enable && lpm)
209                 hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm),
210                                 0);
211 }
212
213 static void ci_hdrc_enter_lpm(struct ci_hdrc *ci, bool enable)
214 {
215         return ci->platdata->enter_lpm(ci, enable);
216 }
217
218 static int hw_device_init(struct ci_hdrc *ci, void __iomem *base)
219 {
220         u32 reg;
221
222         /* bank is a module variable */
223         ci->hw_bank.abs = base;
224
225         ci->hw_bank.cap = ci->hw_bank.abs;
226         ci->hw_bank.cap += ci->platdata->capoffset;
227         ci->hw_bank.op = ci->hw_bank.cap + (ioread32(ci->hw_bank.cap) & 0xff);
228
229         hw_alloc_regmap(ci, false);
230         reg = hw_read(ci, CAP_HCCPARAMS, HCCPARAMS_LEN) >>
231                 __ffs(HCCPARAMS_LEN);
232         ci->hw_bank.lpm  = reg;
233         if (reg)
234                 hw_alloc_regmap(ci, !!reg);
235         ci->hw_bank.size = ci->hw_bank.op - ci->hw_bank.abs;
236         ci->hw_bank.size += OP_LAST;
237         ci->hw_bank.size /= sizeof(u32);
238
239         reg = hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DEN) >>
240                 __ffs(DCCPARAMS_DEN);
241         ci->hw_ep_max = reg * 2;   /* cache hw ENDPT_MAX */
242
243         if (ci->hw_ep_max > ENDPT_MAX)
244                 return -ENODEV;
245
246         ci_hdrc_enter_lpm(ci, false);
247
248         /* Disable all interrupts bits */
249         hw_write(ci, OP_USBINTR, 0xffffffff, 0);
250
251         /* Clear all interrupts status bits*/
252         hw_write(ci, OP_USBSTS, 0xffffffff, 0xffffffff);
253
254         ci->rev = ci_get_revision(ci);
255
256         dev_dbg(ci->dev,
257                 "revision: %d, lpm: %d; cap: %px op: %px\n",
258                 ci->rev, ci->hw_bank.lpm, ci->hw_bank.cap, ci->hw_bank.op);
259
260         /* setup lock mode ? */
261
262         /* ENDPTSETUPSTAT is '0' by default */
263
264         /* HCSPARAMS.bf.ppc SHOULD BE zero for device */
265
266         return 0;
267 }
268
269 void hw_phymode_configure(struct ci_hdrc *ci)
270 {
271         u32 portsc, lpm, sts = 0;
272
273         switch (ci->platdata->phy_mode) {
274         case USBPHY_INTERFACE_MODE_UTMI:
275                 portsc = PORTSC_PTS(PTS_UTMI);
276                 lpm = DEVLC_PTS(PTS_UTMI);
277                 break;
278         case USBPHY_INTERFACE_MODE_UTMIW:
279                 portsc = PORTSC_PTS(PTS_UTMI) | PORTSC_PTW;
280                 lpm = DEVLC_PTS(PTS_UTMI) | DEVLC_PTW;
281                 break;
282         case USBPHY_INTERFACE_MODE_ULPI:
283                 portsc = PORTSC_PTS(PTS_ULPI);
284                 lpm = DEVLC_PTS(PTS_ULPI);
285                 break;
286         case USBPHY_INTERFACE_MODE_SERIAL:
287                 portsc = PORTSC_PTS(PTS_SERIAL);
288                 lpm = DEVLC_PTS(PTS_SERIAL);
289                 sts = 1;
290                 break;
291         case USBPHY_INTERFACE_MODE_HSIC:
292                 portsc = PORTSC_PTS(PTS_HSIC);
293                 lpm = DEVLC_PTS(PTS_HSIC);
294                 break;
295         default:
296                 return;
297         }
298
299         if (ci->hw_bank.lpm) {
300                 hw_write(ci, OP_DEVLC, DEVLC_PTS(7) | DEVLC_PTW, lpm);
301                 if (sts)
302                         hw_write(ci, OP_DEVLC, DEVLC_STS, DEVLC_STS);
303         } else {
304                 hw_write(ci, OP_PORTSC, PORTSC_PTS(7) | PORTSC_PTW, portsc);
305                 if (sts)
306                         hw_write(ci, OP_PORTSC, PORTSC_STS, PORTSC_STS);
307         }
308 }
309 EXPORT_SYMBOL_GPL(hw_phymode_configure);
310
311 /**
312  * _ci_usb_phy_init: initialize phy taking in account both phy and usb_phy
313  * interfaces
314  * @ci: the controller
315  *
316  * This function returns an error code if the phy failed to init
317  */
318 static int _ci_usb_phy_init(struct ci_hdrc *ci)
319 {
320         int ret;
321
322         if (ci->phy) {
323                 ret = phy_init(ci->phy);
324                 if (ret)
325                         return ret;
326
327                 ret = phy_power_on(ci->phy);
328                 if (ret) {
329                         phy_exit(ci->phy);
330                         return ret;
331                 }
332         } else {
333                 ret = usb_phy_init(ci->usb_phy);
334         }
335
336         return ret;
337 }
338
339 /**
340  * ci_usb_phy_exit: deinitialize phy taking in account both phy and usb_phy
341  * interfaces
342  * @ci: the controller
343  */
344 static void ci_usb_phy_exit(struct ci_hdrc *ci)
345 {
346         if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
347                 return;
348
349         if (ci->phy) {
350                 phy_power_off(ci->phy);
351                 phy_exit(ci->phy);
352         } else {
353                 usb_phy_shutdown(ci->usb_phy);
354         }
355 }
356
357 /**
358  * ci_usb_phy_init: initialize phy according to different phy type
359  * @ci: the controller
360  *
361  * This function returns an error code if usb_phy_init has failed
362  */
363 static int ci_usb_phy_init(struct ci_hdrc *ci)
364 {
365         int ret;
366
367         if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
368                 return 0;
369
370         switch (ci->platdata->phy_mode) {
371         case USBPHY_INTERFACE_MODE_UTMI:
372         case USBPHY_INTERFACE_MODE_UTMIW:
373         case USBPHY_INTERFACE_MODE_HSIC:
374                 ret = _ci_usb_phy_init(ci);
375                 if (!ret)
376                         hw_wait_phy_stable();
377                 else
378                         return ret;
379                 hw_phymode_configure(ci);
380                 break;
381         case USBPHY_INTERFACE_MODE_ULPI:
382         case USBPHY_INTERFACE_MODE_SERIAL:
383                 hw_phymode_configure(ci);
384                 ret = _ci_usb_phy_init(ci);
385                 if (ret)
386                         return ret;
387                 break;
388         default:
389                 ret = _ci_usb_phy_init(ci);
390                 if (!ret)
391                         hw_wait_phy_stable();
392         }
393
394         return ret;
395 }
396
397
398 /**
399  * ci_platform_configure: do controller configure
400  * @ci: the controller
401  *
402  */
403 void ci_platform_configure(struct ci_hdrc *ci)
404 {
405         bool is_device_mode, is_host_mode;
406
407         is_device_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_DC;
408         is_host_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_HC;
409
410         if (is_device_mode) {
411                 phy_set_mode(ci->phy, PHY_MODE_USB_DEVICE);
412
413                 if (ci->platdata->flags & CI_HDRC_DISABLE_DEVICE_STREAMING)
414                         hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS,
415                                  USBMODE_CI_SDIS);
416         }
417
418         if (is_host_mode) {
419                 phy_set_mode(ci->phy, PHY_MODE_USB_HOST);
420
421                 if (ci->platdata->flags & CI_HDRC_DISABLE_HOST_STREAMING)
422                         hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS,
423                                  USBMODE_CI_SDIS);
424         }
425
426         if (ci->platdata->flags & CI_HDRC_FORCE_FULLSPEED) {
427                 if (ci->hw_bank.lpm)
428                         hw_write(ci, OP_DEVLC, DEVLC_PFSC, DEVLC_PFSC);
429                 else
430                         hw_write(ci, OP_PORTSC, PORTSC_PFSC, PORTSC_PFSC);
431         }
432
433         if (ci->platdata->flags & CI_HDRC_SET_NON_ZERO_TTHA)
434                 hw_write(ci, OP_TTCTRL, TTCTRL_TTHA_MASK, TTCTRL_TTHA);
435
436         hw_write(ci, OP_USBCMD, 0xff0000, ci->platdata->itc_setting << 16);
437
438         if (ci->platdata->flags & CI_HDRC_OVERRIDE_AHB_BURST)
439                 hw_write_id_reg(ci, ID_SBUSCFG, AHBBRST_MASK,
440                         ci->platdata->ahb_burst_config);
441
442         /* override burst size, take effect only when ahb_burst_config is 0 */
443         if (!hw_read_id_reg(ci, ID_SBUSCFG, AHBBRST_MASK)) {
444                 if (ci->platdata->flags & CI_HDRC_OVERRIDE_TX_BURST)
445                         hw_write(ci, OP_BURSTSIZE, TX_BURST_MASK,
446                         ci->platdata->tx_burst_size << __ffs(TX_BURST_MASK));
447
448                 if (ci->platdata->flags & CI_HDRC_OVERRIDE_RX_BURST)
449                         hw_write(ci, OP_BURSTSIZE, RX_BURST_MASK,
450                                 ci->platdata->rx_burst_size);
451         }
452 }
453
454 /**
455  * hw_controller_reset: do controller reset
456  * @ci: the controller
457   *
458  * This function returns an error code
459  */
460 static int hw_controller_reset(struct ci_hdrc *ci)
461 {
462         int count = 0;
463
464         hw_write(ci, OP_USBCMD, USBCMD_RST, USBCMD_RST);
465         while (hw_read(ci, OP_USBCMD, USBCMD_RST)) {
466                 udelay(10);
467                 if (count++ > 1000)
468                         return -ETIMEDOUT;
469         }
470
471         return 0;
472 }
473
474 /**
475  * hw_device_reset: resets chip (execute without interruption)
476  * @ci: the controller
477  *
478  * This function returns an error code
479  */
480 int hw_device_reset(struct ci_hdrc *ci)
481 {
482         int ret;
483
484         /* should flush & stop before reset */
485         hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
486         hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
487
488         ret = hw_controller_reset(ci);
489         if (ret) {
490                 dev_err(ci->dev, "error resetting controller, ret=%d\n", ret);
491                 return ret;
492         }
493
494         if (ci->platdata->notify_event) {
495                 ret = ci->platdata->notify_event(ci,
496                         CI_HDRC_CONTROLLER_RESET_EVENT);
497                 if (ret)
498                         return ret;
499         }
500
501         /* USBMODE should be configured step by step */
502         hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
503         hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_DC);
504         /* HW >= 2.3 */
505         hw_write(ci, OP_USBMODE, USBMODE_SLOM, USBMODE_SLOM);
506
507         if (hw_read(ci, OP_USBMODE, USBMODE_CM) != USBMODE_CM_DC) {
508                 dev_err(ci->dev, "cannot enter in %s device mode\n",
509                         ci_role(ci)->name);
510                 dev_err(ci->dev, "lpm = %i\n", ci->hw_bank.lpm);
511                 return -ENODEV;
512         }
513
514         ci_platform_configure(ci);
515
516         return 0;
517 }
518
519 static irqreturn_t ci_irq_handler(int irq, void *data)
520 {
521         struct ci_hdrc *ci = data;
522         irqreturn_t ret = IRQ_NONE;
523         u32 otgsc = 0;
524
525         if (ci->in_lpm) {
526                 disable_irq_nosync(irq);
527                 ci->wakeup_int = true;
528                 pm_runtime_get(ci->dev);
529                 return IRQ_HANDLED;
530         }
531
532         if (ci->is_otg) {
533                 otgsc = hw_read_otgsc(ci, ~0);
534                 if (ci_otg_is_fsm_mode(ci)) {
535                         ret = ci_otg_fsm_irq(ci);
536                         if (ret == IRQ_HANDLED)
537                                 return ret;
538                 }
539         }
540
541         /*
542          * Handle id change interrupt, it indicates device/host function
543          * switch.
544          */
545         if (ci->is_otg && (otgsc & OTGSC_IDIE) && (otgsc & OTGSC_IDIS)) {
546                 ci->id_event = true;
547                 /* Clear ID change irq status */
548                 hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS);
549                 ci_otg_queue_work(ci);
550                 return IRQ_HANDLED;
551         }
552
553         /*
554          * Handle vbus change interrupt, it indicates device connection
555          * and disconnection events.
556          */
557         if (ci->is_otg && (otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS)) {
558                 ci->b_sess_valid_event = true;
559                 /* Clear BSV irq */
560                 hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS);
561                 ci_otg_queue_work(ci);
562                 return IRQ_HANDLED;
563         }
564
565         /* Handle device/host interrupt */
566         if (ci->role != CI_ROLE_END)
567                 ret = ci_role(ci)->irq(ci);
568
569         return ret;
570 }
571
572 static void ci_irq(struct ci_hdrc *ci)
573 {
574         unsigned long flags;
575
576         local_irq_save(flags);
577         ci_irq_handler(ci->irq, ci);
578         local_irq_restore(flags);
579 }
580
581 static int ci_cable_notifier(struct notifier_block *nb, unsigned long event,
582                              void *ptr)
583 {
584         struct ci_hdrc_cable *cbl = container_of(nb, struct ci_hdrc_cable, nb);
585         struct ci_hdrc *ci = cbl->ci;
586
587         cbl->connected = event;
588         cbl->changed = true;
589
590         ci_irq(ci);
591         return NOTIFY_DONE;
592 }
593
594 static enum usb_role ci_usb_role_switch_get(struct usb_role_switch *sw)
595 {
596         struct ci_hdrc *ci = usb_role_switch_get_drvdata(sw);
597         enum usb_role role;
598         unsigned long flags;
599
600         spin_lock_irqsave(&ci->lock, flags);
601         role = ci_role_to_usb_role(ci);
602         spin_unlock_irqrestore(&ci->lock, flags);
603
604         return role;
605 }
606
607 static int ci_usb_role_switch_set(struct usb_role_switch *sw,
608                                   enum usb_role role)
609 {
610         struct ci_hdrc *ci = usb_role_switch_get_drvdata(sw);
611         struct ci_hdrc_cable *cable;
612
613         if (role == USB_ROLE_HOST) {
614                 cable = &ci->platdata->id_extcon;
615                 cable->changed = true;
616                 cable->connected = true;
617                 cable = &ci->platdata->vbus_extcon;
618                 cable->changed = true;
619                 cable->connected = false;
620         } else if (role == USB_ROLE_DEVICE) {
621                 cable = &ci->platdata->id_extcon;
622                 cable->changed = true;
623                 cable->connected = false;
624                 cable = &ci->platdata->vbus_extcon;
625                 cable->changed = true;
626                 cable->connected = true;
627         } else {
628                 cable = &ci->platdata->id_extcon;
629                 cable->changed = true;
630                 cable->connected = false;
631                 cable = &ci->platdata->vbus_extcon;
632                 cable->changed = true;
633                 cable->connected = false;
634         }
635
636         ci_irq(ci);
637         return 0;
638 }
639
640 static enum ci_role ci_get_role(struct ci_hdrc *ci)
641 {
642         enum ci_role role;
643
644         if (ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET]) {
645                 if (ci->is_otg) {
646                         role = ci_otg_role(ci);
647                         hw_write_otgsc(ci, OTGSC_IDIE, OTGSC_IDIE);
648                 } else {
649                         /*
650                          * If the controller is not OTG capable, but support
651                          * role switch, the defalt role is gadget, and the
652                          * user can switch it through debugfs.
653                          */
654                         role = CI_ROLE_GADGET;
655                 }
656         } else {
657                 role = ci->roles[CI_ROLE_HOST] ? CI_ROLE_HOST
658                                         : CI_ROLE_GADGET;
659         }
660
661         return role;
662 }
663
664 static struct usb_role_switch_desc ci_role_switch = {
665         .set = ci_usb_role_switch_set,
666         .get = ci_usb_role_switch_get,
667         .allow_userspace_control = true,
668 };
669
670 static int ci_get_platdata(struct device *dev,
671                 struct ci_hdrc_platform_data *platdata)
672 {
673         struct extcon_dev *ext_vbus, *ext_id;
674         struct ci_hdrc_cable *cable;
675         int ret;
676
677         if (!platdata->phy_mode)
678                 platdata->phy_mode = of_usb_get_phy_mode(dev->of_node);
679
680         if (!platdata->dr_mode)
681                 platdata->dr_mode = usb_get_dr_mode(dev);
682
683         if (platdata->dr_mode == USB_DR_MODE_UNKNOWN)
684                 platdata->dr_mode = USB_DR_MODE_OTG;
685
686         if (platdata->dr_mode != USB_DR_MODE_PERIPHERAL) {
687                 /* Get the vbus regulator */
688                 platdata->reg_vbus = devm_regulator_get_optional(dev, "vbus");
689                 if (PTR_ERR(platdata->reg_vbus) == -EPROBE_DEFER) {
690                         return -EPROBE_DEFER;
691                 } else if (PTR_ERR(platdata->reg_vbus) == -ENODEV) {
692                         /* no vbus regulator is needed */
693                         platdata->reg_vbus = NULL;
694                 } else if (IS_ERR(platdata->reg_vbus)) {
695                         dev_err(dev, "Getting regulator error: %ld\n",
696                                 PTR_ERR(platdata->reg_vbus));
697                         return PTR_ERR(platdata->reg_vbus);
698                 }
699                 /* Get TPL support */
700                 if (!platdata->tpl_support)
701                         platdata->tpl_support =
702                                 of_usb_host_tpl_support(dev->of_node);
703         }
704
705         if (platdata->dr_mode == USB_DR_MODE_OTG) {
706                 /* We can support HNP and SRP of OTG 2.0 */
707                 platdata->ci_otg_caps.otg_rev = 0x0200;
708                 platdata->ci_otg_caps.hnp_support = true;
709                 platdata->ci_otg_caps.srp_support = true;
710
711                 /* Update otg capabilities by DT properties */
712                 ret = of_usb_update_otg_caps(dev->of_node,
713                                         &platdata->ci_otg_caps);
714                 if (ret)
715                         return ret;
716         }
717
718         if (usb_get_maximum_speed(dev) == USB_SPEED_FULL)
719                 platdata->flags |= CI_HDRC_FORCE_FULLSPEED;
720
721         of_property_read_u32(dev->of_node, "phy-clkgate-delay-us",
722                                      &platdata->phy_clkgate_delay_us);
723
724         platdata->itc_setting = 1;
725
726         of_property_read_u32(dev->of_node, "itc-setting",
727                                         &platdata->itc_setting);
728
729         ret = of_property_read_u32(dev->of_node, "ahb-burst-config",
730                                 &platdata->ahb_burst_config);
731         if (!ret) {
732                 platdata->flags |= CI_HDRC_OVERRIDE_AHB_BURST;
733         } else if (ret != -EINVAL) {
734                 dev_err(dev, "failed to get ahb-burst-config\n");
735                 return ret;
736         }
737
738         ret = of_property_read_u32(dev->of_node, "tx-burst-size-dword",
739                                 &platdata->tx_burst_size);
740         if (!ret) {
741                 platdata->flags |= CI_HDRC_OVERRIDE_TX_BURST;
742         } else if (ret != -EINVAL) {
743                 dev_err(dev, "failed to get tx-burst-size-dword\n");
744                 return ret;
745         }
746
747         ret = of_property_read_u32(dev->of_node, "rx-burst-size-dword",
748                                 &platdata->rx_burst_size);
749         if (!ret) {
750                 platdata->flags |= CI_HDRC_OVERRIDE_RX_BURST;
751         } else if (ret != -EINVAL) {
752                 dev_err(dev, "failed to get rx-burst-size-dword\n");
753                 return ret;
754         }
755
756         if (of_find_property(dev->of_node, "non-zero-ttctrl-ttha", NULL))
757                 platdata->flags |= CI_HDRC_SET_NON_ZERO_TTHA;
758
759         ext_id = ERR_PTR(-ENODEV);
760         ext_vbus = ERR_PTR(-ENODEV);
761         if (of_property_read_bool(dev->of_node, "extcon")) {
762                 /* Each one of them is not mandatory */
763                 ext_vbus = extcon_get_edev_by_phandle(dev, 0);
764                 if (IS_ERR(ext_vbus) && PTR_ERR(ext_vbus) != -ENODEV)
765                         return PTR_ERR(ext_vbus);
766
767                 ext_id = extcon_get_edev_by_phandle(dev, 1);
768                 if (IS_ERR(ext_id) && PTR_ERR(ext_id) != -ENODEV)
769                         return PTR_ERR(ext_id);
770         }
771
772         cable = &platdata->vbus_extcon;
773         cable->nb.notifier_call = ci_cable_notifier;
774         cable->edev = ext_vbus;
775
776         if (!IS_ERR(ext_vbus)) {
777                 ret = extcon_get_state(cable->edev, EXTCON_USB);
778                 if (ret)
779                         cable->connected = true;
780                 else
781                         cable->connected = false;
782         }
783
784         cable = &platdata->id_extcon;
785         cable->nb.notifier_call = ci_cable_notifier;
786         cable->edev = ext_id;
787
788         if (!IS_ERR(ext_id)) {
789                 ret = extcon_get_state(cable->edev, EXTCON_USB_HOST);
790                 if (ret)
791                         cable->connected = true;
792                 else
793                         cable->connected = false;
794         }
795
796         if (device_property_read_bool(dev, "usb-role-switch"))
797                 ci_role_switch.fwnode = dev->fwnode;
798
799         platdata->pctl = devm_pinctrl_get(dev);
800         if (!IS_ERR(platdata->pctl)) {
801                 struct pinctrl_state *p;
802
803                 p = pinctrl_lookup_state(platdata->pctl, "default");
804                 if (!IS_ERR(p))
805                         platdata->pins_default = p;
806
807                 p = pinctrl_lookup_state(platdata->pctl, "host");
808                 if (!IS_ERR(p))
809                         platdata->pins_host = p;
810
811                 p = pinctrl_lookup_state(platdata->pctl, "device");
812                 if (!IS_ERR(p))
813                         platdata->pins_device = p;
814         }
815
816         if (!platdata->enter_lpm)
817                 platdata->enter_lpm = ci_hdrc_enter_lpm_common;
818
819         return 0;
820 }
821
822 static int ci_extcon_register(struct ci_hdrc *ci)
823 {
824         struct ci_hdrc_cable *id, *vbus;
825         int ret;
826
827         id = &ci->platdata->id_extcon;
828         id->ci = ci;
829         if (!IS_ERR_OR_NULL(id->edev)) {
830                 ret = devm_extcon_register_notifier(ci->dev, id->edev,
831                                                 EXTCON_USB_HOST, &id->nb);
832                 if (ret < 0) {
833                         dev_err(ci->dev, "register ID failed\n");
834                         return ret;
835                 }
836         }
837
838         vbus = &ci->platdata->vbus_extcon;
839         vbus->ci = ci;
840         if (!IS_ERR_OR_NULL(vbus->edev)) {
841                 ret = devm_extcon_register_notifier(ci->dev, vbus->edev,
842                                                 EXTCON_USB, &vbus->nb);
843                 if (ret < 0) {
844                         dev_err(ci->dev, "register VBUS failed\n");
845                         return ret;
846                 }
847         }
848
849         return 0;
850 }
851
852 static DEFINE_IDA(ci_ida);
853
854 struct platform_device *ci_hdrc_add_device(struct device *dev,
855                         struct resource *res, int nres,
856                         struct ci_hdrc_platform_data *platdata)
857 {
858         struct platform_device *pdev;
859         int id, ret;
860
861         ret = ci_get_platdata(dev, platdata);
862         if (ret)
863                 return ERR_PTR(ret);
864
865         id = ida_simple_get(&ci_ida, 0, 0, GFP_KERNEL);
866         if (id < 0)
867                 return ERR_PTR(id);
868
869         pdev = platform_device_alloc("ci_hdrc", id);
870         if (!pdev) {
871                 ret = -ENOMEM;
872                 goto put_id;
873         }
874
875         pdev->dev.parent = dev;
876         device_set_of_node_from_dev(&pdev->dev, dev);
877
878         ret = platform_device_add_resources(pdev, res, nres);
879         if (ret)
880                 goto err;
881
882         ret = platform_device_add_data(pdev, platdata, sizeof(*platdata));
883         if (ret)
884                 goto err;
885
886         ret = platform_device_add(pdev);
887         if (ret)
888                 goto err;
889
890         return pdev;
891
892 err:
893         platform_device_put(pdev);
894 put_id:
895         ida_simple_remove(&ci_ida, id);
896         return ERR_PTR(ret);
897 }
898 EXPORT_SYMBOL_GPL(ci_hdrc_add_device);
899
900 void ci_hdrc_remove_device(struct platform_device *pdev)
901 {
902         int id = pdev->id;
903         platform_device_unregister(pdev);
904         ida_simple_remove(&ci_ida, id);
905 }
906 EXPORT_SYMBOL_GPL(ci_hdrc_remove_device);
907
908 /**
909  * ci_hdrc_query_available_role: get runtime available operation mode
910  *
911  * The glue layer can get current operation mode (host/peripheral/otg)
912  * This function should be called after ci core device has created.
913  *
914  * @pdev: the platform device of ci core.
915  *
916  * Return runtime usb_dr_mode.
917  */
918 enum usb_dr_mode ci_hdrc_query_available_role(struct platform_device *pdev)
919 {
920         struct ci_hdrc *ci = platform_get_drvdata(pdev);
921
922         if (!ci)
923                 return USB_DR_MODE_UNKNOWN;
924         if (ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET])
925                 return USB_DR_MODE_OTG;
926         else if (ci->roles[CI_ROLE_HOST])
927                 return USB_DR_MODE_HOST;
928         else if (ci->roles[CI_ROLE_GADGET])
929                 return USB_DR_MODE_PERIPHERAL;
930         else
931                 return USB_DR_MODE_UNKNOWN;
932 }
933 EXPORT_SYMBOL_GPL(ci_hdrc_query_available_role);
934
935 static inline void ci_role_destroy(struct ci_hdrc *ci)
936 {
937         ci_hdrc_gadget_destroy(ci);
938         ci_hdrc_host_destroy(ci);
939         if (ci->is_otg && ci->roles[CI_ROLE_GADGET])
940                 ci_hdrc_otg_destroy(ci);
941 }
942
943 static void ci_get_otg_capable(struct ci_hdrc *ci)
944 {
945         if (ci->platdata->flags & CI_HDRC_DUAL_ROLE_NOT_OTG)
946                 ci->is_otg = false;
947         else
948                 ci->is_otg = (hw_read(ci, CAP_DCCPARAMS,
949                                 DCCPARAMS_DC | DCCPARAMS_HC)
950                                         == (DCCPARAMS_DC | DCCPARAMS_HC));
951         if (ci->is_otg) {
952                 dev_dbg(ci->dev, "It is OTG capable controller\n");
953                 /* Disable and clear all OTG irq */
954                 hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
955                                                         OTGSC_INT_STATUS_BITS);
956         }
957 }
958
959 static ssize_t role_show(struct device *dev, struct device_attribute *attr,
960                           char *buf)
961 {
962         struct ci_hdrc *ci = dev_get_drvdata(dev);
963
964         if (ci->role != CI_ROLE_END)
965                 return sprintf(buf, "%s\n", ci_role(ci)->name);
966
967         return 0;
968 }
969
970 static ssize_t role_store(struct device *dev,
971                 struct device_attribute *attr, const char *buf, size_t n)
972 {
973         struct ci_hdrc *ci = dev_get_drvdata(dev);
974         enum ci_role role;
975         int ret;
976
977         if (!(ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET])) {
978                 dev_warn(dev, "Current configuration is not dual-role, quit\n");
979                 return -EPERM;
980         }
981
982         for (role = CI_ROLE_HOST; role < CI_ROLE_END; role++)
983                 if (!strncmp(buf, ci->roles[role]->name,
984                              strlen(ci->roles[role]->name)))
985                         break;
986
987         if (role == CI_ROLE_END || role == ci->role)
988                 return -EINVAL;
989
990         pm_runtime_get_sync(dev);
991         disable_irq(ci->irq);
992         ci_role_stop(ci);
993         ret = ci_role_start(ci, role);
994         if (!ret && ci->role == CI_ROLE_GADGET)
995                 ci_handle_vbus_change(ci);
996         enable_irq(ci->irq);
997         pm_runtime_put_sync(dev);
998
999         return (ret == 0) ? n : ret;
1000 }
1001 static DEVICE_ATTR_RW(role);
1002
1003 static struct attribute *ci_attrs[] = {
1004         &dev_attr_role.attr,
1005         NULL,
1006 };
1007 ATTRIBUTE_GROUPS(ci);
1008
1009 static int ci_hdrc_probe(struct platform_device *pdev)
1010 {
1011         struct device   *dev = &pdev->dev;
1012         struct ci_hdrc  *ci;
1013         struct resource *res;
1014         void __iomem    *base;
1015         int             ret;
1016         enum usb_dr_mode dr_mode;
1017
1018         if (!dev_get_platdata(dev)) {
1019                 dev_err(dev, "platform data missing\n");
1020                 return -ENODEV;
1021         }
1022
1023         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1024         base = devm_ioremap_resource(dev, res);
1025         if (IS_ERR(base))
1026                 return PTR_ERR(base);
1027
1028         ci = devm_kzalloc(dev, sizeof(*ci), GFP_KERNEL);
1029         if (!ci)
1030                 return -ENOMEM;
1031
1032         spin_lock_init(&ci->lock);
1033         ci->dev = dev;
1034         ci->platdata = dev_get_platdata(dev);
1035         ci->imx28_write_fix = !!(ci->platdata->flags &
1036                 CI_HDRC_IMX28_WRITE_FIX);
1037         ci->supports_runtime_pm = !!(ci->platdata->flags &
1038                 CI_HDRC_SUPPORTS_RUNTIME_PM);
1039         platform_set_drvdata(pdev, ci);
1040
1041         ret = hw_device_init(ci, base);
1042         if (ret < 0) {
1043                 dev_err(dev, "can't initialize hardware\n");
1044                 return -ENODEV;
1045         }
1046
1047         ret = ci_ulpi_init(ci);
1048         if (ret)
1049                 return ret;
1050
1051         if (ci->platdata->phy) {
1052                 ci->phy = ci->platdata->phy;
1053         } else if (ci->platdata->usb_phy) {
1054                 ci->usb_phy = ci->platdata->usb_phy;
1055         } else {
1056                 /* Look for a generic PHY first */
1057                 ci->phy = devm_phy_get(dev->parent, "usb-phy");
1058
1059                 if (PTR_ERR(ci->phy) == -EPROBE_DEFER) {
1060                         ret = -EPROBE_DEFER;
1061                         goto ulpi_exit;
1062                 } else if (IS_ERR(ci->phy)) {
1063                         ci->phy = NULL;
1064                 }
1065
1066                 /* Look for a legacy USB PHY from device-tree next */
1067                 if (!ci->phy) {
1068                         ci->usb_phy = devm_usb_get_phy_by_phandle(dev->parent,
1069                                                                   "phys", 0);
1070
1071                         if (PTR_ERR(ci->usb_phy) == -EPROBE_DEFER) {
1072                                 ret = -EPROBE_DEFER;
1073                                 goto ulpi_exit;
1074                         } else if (IS_ERR(ci->usb_phy)) {
1075                                 ci->usb_phy = NULL;
1076                         }
1077                 }
1078
1079                 /* Look for any registered legacy USB PHY as last resort */
1080                 if (!ci->phy && !ci->usb_phy) {
1081                         ci->usb_phy = devm_usb_get_phy(dev->parent,
1082                                                        USB_PHY_TYPE_USB2);
1083
1084                         if (PTR_ERR(ci->usb_phy) == -EPROBE_DEFER) {
1085                                 ret = -EPROBE_DEFER;
1086                                 goto ulpi_exit;
1087                         } else if (IS_ERR(ci->usb_phy)) {
1088                                 ci->usb_phy = NULL;
1089                         }
1090                 }
1091
1092                 /* No USB PHY was found in the end */
1093                 if (!ci->phy && !ci->usb_phy) {
1094                         ret = -ENXIO;
1095                         goto ulpi_exit;
1096                 }
1097         }
1098
1099         ret = ci_usb_phy_init(ci);
1100         if (ret) {
1101                 dev_err(dev, "unable to init phy: %d\n", ret);
1102                 return ret;
1103         }
1104
1105         ci->hw_bank.phys = res->start;
1106
1107         ci->irq = platform_get_irq(pdev, 0);
1108         if (ci->irq < 0) {
1109                 ret = ci->irq;
1110                 goto deinit_phy;
1111         }
1112
1113         ci_get_otg_capable(ci);
1114
1115         dr_mode = ci->platdata->dr_mode;
1116         /* initialize role(s) before the interrupt is requested */
1117         if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_HOST) {
1118                 ret = ci_hdrc_host_init(ci);
1119                 if (ret) {
1120                         if (ret == -ENXIO)
1121                                 dev_info(dev, "doesn't support host\n");
1122                         else
1123                                 goto deinit_phy;
1124                 }
1125         }
1126
1127         if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_PERIPHERAL) {
1128                 ret = ci_hdrc_gadget_init(ci);
1129                 if (ret) {
1130                         if (ret == -ENXIO)
1131                                 dev_info(dev, "doesn't support gadget\n");
1132                         else
1133                                 goto deinit_host;
1134                 }
1135         }
1136
1137         if (!ci->roles[CI_ROLE_HOST] && !ci->roles[CI_ROLE_GADGET]) {
1138                 dev_err(dev, "no supported roles\n");
1139                 ret = -ENODEV;
1140                 goto deinit_gadget;
1141         }
1142
1143         if (ci->is_otg && ci->roles[CI_ROLE_GADGET]) {
1144                 ret = ci_hdrc_otg_init(ci);
1145                 if (ret) {
1146                         dev_err(dev, "init otg fails, ret = %d\n", ret);
1147                         goto deinit_gadget;
1148                 }
1149         }
1150
1151         if (ci_role_switch.fwnode) {
1152                 ci_role_switch.driver_data = ci;
1153                 ci->role_switch = usb_role_switch_register(dev,
1154                                         &ci_role_switch);
1155                 if (IS_ERR(ci->role_switch)) {
1156                         ret = PTR_ERR(ci->role_switch);
1157                         goto deinit_otg;
1158                 }
1159         }
1160
1161         ci->role = ci_get_role(ci);
1162         if (!ci_otg_is_fsm_mode(ci)) {
1163                 /* only update vbus status for peripheral */
1164                 if (ci->role == CI_ROLE_GADGET) {
1165                         /* Pull down DP for possible charger detection */
1166                         hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1167                         ci_handle_vbus_change(ci);
1168                 }
1169
1170                 ret = ci_role_start(ci, ci->role);
1171                 if (ret) {
1172                         dev_err(dev, "can't start %s role\n",
1173                                                 ci_role(ci)->name);
1174                         goto stop;
1175                 }
1176         }
1177
1178         ret = devm_request_irq(dev, ci->irq, ci_irq_handler, IRQF_SHARED,
1179                         ci->platdata->name, ci);
1180         if (ret)
1181                 goto stop;
1182
1183         ret = ci_extcon_register(ci);
1184         if (ret)
1185                 goto stop;
1186
1187         if (ci->supports_runtime_pm) {
1188                 pm_runtime_set_active(&pdev->dev);
1189                 pm_runtime_enable(&pdev->dev);
1190                 pm_runtime_set_autosuspend_delay(&pdev->dev, 2000);
1191                 pm_runtime_mark_last_busy(ci->dev);
1192                 pm_runtime_use_autosuspend(&pdev->dev);
1193         }
1194
1195         if (ci_otg_is_fsm_mode(ci))
1196                 ci_hdrc_otg_fsm_start(ci);
1197
1198         device_set_wakeup_capable(&pdev->dev, true);
1199         dbg_create_files(ci);
1200
1201         return 0;
1202
1203 stop:
1204         if (ci->role_switch)
1205                 usb_role_switch_unregister(ci->role_switch);
1206 deinit_otg:
1207         if (ci->is_otg && ci->roles[CI_ROLE_GADGET])
1208                 ci_hdrc_otg_destroy(ci);
1209 deinit_gadget:
1210         ci_hdrc_gadget_destroy(ci);
1211 deinit_host:
1212         ci_hdrc_host_destroy(ci);
1213 deinit_phy:
1214         ci_usb_phy_exit(ci);
1215 ulpi_exit:
1216         ci_ulpi_exit(ci);
1217
1218         return ret;
1219 }
1220
1221 static int ci_hdrc_remove(struct platform_device *pdev)
1222 {
1223         struct ci_hdrc *ci = platform_get_drvdata(pdev);
1224
1225         if (ci->role_switch)
1226                 usb_role_switch_unregister(ci->role_switch);
1227
1228         if (ci->supports_runtime_pm) {
1229                 pm_runtime_get_sync(&pdev->dev);
1230                 pm_runtime_disable(&pdev->dev);
1231                 pm_runtime_put_noidle(&pdev->dev);
1232         }
1233
1234         dbg_remove_files(ci);
1235         ci_role_destroy(ci);
1236         ci_hdrc_enter_lpm(ci, true);
1237         ci_usb_phy_exit(ci);
1238         ci_ulpi_exit(ci);
1239
1240         return 0;
1241 }
1242
1243 #ifdef CONFIG_PM
1244 /* Prepare wakeup by SRP before suspend */
1245 static void ci_otg_fsm_suspend_for_srp(struct ci_hdrc *ci)
1246 {
1247         if ((ci->fsm.otg->state == OTG_STATE_A_IDLE) &&
1248                                 !hw_read_otgsc(ci, OTGSC_ID)) {
1249                 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP,
1250                                                                 PORTSC_PP);
1251                 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_WKCN,
1252                                                                 PORTSC_WKCN);
1253         }
1254 }
1255
1256 /* Handle SRP when wakeup by data pulse */
1257 static void ci_otg_fsm_wakeup_by_srp(struct ci_hdrc *ci)
1258 {
1259         if ((ci->fsm.otg->state == OTG_STATE_A_IDLE) &&
1260                 (ci->fsm.a_bus_drop == 1) && (ci->fsm.a_bus_req == 0)) {
1261                 if (!hw_read_otgsc(ci, OTGSC_ID)) {
1262                         ci->fsm.a_srp_det = 1;
1263                         ci->fsm.a_bus_drop = 0;
1264                 } else {
1265                         ci->fsm.id = 1;
1266                 }
1267                 ci_otg_queue_work(ci);
1268         }
1269 }
1270
1271 static void ci_controller_suspend(struct ci_hdrc *ci)
1272 {
1273         disable_irq(ci->irq);
1274         ci_hdrc_enter_lpm(ci, true);
1275         if (ci->platdata->phy_clkgate_delay_us)
1276                 usleep_range(ci->platdata->phy_clkgate_delay_us,
1277                              ci->platdata->phy_clkgate_delay_us + 50);
1278         usb_phy_set_suspend(ci->usb_phy, 1);
1279         ci->in_lpm = true;
1280         enable_irq(ci->irq);
1281 }
1282
1283 /*
1284  * Handle the wakeup interrupt triggered by extcon connector
1285  * We need to call ci_irq again for extcon since the first
1286  * interrupt (wakeup int) only let the controller be out of
1287  * low power mode, but not handle any interrupts.
1288  */
1289 static void ci_extcon_wakeup_int(struct ci_hdrc *ci)
1290 {
1291         struct ci_hdrc_cable *cable_id, *cable_vbus;
1292         u32 otgsc = hw_read_otgsc(ci, ~0);
1293
1294         cable_id = &ci->platdata->id_extcon;
1295         cable_vbus = &ci->platdata->vbus_extcon;
1296
1297         if ((!IS_ERR(cable_id->edev) || ci->role_switch)
1298                 && ci->is_otg &&
1299                 (otgsc & OTGSC_IDIE) && (otgsc & OTGSC_IDIS))
1300                 ci_irq(ci);
1301
1302         if ((!IS_ERR(cable_vbus->edev) || ci->role_switch)
1303                 && ci->is_otg &&
1304                 (otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS))
1305                 ci_irq(ci);
1306 }
1307
1308 static int ci_controller_resume(struct device *dev)
1309 {
1310         struct ci_hdrc *ci = dev_get_drvdata(dev);
1311         int ret;
1312
1313         dev_dbg(dev, "at %s\n", __func__);
1314
1315         if (!ci->in_lpm) {
1316                 WARN_ON(1);
1317                 return 0;
1318         }
1319
1320         ci_hdrc_enter_lpm(ci, false);
1321
1322         ret = ci_ulpi_resume(ci);
1323         if (ret)
1324                 return ret;
1325
1326         if (ci->usb_phy) {
1327                 usb_phy_set_suspend(ci->usb_phy, 0);
1328                 usb_phy_set_wakeup(ci->usb_phy, false);
1329                 hw_wait_phy_stable();
1330         }
1331
1332         ci->in_lpm = false;
1333         if (ci->wakeup_int) {
1334                 ci->wakeup_int = false;
1335                 pm_runtime_mark_last_busy(ci->dev);
1336                 pm_runtime_put_autosuspend(ci->dev);
1337                 enable_irq(ci->irq);
1338                 if (ci_otg_is_fsm_mode(ci))
1339                         ci_otg_fsm_wakeup_by_srp(ci);
1340                 ci_extcon_wakeup_int(ci);
1341         }
1342
1343         return 0;
1344 }
1345
1346 #ifdef CONFIG_PM_SLEEP
1347 static int ci_suspend(struct device *dev)
1348 {
1349         struct ci_hdrc *ci = dev_get_drvdata(dev);
1350
1351         if (ci->wq)
1352                 flush_workqueue(ci->wq);
1353         /*
1354          * Controller needs to be active during suspend, otherwise the core
1355          * may run resume when the parent is at suspend if other driver's
1356          * suspend fails, it occurs before parent's suspend has not started,
1357          * but the core suspend has finished.
1358          */
1359         if (ci->in_lpm)
1360                 pm_runtime_resume(dev);
1361
1362         if (ci->in_lpm) {
1363                 WARN_ON(1);
1364                 return 0;
1365         }
1366
1367         /* Extra routine per role before system suspend */
1368         if (ci->role != CI_ROLE_END && ci_role(ci)->suspend)
1369                 ci_role(ci)->suspend(ci);
1370
1371         if (device_may_wakeup(dev)) {
1372                 if (ci_otg_is_fsm_mode(ci))
1373                         ci_otg_fsm_suspend_for_srp(ci);
1374
1375                 usb_phy_set_wakeup(ci->usb_phy, true);
1376                 enable_irq_wake(ci->irq);
1377         }
1378
1379         ci_controller_suspend(ci);
1380
1381         return 0;
1382 }
1383
1384 static void ci_handle_power_lost(struct ci_hdrc *ci)
1385 {
1386         enum ci_role role;
1387
1388         disable_irq_nosync(ci->irq);
1389         if (!ci_otg_is_fsm_mode(ci)) {
1390                 role = ci_get_role(ci);
1391
1392                 if (ci->role != role) {
1393                         ci_handle_id_switch(ci);
1394                 } else if (role == CI_ROLE_GADGET) {
1395                         if (ci->is_otg && hw_read_otgsc(ci, OTGSC_BSV))
1396                                 usb_gadget_vbus_connect(&ci->gadget);
1397                 }
1398         }
1399
1400         enable_irq(ci->irq);
1401 }
1402
1403 static int ci_resume(struct device *dev)
1404 {
1405         struct ci_hdrc *ci = dev_get_drvdata(dev);
1406         bool power_lost;
1407         int ret;
1408
1409         /* Since ASYNCLISTADDR (host mode) and ENDPTLISTADDR (device
1410          * mode) share the same register address. We can check if
1411          * controller resume from power lost based on this address
1412          * due to this register will be reset after power lost.
1413          */
1414         power_lost = !hw_read(ci, OP_ENDPTLISTADDR, ~0);
1415
1416         if (device_may_wakeup(dev))
1417                 disable_irq_wake(ci->irq);
1418
1419         ret = ci_controller_resume(dev);
1420         if (ret)
1421                 return ret;
1422
1423         if (power_lost) {
1424                 /* shutdown and re-init for phy */
1425                 ci_usb_phy_exit(ci);
1426                 ci_usb_phy_init(ci);
1427         }
1428
1429         /* Extra routine per role after system resume */
1430         if (ci->role != CI_ROLE_END && ci_role(ci)->resume)
1431                 ci_role(ci)->resume(ci, power_lost);
1432
1433         if (power_lost)
1434                 ci_handle_power_lost(ci);
1435
1436         if (ci->supports_runtime_pm) {
1437                 pm_runtime_disable(dev);
1438                 pm_runtime_set_active(dev);
1439                 pm_runtime_enable(dev);
1440         }
1441
1442         return ret;
1443 }
1444 #endif /* CONFIG_PM_SLEEP */
1445
1446 static int ci_runtime_suspend(struct device *dev)
1447 {
1448         struct ci_hdrc *ci = dev_get_drvdata(dev);
1449
1450         dev_dbg(dev, "at %s\n", __func__);
1451
1452         if (ci->in_lpm) {
1453                 WARN_ON(1);
1454                 return 0;
1455         }
1456
1457         if (ci_otg_is_fsm_mode(ci))
1458                 ci_otg_fsm_suspend_for_srp(ci);
1459
1460         usb_phy_set_wakeup(ci->usb_phy, true);
1461         ci_controller_suspend(ci);
1462
1463         return 0;
1464 }
1465
1466 static int ci_runtime_resume(struct device *dev)
1467 {
1468         return ci_controller_resume(dev);
1469 }
1470
1471 #endif /* CONFIG_PM */
1472 static const struct dev_pm_ops ci_pm_ops = {
1473         SET_SYSTEM_SLEEP_PM_OPS(ci_suspend, ci_resume)
1474         SET_RUNTIME_PM_OPS(ci_runtime_suspend, ci_runtime_resume, NULL)
1475 };
1476
1477 static struct platform_driver ci_hdrc_driver = {
1478         .probe  = ci_hdrc_probe,
1479         .remove = ci_hdrc_remove,
1480         .driver = {
1481                 .name   = "ci_hdrc",
1482                 .pm     = &ci_pm_ops,
1483                 .dev_groups = ci_groups,
1484         },
1485 };
1486
1487 static int __init ci_hdrc_platform_register(void)
1488 {
1489         ci_hdrc_host_driver_init();
1490         return platform_driver_register(&ci_hdrc_driver);
1491 }
1492 module_init(ci_hdrc_platform_register);
1493
1494 static void __exit ci_hdrc_platform_unregister(void)
1495 {
1496         platform_driver_unregister(&ci_hdrc_driver);
1497 }
1498 module_exit(ci_hdrc_platform_unregister);
1499
1500 MODULE_ALIAS("platform:ci_hdrc");
1501 MODULE_LICENSE("GPL v2");
1502 MODULE_AUTHOR("David Lopo <dlopo@chipidea.mips.com>");
1503 MODULE_DESCRIPTION("ChipIdea HDRC Driver");