1 // SPDX-License-Identifier: GPL-2.0
3 * cdns_ti-ti.c - TI specific Glue layer for Cadence USB Controller
5 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
9 #include <asm-generic/io.h>
12 #include <dm/device_compat.h>
13 #include <linux/bitops.h>
15 #include <linux/usb/otg.h>
20 /* USB Wrapper register offsets */
23 #define USBSS_STATIC_CONFIG 0x8
24 #define USBSS_PHY_TEST 0xc
25 #define USBSS_DEBUG_CTRL 0x10
26 #define USBSS_DEBUG_INFO 0x14
27 #define USBSS_DEBUG_LINK_STATE 0x18
28 #define USBSS_DEVICE_CTRL 0x1c
30 /* Wrapper 1 register bits */
31 #define USBSS_W1_PWRUP_RST BIT(0)
32 #define USBSS_W1_OVERCURRENT_SEL BIT(8)
33 #define USBSS_W1_MODESTRAP_SEL BIT(9)
34 #define USBSS_W1_OVERCURRENT BIT(16)
35 #define USBSS_W1_MODESTRAP_MASK GENMASK(18, 17)
36 #define USBSS_W1_MODESTRAP_SHIFT 17
37 #define USBSS_W1_USB2_ONLY BIT(19)
39 /* Static config register bits */
40 #define USBSS1_STATIC_PLL_REF_SEL_MASK GENMASK(8, 5)
41 #define USBSS1_STATIC_PLL_REF_SEL_SHIFT 5
42 #define USBSS1_STATIC_LOOPBACK_MODE_MASK GENMASK(4, 3)
43 #define USBSS1_STATIC_LOOPBACK_MODE_SHIFT 3
44 #define USBSS1_STATIC_VBUS_SEL_MASK GENMASK(2, 1)
45 #define USBSS1_STATIC_VBUS_SEL_SHIFT 1
46 #define USBSS1_STATIC_LANE_REVERSE BIT(0)
49 enum modestrap_mode { USBSS_MODESTRAP_MODE_NONE,
50 USBSS_MODESTRAP_MODE_HOST,
51 USBSS_MODESTRAP_MODE_PERIPHERAL};
58 struct clk *usb2_refclk;
62 static const int cdns_ti_rate_table[] = { /* in KHZ */
78 static inline u32 cdns_ti_readl(struct cdns_ti *data, u32 offset)
80 return readl(data->usbss + offset);
83 static inline void cdns_ti_writel(struct cdns_ti *data, u32 offset, u32 value)
85 writel(value, data->usbss + offset);
88 static int cdns_ti_probe(struct udevice *dev)
90 struct cdns_ti *data = dev_get_platdata(dev);
91 struct clk usb2_refclk;
100 data->usbss = dev_remap_addr_index(dev, 0);
104 ret = clk_get_by_name(dev, "usb2_refclk", &usb2_refclk);
106 dev_err(dev, "Failed to get usb2_refclk\n");
110 rate = clk_get_rate(&usb2_refclk);
111 rate /= 1000; /* To KHz */
112 for (i = 0; i < ARRAY_SIZE(cdns_ti_rate_table); i++) {
113 if (cdns_ti_rate_table[i] == rate)
117 if (i == ARRAY_SIZE(cdns_ti_rate_table)) {
118 dev_err(dev, "unsupported usb2_refclk rate: %lu KHz\n", rate);
125 reg = cdns_ti_readl(data, USBSS_W1);
126 reg &= ~USBSS_W1_PWRUP_RST;
127 cdns_ti_writel(data, USBSS_W1, reg);
129 /* set static config */
130 reg = cdns_ti_readl(data, USBSS_STATIC_CONFIG);
131 reg &= ~USBSS1_STATIC_PLL_REF_SEL_MASK;
132 reg |= rate_code << USBSS1_STATIC_PLL_REF_SEL_SHIFT;
134 reg &= ~USBSS1_STATIC_VBUS_SEL_MASK;
135 data->vbus_divider = dev_read_bool(dev, "ti,vbus-divider");
136 if (data->vbus_divider)
137 reg |= 1 << USBSS1_STATIC_VBUS_SEL_SHIFT;
139 cdns_ti_writel(data, USBSS_STATIC_CONFIG, reg);
140 reg = cdns_ti_readl(data, USBSS_STATIC_CONFIG);
142 /* set USB2_ONLY mode if requested */
143 reg = cdns_ti_readl(data, USBSS_W1);
144 data->usb2_only = dev_read_bool(dev, "ti,usb2-only");
146 reg |= USBSS_W1_USB2_ONLY;
149 if (dev_read_bool(dev, "ti,modestrap-host"))
150 modestrap_mode = USBSS_MODESTRAP_MODE_HOST;
151 else if (dev_read_bool(dev, "ti,modestrap-peripheral"))
152 modestrap_mode = USBSS_MODESTRAP_MODE_PERIPHERAL;
154 modestrap_mode = USBSS_MODESTRAP_MODE_NONE;
156 reg |= USBSS_W1_MODESTRAP_SEL;
157 reg &= ~USBSS_W1_MODESTRAP_MASK;
158 reg |= modestrap_mode << USBSS_W1_MODESTRAP_SHIFT;
159 cdns_ti_writel(data, USBSS_W1, reg);
161 /* de-assert RESET */
162 reg |= USBSS_W1_PWRUP_RST;
163 cdns_ti_writel(data, USBSS_W1, reg);
168 static int cdns_ti_remove(struct udevice *dev)
170 struct cdns_ti *data = dev_get_platdata(dev);
173 /* put device back to RESET*/
174 reg = cdns_ti_readl(data, USBSS_W1);
175 reg &= ~USBSS_W1_PWRUP_RST;
176 cdns_ti_writel(data, USBSS_W1, reg);
181 static const struct udevice_id cdns_ti_of_match[] = {
182 { .compatible = "ti,j721e-usb", },
186 U_BOOT_DRIVER(cdns_ti) = {
189 .of_match = cdns_ti_of_match,
191 .probe = cdns_ti_probe,
192 .remove = cdns_ti_remove,
193 .platdata_auto_alloc_size = sizeof(struct cdns_ti),
194 .flags = DM_FLAG_OS_PREPARE,