1 // SPDX-License-Identifier: GPL-2.0
3 * timbuart.c timberdale FPGA UART driver
4 * Copyright (c) 2009 Intel Corporation
11 #include <linux/pci.h>
12 #include <linux/interrupt.h>
13 #include <linux/serial_core.h>
14 #include <linux/tty.h>
15 #include <linux/tty_flip.h>
16 #include <linux/kernel.h>
17 #include <linux/platform_device.h>
18 #include <linux/ioport.h>
19 #include <linux/slab.h>
20 #include <linux/module.h>
24 struct timbuart_port {
25 struct uart_port port;
26 struct tasklet_struct tasklet;
29 struct platform_device *dev;
32 static int baudrates[] = {9600, 19200, 38400, 57600, 115200, 230400, 460800,
33 921600, 1843200, 3250000};
35 static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier);
37 static irqreturn_t timbuart_handleinterrupt(int irq, void *devid);
39 static void timbuart_stop_rx(struct uart_port *port)
41 /* spin lock held by upper layer, disable all RX interrupts */
42 u32 ier = ioread32(port->membase + TIMBUART_IER) & ~RXFLAGS;
43 iowrite32(ier, port->membase + TIMBUART_IER);
46 static void timbuart_stop_tx(struct uart_port *port)
48 /* spinlock held by upper layer, disable TX interrupt */
49 u32 ier = ioread32(port->membase + TIMBUART_IER) & ~TXBAE;
50 iowrite32(ier, port->membase + TIMBUART_IER);
53 static void timbuart_start_tx(struct uart_port *port)
55 struct timbuart_port *uart =
56 container_of(port, struct timbuart_port, port);
58 /* do not transfer anything here -> fire off the tasklet */
59 tasklet_schedule(&uart->tasklet);
62 static unsigned int timbuart_tx_empty(struct uart_port *port)
64 u32 isr = ioread32(port->membase + TIMBUART_ISR);
66 return (isr & TXBE) ? TIOCSER_TEMT : 0;
69 static void timbuart_flush_buffer(struct uart_port *port)
71 if (!timbuart_tx_empty(port)) {
72 u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
75 iowrite8(ctl, port->membase + TIMBUART_CTRL);
76 iowrite32(TXBF, port->membase + TIMBUART_ISR);
80 static void timbuart_rx_chars(struct uart_port *port)
82 struct tty_port *tport = &port->state->port;
84 while (ioread32(port->membase + TIMBUART_ISR) & RXDP) {
85 u8 ch = ioread8(port->membase + TIMBUART_RXFIFO);
87 tty_insert_flip_char(tport, ch, TTY_NORMAL);
90 tty_flip_buffer_push(tport);
92 dev_dbg(port->dev, "%s - total read %d bytes\n",
93 __func__, port->icount.rx);
96 static void timbuart_tx_chars(struct uart_port *port)
98 struct circ_buf *xmit = &port->state->xmit;
100 while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) &&
101 !uart_circ_empty(xmit)) {
102 iowrite8(xmit->buf[xmit->tail],
103 port->membase + TIMBUART_TXFIFO);
104 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
109 "%s - total written %d bytes, CTL: %x, RTS: %x, baud: %x\n",
112 ioread8(port->membase + TIMBUART_CTRL),
113 port->mctrl & TIOCM_RTS,
114 ioread8(port->membase + TIMBUART_BAUDRATE));
117 static void timbuart_handle_tx_port(struct uart_port *port, u32 isr, u32 *ier)
119 struct timbuart_port *uart =
120 container_of(port, struct timbuart_port, port);
121 struct circ_buf *xmit = &port->state->xmit;
123 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
130 timbuart_tx_chars(port);
131 /* clear all TX interrupts */
132 iowrite32(TXFLAGS, port->membase + TIMBUART_ISR);
134 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
135 uart_write_wakeup(port);
137 /* Re-enable any tx interrupt */
138 *ier |= uart->last_ier & TXFLAGS;
140 /* enable interrupts if there are chars in the transmit buffer,
141 * Or if we delivered some bytes and want the almost empty interrupt
142 * we wake up the upper layer later when we got the interrupt
143 * to give it some time to go out...
145 if (!uart_circ_empty(xmit))
148 dev_dbg(port->dev, "%s - leaving\n", __func__);
151 static void timbuart_handle_rx_port(struct uart_port *port, u32 isr, u32 *ier)
154 /* Some RX status is set */
156 u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
157 TIMBUART_CTRL_FLSHRX;
158 iowrite8(ctl, port->membase + TIMBUART_CTRL);
159 port->icount.overrun++;
160 } else if (isr & (RXDP))
161 timbuart_rx_chars(port);
163 /* ack all RX interrupts */
164 iowrite32(RXFLAGS, port->membase + TIMBUART_ISR);
167 /* always have the RX interrupts enabled */
168 *ier |= RXBAF | RXBF | RXTT;
170 dev_dbg(port->dev, "%s - leaving\n", __func__);
173 static void timbuart_tasklet(struct tasklet_struct *t)
175 struct timbuart_port *uart = from_tasklet(uart, t, tasklet);
178 spin_lock(&uart->port.lock);
180 isr = ioread32(uart->port.membase + TIMBUART_ISR);
181 dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr);
184 timbuart_handle_tx_port(&uart->port, isr, &ier);
186 timbuart_mctrl_check(&uart->port, isr, &ier);
189 timbuart_handle_rx_port(&uart->port, isr, &ier);
191 iowrite32(ier, uart->port.membase + TIMBUART_IER);
193 spin_unlock(&uart->port.lock);
194 dev_dbg(uart->port.dev, "%s leaving\n", __func__);
197 static unsigned int timbuart_get_mctrl(struct uart_port *port)
199 u8 cts = ioread8(port->membase + TIMBUART_CTRL);
200 dev_dbg(port->dev, "%s - cts %x\n", __func__, cts);
202 if (cts & TIMBUART_CTRL_CTS)
203 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
205 return TIOCM_DSR | TIOCM_CAR;
208 static void timbuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
210 dev_dbg(port->dev, "%s - %x\n", __func__, mctrl);
212 if (mctrl & TIOCM_RTS)
213 iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
215 iowrite8(0, port->membase + TIMBUART_CTRL);
218 static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier)
222 if (isr & CTS_DELTA) {
224 iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR);
225 cts = timbuart_get_mctrl(port);
226 uart_handle_cts_change(port, cts & TIOCM_CTS);
227 wake_up_interruptible(&port->state->port.delta_msr_wait);
233 static void timbuart_break_ctl(struct uart_port *port, int ctl)
238 static int timbuart_startup(struct uart_port *port)
240 struct timbuart_port *uart =
241 container_of(port, struct timbuart_port, port);
243 dev_dbg(port->dev, "%s\n", __func__);
245 iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL);
246 iowrite32(0x1ff, port->membase + TIMBUART_ISR);
247 /* Enable all but TX interrupts */
248 iowrite32(RXBAF | RXBF | RXTT | CTS_DELTA,
249 port->membase + TIMBUART_IER);
251 return request_irq(port->irq, timbuart_handleinterrupt, IRQF_SHARED,
255 static void timbuart_shutdown(struct uart_port *port)
257 struct timbuart_port *uart =
258 container_of(port, struct timbuart_port, port);
259 dev_dbg(port->dev, "%s\n", __func__);
260 free_irq(port->irq, uart);
261 iowrite32(0, port->membase + TIMBUART_IER);
263 timbuart_flush_buffer(port);
266 static int get_bindex(int baud)
270 for (i = 0; i < ARRAY_SIZE(baudrates); i++)
271 if (baud <= baudrates[i])
277 static void timbuart_set_termios(struct uart_port *port,
278 struct ktermios *termios,
279 struct ktermios *old)
285 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
286 bindex = get_bindex(baud);
287 dev_dbg(port->dev, "%s - bindex %d\n", __func__, bindex);
291 baud = baudrates[bindex];
293 /* The serial layer calls into this once with old = NULL when setting
296 tty_termios_copy_hw(termios, old);
297 tty_termios_encode_baud_rate(termios, baud, baud);
299 spin_lock_irqsave(&port->lock, flags);
300 iowrite8((u8)bindex, port->membase + TIMBUART_BAUDRATE);
301 uart_update_timeout(port, termios->c_cflag, baud);
302 spin_unlock_irqrestore(&port->lock, flags);
305 static const char *timbuart_type(struct uart_port *port)
307 return port->type == PORT_UNKNOWN ? "timbuart" : NULL;
310 /* We do not request/release mappings of the registers here,
311 * currently it's done in the proble function.
313 static void timbuart_release_port(struct uart_port *port)
315 struct platform_device *pdev = to_platform_device(port->dev);
317 resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
319 if (port->flags & UPF_IOREMAP) {
320 iounmap(port->membase);
321 port->membase = NULL;
324 release_mem_region(port->mapbase, size);
327 static int timbuart_request_port(struct uart_port *port)
329 struct platform_device *pdev = to_platform_device(port->dev);
331 resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
333 if (!request_mem_region(port->mapbase, size, "timb-uart"))
336 if (port->flags & UPF_IOREMAP) {
337 port->membase = ioremap(port->mapbase, size);
338 if (port->membase == NULL) {
339 release_mem_region(port->mapbase, size);
347 static irqreturn_t timbuart_handleinterrupt(int irq, void *devid)
349 struct timbuart_port *uart = (struct timbuart_port *)devid;
351 if (ioread8(uart->port.membase + TIMBUART_IPR)) {
352 uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER);
354 /* disable interrupts, the tasklet enables them again */
355 iowrite32(0, uart->port.membase + TIMBUART_IER);
357 /* fire off bottom half */
358 tasklet_schedule(&uart->tasklet);
366 * Configure/autoconfigure the port.
368 static void timbuart_config_port(struct uart_port *port, int flags)
370 if (flags & UART_CONFIG_TYPE) {
371 port->type = PORT_TIMBUART;
372 timbuart_request_port(port);
376 static int timbuart_verify_port(struct uart_port *port,
377 struct serial_struct *ser)
379 /* we don't want the core code to modify any port params */
383 static const struct uart_ops timbuart_ops = {
384 .tx_empty = timbuart_tx_empty,
385 .set_mctrl = timbuart_set_mctrl,
386 .get_mctrl = timbuart_get_mctrl,
387 .stop_tx = timbuart_stop_tx,
388 .start_tx = timbuart_start_tx,
389 .flush_buffer = timbuart_flush_buffer,
390 .stop_rx = timbuart_stop_rx,
391 .break_ctl = timbuart_break_ctl,
392 .startup = timbuart_startup,
393 .shutdown = timbuart_shutdown,
394 .set_termios = timbuart_set_termios,
395 .type = timbuart_type,
396 .release_port = timbuart_release_port,
397 .request_port = timbuart_request_port,
398 .config_port = timbuart_config_port,
399 .verify_port = timbuart_verify_port
402 static struct uart_driver timbuart_driver = {
403 .owner = THIS_MODULE,
404 .driver_name = "timberdale_uart",
406 .major = TIMBUART_MAJOR,
407 .minor = TIMBUART_MINOR,
411 static int timbuart_probe(struct platform_device *dev)
414 struct timbuart_port *uart;
415 struct resource *iomem;
417 dev_dbg(&dev->dev, "%s\n", __func__);
419 uart = kzalloc(sizeof(*uart), GFP_KERNEL);
427 uart->port.uartclk = 3250000 * 16;
428 uart->port.fifosize = TIMBUART_FIFO_SIZE;
429 uart->port.regshift = 2;
430 uart->port.iotype = UPIO_MEM;
431 uart->port.ops = &timbuart_ops;
433 uart->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP;
435 uart->port.dev = &dev->dev;
437 iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
442 uart->port.mapbase = iomem->start;
443 uart->port.membase = NULL;
445 irq = platform_get_irq(dev, 0);
450 uart->port.irq = irq;
452 tasklet_setup(&uart->tasklet, timbuart_tasklet);
454 err = uart_register_driver(&timbuart_driver);
458 err = uart_add_one_port(&timbuart_driver, &uart->port);
462 platform_set_drvdata(dev, uart);
467 uart_unregister_driver(&timbuart_driver);
471 printk(KERN_ERR "timberdale: Failed to register Timberdale UART: %d\n",
477 static int timbuart_remove(struct platform_device *dev)
479 struct timbuart_port *uart = platform_get_drvdata(dev);
481 tasklet_kill(&uart->tasklet);
482 uart_remove_one_port(&timbuart_driver, &uart->port);
483 uart_unregister_driver(&timbuart_driver);
489 static struct platform_driver timbuart_platform_driver = {
493 .probe = timbuart_probe,
494 .remove = timbuart_remove,
497 module_platform_driver(timbuart_platform_driver);
499 MODULE_DESCRIPTION("Timberdale UART driver");
500 MODULE_LICENSE("GPL v2");
501 MODULE_ALIAS("platform:timb-uart");