1 // SPDX-License-Identifier: GPL-2.0
3 * Atheros AR933X SoC built-in UART driver
5 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
7 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
10 #include <linux/module.h>
11 #include <linux/ioport.h>
12 #include <linux/init.h>
13 #include <linux/console.h>
14 #include <linux/sysrq.h>
15 #include <linux/delay.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/platform_device.h>
19 #include <linux/of_platform.h>
20 #include <linux/tty.h>
21 #include <linux/tty_flip.h>
22 #include <linux/serial_core.h>
23 #include <linux/serial.h>
24 #include <linux/slab.h>
26 #include <linux/irq.h>
27 #include <linux/clk.h>
29 #include <asm/div64.h>
31 #include <asm/mach-ath79/ar933x_uart.h>
33 #include "serial_mctrl_gpio.h"
35 #define DRIVER_NAME "ar933x-uart"
37 #define AR933X_UART_MAX_SCALE 0xff
38 #define AR933X_UART_MAX_STEP 0xffff
40 #define AR933X_UART_MIN_BAUD 300
41 #define AR933X_UART_MAX_BAUD 3000000
43 #define AR933X_DUMMY_STATUS_RD 0x01
45 static struct uart_driver ar933x_uart_driver;
47 struct ar933x_uart_port {
48 struct uart_port port;
49 unsigned int ier; /* shadow Interrupt Enable Register */
50 unsigned int min_baud;
51 unsigned int max_baud;
53 struct mctrl_gpios *gpios;
54 struct gpio_desc *rts_gpiod;
57 static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
60 return readl(up->port.membase + offset);
63 static inline void ar933x_uart_write(struct ar933x_uart_port *up,
64 int offset, unsigned int value)
66 writel(value, up->port.membase + offset);
69 static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
76 t = ar933x_uart_read(up, offset);
79 ar933x_uart_write(up, offset, t);
82 static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
86 ar933x_uart_rmw(up, offset, 0, val);
89 static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
93 ar933x_uart_rmw(up, offset, val, 0);
96 static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
98 up->ier |= AR933X_UART_INT_TX_EMPTY;
99 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
102 static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
104 up->ier &= ~AR933X_UART_INT_TX_EMPTY;
105 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
108 static inline void ar933x_uart_start_rx_interrupt(struct ar933x_uart_port *up)
110 up->ier |= AR933X_UART_INT_RX_VALID;
111 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
114 static inline void ar933x_uart_stop_rx_interrupt(struct ar933x_uart_port *up)
116 up->ier &= ~AR933X_UART_INT_RX_VALID;
117 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
120 static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
124 rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
125 rdata |= AR933X_UART_DATA_TX_CSR;
126 ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
129 static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
131 struct ar933x_uart_port *up =
132 container_of(port, struct ar933x_uart_port, port);
136 spin_lock_irqsave(&up->port.lock, flags);
137 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
138 spin_unlock_irqrestore(&up->port.lock, flags);
140 return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
143 static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
145 struct ar933x_uart_port *up =
146 container_of(port, struct ar933x_uart_port, port);
147 int ret = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
149 mctrl_gpio_get(up->gpios, &ret);
154 static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
156 struct ar933x_uart_port *up =
157 container_of(port, struct ar933x_uart_port, port);
159 mctrl_gpio_set(up->gpios, mctrl);
162 static void ar933x_uart_start_tx(struct uart_port *port)
164 struct ar933x_uart_port *up =
165 container_of(port, struct ar933x_uart_port, port);
167 ar933x_uart_start_tx_interrupt(up);
170 static void ar933x_uart_wait_tx_complete(struct ar933x_uart_port *up)
173 unsigned int timeout = 60000;
175 /* Wait up to 60ms for the character(s) to be sent. */
177 status = ar933x_uart_read(up, AR933X_UART_CS_REG);
181 } while (status & AR933X_UART_CS_TX_BUSY);
184 dev_err(up->port.dev, "waiting for TX timed out\n");
187 static void ar933x_uart_rx_flush(struct ar933x_uart_port *up)
191 /* clear RX_VALID interrupt */
192 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_RX_VALID);
194 /* remove characters from the RX FIFO */
196 ar933x_uart_write(up, AR933X_UART_DATA_REG, AR933X_UART_DATA_RX_CSR);
197 status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
198 } while (status & AR933X_UART_DATA_RX_CSR);
201 static void ar933x_uart_stop_tx(struct uart_port *port)
203 struct ar933x_uart_port *up =
204 container_of(port, struct ar933x_uart_port, port);
206 ar933x_uart_stop_tx_interrupt(up);
209 static void ar933x_uart_stop_rx(struct uart_port *port)
211 struct ar933x_uart_port *up =
212 container_of(port, struct ar933x_uart_port, port);
214 ar933x_uart_stop_rx_interrupt(up);
217 static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
219 struct ar933x_uart_port *up =
220 container_of(port, struct ar933x_uart_port, port);
223 spin_lock_irqsave(&up->port.lock, flags);
224 if (break_state == -1)
225 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
226 AR933X_UART_CS_TX_BREAK);
228 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
229 AR933X_UART_CS_TX_BREAK);
230 spin_unlock_irqrestore(&up->port.lock, flags);
234 * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
236 static unsigned long ar933x_uart_get_baud(unsigned int clk,
243 div = (2 << 16) * (scale + 1);
252 static void ar933x_uart_get_scale_step(unsigned int clk,
264 for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
268 tstep = baud * (tscale + 1);
272 if (tstep > AR933X_UART_MAX_STEP)
275 diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
276 if (diff < min_diff) {
284 static void ar933x_uart_set_termios(struct uart_port *port,
285 struct ktermios *new,
286 struct ktermios *old)
288 struct ar933x_uart_port *up =
289 container_of(port, struct ar933x_uart_port, port);
292 unsigned int baud, scale, step;
294 /* Only CS8 is supported */
295 new->c_cflag &= ~CSIZE;
298 /* Only one stop bit is supported */
299 new->c_cflag &= ~CSTOPB;
302 if (new->c_cflag & PARENB) {
303 if (!(new->c_cflag & PARODD))
304 cs |= AR933X_UART_CS_PARITY_EVEN;
306 cs |= AR933X_UART_CS_PARITY_ODD;
308 cs |= AR933X_UART_CS_PARITY_NONE;
311 /* Mark/space parity is not supported */
312 new->c_cflag &= ~CMSPAR;
314 baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
315 ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
318 * Ok, we're now changing the port state. Do it with
319 * interrupts disabled.
321 spin_lock_irqsave(&up->port.lock, flags);
323 /* disable the UART */
324 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
325 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
327 /* Update the per-port timeout. */
328 uart_update_timeout(port, new->c_cflag, baud);
330 up->port.ignore_status_mask = 0;
332 /* ignore all characters if CREAD is not set */
333 if ((new->c_cflag & CREAD) == 0)
334 up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
336 ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
337 scale << AR933X_UART_CLOCK_SCALE_S | step);
339 /* setup configuration register */
340 ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
342 /* enable host interrupt */
343 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
344 AR933X_UART_CS_HOST_INT_EN);
346 /* enable RX and TX ready overide */
347 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
348 AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
350 /* reenable the UART */
351 ar933x_uart_rmw(up, AR933X_UART_CS_REG,
352 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
353 AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
355 spin_unlock_irqrestore(&up->port.lock, flags);
357 if (tty_termios_baud_rate(new))
358 tty_termios_encode_baud_rate(new, baud, baud);
361 static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
363 struct tty_port *port = &up->port.state->port;
370 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
371 if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
374 /* remove the character from the FIFO */
375 ar933x_uart_write(up, AR933X_UART_DATA_REG,
376 AR933X_UART_DATA_RX_CSR);
378 up->port.icount.rx++;
379 ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
381 if (uart_handle_sysrq_char(&up->port, ch))
384 if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
385 tty_insert_flip_char(port, ch, TTY_NORMAL);
386 } while (max_count-- > 0);
388 tty_flip_buffer_push(port);
391 static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
393 struct circ_buf *xmit = &up->port.state->xmit;
394 struct serial_rs485 *rs485conf = &up->port.rs485;
396 bool half_duplex_send = false;
398 if (uart_tx_stopped(&up->port))
401 if ((rs485conf->flags & SER_RS485_ENABLED) &&
402 (up->port.x_char || !uart_circ_empty(xmit))) {
403 ar933x_uart_stop_rx_interrupt(up);
404 gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_ON_SEND));
405 half_duplex_send = true;
408 count = up->port.fifosize;
412 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
413 if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
416 if (up->port.x_char) {
417 ar933x_uart_putc(up, up->port.x_char);
418 up->port.icount.tx++;
423 if (uart_circ_empty(xmit))
426 ar933x_uart_putc(up, xmit->buf[xmit->tail]);
428 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
429 up->port.icount.tx++;
430 } while (--count > 0);
432 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
433 uart_write_wakeup(&up->port);
435 if (!uart_circ_empty(xmit)) {
436 ar933x_uart_start_tx_interrupt(up);
437 } else if (half_duplex_send) {
438 ar933x_uart_wait_tx_complete(up);
439 ar933x_uart_rx_flush(up);
440 ar933x_uart_start_rx_interrupt(up);
441 gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_AFTER_SEND));
445 static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
447 struct ar933x_uart_port *up = dev_id;
450 status = ar933x_uart_read(up, AR933X_UART_CS_REG);
451 if ((status & AR933X_UART_CS_HOST_INT) == 0)
454 spin_lock(&up->port.lock);
456 status = ar933x_uart_read(up, AR933X_UART_INT_REG);
457 status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
459 if (status & AR933X_UART_INT_RX_VALID) {
460 ar933x_uart_write(up, AR933X_UART_INT_REG,
461 AR933X_UART_INT_RX_VALID);
462 ar933x_uart_rx_chars(up);
465 if (status & AR933X_UART_INT_TX_EMPTY) {
466 ar933x_uart_write(up, AR933X_UART_INT_REG,
467 AR933X_UART_INT_TX_EMPTY);
468 ar933x_uart_stop_tx_interrupt(up);
469 ar933x_uart_tx_chars(up);
472 spin_unlock(&up->port.lock);
477 static int ar933x_uart_startup(struct uart_port *port)
479 struct ar933x_uart_port *up =
480 container_of(port, struct ar933x_uart_port, port);
484 ret = request_irq(up->port.irq, ar933x_uart_interrupt,
485 up->port.irqflags, dev_name(up->port.dev), up);
489 spin_lock_irqsave(&up->port.lock, flags);
491 /* Enable HOST interrupts */
492 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
493 AR933X_UART_CS_HOST_INT_EN);
495 /* enable RX and TX ready overide */
496 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
497 AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
499 /* Enable RX interrupts */
500 ar933x_uart_start_rx_interrupt(up);
502 spin_unlock_irqrestore(&up->port.lock, flags);
507 static void ar933x_uart_shutdown(struct uart_port *port)
509 struct ar933x_uart_port *up =
510 container_of(port, struct ar933x_uart_port, port);
512 /* Disable all interrupts */
514 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
516 /* Disable break condition */
517 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
518 AR933X_UART_CS_TX_BREAK);
520 free_irq(up->port.irq, up);
523 static const char *ar933x_uart_type(struct uart_port *port)
525 return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
528 static void ar933x_uart_release_port(struct uart_port *port)
530 /* Nothing to release ... */
533 static int ar933x_uart_request_port(struct uart_port *port)
535 /* UARTs always present */
539 static void ar933x_uart_config_port(struct uart_port *port, int flags)
541 if (flags & UART_CONFIG_TYPE)
542 port->type = PORT_AR933X;
545 static int ar933x_uart_verify_port(struct uart_port *port,
546 struct serial_struct *ser)
548 struct ar933x_uart_port *up =
549 container_of(port, struct ar933x_uart_port, port);
551 if (ser->type != PORT_UNKNOWN &&
552 ser->type != PORT_AR933X)
555 if (ser->irq < 0 || ser->irq >= NR_IRQS)
558 if (ser->baud_base < up->min_baud ||
559 ser->baud_base > up->max_baud)
565 static const struct uart_ops ar933x_uart_ops = {
566 .tx_empty = ar933x_uart_tx_empty,
567 .set_mctrl = ar933x_uart_set_mctrl,
568 .get_mctrl = ar933x_uart_get_mctrl,
569 .stop_tx = ar933x_uart_stop_tx,
570 .start_tx = ar933x_uart_start_tx,
571 .stop_rx = ar933x_uart_stop_rx,
572 .break_ctl = ar933x_uart_break_ctl,
573 .startup = ar933x_uart_startup,
574 .shutdown = ar933x_uart_shutdown,
575 .set_termios = ar933x_uart_set_termios,
576 .type = ar933x_uart_type,
577 .release_port = ar933x_uart_release_port,
578 .request_port = ar933x_uart_request_port,
579 .config_port = ar933x_uart_config_port,
580 .verify_port = ar933x_uart_verify_port,
583 static int ar933x_config_rs485(struct uart_port *port,
584 struct serial_rs485 *rs485conf)
586 struct ar933x_uart_port *up =
587 container_of(port, struct ar933x_uart_port, port);
589 if ((rs485conf->flags & SER_RS485_ENABLED) &&
591 dev_err(port->dev, "RS485 needs rts-gpio\n");
594 port->rs485 = *rs485conf;
598 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
599 static struct ar933x_uart_port *
600 ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
602 static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
605 unsigned int timeout = 60000;
607 /* Wait up to 60ms for the character(s) to be sent. */
609 status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
613 } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
616 static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
618 struct ar933x_uart_port *up =
619 container_of(port, struct ar933x_uart_port, port);
621 ar933x_uart_wait_xmitr(up);
622 ar933x_uart_putc(up, ch);
625 static void ar933x_uart_console_write(struct console *co, const char *s,
628 struct ar933x_uart_port *up = ar933x_console_ports[co->index];
633 local_irq_save(flags);
637 else if (oops_in_progress)
638 locked = spin_trylock(&up->port.lock);
640 spin_lock(&up->port.lock);
643 * First save the IER then disable the interrupts
645 int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
646 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
648 uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
651 * Finally, wait for transmitter to become empty
652 * and restore the IER
654 ar933x_uart_wait_xmitr(up);
655 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
657 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
660 spin_unlock(&up->port.lock);
662 local_irq_restore(flags);
665 static int ar933x_uart_console_setup(struct console *co, char *options)
667 struct ar933x_uart_port *up;
673 if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
676 up = ar933x_console_ports[co->index];
681 uart_parse_options(options, &baud, &parity, &bits, &flow);
683 return uart_set_options(&up->port, co, baud, parity, bits, flow);
686 static struct console ar933x_uart_console = {
688 .write = ar933x_uart_console_write,
689 .device = uart_console_device,
690 .setup = ar933x_uart_console_setup,
691 .flags = CON_PRINTBUFFER,
693 .data = &ar933x_uart_driver,
695 #endif /* CONFIG_SERIAL_AR933X_CONSOLE */
697 static struct uart_driver ar933x_uart_driver = {
698 .owner = THIS_MODULE,
699 .driver_name = DRIVER_NAME,
700 .dev_name = "ttyATH",
701 .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
702 .cons = NULL, /* filled in runtime */
705 static int ar933x_uart_probe(struct platform_device *pdev)
707 struct ar933x_uart_port *up;
708 struct uart_port *port;
709 struct resource *mem_res;
710 struct resource *irq_res;
711 struct device_node *np;
716 np = pdev->dev.of_node;
717 if (IS_ENABLED(CONFIG_OF) && np) {
718 id = of_alias_get_id(np, "serial");
720 dev_err(&pdev->dev, "unable to get alias id, err=%d\n",
730 if (id >= CONFIG_SERIAL_AR933X_NR_UARTS)
733 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
735 dev_err(&pdev->dev, "no IRQ resource\n");
739 up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
744 up->clk = devm_clk_get(&pdev->dev, "uart");
745 if (IS_ERR(up->clk)) {
746 dev_err(&pdev->dev, "unable to get UART clock\n");
747 return PTR_ERR(up->clk);
752 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
753 port->membase = devm_ioremap_resource(&pdev->dev, mem_res);
754 if (IS_ERR(port->membase))
755 return PTR_ERR(port->membase);
757 ret = clk_prepare_enable(up->clk);
761 port->uartclk = clk_get_rate(up->clk);
762 if (!port->uartclk) {
764 goto err_disable_clk;
767 port->mapbase = mem_res->start;
769 port->irq = irq_res->start;
770 port->dev = &pdev->dev;
771 port->type = PORT_AR933X;
772 port->iotype = UPIO_MEM32;
775 port->fifosize = AR933X_UART_FIFO_SIZE;
776 port->ops = &ar933x_uart_ops;
777 port->rs485_config = ar933x_config_rs485;
779 baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
780 up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
782 baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
783 up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
785 ret = uart_get_rs485_mode(port);
787 goto err_disable_clk;
789 up->gpios = mctrl_gpio_init(port, 0);
790 if (IS_ERR(up->gpios) && PTR_ERR(up->gpios) != -ENOSYS) {
791 ret = PTR_ERR(up->gpios);
792 goto err_disable_clk;
795 up->rts_gpiod = mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS);
797 if ((port->rs485.flags & SER_RS485_ENABLED) &&
799 dev_err(&pdev->dev, "lacking rts-gpio, disabling RS485\n");
800 port->rs485.flags &= ~SER_RS485_ENABLED;
803 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
804 ar933x_console_ports[up->port.line] = up;
807 ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
809 goto err_disable_clk;
811 platform_set_drvdata(pdev, up);
815 clk_disable_unprepare(up->clk);
819 static int ar933x_uart_remove(struct platform_device *pdev)
821 struct ar933x_uart_port *up;
823 up = platform_get_drvdata(pdev);
826 uart_remove_one_port(&ar933x_uart_driver, &up->port);
827 clk_disable_unprepare(up->clk);
834 static const struct of_device_id ar933x_uart_of_ids[] = {
835 { .compatible = "qca,ar9330-uart" },
838 MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids);
841 static struct platform_driver ar933x_uart_platform_driver = {
842 .probe = ar933x_uart_probe,
843 .remove = ar933x_uart_remove,
846 .of_match_table = of_match_ptr(ar933x_uart_of_ids),
850 static int __init ar933x_uart_init(void)
854 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
855 ar933x_uart_driver.cons = &ar933x_uart_console;
858 ret = uart_register_driver(&ar933x_uart_driver);
862 ret = platform_driver_register(&ar933x_uart_platform_driver);
864 goto err_unregister_uart_driver;
868 err_unregister_uart_driver:
869 uart_unregister_driver(&ar933x_uart_driver);
874 static void __exit ar933x_uart_exit(void)
876 platform_driver_unregister(&ar933x_uart_platform_driver);
877 uart_unregister_driver(&ar933x_uart_driver);
880 module_init(ar933x_uart_init);
881 module_exit(ar933x_uart_exit);
883 MODULE_DESCRIPTION("Atheros AR933X UART driver");
884 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
885 MODULE_LICENSE("GPL v2");
886 MODULE_ALIAS("platform:" DRIVER_NAME);