1 // SPDX-License-Identifier: GPL-2.0
3 * Cr50 / H1 TPM support
5 * Copyright 2018 Google LLC
8 #define LOG_CATEGORY UCLASS_TPM
17 #include <acpi/acpigen.h>
18 #include <acpi/acpi_device.h>
21 #include <linux/delay.h>
25 TIMEOUT_INIT_MS = 30000, /* Very long timeout for TPM init */
26 TIMEOUT_LONG_US = 2 * 1000 * 1000,
27 TIMEOUT_SHORT_US = 2 * 1000,
28 TIMEOUT_NO_IRQ_US = 20 * 1000,
29 TIMEOUT_IRQ_US = 100 * 1000,
33 CR50_DID_VID = 0x00281ae0L
37 CR50_MAX_BUF_SIZE = 63,
41 * struct cr50_priv - Private driver data
43 * @ready_gpio: GPIO to use to check if the TPM is ready
44 * @irq: IRQ to use check if the TPM is ready (has priority over @ready_gpio)
45 * @locality: Currenttly claimed locality (-1 if none)
46 * @vendor: vendor: Vendor ID for TPM
47 * @use_irq: true to use @irq, false to use @ready if available
50 struct gpio_desc ready_gpio;
57 /* Wait for interrupt to indicate TPM is ready */
58 static int cr50_i2c_wait_tpm_ready(struct udevice *dev)
60 struct cr50_priv *priv = dev_get_priv(dev);
64 if (!priv->use_irq && !dm_gpio_is_valid(&priv->ready_gpio)) {
65 /* Fixed delay if interrupt not supported */
66 udelay(TIMEOUT_NO_IRQ_US);
70 base = timer_get_us();
71 timeout = base + TIMEOUT_IRQ_US;
74 while (priv->use_irq ? !irq_read_and_clear(&priv->irq) :
75 !dm_gpio_get_value(&priv->ready_gpio)) {
77 if ((int)(timer_get_us() - timeout) >= 0) {
78 log_warning("Timeout\n");
79 /* Use this instead of the -ETIMEDOUT used by i2c */
83 log_debug("i=%d\n", i);
88 /* Clear pending interrupts */
89 static void cr50_i2c_clear_tpm_irq(struct udevice *dev)
91 struct cr50_priv *priv = dev_get_priv(dev);
94 irq_read_and_clear(&priv->irq);
98 * cr50_i2c_read() - read from TPM register
100 * @dev: TPM chip information
101 * @addr: register address to read from
102 * @buffer: provided by caller
103 * @len: number of bytes to read
105 * 1) send register address byte 'addr' to the TPM
106 * 2) wait for TPM to indicate it is ready
107 * 3) read 'len' bytes of TPM response into the provided 'buffer'
109 * Return 0 on success. -ve on error
111 static int cr50_i2c_read(struct udevice *dev, u8 addr, u8 *buffer,
116 /* Clear interrupt before starting transaction */
117 cr50_i2c_clear_tpm_irq(dev);
119 /* Send the register address byte to the TPM */
120 ret = dm_i2c_write(dev, 0, &addr, 1);
122 log_err("Address write failed (err=%d)\n", ret);
126 /* Wait for TPM to be ready with response data */
127 ret = cr50_i2c_wait_tpm_ready(dev);
131 /* Read response data frrom the TPM */
132 ret = dm_i2c_read(dev, 0, buffer, len);
134 log_err("Read response failed (err=%d)\n", ret);
142 * cr50_i2c_write() - write to TPM register
144 * @dev: TPM chip information
145 * @addr: register address to write to
146 * @buffer: data to write
147 * @len: number of bytes to write
149 * 1) prepend the provided address to the provided data
150 * 2) send the address+data to the TPM
151 * 3) wait for TPM to indicate it is done writing
153 * Returns -1 on error, 0 on success.
155 static int cr50_i2c_write(struct udevice *dev, u8 addr, const u8 *buffer,
161 if (len > CR50_MAX_BUF_SIZE) {
162 log_err("Length %zd is too large\n", len);
166 /* Prepend the 'register address' to the buffer */
168 memcpy(buf + 1, buffer, len);
170 /* Clear interrupt before starting transaction */
171 cr50_i2c_clear_tpm_irq(dev);
173 /* Send write request buffer with address */
174 ret = dm_i2c_write(dev, 0, buf, len + 1);
176 log_err("Error writing to TPM (err=%d)\n", ret);
180 /* Wait for TPM to be ready */
181 return cr50_i2c_wait_tpm_ready(dev);
184 static inline u8 tpm_access(int locality)
188 return 0x0 | (locality << 4);
191 static inline u8 tpm_sts(int locality)
195 return 0x1 | (locality << 4);
198 static inline u8 tpm_data_fifo(int locality)
202 return 0x5 | (locality << 4);
205 static inline u8 tpm_did_vid(int locality)
209 return 0x6 | (locality << 4);
212 static int release_locality(struct udevice *dev, int force)
214 struct cr50_priv *priv = dev_get_priv(dev);
215 u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_REQUEST_PENDING;
216 u8 addr = tpm_access(priv->locality);
220 ret = cr50_i2c_read(dev, addr, &buf, 1);
224 if (force || (buf & mask) == mask) {
225 buf = TPM_ACCESS_ACTIVE_LOCALITY;
226 cr50_i2c_write(dev, addr, &buf, 1);
234 /* cr50 requires all 4 bytes of status register to be read */
235 static int cr50_i2c_status(struct udevice *dev)
237 struct cr50_priv *priv = dev_get_priv(dev);
241 ret = cr50_i2c_read(dev, tpm_sts(priv->locality), buf, sizeof(buf));
243 log_warning("%s: Failed to read status\n", __func__);
250 /* cr50 requires all 4 bytes of status register to be written */
251 static int cr50_i2c_ready(struct udevice *dev)
253 struct cr50_priv *priv = dev_get_priv(dev);
254 u8 buf[4] = { TPM_STS_COMMAND_READY };
257 ret = cr50_i2c_write(dev, tpm_sts(priv->locality), buf, sizeof(buf));
261 udelay(TIMEOUT_SHORT_US);
266 static int cr50_i2c_wait_burststs(struct udevice *dev, u8 mask,
267 size_t *burst, int *status)
269 struct cr50_priv *priv = dev_get_priv(dev);
274 * cr50 uses bytes 3:2 of status register for burst count and all 4
277 timeout = timer_get_us() + TIMEOUT_LONG_US;
278 while (timer_get_us() < timeout) {
279 if (cr50_i2c_read(dev, tpm_sts(priv->locality),
280 (u8 *)&buf, sizeof(buf)) < 0) {
281 udelay(TIMEOUT_SHORT_US);
285 *status = buf & 0xff;
286 *burst = le16_to_cpu((buf >> 8) & 0xffff);
288 if ((*status & mask) == mask &&
289 *burst > 0 && *burst <= CR50_MAX_BUF_SIZE)
292 udelay(TIMEOUT_SHORT_US);
295 log_warning("Timeout reading burst and status\n");
300 static int cr50_i2c_recv(struct udevice *dev, u8 *buf, size_t buf_len)
302 struct cr50_priv *priv = dev_get_priv(dev);
303 size_t burstcnt, expected, current, len;
304 u8 addr = tpm_data_fifo(priv->locality);
305 u8 mask = TPM_STS_VALID | TPM_STS_DATA_AVAIL;
310 log_debug("%s: buf_len=%x\n", __func__, buf_len);
311 if (buf_len < TPM_HEADER_SIZE)
314 ret = cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status);
316 log_warning("First chunk not available\n");
320 /* Read first chunk of burstcnt bytes */
321 if (cr50_i2c_read(dev, addr, buf, burstcnt) < 0) {
322 log_warning("Read failed\n");
326 /* Determine expected data in the return buffer */
327 memcpy(&expected_buf, buf + TPM_CMD_COUNT_OFFSET, sizeof(expected_buf));
328 expected = be32_to_cpu(expected_buf);
329 if (expected > buf_len) {
330 log_warning("Too much data: %zu > %zu\n", expected, buf_len);
334 /* Now read the rest of the data */
336 while (current < expected) {
337 /* Read updated burst count and check status */
338 if (cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status) < 0) {
339 log_warning("- burst failure1\n");
343 len = min(burstcnt, expected - current);
344 if (cr50_i2c_read(dev, addr, buf + current, len) != 0) {
345 log_warning("Read failed\n");
352 if (cr50_i2c_wait_burststs(dev, TPM_STS_VALID, &burstcnt,
354 log_warning("- burst failure2\n");
357 if (status & TPM_STS_DATA_AVAIL) {
358 log_warning("Data still available\n");
365 /* Abort current transaction if still pending */
366 ret = cr50_i2c_status(dev);
369 if (ret & TPM_STS_COMMAND_READY) {
370 ret = cr50_i2c_ready(dev);
378 static int cr50_i2c_send(struct udevice *dev, const u8 *buf, size_t len)
380 struct cr50_priv *priv = dev_get_priv(dev);
382 size_t burstcnt, limit, sent = 0;
383 u8 tpm_go[4] = { TPM_STS_GO };
387 log_debug("len=%x\n", len);
388 timeout = timer_get_us() + TIMEOUT_LONG_US;
390 ret = cr50_i2c_status(dev);
393 if (ret & TPM_STS_COMMAND_READY)
396 if (timer_get_us() > timeout)
399 ret = cr50_i2c_ready(dev);
405 u8 mask = TPM_STS_VALID;
407 /* Wait for data if this is not the first chunk */
409 mask |= TPM_STS_DATA_EXPECT;
411 if (cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status) < 0)
415 * Use burstcnt - 1 to account for the address byte
416 * that is inserted by cr50_i2c_write()
418 limit = min(burstcnt - 1, len);
419 if (cr50_i2c_write(dev, tpm_data_fifo(priv->locality),
420 &buf[sent], limit) != 0) {
421 log_warning("Write failed\n");
429 /* Ensure TPM is not expecting more data */
430 if (cr50_i2c_wait_burststs(dev, TPM_STS_VALID, &burstcnt, &status) < 0)
432 if (status & TPM_STS_DATA_EXPECT) {
433 log_warning("Data still expected\n");
437 /* Start the TPM command */
438 ret = cr50_i2c_write(dev, tpm_sts(priv->locality), tpm_go,
441 log_warning("Start command failed\n");
448 /* Abort current transaction if still pending */
449 ret = cr50_i2c_status(dev);
451 if (ret < 0 || (ret & TPM_STS_COMMAND_READY)) {
452 ret = cr50_i2c_ready(dev);
461 * process_reset() - Wait for the Cr50 to reset
463 * Cr50 processes reset requests asynchronously and conceivably could be busy
464 * executing a long command and not reacting to the reset pulse for a while.
466 * This function will make sure that the AP does not proceed with boot until
467 * TPM finished reset processing.
470 * @return 0 if OK, -EPERM if locality could not be taken
472 static int process_reset(struct udevice *dev)
479 * Locality is released by TPM reset.
481 * If locality is taken at this point, this could be due to the fact
482 * that the TPM is performing a long operation and has not processed
483 * reset request yet. We'll wait up to CR50_TIMEOUT_INIT_MS and see if
484 * it releases locality when reset is processed.
486 start = get_timer(0);
488 const u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY;
491 ret = cr50_i2c_read(dev, tpm_access(loc),
492 &access, sizeof(access));
493 if (ret || ((access & mask) == mask)) {
495 * Don't bombard the chip with traffic; let it keep
496 * processing the command.
502 log_debug("TPM ready after %ld ms\n", get_timer(start));
505 } while (get_timer(start) < TIMEOUT_INIT_MS);
507 log_err("TPM failed to reset after %ld ms, status: %#x\n",
508 get_timer(start), access);
514 * Locality could be already claimed (if this is a later U-Boot phase and the
515 * read-only U-Boot did not release it), or not yet claimed, if this is TPL or
516 * the older read-only U-Boot did release it.
518 static int claim_locality(struct udevice *dev, int loc)
520 const u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY;
521 struct cr50_priv *priv = dev_get_priv(dev);
525 ret = cr50_i2c_read(dev, tpm_access(loc), &access, sizeof(access));
527 return log_msg_ret("read1", ret);
529 if ((access & mask) == mask) {
530 log_warning("Locality already claimed\n");
534 access = TPM_ACCESS_REQUEST_USE;
535 ret = cr50_i2c_write(dev, tpm_access(loc), &access, sizeof(access));
537 return log_msg_ret("write", ret);
539 ret = cr50_i2c_read(dev, tpm_access(loc), &access, sizeof(access));
541 return log_msg_ret("read2", ret);
543 if ((access & mask) != mask) {
544 log_err("Failed to claim locality\n");
547 log_debug("Claimed locality %d\n", loc);
548 priv->locality = loc;
553 static int cr50_i2c_get_desc(struct udevice *dev, char *buf, int size)
555 struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
556 struct cr50_priv *priv = dev_get_priv(dev);
559 len = snprintf(buf, size, "cr50 TPM 2.0 (i2c %02x id %x), ",
560 chip->chip_addr, priv->vendor >> 16);
562 len += snprintf(buf + len, size - len, "irq=%s/%ld",
563 priv->irq.dev->name, priv->irq.id);
564 } else if (dm_gpio_is_valid(&priv->ready_gpio)) {
565 len += snprintf(buf + len, size - len, "gpio=%s/%u",
566 priv->ready_gpio.dev->name,
567 priv->ready_gpio.offset);
569 len += snprintf(buf + len, size - len, "delay=%d",
576 static int cr50_i2c_open(struct udevice *dev)
581 ret = process_reset(dev);
583 return log_msg_ret("reset", ret);
585 ret = claim_locality(dev, 0);
587 return log_msg_ret("claim", ret);
589 cr50_i2c_get_desc(dev, buf, sizeof(buf));
590 log_debug("%s\n", buf);
595 static int cr50_i2c_cleanup(struct udevice *dev)
597 struct cr50_priv *priv = dev_get_priv(dev);
599 log_debug("cleanup %d\n", priv->locality);
600 if (priv->locality != -1)
601 release_locality(dev, 1);
606 static int cr50_acpi_fill_ssdt(const struct udevice *dev, struct acpi_ctx *ctx)
608 char scope[ACPI_PATH_MAX];
609 char name[ACPI_NAME_MAX];
613 ret = acpi_device_scope(dev, scope, sizeof(scope));
615 return log_msg_ret("scope", ret);
616 ret = acpi_get_name(dev, name);
618 return log_msg_ret("name", ret);
620 hid = dev_read_string(dev, "acpi,hid");
622 return log_msg_ret("hid", ret);
625 acpigen_write_scope(ctx, scope);
626 acpigen_write_device(ctx, name);
627 acpigen_write_name_string(ctx, "_HID", hid);
628 acpigen_write_name_integer(ctx, "_UID",
629 dev_read_u32_default(dev, "acpi,uid", 0));
630 acpigen_write_name_string(ctx, "_DDN",
631 dev_read_string(dev, "acpi,ddn"));
632 acpigen_write_sta(ctx, acpi_device_status(dev));
635 acpigen_write_name(ctx, "_CRS");
636 acpigen_write_resourcetemplate_header(ctx);
637 ret = acpi_device_write_i2c_dev(ctx, dev);
639 return log_msg_ret("i2c", ret);
640 ret = acpi_device_write_interrupt_or_gpio(ctx, (struct udevice *)dev,
643 return log_msg_ret("irq_gpio", ret);
645 acpigen_write_resourcetemplate_footer(ctx);
647 acpigen_pop_len(ctx); /* Device */
648 acpigen_pop_len(ctx); /* Scope */
655 SHORT_TIMEOUT_MS = 750,
656 LONG_TIMEOUT_MS = 2000,
659 static int cr50_i2c_of_to_plat(struct udevice *dev)
661 struct tpm_chip_priv *upriv = dev_get_uclass_priv(dev);
662 struct cr50_priv *priv = dev_get_priv(dev);
666 upriv->version = TPM_V2;
667 upriv->duration_ms[TPM_SHORT] = SHORT_TIMEOUT_MS;
668 upriv->duration_ms[TPM_MEDIUM] = LONG_TIMEOUT_MS;
669 upriv->duration_ms[TPM_LONG] = LONG_TIMEOUT_MS;
670 upriv->retry_time_ms = TPM_TIMEOUT_MS;
672 upriv->pcr_count = 32;
673 upriv->pcr_select_min = 2;
675 /* Optional GPIO to track when cr50 is ready */
676 ret = irq_get_by_index(dev, 0, &irq);
679 priv->use_irq = true;
681 ret = gpio_request_by_name(dev, "ready-gpios", 0,
682 &priv->ready_gpio, GPIOD_IS_IN);
684 log_warning("Cr50 does not have an ready GPIO/interrupt (err=%d)\n",
692 static int cr50_i2c_probe(struct udevice *dev)
694 struct cr50_priv *priv = dev_get_priv(dev);
699 * 150ms should be enough to synchronise with the TPM even under the
700 * worst nested-reset-request conditions. In the vast majority of cases
701 * there will be no wait at all.
703 start = get_timer(0);
704 while (get_timer(start) < 150) {
707 /* Exit once DID and VID verified */
708 ret = cr50_i2c_read(dev, tpm_did_vid(0), (u8 *)&vendor, 4);
709 if (!ret && vendor == CR50_DID_VID)
712 /* TPM might be resetting; let's retry in a bit */
715 if (vendor != CR50_DID_VID) {
716 log_warning("DID_VID %08x not recognised\n", vendor);
717 return log_msg_ret("vendor-id", -EXDEV);
719 priv->vendor = vendor;
721 log_debug("Cr50 ready\n");
726 struct acpi_ops cr50_acpi_ops = {
727 .fill_ssdt = cr50_acpi_fill_ssdt,
730 static const struct tpm_ops cr50_i2c_ops = {
731 .open = cr50_i2c_open,
732 .get_desc = cr50_i2c_get_desc,
733 .send = cr50_i2c_send,
734 .recv = cr50_i2c_recv,
735 .cleanup = cr50_i2c_cleanup,
738 static const struct udevice_id cr50_i2c_ids[] = {
739 { .compatible = "google,cr50" },
743 U_BOOT_DRIVER(google_cr50) = {
744 .name = "google_cr50",
746 .of_match = cr50_i2c_ids,
747 .ops = &cr50_i2c_ops,
748 .of_to_plat = cr50_i2c_of_to_plat,
749 .probe = cr50_i2c_probe,
750 .remove = cr50_i2c_cleanup,
751 .priv_auto = sizeof(struct cr50_priv),
752 ACPI_OPS_PTR(&cr50_acpi_ops)
753 .flags = DM_FLAG_OS_PREPARE,