1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
11 #include <dm/device_compat.h>
12 #include <dm/device-internal.h>
17 #include <linux/err.h>
19 DECLARE_GLOBAL_DATA_PTR;
22 * Implement a timer uclass to work with lib/time.c. The timer is usually
23 * a 32/64 bits free-running up counter. The get_rate() method is used to get
24 * the input clock frequency of the timer. The get_count() method is used
25 * to get the current 64 bits count value. If the hardware is counting down,
26 * the value should be inversed inside the method. There may be no real
27 * tick, and no timer interrupt.
30 int notrace timer_get_count(struct udevice *dev, u64 *count)
32 const struct timer_ops *ops = device_get_ops(dev);
37 *count = ops->get_count(dev);
41 unsigned long notrace timer_get_rate(struct udevice *dev)
43 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
45 return uc_priv->clock_rate;
48 static int timer_pre_probe(struct udevice *dev)
50 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
51 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
56 /* It is possible that a timer device has a null ofnode */
57 if (!dev_has_ofnode(dev))
60 err = clk_get_by_index(dev, 0, &timer_clk);
62 ret = clk_get_rate(&timer_clk);
63 if (IS_ERR_VALUE(ret))
65 uc_priv->clock_rate = ret;
68 dev_read_u32_default(dev, "clock-frequency", 0);
75 static int timer_post_probe(struct udevice *dev)
77 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
79 if (!uc_priv->clock_rate)
86 * TODO: should be CONFIG_IS_ENABLED(CPU), but the SPL config has _SUPPORT on
89 #if defined(CONFIG_CPU) || defined(CONFIG_SPL_CPU_SUPPORT)
90 int timer_timebase_fallback(struct udevice *dev)
93 struct cpu_plat *cpu_plat;
94 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
96 /* Did we get our clock rate from the device tree? */
97 if (uc_priv->clock_rate)
100 /* Fall back to timebase-frequency */
101 dev_dbg(dev, "missing clocks or clock-frequency property; falling back on timebase-frequency\n");
102 cpu = cpu_get_current_dev();
106 cpu_plat = dev_get_parent_plat(cpu);
110 uc_priv->clock_rate = cpu_plat->timebase_freq;
115 u64 timer_conv_64(u32 count)
117 /* increment tbh if tbl has rolled over */
118 if (count < gd->timebase_l)
120 gd->timebase_l = count;
121 return ((u64)gd->timebase_h << 32) | gd->timebase_l;
124 int notrace dm_timer_init(void)
126 struct udevice *dev = NULL;
127 __maybe_unused ofnode node;
134 * Directly access gd->dm_root to suppress error messages, if the
135 * virtual root driver does not yet exist.
137 if (gd->dm_root == NULL)
140 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
141 /* Check for a chosen timer to be used for tick */
142 node = ofnode_get_chosen_node("tick-timer");
144 if (ofnode_valid(node) &&
145 uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) {
147 * If the timer is not marked to be bound before
148 * relocation, bind it anyway.
150 if (!lists_bind_fdt(dm_root(), node, &dev, false)) {
151 ret = device_probe(dev);
159 /* Fall back to the first available timer */
160 ret = uclass_first_device_err(UCLASS_TIMER, &dev);
173 UCLASS_DRIVER(timer) = {
176 .pre_probe = timer_pre_probe,
177 .flags = DM_UC_FLAG_SEQ_ALIAS,
178 .post_probe = timer_post_probe,
179 .per_device_auto = sizeof(struct timer_dev_priv),