1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
6 #define LOG_CATEGORY UCLASS_TIMER
12 #include <asm/global_data.h>
14 #include <dm/device_compat.h>
15 #include <dm/device-internal.h>
20 #include <linux/err.h>
22 DECLARE_GLOBAL_DATA_PTR;
25 * Implement a timer uclass to work with lib/time.c. The timer is usually
26 * a 32/64 bits free-running up counter. The get_rate() method is used to get
27 * the input clock frequency of the timer. The get_count() method is used
28 * to get the current 64 bits count value. If the hardware is counting down,
29 * the value should be inversed inside the method. There may be no real
30 * tick, and no timer interrupt.
33 int notrace timer_get_count(struct udevice *dev, u64 *count)
35 const struct timer_ops *ops = device_get_ops(dev);
40 *count = ops->get_count(dev);
44 unsigned long notrace timer_get_rate(struct udevice *dev)
46 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
48 return uc_priv->clock_rate;
51 static int timer_pre_probe(struct udevice *dev)
53 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
54 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
59 /* It is possible that a timer device has a null ofnode */
60 if (!dev_has_ofnode(dev))
63 err = clk_get_by_index(dev, 0, &timer_clk);
65 ret = clk_get_rate(&timer_clk);
66 if (IS_ERR_VALUE(ret))
68 uc_priv->clock_rate = ret;
71 dev_read_u32_default(dev, "clock-frequency", 0);
78 static int timer_post_probe(struct udevice *dev)
80 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
82 if (!uc_priv->clock_rate)
88 #if CONFIG_IS_ENABLED(CPU)
89 int timer_timebase_fallback(struct udevice *dev)
92 struct cpu_plat *cpu_plat;
93 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
95 /* Did we get our clock rate from the device tree? */
96 if (uc_priv->clock_rate)
99 /* Fall back to timebase-frequency */
100 dev_dbg(dev, "missing clocks or clock-frequency property; falling back on timebase-frequency\n");
101 cpu = cpu_get_current_dev();
105 cpu_plat = dev_get_parent_plat(cpu);
109 uc_priv->clock_rate = cpu_plat->timebase_freq;
114 u64 timer_conv_64(u32 count)
116 /* increment tbh if tbl has rolled over */
117 if (count < gd->timebase_l)
119 gd->timebase_l = count;
120 return ((u64)gd->timebase_h << 32) | gd->timebase_l;
123 int notrace dm_timer_init(void)
125 struct udevice *dev = NULL;
126 __maybe_unused ofnode node;
133 * Directly access gd->dm_root to suppress error messages, if the
134 * virtual root driver does not yet exist.
136 if (gd->dm_root == NULL)
139 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
140 /* Check for a chosen timer to be used for tick */
141 node = ofnode_get_chosen_node("tick-timer");
143 if (ofnode_valid(node) &&
144 uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) {
146 * If the timer is not marked to be bound before
147 * relocation, bind it anyway.
149 if (!lists_bind_fdt(dm_root(), node, &dev, false)) {
150 ret = device_probe(dev);
158 /* Fall back to the first available timer */
159 ret = uclass_first_device_err(UCLASS_TIMER, &dev);
172 UCLASS_DRIVER(timer) = {
175 .pre_probe = timer_pre_probe,
176 .flags = DM_UC_FLAG_SEQ_ALIAS,
177 .post_probe = timer_post_probe,
178 .per_device_auto = sizeof(struct timer_dev_priv),