1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
11 #include <asm/global_data.h>
12 #include <dm/ofnode.h>
14 #include <asm/arch-rockchip/timer.h>
15 #include <dt-structs.h>
19 DECLARE_GLOBAL_DATA_PTR;
21 #if CONFIG_IS_ENABLED(OF_PLATDATA)
22 struct rockchip_timer_plat {
23 struct dtd_rockchip_rk3288_timer dtd;
27 /* Driver private data. Contains timer id. Could be either 0 or 1. */
28 struct rockchip_timer_priv {
29 struct rk_timer *timer;
32 static inline int64_t rockchip_timer_get_curr_value(struct rk_timer *timer)
34 uint64_t timebase_h, timebase_l;
37 timebase_l = readl(&timer->timer_curr_value0);
38 timebase_h = readl(&timer->timer_curr_value1);
40 cntr = timebase_h << 32 | timebase_l;
44 #if CONFIG_IS_ENABLED(BOOTSTAGE)
45 ulong timer_get_boot_us(void)
52 ret = dm_timer_init();
55 /* The timer is available */
56 rate = timer_get_rate(gd->timer);
57 timer_get_count(gd->timer, &ticks);
58 } else if (CONFIG_IS_ENABLED(OF_REAL) && ret == -EAGAIN) {
59 /* We have been called so early that the DM is not ready,... */
60 ofnode node = offset_to_ofnode(-1);
61 struct rk_timer *timer = NULL;
64 * ... so we try to access the raw timer, if it is specified
65 * via the tick-timer property in /chosen.
67 node = ofnode_get_chosen_node("tick-timer");
68 if (!ofnode_valid(node)) {
69 debug("%s: no /chosen/tick-timer\n", __func__);
73 timer = (struct rk_timer *)ofnode_get_addr(node);
75 /* This timer is down-counting */
76 ticks = ~0uLL - rockchip_timer_get_curr_value(timer);
77 if (ofnode_read_u32(node, "clock-frequency", &rate)) {
78 debug("%s: could not read clock-frequency\n", __func__);
85 us = (ticks * 1000) / rate;
90 static u64 rockchip_timer_get_count(struct udevice *dev)
92 struct rockchip_timer_priv *priv = dev_get_priv(dev);
93 uint64_t cntr = rockchip_timer_get_curr_value(priv->timer);
95 /* timers are down-counting */
99 static int rockchip_clk_of_to_plat(struct udevice *dev)
101 if (CONFIG_IS_ENABLED(OF_REAL)) {
102 struct rockchip_timer_priv *priv = dev_get_priv(dev);
104 priv->timer = dev_read_addr_ptr(dev);
112 static int rockchip_timer_start(struct udevice *dev)
114 struct rockchip_timer_priv *priv = dev_get_priv(dev);
115 const uint64_t reload_val = ~0uLL;
116 const uint32_t reload_val_l = reload_val & 0xffffffff;
117 const uint32_t reload_val_h = reload_val >> 32;
119 /* don't reinit, if the timer is already running and set up */
120 if ((readl(&priv->timer->timer_ctrl_reg) & 1) == 1 &&
121 (readl(&priv->timer->timer_load_count0) == reload_val_l) &&
122 (readl(&priv->timer->timer_load_count1) == reload_val_h))
125 /* disable timer and reset all control */
126 writel(0, &priv->timer->timer_ctrl_reg);
127 /* write reload value */
128 writel(reload_val_l, &priv->timer->timer_load_count0);
129 writel(reload_val_h, &priv->timer->timer_load_count1);
131 writel(1, &priv->timer->timer_ctrl_reg);
136 static int rockchip_timer_probe(struct udevice *dev)
138 #if CONFIG_IS_ENABLED(OF_PLATDATA)
139 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
140 struct rockchip_timer_priv *priv = dev_get_priv(dev);
141 struct rockchip_timer_plat *plat = dev_get_plat(dev);
143 priv->timer = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
144 uc_priv->clock_rate = plat->dtd.clock_frequency;
147 return rockchip_timer_start(dev);
150 static const struct timer_ops rockchip_timer_ops = {
151 .get_count = rockchip_timer_get_count,
154 static const struct udevice_id rockchip_timer_ids[] = {
155 { .compatible = "rockchip,rk3288-timer" },
159 U_BOOT_DRIVER(rockchip_rk3288_timer) = {
160 .name = "rockchip_rk3288_timer",
162 .of_match = rockchip_timer_ids,
163 .probe = rockchip_timer_probe,
164 .ops = &rockchip_timer_ops,
165 .priv_auto = sizeof(struct rockchip_timer_priv),
166 #if CONFIG_IS_ENABLED(OF_PLATDATA)
167 .plat_auto = sizeof(struct rockchip_timer_plat),
169 .of_to_plat = rockchip_clk_of_to_plat,