1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
11 #include <dm/ofnode.h>
13 #include <asm/arch-rockchip/timer.h>
14 #include <dt-structs.h>
18 DECLARE_GLOBAL_DATA_PTR;
20 #if CONFIG_IS_ENABLED(OF_PLATDATA)
21 struct rockchip_timer_plat {
22 struct dtd_rockchip_rk3368_timer dtd;
26 /* Driver private data. Contains timer id. Could be either 0 or 1. */
27 struct rockchip_timer_priv {
28 struct rk_timer *timer;
31 static inline int64_t rockchip_timer_get_curr_value(struct rk_timer *timer)
33 uint64_t timebase_h, timebase_l;
36 timebase_l = readl(&timer->timer_curr_value0);
37 timebase_h = readl(&timer->timer_curr_value1);
39 cntr = timebase_h << 32 | timebase_l;
43 #if CONFIG_IS_ENABLED(BOOTSTAGE)
44 ulong timer_get_boot_us(void)
51 ret = dm_timer_init();
54 /* The timer is available */
55 rate = timer_get_rate(gd->timer);
56 timer_get_count(gd->timer, &ticks);
57 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
58 } else if (ret == -EAGAIN) {
59 /* We have been called so early that the DM is not ready,... */
60 ofnode node = offset_to_ofnode(-1);
61 struct rk_timer *timer = NULL;
64 * ... so we try to access the raw timer, if it is specified
65 * via the tick-timer property in /chosen.
67 node = ofnode_get_chosen_node("tick-timer");
68 if (!ofnode_valid(node)) {
69 debug("%s: no /chosen/tick-timer\n", __func__);
73 timer = (struct rk_timer *)ofnode_get_addr(node);
75 /* This timer is down-counting */
76 ticks = ~0uLL - rockchip_timer_get_curr_value(timer);
77 if (ofnode_read_u32(node, "clock-frequency", &rate)) {
78 debug("%s: could not read clock-frequency\n", __func__);
86 us = (ticks * 1000) / rate;
91 static int rockchip_timer_get_count(struct udevice *dev, u64 *count)
93 struct rockchip_timer_priv *priv = dev_get_priv(dev);
94 uint64_t cntr = rockchip_timer_get_curr_value(priv->timer);
96 /* timers are down-counting */
97 *count = ~0ull - cntr;
101 static int rockchip_clk_ofdata_to_platdata(struct udevice *dev)
103 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
104 struct rockchip_timer_priv *priv = dev_get_priv(dev);
106 priv->timer = dev_read_addr_ptr(dev);
114 static int rockchip_timer_start(struct udevice *dev)
116 struct rockchip_timer_priv *priv = dev_get_priv(dev);
117 const uint64_t reload_val = ~0uLL;
118 const uint32_t reload_val_l = reload_val & 0xffffffff;
119 const uint32_t reload_val_h = reload_val >> 32;
121 /* don't reinit, if the timer is already running and set up */
122 if ((readl(&priv->timer->timer_ctrl_reg) & 1) == 1 &&
123 (readl(&priv->timer->timer_load_count0) == reload_val_l) &&
124 (readl(&priv->timer->timer_load_count1) == reload_val_h))
127 /* disable timer and reset all control */
128 writel(0, &priv->timer->timer_ctrl_reg);
129 /* write reload value */
130 writel(reload_val_l, &priv->timer->timer_load_count0);
131 writel(reload_val_h, &priv->timer->timer_load_count1);
133 writel(1, &priv->timer->timer_ctrl_reg);
138 static int rockchip_timer_probe(struct udevice *dev)
140 #if CONFIG_IS_ENABLED(OF_PLATDATA)
141 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
142 struct rockchip_timer_priv *priv = dev_get_priv(dev);
143 struct rockchip_timer_plat *plat = dev_get_platdata(dev);
145 priv->timer = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
146 uc_priv->clock_rate = plat->dtd.clock_frequency;
149 return rockchip_timer_start(dev);
152 static const struct timer_ops rockchip_timer_ops = {
153 .get_count = rockchip_timer_get_count,
156 static const struct udevice_id rockchip_timer_ids[] = {
157 { .compatible = "rockchip,rk3188-timer" },
158 { .compatible = "rockchip,rk3288-timer" },
159 { .compatible = "rockchip,rk3368-timer" },
163 U_BOOT_DRIVER(rockchip_rk3368_timer) = {
164 .name = "rockchip_rk3368_timer",
166 .of_match = rockchip_timer_ids,
167 .probe = rockchip_timer_probe,
168 .ops = &rockchip_timer_ops,
169 .priv_auto_alloc_size = sizeof(struct rockchip_timer_priv),
170 #if CONFIG_IS_ENABLED(OF_PLATDATA)
171 .platdata_auto_alloc_size = sizeof(struct rockchip_timer_plat),
173 .ofdata_to_platdata = rockchip_clk_ofdata_to_platdata,