1 // SPDX-License-Identifier: GPL-2.0+
4 * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
12 #include <status_led.h>
17 #include <asm/global_data.h>
18 #include <asm/ptrace.h>
19 #include <linux/bitops.h>
21 DECLARE_GLOBAL_DATA_PTR;
24 * struct mpc83xx_timer_priv - Private data structure for MPC83xx timer driver
25 * @decrementer_count: Value to which the decrementer register should be re-set
26 * to when a timer interrupt occurs, thus determines the
27 * interrupt frequency (value for 1e6/HZ microseconds)
28 * @timestamp: Counter for the number of timer interrupts that have
29 * occurred (i.e. can be used to trigger events
30 * periodically in the timer interrupt)
32 struct mpc83xx_timer_priv {
33 uint decrementer_count;
38 * Bitmask for enabling the time base in the SPCR (System Priority
39 * Configuration Register)
41 static const u32 SPCR_TBEN_MASK = BIT(31 - 9);
44 * get_dec() - Get the value of the decrementer register
46 * Return: The value of the decrementer register
48 static inline unsigned long get_dec(void)
52 asm volatile ("mfdec %0" : "=r" (val) : );
58 * set_dec() - Set the value of the decrementer register
59 * @val: The value of the decrementer register to be set
61 static inline void set_dec(unsigned long val)
64 asm volatile ("mtdec %0"::"r" (val));
68 * mftbu() - Get value of TBU (upper time base) register
70 * Return: Value of the TBU register
72 static inline u32 mftbu(void)
76 asm volatile("mftbu %0" : "=r" (rval));
81 * mftb() - Get value of TBL (lower time base) register
83 * Return: Value of the TBL register
85 static inline u32 mftb(void)
89 asm volatile("mftb %0" : "=r" (rval));
94 * TODO(mario.six@gdsys.cc): This should really be done by timer_init, and the
95 * interrupt init should go into a interrupt driver.
97 int interrupt_init(void)
99 immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
101 struct udevice *sysinfo;
102 struct udevice *timer;
103 struct mpc83xx_timer_priv *timer_priv;
107 ret = uclass_first_device_err(UCLASS_TIMER, &timer);
109 debug("%s: Could not find timer device (error: %d)",
114 timer_priv = dev_get_priv(timer);
116 if (sysinfo_get(&sysinfo)) {
117 debug("%s: sysinfo device could not be fetched.\n", __func__);
121 ret = uclass_get_device_by_phandle(UCLASS_SIMPLE_BUS, sysinfo,
124 debug("%s: Could not retrieve CSB device (error: %d)",
129 ret = clk_get_by_index(csb, 0, &clock);
131 debug("%s: Could not retrieve clock (error: %d)",
136 timer_priv->decrementer_count = (clk_get_rate(&clock) / 4)
138 /* Enable e300 time base */
139 setbits_be32(&immr->sysconf.spcr, SPCR_TBEN_MASK);
141 set_dec(timer_priv->decrementer_count);
143 /* Switch on interrupts */
144 set_msr(get_msr() | MSR_EE);
150 * timer_interrupt() - Handler for the timer interrupt
151 * @regs: Array of register values
153 void timer_interrupt(struct pt_regs *regs)
155 struct udevice *timer = gd->timer;
156 struct mpc83xx_timer_priv *priv;
159 * During initialization, gd->timer might not be set yet, but the timer
160 * interrupt may already be enabled. In this case, wait for the
161 * initialization to complete
166 priv = dev_get_priv(timer);
168 /* Restore Decrementer Count */
169 set_dec(priv->decrementer_count);
173 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
174 if ((timestamp % (CONFIG_SYS_WATCHDOG_FREQ)) == 0)
176 #endif /* CONFIG_WATCHDOG || CONFIG_HW_WATCHDOG */
178 #ifdef CONFIG_LED_STATUS
179 status_led_tick(priv->timestamp);
180 #endif /* CONFIG_LED_STATUS */
183 void wait_ticks(ulong ticks)
185 ulong end = get_ticks() + ticks;
187 while (end > get_ticks())
191 static u64 mpc83xx_timer_get_count(struct udevice *dev)
196 * To make sure that no tbl overflow occurred between reading tbl and
197 * tbu, read tbu again, and compare it with the previously read tbu
198 * value: If they're different, a tbl overflow has occurred.
203 } while (tbu != mftbu());
205 return (tbu * 0x10000ULL) + tbl;
208 static int mpc83xx_timer_probe(struct udevice *dev)
210 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
214 ret = interrupt_init();
216 debug("%s: interrupt_init failed (err = %d)\n",
221 ret = clk_get_by_index(dev, 0, &clock);
223 debug("%s: Could not retrieve clock (err = %d)\n",
228 uc_priv->clock_rate = (clk_get_rate(&clock) + 3L) / 4L;
233 static const struct timer_ops mpc83xx_timer_ops = {
234 .get_count = mpc83xx_timer_get_count,
237 static const struct udevice_id mpc83xx_timer_ids[] = {
238 { .compatible = "fsl,mpc83xx-timer" },
242 U_BOOT_DRIVER(mpc83xx_timer) = {
243 .name = "mpc83xx_timer",
245 .of_match = mpc83xx_timer_ids,
246 .probe = mpc83xx_timer_probe,
247 .ops = &mpc83xx_timer_ops,
248 .priv_auto = sizeof(struct mpc83xx_timer_priv),