1 // SPDX-License-Identifier: GPL-2.0+
3 * Designware APB Timer driver
5 * Copyright (C) 2018 Marek Vasut <marex@denx.de>
11 #include <dt-structs.h>
15 #include <dm/device_compat.h>
16 #include <linux/kconfig.h>
19 #include <asm/arch/timer.h>
21 #define DW_APB_LOAD_VAL 0x0
22 #define DW_APB_CURR_VAL 0x4
23 #define DW_APB_CTRL 0x8
25 struct dw_apb_timer_priv {
27 struct reset_ctl_bulk resets;
30 struct dw_apb_timer_plat {
31 #if CONFIG_IS_ENABLED(OF_PLATDATA)
32 struct dtd_snps_dw_apb_timer dtplat;
36 static u64 dw_apb_timer_get_count(struct udevice *dev)
38 struct dw_apb_timer_priv *priv = dev_get_priv(dev);
41 * The DW APB counter counts down, but this function
42 * requires the count to be incrementing. Invert the
45 return timer_conv_64(~readl(priv->regs + DW_APB_CURR_VAL));
48 static int dw_apb_timer_probe(struct udevice *dev)
50 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
51 struct dw_apb_timer_priv *priv = dev_get_priv(dev);
54 #if CONFIG_IS_ENABLED(OF_PLATDATA)
55 struct dw_apb_timer_plat *plat = dev_get_plat(dev);
56 struct dtd_snps_dw_apb_timer *dtplat = &plat->dtplat;
58 priv->regs = dtplat->reg[0];
60 ret = clk_get_by_phandle(dev, &dtplat->clocks[0], &clk);
64 uc_priv->clock_rate = dtplat->clock_frequency;
66 if (CONFIG_IS_ENABLED(OF_REAL)) {
67 ret = reset_get_bulk(dev, &priv->resets);
69 dev_warn(dev, "Can't get reset: %d\n", ret);
71 reset_deassert_bulk(&priv->resets);
73 ret = clk_get_by_index(dev, 0, &clk);
77 uc_priv->clock_rate = clk_get_rate(&clk);
83 writel(0xffffffff, priv->regs + DW_APB_LOAD_VAL);
84 writel(0xffffffff, priv->regs + DW_APB_CURR_VAL);
85 setbits_le32(priv->regs + DW_APB_CTRL, 0x3);
90 static int dw_apb_timer_of_to_plat(struct udevice *dev)
92 if (CONFIG_IS_ENABLED(OF_REAL)) {
93 struct dw_apb_timer_priv *priv = dev_get_priv(dev);
95 priv->regs = dev_read_addr(dev);
101 static int dw_apb_timer_remove(struct udevice *dev)
103 struct dw_apb_timer_priv *priv = dev_get_priv(dev);
105 return reset_release_bulk(&priv->resets);
108 static const struct timer_ops dw_apb_timer_ops = {
109 .get_count = dw_apb_timer_get_count,
112 static const struct udevice_id dw_apb_timer_ids[] = {
113 { .compatible = "snps,dw-apb-timer" },
117 U_BOOT_DRIVER(snps_dw_apb_timer) = {
118 .name = "snps_dw_apb_timer",
120 .ops = &dw_apb_timer_ops,
121 .probe = dw_apb_timer_probe,
122 .of_match = dw_apb_timer_ids,
123 .of_to_plat = dw_apb_timer_of_to_plat,
124 .remove = dw_apb_timer_remove,
125 .priv_auto = sizeof(struct dw_apb_timer_priv),
126 .plat_auto = sizeof(struct dw_apb_timer_plat),