4 bool "Enable driver model for timer drivers"
7 Enable driver model for timer access. It uses the same API as
8 lib/time.c, but now implemented by the uclass. The first timer
9 will be used. The timer is usually a 32 bits free-running up
10 counter. There may be no real tick, and no timer interrupt.
13 bool "Enable driver model for timer drivers in SPL"
14 depends on TIMER && SPL
16 Enable support for timer drivers in SPL. These can be used to get
17 a timer value when in SPL, or perhaps for implementing a delay
18 function. This enables the drivers in drivers/timer as part of an
22 bool "Enable driver model for timer drivers in TPL"
23 depends on TIMER && TPL
25 Enable support for timer drivers in TPL. These can be used to get
26 a timer value when in TPL, or perhaps for implementing a delay
27 function. This enables the drivers in drivers/timer as part of an
31 bool "Enable driver model for timer drivers in VPL"
32 depends on TIMER && VPL
33 default y if TPL_TIMER
35 Enable support for timer drivers in VPL. These can be used to get
36 a timer value when in VPL, or perhaps for implementing a delay
37 function. This enables the drivers in drivers/timer as part of an
41 bool "Allow timer to be used early in U-Boot"
43 # initr_bootstage() requires a timer and is called before initr_dm()
44 # so only the early timer is available
45 default y if X86 && BOOTSTAGE
47 In some cases the timer must be accessible before driver model is
48 active. Examples include when using CONFIG_TRACE to trace U-Boot's
49 execution before driver model is set up. Enable this option to
50 use an early timer. These functions must be supported by your timer
51 driver: timer_early_get_count() and timer_early_get_rate().
54 bool "Altera timer support"
57 Select this to enable a timer for Altera devices. Please find
58 details on the "Embedded Peripherals IP User Guide" of Altera.
60 config ANDES_PLMT_TIMER
62 depends on RISCV_MMODE || SPL_RISCV_MMODE
64 The Andes PLMT block holds memory-mapped mtime register
65 associated with timer tick.
68 bool "ARC timer support"
69 depends on TIMER && ARC && CLK
71 Select this to enable built-in ARC timers.
72 ARC cores may have up to 2 built-in timers: timer0 and timer1,
73 usually at least one of them exists. Either of them is supported
77 bool "ARM timer watchdog (TWD) timer support"
78 depends on TIMER && CLK
80 Select this to enable support for the ARM global timer watchdog timer.
83 bool "Aspeed ast2400/ast2500 timer support"
85 default y if ARCH_ASPEED
87 Select this to enable timer for Aspeed ast2400/ast2500 devices.
88 This is a simple sys timer driver, it is compatible with lib/time.c,
89 but does not support any interrupts. Even though SoC has 8 hardware
90 counters, they are all treated as a single device by this driver.
91 This is mostly because they all share several registers which
92 makes it difficult to completely separate them.
94 config ATCPIT100_TIMER
95 bool "ATCPIT100 timer support"
98 Select this to enable a ATCPIT100 timer which will be embedded
99 in AE3XX, AE250 boards.
101 config ATMEL_PIT_TIMER
102 bool "Atmel periodic interval timer support"
105 Select this to enable a periodic interval timer for Atmel devices,
106 it is designed to offer maximum accuracy and efficient management,
107 even for systems with long response time.
109 config SPL_ATMEL_PIT_TIMER
110 bool "Atmel periodic interval timer support in SPL"
113 Select this to enable a periodic interval timer for Atmel devices,
114 it is designed to offer maximum accuracy and efficient management,
115 even for systems with long response time.
116 Select this to be available in SPL.
118 config ATMEL_TCB_TIMER
119 bool "Atmel timer counter support"
123 Select this to enable the use of the timer counter as a monotonic
126 config SPL_ATMEL_TCB_TIMER
127 bool "Atmel timer counter support in SPL"
131 Select this to enable the use of the timer counter as a monotonic
134 config CADENCE_TTC_TIMER
135 bool "Cadence TTC (Triple Timer Counter)"
138 Enables support for the cadence ttc driver. This driver is present
139 on Xilinx Zynq and ZynqMP SoCs.
141 config DESIGNWARE_APB_TIMER
142 bool "Designware APB Timer"
145 Enables support for the Designware APB Timer driver. This timer is
146 present on Altera SoCFPGA SoCs.
152 Enables support for the GXP Timer driver. This timer is
153 present on HPE GXP SoCs.
156 bool "MPC83xx timer support"
159 Select this to enable support for the timer found on
160 devices based on the MPC83xx family of SoCs.
162 config RENESAS_OSTM_TIMER
163 bool "Renesas RZ/A1 R7S72100 OSTM Timer"
166 Enables support for the Renesas OSTM Timer driver.
167 This timer is present on Renesas RZ/A1 R7S72100 SoCs.
169 config X86_TSC_TIMER_FREQ
170 int "x86 TSC timer frequency in Hz"
171 depends on X86_TSC_TIMER
174 Sets the estimated CPU frequency in Hz when TSC is used as the
175 early timer and the frequency can neither be calibrated via some
176 hardware ways, nor got from device tree at the time when device
177 tree is not available yet.
179 config NOMADIK_MTU_TIMER
180 bool "Nomadik MTU Timer"
183 Enables support for the Nomadik Multi Timer Unit (MTU),
184 used in ST-Ericsson Ux500 SoCs.
185 The MTU provides 4 decrementing free-running timers.
186 At the moment, only the first timer is used by the driver.
189 bool "Nuvoton NPCM timer support"
192 Select this to enable a timer on Nuvoton NPCM SoCs.
193 NPCM timer module has 5 down-counting timers, only the first timer
194 is used to implement timer ops. No support for early timer and
198 bool "Omap timer support"
201 Select this to enable an timer for Omap devices.
204 bool "Orion timer support"
207 Select this to enable an timer for Orion devices.
210 bool "RISC-V timer support"
211 depends on TIMER && RISCV
213 Select this to enable support for a generic RISC-V S-Mode timer
216 config ROCKCHIP_TIMER
217 bool "Rockchip timer support"
220 Select this to enable support for the timer found on
224 bool "Sandbox timer support"
225 depends on SANDBOX && TIMER
227 Select this to enable an emulated timer for sandbox. It gets
231 bool "STi timer support"
233 default y if ARCH_STI
235 Select this to enable a timer for STi devices.
238 bool "STM32 timer support"
241 Select this to enable support for the timer found on
245 bool "x86 Time-Stamp Counter (TSC) timer support"
246 depends on TIMER && X86
248 Select this to enable Time-Stamp Counter (TSC) timer for x86.
250 config X86_TSC_READ_BASE
251 bool "Read the TSC timer base on start-up"
252 depends on X86_TSC_TIMER
254 On x86 platforms the TSC timer tick starts at the value 0 on reset.
255 This it makes no sense to read the timer on boot and use that as the
256 base, since we will miss some time taken to load U-Boot, etc. This
257 delay is controlled by the SoC and we cannot reduce it, but for
258 bootstage we want to record the time since reset as accurately as
261 The only exception is when U-Boot is used as a secondary bootloader,
262 where this option should be enabled.
264 config TPL_X86_TSC_TIMER_NATIVE
265 bool "x86 TSC timer uses native calibration"
266 depends on TPL && X86_TSC_TIMER
268 Selects native timer calibration for TPL and don't include the other
269 methods in the code. This helps to reduce code size in TPL and works
270 on fairly modern Intel chips. Code-size reductions is about 700
274 bool "MediaTek timer support"
277 Select this to enable support for the timer found on
280 config MCHP_PIT64B_TIMER
281 bool "Microchip 64-bit periodic interval timer support"
284 Select this to enable support for Microchip 64-bit periodic
288 bool "NXP i.MX GPT timer support"
291 Select this to enable support for the timer found on
295 bool "Xilinx timer support"
298 select SPL_REGMAP if SPL
300 Select this to enable support for the timer found on
301 any Xilinx boards (axi timer).