1 // SPDX-License-Identifier: GPL-2.0
3 * USB4 specific functionality
5 * Copyright (C) 2019, Intel Corporation
6 * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
7 * Rajmohan Mani <rajmohan.mani@intel.com>
10 #include <linux/delay.h>
11 #include <linux/ktime.h>
16 #define USB4_DATA_RETRIES 3
19 USB4_SB_TARGET_ROUTER,
20 USB4_SB_TARGET_PARTNER,
21 USB4_SB_TARGET_RETIMER,
24 #define USB4_NVM_READ_OFFSET_MASK GENMASK(23, 2)
25 #define USB4_NVM_READ_OFFSET_SHIFT 2
26 #define USB4_NVM_READ_LENGTH_MASK GENMASK(27, 24)
27 #define USB4_NVM_READ_LENGTH_SHIFT 24
29 #define USB4_NVM_SET_OFFSET_MASK USB4_NVM_READ_OFFSET_MASK
30 #define USB4_NVM_SET_OFFSET_SHIFT USB4_NVM_READ_OFFSET_SHIFT
32 #define USB4_DROM_ADDRESS_MASK GENMASK(14, 2)
33 #define USB4_DROM_ADDRESS_SHIFT 2
34 #define USB4_DROM_SIZE_MASK GENMASK(19, 15)
35 #define USB4_DROM_SIZE_SHIFT 15
37 #define USB4_NVM_SECTOR_SIZE_MASK GENMASK(23, 0)
39 #define USB4_BA_LENGTH_MASK GENMASK(7, 0)
40 #define USB4_BA_INDEX_MASK GENMASK(15, 0)
43 USB4_BA_MAX_USB3 = 0x1,
44 USB4_BA_MIN_DP_AUX = 0x2,
45 USB4_BA_MIN_DP_MAIN = 0x3,
46 USB4_BA_MAX_PCIE = 0x4,
50 #define USB4_BA_VALUE_MASK GENMASK(31, 16)
51 #define USB4_BA_VALUE_SHIFT 16
53 static int usb4_native_switch_op(struct tb_switch *sw, u16 opcode,
54 u32 *metadata, u8 *status,
55 const void *tx_data, size_t tx_dwords,
56 void *rx_data, size_t rx_dwords)
62 ret = tb_sw_write(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
67 ret = tb_sw_write(sw, tx_data, TB_CFG_SWITCH, ROUTER_CS_9,
73 val = opcode | ROUTER_CS_26_OV;
74 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
78 ret = tb_switch_wait_for_bit(sw, ROUTER_CS_26, ROUTER_CS_26_OV, 0, 500);
82 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
86 if (val & ROUTER_CS_26_ONS)
90 *status = (val & ROUTER_CS_26_STATUS_MASK) >>
91 ROUTER_CS_26_STATUS_SHIFT;
94 ret = tb_sw_read(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
99 ret = tb_sw_read(sw, rx_data, TB_CFG_SWITCH, ROUTER_CS_9,
108 static int __usb4_switch_op(struct tb_switch *sw, u16 opcode, u32 *metadata,
109 u8 *status, const void *tx_data, size_t tx_dwords,
110 void *rx_data, size_t rx_dwords)
112 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
114 if (tx_dwords > NVM_DATA_DWORDS || rx_dwords > NVM_DATA_DWORDS)
118 * If the connection manager implementation provides USB4 router
119 * operation proxy callback, call it here instead of running the
120 * operation natively.
122 if (cm_ops->usb4_switch_op) {
125 ret = cm_ops->usb4_switch_op(sw, opcode, metadata, status,
126 tx_data, tx_dwords, rx_data,
128 if (ret != -EOPNOTSUPP)
132 * If the proxy was not supported then run the native
133 * router operation instead.
137 return usb4_native_switch_op(sw, opcode, metadata, status, tx_data,
138 tx_dwords, rx_data, rx_dwords);
141 static inline int usb4_switch_op(struct tb_switch *sw, u16 opcode,
142 u32 *metadata, u8 *status)
144 return __usb4_switch_op(sw, opcode, metadata, status, NULL, 0, NULL, 0);
147 static inline int usb4_switch_op_data(struct tb_switch *sw, u16 opcode,
148 u32 *metadata, u8 *status,
149 const void *tx_data, size_t tx_dwords,
150 void *rx_data, size_t rx_dwords)
152 return __usb4_switch_op(sw, opcode, metadata, status, tx_data,
153 tx_dwords, rx_data, rx_dwords);
156 static void usb4_switch_check_wakes(struct tb_switch *sw)
158 struct tb_port *port;
162 if (!device_may_wakeup(&sw->dev))
166 if (tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1))
169 tb_sw_dbg(sw, "PCIe wake: %s, USB3 wake: %s\n",
170 (val & ROUTER_CS_6_WOPS) ? "yes" : "no",
171 (val & ROUTER_CS_6_WOUS) ? "yes" : "no");
173 wakeup = val & (ROUTER_CS_6_WOPS | ROUTER_CS_6_WOUS);
176 /* Check for any connected downstream ports for USB4 wake */
177 tb_switch_for_each_port(sw, port) {
178 if (!tb_port_has_remote(port))
181 if (tb_port_read(port, &val, TB_CFG_PORT,
182 port->cap_usb4 + PORT_CS_18, 1))
185 tb_port_dbg(port, "USB4 wake: %s\n",
186 (val & PORT_CS_18_WOU4S) ? "yes" : "no");
188 if (val & PORT_CS_18_WOU4S)
193 pm_wakeup_event(&sw->dev, 0);
196 static bool link_is_usb4(struct tb_port *port)
203 if (tb_port_read(port, &val, TB_CFG_PORT,
204 port->cap_usb4 + PORT_CS_18, 1))
207 return !(val & PORT_CS_18_TCM);
211 * usb4_switch_setup() - Additional setup for USB4 device
212 * @sw: USB4 router to setup
214 * USB4 routers need additional settings in order to enable all the
215 * tunneling. This function enables USB and PCIe tunneling if it can be
216 * enabled (e.g the parent switch also supports them). If USB tunneling
217 * is not available for some reason (like that there is Thunderbolt 3
218 * switch upstream) then the internal xHCI controller is enabled
221 int usb4_switch_setup(struct tb_switch *sw)
223 struct tb_port *downstream_port;
224 struct tb_switch *parent;
229 usb4_switch_check_wakes(sw);
234 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1);
238 parent = tb_switch_parent(sw);
239 downstream_port = tb_port_at(tb_route(sw), parent);
240 sw->link_usb4 = link_is_usb4(downstream_port);
241 tb_sw_dbg(sw, "link: %s\n", sw->link_usb4 ? "USB4" : "TBT");
243 xhci = val & ROUTER_CS_6_HCI;
244 tbt3 = !(val & ROUTER_CS_6_TNS);
246 tb_sw_dbg(sw, "TBT3 support: %s, xHCI: %s\n",
247 tbt3 ? "yes" : "no", xhci ? "yes" : "no");
249 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
253 if (tb_acpi_may_tunnel_usb3() && sw->link_usb4 &&
254 tb_switch_find_port(parent, TB_TYPE_USB3_DOWN)) {
255 val |= ROUTER_CS_5_UTO;
260 * Only enable PCIe tunneling if the parent router supports it
261 * and it is not disabled.
263 if (tb_acpi_may_tunnel_pcie() &&
264 tb_switch_find_port(parent, TB_TYPE_PCIE_DOWN)) {
265 val |= ROUTER_CS_5_PTO;
267 * xHCI can be enabled if PCIe tunneling is supported
268 * and the parent does not have any USB3 dowstream
269 * adapters (so we cannot do USB 3.x tunneling).
272 val |= ROUTER_CS_5_HCO;
275 /* TBT3 supported by the CM */
276 val |= ROUTER_CS_5_C3S;
277 /* Tunneling configuration is ready now */
278 val |= ROUTER_CS_5_CV;
280 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
284 return tb_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_CR,
289 * usb4_switch_read_uid() - Read UID from USB4 router
291 * @uid: UID is stored here
293 * Reads 64-bit UID from USB4 router config space.
295 int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid)
297 return tb_sw_read(sw, uid, TB_CFG_SWITCH, ROUTER_CS_7, 2);
300 static int usb4_switch_drom_read_block(void *data,
301 unsigned int dwaddress, void *buf,
304 struct tb_switch *sw = data;
309 metadata = (dwords << USB4_DROM_SIZE_SHIFT) & USB4_DROM_SIZE_MASK;
310 metadata |= (dwaddress << USB4_DROM_ADDRESS_SHIFT) &
311 USB4_DROM_ADDRESS_MASK;
313 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_DROM_READ, &metadata,
314 &status, NULL, 0, buf, dwords);
318 return status ? -EIO : 0;
322 * usb4_switch_drom_read() - Read arbitrary bytes from USB4 router DROM
324 * @address: Byte address inside DROM to start reading
325 * @buf: Buffer where the DROM content is stored
326 * @size: Number of bytes to read from DROM
328 * Uses USB4 router operations to read router DROM. For devices this
329 * should always work but for hosts it may return %-EOPNOTSUPP in which
330 * case the host router does not have DROM.
332 int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
335 return tb_nvm_read_data(address, buf, size, USB4_DATA_RETRIES,
336 usb4_switch_drom_read_block, sw);
340 * usb4_switch_lane_bonding_possible() - Are conditions met for lane bonding
343 * Checks whether conditions are met so that lane bonding can be
344 * established with the upstream router. Call only for device routers.
346 bool usb4_switch_lane_bonding_possible(struct tb_switch *sw)
352 up = tb_upstream_port(sw);
353 ret = tb_port_read(up, &val, TB_CFG_PORT, up->cap_usb4 + PORT_CS_18, 1);
357 return !!(val & PORT_CS_18_BE);
361 * usb4_switch_set_wake() - Enabled/disable wake
363 * @flags: Wakeup flags (%0 to disable)
365 * Enables/disables router to wake up from sleep.
367 int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags)
369 struct tb_port *port;
370 u64 route = tb_route(sw);
375 * Enable wakes coming from all USB4 downstream ports (from
376 * child routers). For device routers do this also for the
377 * upstream USB4 port.
379 tb_switch_for_each_port(sw, port) {
380 if (!tb_port_is_null(port))
382 if (!route && tb_is_upstream_port(port))
387 ret = tb_port_read(port, &val, TB_CFG_PORT,
388 port->cap_usb4 + PORT_CS_19, 1);
392 val &= ~(PORT_CS_19_WOC | PORT_CS_19_WOD | PORT_CS_19_WOU4);
394 if (tb_is_upstream_port(port)) {
395 val |= PORT_CS_19_WOU4;
397 bool configured = val & PORT_CS_19_PC;
399 if ((flags & TB_WAKE_ON_CONNECT) && !configured)
400 val |= PORT_CS_19_WOC;
401 if ((flags & TB_WAKE_ON_DISCONNECT) && configured)
402 val |= PORT_CS_19_WOD;
403 if ((flags & TB_WAKE_ON_USB4) && configured)
404 val |= PORT_CS_19_WOU4;
407 ret = tb_port_write(port, &val, TB_CFG_PORT,
408 port->cap_usb4 + PORT_CS_19, 1);
414 * Enable wakes from PCIe, USB 3.x and DP on this router. Only
415 * needed for device routers.
418 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
422 val &= ~(ROUTER_CS_5_WOP | ROUTER_CS_5_WOU | ROUTER_CS_5_WOD);
423 if (flags & TB_WAKE_ON_USB3)
424 val |= ROUTER_CS_5_WOU;
425 if (flags & TB_WAKE_ON_PCIE)
426 val |= ROUTER_CS_5_WOP;
427 if (flags & TB_WAKE_ON_DP)
428 val |= ROUTER_CS_5_WOD;
430 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
439 * usb4_switch_set_sleep() - Prepare the router to enter sleep
442 * Sets sleep bit for the router. Returns when the router sleep ready
443 * bit has been asserted.
445 int usb4_switch_set_sleep(struct tb_switch *sw)
450 /* Set sleep bit and wait for sleep ready to be asserted */
451 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
455 val |= ROUTER_CS_5_SLP;
457 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
461 return tb_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_SLPR,
462 ROUTER_CS_6_SLPR, 500);
466 * usb4_switch_nvm_sector_size() - Return router NVM sector size
469 * If the router supports NVM operations this function returns the NVM
470 * sector size in bytes. If NVM operations are not supported returns
473 int usb4_switch_nvm_sector_size(struct tb_switch *sw)
479 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SECTOR_SIZE, &metadata,
485 return status == 0x2 ? -EOPNOTSUPP : -EIO;
487 return metadata & USB4_NVM_SECTOR_SIZE_MASK;
490 static int usb4_switch_nvm_read_block(void *data,
491 unsigned int dwaddress, void *buf, size_t dwords)
493 struct tb_switch *sw = data;
498 metadata = (dwords << USB4_NVM_READ_LENGTH_SHIFT) &
499 USB4_NVM_READ_LENGTH_MASK;
500 metadata |= (dwaddress << USB4_NVM_READ_OFFSET_SHIFT) &
501 USB4_NVM_READ_OFFSET_MASK;
503 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_NVM_READ, &metadata,
504 &status, NULL, 0, buf, dwords);
508 return status ? -EIO : 0;
512 * usb4_switch_nvm_read() - Read arbitrary bytes from router NVM
514 * @address: Starting address in bytes
515 * @buf: Read data is placed here
516 * @size: How many bytes to read
518 * Reads NVM contents of the router. If NVM is not supported returns
521 int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
524 return tb_nvm_read_data(address, buf, size, USB4_DATA_RETRIES,
525 usb4_switch_nvm_read_block, sw);
529 * usb4_switch_nvm_set_offset() - Set NVM write offset
531 * @address: Start offset
533 * Explicitly sets NVM write offset. Normally when writing to NVM this
534 * is done automatically by usb4_switch_nvm_write().
536 * Returns %0 in success and negative errno if there was a failure.
538 int usb4_switch_nvm_set_offset(struct tb_switch *sw, unsigned int address)
540 u32 metadata, dwaddress;
544 dwaddress = address / 4;
545 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
546 USB4_NVM_SET_OFFSET_MASK;
548 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SET_OFFSET, &metadata,
553 return status ? -EIO : 0;
556 static int usb4_switch_nvm_write_next_block(void *data, unsigned int dwaddress,
557 const void *buf, size_t dwords)
559 struct tb_switch *sw = data;
563 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_NVM_WRITE, NULL, &status,
564 buf, dwords, NULL, 0);
568 return status ? -EIO : 0;
572 * usb4_switch_nvm_write() - Write to the router NVM
574 * @address: Start address where to write in bytes
575 * @buf: Pointer to the data to write
576 * @size: Size of @buf in bytes
578 * Writes @buf to the router NVM using USB4 router operations. If NVM
579 * write is not supported returns %-EOPNOTSUPP.
581 int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
582 const void *buf, size_t size)
586 ret = usb4_switch_nvm_set_offset(sw, address);
590 return tb_nvm_write_data(address, buf, size, USB4_DATA_RETRIES,
591 usb4_switch_nvm_write_next_block, sw);
595 * usb4_switch_nvm_authenticate() - Authenticate new NVM
598 * After the new NVM has been written via usb4_switch_nvm_write(), this
599 * function triggers NVM authentication process. The router gets power
600 * cycled and if the authentication is successful the new NVM starts
601 * running. In case of failure returns negative errno.
603 * The caller should call usb4_switch_nvm_authenticate_status() to read
604 * the status of the authentication after power cycle. It should be the
605 * first router operation to avoid the status being lost.
607 int usb4_switch_nvm_authenticate(struct tb_switch *sw)
611 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_AUTH, NULL, NULL);
614 * The router is power cycled once NVM_AUTH is started so it is
615 * expected to get any of the following errors back.
628 * usb4_switch_nvm_authenticate_status() - Read status of last NVM authenticate
630 * @status: Status code of the operation
632 * The function checks if there is status available from the last NVM
633 * authenticate router operation. If there is status then %0 is returned
634 * and the status code is placed in @status. Returns negative errno in case
637 * Must be called before any other router operation.
639 int usb4_switch_nvm_authenticate_status(struct tb_switch *sw, u32 *status)
641 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
646 if (cm_ops->usb4_switch_nvm_authenticate_status) {
647 ret = cm_ops->usb4_switch_nvm_authenticate_status(sw, status);
648 if (ret != -EOPNOTSUPP)
652 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
656 /* Check that the opcode is correct */
657 opcode = val & ROUTER_CS_26_OPCODE_MASK;
658 if (opcode == USB4_SWITCH_OP_NVM_AUTH) {
659 if (val & ROUTER_CS_26_OV)
661 if (val & ROUTER_CS_26_ONS)
664 *status = (val & ROUTER_CS_26_STATUS_MASK) >>
665 ROUTER_CS_26_STATUS_SHIFT;
674 * usb4_switch_credits_init() - Read buffer allocation parameters
677 * Reads @sw buffer allocation parameters and initializes @sw buffer
678 * allocation fields accordingly. Specifically @sw->credits_allocation
679 * is set to %true if these parameters can be used in tunneling.
681 * Returns %0 on success and negative errno otherwise.
683 int usb4_switch_credits_init(struct tb_switch *sw)
685 int max_usb3, min_dp_aux, min_dp_main, max_pcie, max_dma;
686 int ret, length, i, nports;
687 const struct tb_port *port;
688 u32 data[NVM_DATA_DWORDS];
692 memset(data, 0, sizeof(data));
693 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_BUFFER_ALLOC, &metadata,
694 &status, NULL, 0, data, ARRAY_SIZE(data));
700 length = metadata & USB4_BA_LENGTH_MASK;
701 if (WARN_ON(length > ARRAY_SIZE(data)))
710 tb_sw_dbg(sw, "credit allocation parameters:\n");
712 for (i = 0; i < length; i++) {
715 index = data[i] & USB4_BA_INDEX_MASK;
716 value = (data[i] & USB4_BA_VALUE_MASK) >> USB4_BA_VALUE_SHIFT;
719 case USB4_BA_MAX_USB3:
720 tb_sw_dbg(sw, " USB3: %u\n", value);
723 case USB4_BA_MIN_DP_AUX:
724 tb_sw_dbg(sw, " DP AUX: %u\n", value);
727 case USB4_BA_MIN_DP_MAIN:
728 tb_sw_dbg(sw, " DP main: %u\n", value);
731 case USB4_BA_MAX_PCIE:
732 tb_sw_dbg(sw, " PCIe: %u\n", value);
736 tb_sw_dbg(sw, " DMA: %u\n", value);
740 tb_sw_dbg(sw, " unknown credit allocation index %#x, skipping\n",
747 * Validate the buffer allocation preferences. If we find
748 * issues, log a warning and fall back using the hard-coded
752 /* Host router must report baMaxHI */
753 if (!tb_route(sw) && max_dma < 0) {
754 tb_sw_warn(sw, "host router is missing baMaxHI\n");
759 tb_switch_for_each_port(sw, port) {
760 if (tb_port_is_null(port))
764 /* Must have DP buffer allocation (multiple USB4 ports) */
765 if (nports > 2 && (min_dp_aux < 0 || min_dp_main < 0)) {
766 tb_sw_warn(sw, "multiple USB4 ports require baMinDPaux/baMinDPmain\n");
770 tb_switch_for_each_port(sw, port) {
771 if (tb_port_is_dpout(port) && min_dp_main < 0) {
772 tb_sw_warn(sw, "missing baMinDPmain");
775 if ((tb_port_is_dpin(port) || tb_port_is_dpout(port)) &&
777 tb_sw_warn(sw, "missing baMinDPaux");
780 if ((tb_port_is_usb3_down(port) || tb_port_is_usb3_up(port)) &&
782 tb_sw_warn(sw, "missing baMaxUSB3");
785 if ((tb_port_is_pcie_down(port) || tb_port_is_pcie_up(port)) &&
787 tb_sw_warn(sw, "missing baMaxPCIe");
793 * Buffer allocation passed the validation so we can use it in
796 sw->credit_allocation = true;
798 sw->max_usb3_credits = max_usb3;
800 sw->min_dp_aux_credits = min_dp_aux;
802 sw->min_dp_main_credits = min_dp_main;
804 sw->max_pcie_credits = max_pcie;
806 sw->max_dma_credits = max_dma;
815 * usb4_switch_query_dp_resource() - Query availability of DP IN resource
819 * For DP tunneling this function can be used to query availability of
820 * DP IN resource. Returns true if the resource is available for DP
821 * tunneling, false otherwise.
823 bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in)
825 u32 metadata = in->port;
829 ret = usb4_switch_op(sw, USB4_SWITCH_OP_QUERY_DP_RESOURCE, &metadata,
832 * If DP resource allocation is not supported assume it is
835 if (ret == -EOPNOTSUPP)
844 * usb4_switch_alloc_dp_resource() - Allocate DP IN resource
848 * Allocates DP IN resource for DP tunneling using USB4 router
849 * operations. If the resource was allocated returns %0. Otherwise
850 * returns negative errno, in particular %-EBUSY if the resource is
853 int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
855 u32 metadata = in->port;
859 ret = usb4_switch_op(sw, USB4_SWITCH_OP_ALLOC_DP_RESOURCE, &metadata,
861 if (ret == -EOPNOTSUPP)
866 return status ? -EBUSY : 0;
870 * usb4_switch_dealloc_dp_resource() - Releases allocated DP IN resource
874 * Releases the previously allocated DP IN resource.
876 int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
878 u32 metadata = in->port;
882 ret = usb4_switch_op(sw, USB4_SWITCH_OP_DEALLOC_DP_RESOURCE, &metadata,
884 if (ret == -EOPNOTSUPP)
889 return status ? -EIO : 0;
892 static int usb4_port_idx(const struct tb_switch *sw, const struct tb_port *port)
897 /* Assume port is primary */
898 tb_switch_for_each_port(sw, p) {
899 if (!tb_port_is_null(p))
901 if (tb_is_upstream_port(p))
914 * usb4_switch_map_pcie_down() - Map USB4 port to a PCIe downstream adapter
918 * USB4 routers have direct mapping between USB4 ports and PCIe
919 * downstream adapters where the PCIe topology is extended. This
920 * function returns the corresponding downstream PCIe adapter or %NULL
921 * if no such mapping was possible.
923 struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
924 const struct tb_port *port)
926 int usb4_idx = usb4_port_idx(sw, port);
930 /* Find PCIe down port matching usb4_port */
931 tb_switch_for_each_port(sw, p) {
932 if (!tb_port_is_pcie_down(p))
935 if (pcie_idx == usb4_idx)
945 * usb4_switch_map_usb3_down() - Map USB4 port to a USB3 downstream adapter
949 * USB4 routers have direct mapping between USB4 ports and USB 3.x
950 * downstream adapters where the USB 3.x topology is extended. This
951 * function returns the corresponding downstream USB 3.x adapter or
952 * %NULL if no such mapping was possible.
954 struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
955 const struct tb_port *port)
957 int usb4_idx = usb4_port_idx(sw, port);
961 /* Find USB3 down port matching usb4_port */
962 tb_switch_for_each_port(sw, p) {
963 if (!tb_port_is_usb3_down(p))
966 if (usb_idx == usb4_idx)
976 * usb4_switch_add_ports() - Add USB4 ports for this router
979 * For USB4 router finds all USB4 ports and registers devices for each.
980 * Can be called to any router.
982 * Return %0 in case of success and negative errno in case of failure.
984 int usb4_switch_add_ports(struct tb_switch *sw)
986 struct tb_port *port;
988 if (tb_switch_is_icm(sw) || !tb_switch_is_usb4(sw))
991 tb_switch_for_each_port(sw, port) {
992 struct usb4_port *usb4;
994 if (!tb_port_is_null(port))
999 usb4 = usb4_port_device_add(port);
1001 usb4_switch_remove_ports(sw);
1002 return PTR_ERR(usb4);
1012 * usb4_switch_remove_ports() - Removes USB4 ports from this router
1015 * Unregisters previously registered USB4 ports.
1017 void usb4_switch_remove_ports(struct tb_switch *sw)
1019 struct tb_port *port;
1021 tb_switch_for_each_port(sw, port) {
1023 usb4_port_device_remove(port->usb4);
1030 * usb4_port_unlock() - Unlock USB4 downstream port
1031 * @port: USB4 port to unlock
1033 * Unlocks USB4 downstream port so that the connection manager can
1034 * access the router below this port.
1036 int usb4_port_unlock(struct tb_port *port)
1041 ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
1045 val &= ~ADP_CS_4_LCK;
1046 return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
1050 * usb4_port_hotplug_enable() - Enables hotplug for a port
1051 * @port: USB4 port to operate on
1053 * Enables hot plug events on a given port. This is only intended
1054 * to be used on lane, DP-IN, and DP-OUT adapters.
1056 int usb4_port_hotplug_enable(struct tb_port *port)
1061 ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_5, 1);
1065 val &= ~ADP_CS_5_DHP;
1066 return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_5, 1);
1069 static int usb4_port_set_configured(struct tb_port *port, bool configured)
1074 if (!port->cap_usb4)
1077 ret = tb_port_read(port, &val, TB_CFG_PORT,
1078 port->cap_usb4 + PORT_CS_19, 1);
1083 val |= PORT_CS_19_PC;
1085 val &= ~PORT_CS_19_PC;
1087 return tb_port_write(port, &val, TB_CFG_PORT,
1088 port->cap_usb4 + PORT_CS_19, 1);
1092 * usb4_port_configure() - Set USB4 port configured
1093 * @port: USB4 router
1095 * Sets the USB4 link to be configured for power management purposes.
1097 int usb4_port_configure(struct tb_port *port)
1099 return usb4_port_set_configured(port, true);
1103 * usb4_port_unconfigure() - Set USB4 port unconfigured
1104 * @port: USB4 router
1106 * Sets the USB4 link to be unconfigured for power management purposes.
1108 void usb4_port_unconfigure(struct tb_port *port)
1110 usb4_port_set_configured(port, false);
1113 static int usb4_set_xdomain_configured(struct tb_port *port, bool configured)
1118 if (!port->cap_usb4)
1121 ret = tb_port_read(port, &val, TB_CFG_PORT,
1122 port->cap_usb4 + PORT_CS_19, 1);
1127 val |= PORT_CS_19_PID;
1129 val &= ~PORT_CS_19_PID;
1131 return tb_port_write(port, &val, TB_CFG_PORT,
1132 port->cap_usb4 + PORT_CS_19, 1);
1136 * usb4_port_configure_xdomain() - Configure port for XDomain
1137 * @port: USB4 port connected to another host
1139 * Marks the USB4 port as being connected to another host. Returns %0 in
1140 * success and negative errno in failure.
1142 int usb4_port_configure_xdomain(struct tb_port *port)
1144 return usb4_set_xdomain_configured(port, true);
1148 * usb4_port_unconfigure_xdomain() - Unconfigure port for XDomain
1149 * @port: USB4 port that was connected to another host
1151 * Clears USB4 port from being marked as XDomain.
1153 void usb4_port_unconfigure_xdomain(struct tb_port *port)
1155 usb4_set_xdomain_configured(port, false);
1158 static int usb4_port_wait_for_bit(struct tb_port *port, u32 offset, u32 bit,
1159 u32 value, int timeout_msec)
1161 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
1167 ret = tb_port_read(port, &val, TB_CFG_PORT, offset, 1);
1171 if ((val & bit) == value)
1174 usleep_range(50, 100);
1175 } while (ktime_before(ktime_get(), timeout));
1180 static int usb4_port_read_data(struct tb_port *port, void *data, size_t dwords)
1182 if (dwords > NVM_DATA_DWORDS)
1185 return tb_port_read(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
1189 static int usb4_port_write_data(struct tb_port *port, const void *data,
1192 if (dwords > NVM_DATA_DWORDS)
1195 return tb_port_write(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
1199 static int usb4_port_sb_read(struct tb_port *port, enum usb4_sb_target target,
1200 u8 index, u8 reg, void *buf, u8 size)
1202 size_t dwords = DIV_ROUND_UP(size, 4);
1206 if (!port->cap_usb4)
1210 val |= size << PORT_CS_1_LENGTH_SHIFT;
1211 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1212 if (target == USB4_SB_TARGET_RETIMER)
1213 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1214 val |= PORT_CS_1_PND;
1216 ret = tb_port_write(port, &val, TB_CFG_PORT,
1217 port->cap_usb4 + PORT_CS_1, 1);
1221 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1222 PORT_CS_1_PND, 0, 500);
1226 ret = tb_port_read(port, &val, TB_CFG_PORT,
1227 port->cap_usb4 + PORT_CS_1, 1);
1231 if (val & PORT_CS_1_NR)
1233 if (val & PORT_CS_1_RC)
1236 return buf ? usb4_port_read_data(port, buf, dwords) : 0;
1239 static int usb4_port_sb_write(struct tb_port *port, enum usb4_sb_target target,
1240 u8 index, u8 reg, const void *buf, u8 size)
1242 size_t dwords = DIV_ROUND_UP(size, 4);
1246 if (!port->cap_usb4)
1250 ret = usb4_port_write_data(port, buf, dwords);
1256 val |= size << PORT_CS_1_LENGTH_SHIFT;
1257 val |= PORT_CS_1_WNR_WRITE;
1258 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1259 if (target == USB4_SB_TARGET_RETIMER)
1260 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1261 val |= PORT_CS_1_PND;
1263 ret = tb_port_write(port, &val, TB_CFG_PORT,
1264 port->cap_usb4 + PORT_CS_1, 1);
1268 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1269 PORT_CS_1_PND, 0, 500);
1273 ret = tb_port_read(port, &val, TB_CFG_PORT,
1274 port->cap_usb4 + PORT_CS_1, 1);
1278 if (val & PORT_CS_1_NR)
1280 if (val & PORT_CS_1_RC)
1286 static int usb4_port_sb_op(struct tb_port *port, enum usb4_sb_target target,
1287 u8 index, enum usb4_sb_opcode opcode, int timeout_msec)
1294 ret = usb4_port_sb_write(port, target, index, USB4_SB_OPCODE, &val,
1299 timeout = ktime_add_ms(ktime_get(), timeout_msec);
1303 ret = usb4_port_sb_read(port, target, index, USB4_SB_OPCODE,
1312 case USB4_SB_OPCODE_ERR:
1315 case USB4_SB_OPCODE_ONS:
1323 } while (ktime_before(ktime_get(), timeout));
1328 static int usb4_port_set_router_offline(struct tb_port *port, bool offline)
1333 ret = usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1334 USB4_SB_METADATA, &val, sizeof(val));
1338 val = USB4_SB_OPCODE_ROUTER_OFFLINE;
1339 return usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1340 USB4_SB_OPCODE, &val, sizeof(val));
1344 * usb4_port_router_offline() - Put the USB4 port to offline mode
1347 * This function puts the USB4 port into offline mode. In this mode the
1348 * port does not react on hotplug events anymore. This needs to be
1349 * called before retimer access is done when the USB4 links is not up.
1351 * Returns %0 in case of success and negative errno if there was an
1354 int usb4_port_router_offline(struct tb_port *port)
1356 return usb4_port_set_router_offline(port, true);
1360 * usb4_port_router_online() - Put the USB4 port back to online
1363 * Makes the USB4 port functional again.
1365 int usb4_port_router_online(struct tb_port *port)
1367 return usb4_port_set_router_offline(port, false);
1371 * usb4_port_enumerate_retimers() - Send RT broadcast transaction
1374 * This forces the USB4 port to send broadcast RT transaction which
1375 * makes the retimers on the link to assign index to themselves. Returns
1376 * %0 in case of success and negative errno if there was an error.
1378 int usb4_port_enumerate_retimers(struct tb_port *port)
1382 val = USB4_SB_OPCODE_ENUMERATE_RETIMERS;
1383 return usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1384 USB4_SB_OPCODE, &val, sizeof(val));
1388 * usb4_port_clx_supported() - Check if CLx is supported by the link
1389 * @port: Port to check for CLx support for
1391 * PORT_CS_18_CPS bit reflects if the link supports CLx including
1392 * active cables (if connected on the link).
1394 bool usb4_port_clx_supported(struct tb_port *port)
1399 ret = tb_port_read(port, &val, TB_CFG_PORT,
1400 port->cap_usb4 + PORT_CS_18, 1);
1404 return !!(val & PORT_CS_18_CPS);
1408 * usb4_port_margining_caps() - Read USB4 port marginig capabilities
1410 * @caps: Array with at least two elements to hold the results
1412 * Reads the USB4 port lane margining capabilities into @caps.
1414 int usb4_port_margining_caps(struct tb_port *port, u32 *caps)
1418 ret = usb4_port_sb_op(port, USB4_SB_TARGET_ROUTER, 0,
1419 USB4_SB_OPCODE_READ_LANE_MARGINING_CAP, 500);
1423 return usb4_port_sb_read(port, USB4_SB_TARGET_ROUTER, 0,
1424 USB4_SB_DATA, caps, sizeof(*caps) * 2);
1428 * usb4_port_hw_margin() - Run hardware lane margining on port
1430 * @lanes: Which lanes to run (must match the port capabilities). Can be
1432 * @ber_level: BER level contour value
1433 * @timing: Perform timing margining instead of voltage
1434 * @right_high: Use Right/high margin instead of left/low
1435 * @results: Array with at least two elements to hold the results
1437 * Runs hardware lane margining on USB4 port and returns the result in
1440 int usb4_port_hw_margin(struct tb_port *port, unsigned int lanes,
1441 unsigned int ber_level, bool timing, bool right_high,
1449 val |= USB4_MARGIN_HW_TIME;
1451 val |= USB4_MARGIN_HW_RH;
1453 val |= (ber_level << USB4_MARGIN_HW_BER_SHIFT) &
1454 USB4_MARGIN_HW_BER_MASK;
1456 ret = usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1457 USB4_SB_METADATA, &val, sizeof(val));
1461 ret = usb4_port_sb_op(port, USB4_SB_TARGET_ROUTER, 0,
1462 USB4_SB_OPCODE_RUN_HW_LANE_MARGINING, 2500);
1466 return usb4_port_sb_read(port, USB4_SB_TARGET_ROUTER, 0,
1467 USB4_SB_DATA, results, sizeof(*results) * 2);
1471 * usb4_port_sw_margin() - Run software lane margining on port
1473 * @lanes: Which lanes to run (must match the port capabilities). Can be
1475 * @timing: Perform timing margining instead of voltage
1476 * @right_high: Use Right/high margin instead of left/low
1477 * @counter: What to do with the error counter
1479 * Runs software lane margining on USB4 port. Read back the error
1480 * counters by calling usb4_port_sw_margin_errors(). Returns %0 in
1481 * success and negative errno otherwise.
1483 int usb4_port_sw_margin(struct tb_port *port, unsigned int lanes, bool timing,
1484 bool right_high, u32 counter)
1491 val |= USB4_MARGIN_SW_TIME;
1493 val |= USB4_MARGIN_SW_RH;
1494 val |= (counter << USB4_MARGIN_SW_COUNTER_SHIFT) &
1495 USB4_MARGIN_SW_COUNTER_MASK;
1497 ret = usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1498 USB4_SB_METADATA, &val, sizeof(val));
1502 return usb4_port_sb_op(port, USB4_SB_TARGET_ROUTER, 0,
1503 USB4_SB_OPCODE_RUN_SW_LANE_MARGINING, 2500);
1507 * usb4_port_sw_margin_errors() - Read the software margining error counters
1509 * @errors: Error metadata is copied here.
1511 * This reads back the software margining error counters from the port.
1512 * Returns %0 in success and negative errno otherwise.
1514 int usb4_port_sw_margin_errors(struct tb_port *port, u32 *errors)
1518 ret = usb4_port_sb_op(port, USB4_SB_TARGET_ROUTER, 0,
1519 USB4_SB_OPCODE_READ_SW_MARGIN_ERR, 150);
1523 return usb4_port_sb_read(port, USB4_SB_TARGET_ROUTER, 0,
1524 USB4_SB_METADATA, errors, sizeof(*errors));
1527 static inline int usb4_port_retimer_op(struct tb_port *port, u8 index,
1528 enum usb4_sb_opcode opcode,
1531 return usb4_port_sb_op(port, USB4_SB_TARGET_RETIMER, index, opcode,
1536 * usb4_port_retimer_set_inbound_sbtx() - Enable sideband channel transactions
1538 * @index: Retimer index
1540 * Enables sideband channel transations on SBTX. Can be used when USB4
1541 * link does not go up, for example if there is no device connected.
1543 int usb4_port_retimer_set_inbound_sbtx(struct tb_port *port, u8 index)
1547 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_SET_INBOUND_SBTX,
1554 * Per the USB4 retimer spec, the retimer is not required to
1555 * send an RT (Retimer Transaction) response for the first
1556 * SET_INBOUND_SBTX command
1558 return usb4_port_retimer_op(port, index, USB4_SB_OPCODE_SET_INBOUND_SBTX,
1563 * usb4_port_retimer_read() - Read from retimer sideband registers
1565 * @index: Retimer index
1566 * @reg: Sideband register to read
1567 * @buf: Data from @reg is stored here
1568 * @size: Number of bytes to read
1570 * Function reads retimer sideband registers starting from @reg. The
1571 * retimer is connected to @port at @index. Returns %0 in case of
1572 * success, and read data is copied to @buf. If there is no retimer
1573 * present at given @index returns %-ENODEV. In any other failure
1574 * returns negative errno.
1576 int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
1579 return usb4_port_sb_read(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1584 * usb4_port_retimer_write() - Write to retimer sideband registers
1586 * @index: Retimer index
1587 * @reg: Sideband register to write
1588 * @buf: Data that is written starting from @reg
1589 * @size: Number of bytes to write
1591 * Writes retimer sideband registers starting from @reg. The retimer is
1592 * connected to @port at @index. Returns %0 in case of success. If there
1593 * is no retimer present at given @index returns %-ENODEV. In any other
1594 * failure returns negative errno.
1596 int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
1597 const void *buf, u8 size)
1599 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1604 * usb4_port_retimer_is_last() - Is the retimer last on-board retimer
1606 * @index: Retimer index
1608 * If the retimer at @index is last one (connected directly to the
1609 * Type-C port) this function returns %1. If it is not returns %0. If
1610 * the retimer is not present returns %-ENODEV. Otherwise returns
1613 int usb4_port_retimer_is_last(struct tb_port *port, u8 index)
1618 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_QUERY_LAST_RETIMER,
1623 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1625 return ret ? ret : metadata & 1;
1629 * usb4_port_retimer_nvm_sector_size() - Read retimer NVM sector size
1631 * @index: Retimer index
1633 * Reads NVM sector size (in bytes) of a retimer at @index. This
1634 * operation can be used to determine whether the retimer supports NVM
1635 * upgrade for example. Returns sector size in bytes or negative errno
1636 * in case of error. Specifically returns %-ENODEV if there is no
1637 * retimer at @index.
1639 int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index)
1644 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_GET_NVM_SECTOR_SIZE,
1649 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1651 return ret ? ret : metadata & USB4_NVM_SECTOR_SIZE_MASK;
1655 * usb4_port_retimer_nvm_set_offset() - Set NVM write offset
1657 * @index: Retimer index
1658 * @address: Start offset
1660 * Exlicitly sets NVM write offset. Normally when writing to NVM this is
1661 * done automatically by usb4_port_retimer_nvm_write().
1663 * Returns %0 in success and negative errno if there was a failure.
1665 int usb4_port_retimer_nvm_set_offset(struct tb_port *port, u8 index,
1666 unsigned int address)
1668 u32 metadata, dwaddress;
1671 dwaddress = address / 4;
1672 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
1673 USB4_NVM_SET_OFFSET_MASK;
1675 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1680 return usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_SET_OFFSET,
1684 struct retimer_info {
1685 struct tb_port *port;
1689 static int usb4_port_retimer_nvm_write_next_block(void *data,
1690 unsigned int dwaddress, const void *buf, size_t dwords)
1693 const struct retimer_info *info = data;
1694 struct tb_port *port = info->port;
1695 u8 index = info->index;
1698 ret = usb4_port_retimer_write(port, index, USB4_SB_DATA,
1703 return usb4_port_retimer_op(port, index,
1704 USB4_SB_OPCODE_NVM_BLOCK_WRITE, 1000);
1708 * usb4_port_retimer_nvm_write() - Write to retimer NVM
1710 * @index: Retimer index
1711 * @address: Byte address where to start the write
1712 * @buf: Data to write
1713 * @size: Size in bytes how much to write
1715 * Writes @size bytes from @buf to the retimer NVM. Used for NVM
1716 * upgrade. Returns %0 if the data was written successfully and negative
1717 * errno in case of failure. Specifically returns %-ENODEV if there is
1718 * no retimer at @index.
1720 int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index, unsigned int address,
1721 const void *buf, size_t size)
1723 struct retimer_info info = { .port = port, .index = index };
1726 ret = usb4_port_retimer_nvm_set_offset(port, index, address);
1730 return tb_nvm_write_data(address, buf, size, USB4_DATA_RETRIES,
1731 usb4_port_retimer_nvm_write_next_block, &info);
1735 * usb4_port_retimer_nvm_authenticate() - Start retimer NVM upgrade
1737 * @index: Retimer index
1739 * After the new NVM image has been written via usb4_port_retimer_nvm_write()
1740 * this function can be used to trigger the NVM upgrade process. If
1741 * successful the retimer restarts with the new NVM and may not have the
1742 * index set so one needs to call usb4_port_enumerate_retimers() to
1743 * force index to be assigned.
1745 int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index)
1750 * We need to use the raw operation here because once the
1751 * authentication completes the retimer index is not set anymore
1752 * so we do not get back the status now.
1754 val = USB4_SB_OPCODE_NVM_AUTH_WRITE;
1755 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index,
1756 USB4_SB_OPCODE, &val, sizeof(val));
1760 * usb4_port_retimer_nvm_authenticate_status() - Read status of NVM upgrade
1762 * @index: Retimer index
1763 * @status: Raw status code read from metadata
1765 * This can be called after usb4_port_retimer_nvm_authenticate() and
1766 * usb4_port_enumerate_retimers() to fetch status of the NVM upgrade.
1768 * Returns %0 if the authentication status was successfully read. The
1769 * completion metadata (the result) is then stored into @status. If
1770 * reading the status fails, returns negative errno.
1772 int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
1778 ret = usb4_port_retimer_read(port, index, USB4_SB_OPCODE, &val,
1788 case USB4_SB_OPCODE_ERR:
1789 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA,
1790 &metadata, sizeof(metadata));
1794 *status = metadata & USB4_SB_METADATA_NVM_AUTH_WRITE_MASK;
1797 case USB4_SB_OPCODE_ONS:
1805 static int usb4_port_retimer_nvm_read_block(void *data, unsigned int dwaddress,
1806 void *buf, size_t dwords)
1808 const struct retimer_info *info = data;
1809 struct tb_port *port = info->port;
1810 u8 index = info->index;
1814 metadata = dwaddress << USB4_NVM_READ_OFFSET_SHIFT;
1815 if (dwords < NVM_DATA_DWORDS)
1816 metadata |= dwords << USB4_NVM_READ_LENGTH_SHIFT;
1818 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1823 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_READ, 500);
1827 return usb4_port_retimer_read(port, index, USB4_SB_DATA, buf,
1832 * usb4_port_retimer_nvm_read() - Read contents of retimer NVM
1834 * @index: Retimer index
1835 * @address: NVM address (in bytes) to start reading
1836 * @buf: Data read from NVM is stored here
1837 * @size: Number of bytes to read
1839 * Reads retimer NVM and copies the contents to @buf. Returns %0 if the
1840 * read was successful and negative errno in case of failure.
1841 * Specifically returns %-ENODEV if there is no retimer at @index.
1843 int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
1844 unsigned int address, void *buf, size_t size)
1846 struct retimer_info info = { .port = port, .index = index };
1848 return tb_nvm_read_data(address, buf, size, USB4_DATA_RETRIES,
1849 usb4_port_retimer_nvm_read_block, &info);
1853 * usb4_usb3_port_max_link_rate() - Maximum support USB3 link rate
1854 * @port: USB3 adapter port
1856 * Return maximum supported link rate of a USB3 adapter in Mb/s.
1857 * Negative errno in case of error.
1859 int usb4_usb3_port_max_link_rate(struct tb_port *port)
1864 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
1867 ret = tb_port_read(port, &val, TB_CFG_PORT,
1868 port->cap_adap + ADP_USB3_CS_4, 1);
1872 lr = (val & ADP_USB3_CS_4_MSLR_MASK) >> ADP_USB3_CS_4_MSLR_SHIFT;
1873 return lr == ADP_USB3_CS_4_MSLR_20G ? 20000 : 10000;
1877 * usb4_usb3_port_actual_link_rate() - Established USB3 link rate
1878 * @port: USB3 adapter port
1880 * Return actual established link rate of a USB3 adapter in Mb/s. If the
1881 * link is not up returns %0 and negative errno in case of failure.
1883 int usb4_usb3_port_actual_link_rate(struct tb_port *port)
1888 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
1891 ret = tb_port_read(port, &val, TB_CFG_PORT,
1892 port->cap_adap + ADP_USB3_CS_4, 1);
1896 if (!(val & ADP_USB3_CS_4_ULV))
1899 lr = val & ADP_USB3_CS_4_ALR_MASK;
1900 return lr == ADP_USB3_CS_4_ALR_20G ? 20000 : 10000;
1903 static int usb4_usb3_port_cm_request(struct tb_port *port, bool request)
1908 if (!tb_port_is_usb3_down(port))
1910 if (tb_route(port->sw))
1913 ret = tb_port_read(port, &val, TB_CFG_PORT,
1914 port->cap_adap + ADP_USB3_CS_2, 1);
1919 val |= ADP_USB3_CS_2_CMR;
1921 val &= ~ADP_USB3_CS_2_CMR;
1923 ret = tb_port_write(port, &val, TB_CFG_PORT,
1924 port->cap_adap + ADP_USB3_CS_2, 1);
1929 * We can use val here directly as the CMR bit is in the same place
1930 * as HCA. Just mask out others.
1932 val &= ADP_USB3_CS_2_CMR;
1933 return usb4_port_wait_for_bit(port, port->cap_adap + ADP_USB3_CS_1,
1934 ADP_USB3_CS_1_HCA, val, 1500);
1937 static inline int usb4_usb3_port_set_cm_request(struct tb_port *port)
1939 return usb4_usb3_port_cm_request(port, true);
1942 static inline int usb4_usb3_port_clear_cm_request(struct tb_port *port)
1944 return usb4_usb3_port_cm_request(port, false);
1947 static unsigned int usb3_bw_to_mbps(u32 bw, u8 scale)
1949 unsigned long uframes;
1951 uframes = bw * 512UL << scale;
1952 return DIV_ROUND_CLOSEST(uframes * 8000, 1000 * 1000);
1955 static u32 mbps_to_usb3_bw(unsigned int mbps, u8 scale)
1957 unsigned long uframes;
1959 /* 1 uframe is 1/8 ms (125 us) -> 1 / 8000 s */
1960 uframes = ((unsigned long)mbps * 1000 * 1000) / 8000;
1961 return DIV_ROUND_UP(uframes, 512UL << scale);
1964 static int usb4_usb3_port_read_allocated_bandwidth(struct tb_port *port,
1971 ret = tb_port_read(port, &val, TB_CFG_PORT,
1972 port->cap_adap + ADP_USB3_CS_2, 1);
1976 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1977 port->cap_adap + ADP_USB3_CS_3, 1);
1981 scale &= ADP_USB3_CS_3_SCALE_MASK;
1983 bw = val & ADP_USB3_CS_2_AUBW_MASK;
1984 *upstream_bw = usb3_bw_to_mbps(bw, scale);
1986 bw = (val & ADP_USB3_CS_2_ADBW_MASK) >> ADP_USB3_CS_2_ADBW_SHIFT;
1987 *downstream_bw = usb3_bw_to_mbps(bw, scale);
1993 * usb4_usb3_port_allocated_bandwidth() - Bandwidth allocated for USB3
1994 * @port: USB3 adapter port
1995 * @upstream_bw: Allocated upstream bandwidth is stored here
1996 * @downstream_bw: Allocated downstream bandwidth is stored here
1998 * Stores currently allocated USB3 bandwidth into @upstream_bw and
1999 * @downstream_bw in Mb/s. Returns %0 in case of success and negative
2002 int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
2007 ret = usb4_usb3_port_set_cm_request(port);
2011 ret = usb4_usb3_port_read_allocated_bandwidth(port, upstream_bw,
2013 usb4_usb3_port_clear_cm_request(port);
2018 static int usb4_usb3_port_read_consumed_bandwidth(struct tb_port *port,
2025 ret = tb_port_read(port, &val, TB_CFG_PORT,
2026 port->cap_adap + ADP_USB3_CS_1, 1);
2030 ret = tb_port_read(port, &scale, TB_CFG_PORT,
2031 port->cap_adap + ADP_USB3_CS_3, 1);
2035 scale &= ADP_USB3_CS_3_SCALE_MASK;
2037 bw = val & ADP_USB3_CS_1_CUBW_MASK;
2038 *upstream_bw = usb3_bw_to_mbps(bw, scale);
2040 bw = (val & ADP_USB3_CS_1_CDBW_MASK) >> ADP_USB3_CS_1_CDBW_SHIFT;
2041 *downstream_bw = usb3_bw_to_mbps(bw, scale);
2046 static int usb4_usb3_port_write_allocated_bandwidth(struct tb_port *port,
2050 u32 val, ubw, dbw, scale;
2053 /* Read the used scale, hardware default is 0 */
2054 ret = tb_port_read(port, &scale, TB_CFG_PORT,
2055 port->cap_adap + ADP_USB3_CS_3, 1);
2059 scale &= ADP_USB3_CS_3_SCALE_MASK;
2060 ubw = mbps_to_usb3_bw(upstream_bw, scale);
2061 dbw = mbps_to_usb3_bw(downstream_bw, scale);
2063 ret = tb_port_read(port, &val, TB_CFG_PORT,
2064 port->cap_adap + ADP_USB3_CS_2, 1);
2068 val &= ~(ADP_USB3_CS_2_AUBW_MASK | ADP_USB3_CS_2_ADBW_MASK);
2069 val |= dbw << ADP_USB3_CS_2_ADBW_SHIFT;
2072 return tb_port_write(port, &val, TB_CFG_PORT,
2073 port->cap_adap + ADP_USB3_CS_2, 1);
2077 * usb4_usb3_port_allocate_bandwidth() - Allocate bandwidth for USB3
2078 * @port: USB3 adapter port
2079 * @upstream_bw: New upstream bandwidth
2080 * @downstream_bw: New downstream bandwidth
2082 * This can be used to set how much bandwidth is allocated for the USB3
2083 * tunneled isochronous traffic. @upstream_bw and @downstream_bw are the
2084 * new values programmed to the USB3 adapter allocation registers. If
2085 * the values are lower than what is currently consumed the allocation
2086 * is set to what is currently consumed instead (consumed bandwidth
2087 * cannot be taken away by CM). The actual new values are returned in
2088 * @upstream_bw and @downstream_bw.
2090 * Returns %0 in case of success and negative errno if there was a
2093 int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
2096 int ret, consumed_up, consumed_down, allocate_up, allocate_down;
2098 ret = usb4_usb3_port_set_cm_request(port);
2102 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
2107 /* Don't allow it go lower than what is consumed */
2108 allocate_up = max(*upstream_bw, consumed_up);
2109 allocate_down = max(*downstream_bw, consumed_down);
2111 ret = usb4_usb3_port_write_allocated_bandwidth(port, allocate_up,
2116 *upstream_bw = allocate_up;
2117 *downstream_bw = allocate_down;
2120 usb4_usb3_port_clear_cm_request(port);
2125 * usb4_usb3_port_release_bandwidth() - Release allocated USB3 bandwidth
2126 * @port: USB3 adapter port
2127 * @upstream_bw: New allocated upstream bandwidth
2128 * @downstream_bw: New allocated downstream bandwidth
2130 * Releases USB3 allocated bandwidth down to what is actually consumed.
2131 * The new bandwidth is returned in @upstream_bw and @downstream_bw.
2133 * Returns 0% in success and negative errno in case of failure.
2135 int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
2138 int ret, consumed_up, consumed_down;
2140 ret = usb4_usb3_port_set_cm_request(port);
2144 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
2150 * Always keep 1000 Mb/s to make sure xHCI has at least some
2151 * bandwidth available for isochronous traffic.
2153 if (consumed_up < 1000)
2155 if (consumed_down < 1000)
2156 consumed_down = 1000;
2158 ret = usb4_usb3_port_write_allocated_bandwidth(port, consumed_up,
2163 *upstream_bw = consumed_up;
2164 *downstream_bw = consumed_down;
2167 usb4_usb3_port_clear_cm_request(port);