1 // SPDX-License-Identifier: GPL-2.0
3 * USB4 specific functionality
5 * Copyright (C) 2019, Intel Corporation
6 * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
7 * Rajmohan Mani <rajmohan.mani@intel.com>
10 #include <linux/delay.h>
11 #include <linux/ktime.h>
16 #define USB4_DATA_RETRIES 3
19 USB4_SB_TARGET_ROUTER,
20 USB4_SB_TARGET_PARTNER,
21 USB4_SB_TARGET_RETIMER,
24 #define USB4_NVM_READ_OFFSET_MASK GENMASK(23, 2)
25 #define USB4_NVM_READ_OFFSET_SHIFT 2
26 #define USB4_NVM_READ_LENGTH_MASK GENMASK(27, 24)
27 #define USB4_NVM_READ_LENGTH_SHIFT 24
29 #define USB4_NVM_SET_OFFSET_MASK USB4_NVM_READ_OFFSET_MASK
30 #define USB4_NVM_SET_OFFSET_SHIFT USB4_NVM_READ_OFFSET_SHIFT
32 #define USB4_DROM_ADDRESS_MASK GENMASK(14, 2)
33 #define USB4_DROM_ADDRESS_SHIFT 2
34 #define USB4_DROM_SIZE_MASK GENMASK(19, 15)
35 #define USB4_DROM_SIZE_SHIFT 15
37 #define USB4_NVM_SECTOR_SIZE_MASK GENMASK(23, 0)
39 #define USB4_BA_LENGTH_MASK GENMASK(7, 0)
40 #define USB4_BA_INDEX_MASK GENMASK(15, 0)
43 USB4_BA_MAX_USB3 = 0x1,
44 USB4_BA_MIN_DP_AUX = 0x2,
45 USB4_BA_MIN_DP_MAIN = 0x3,
46 USB4_BA_MAX_PCIE = 0x4,
50 #define USB4_BA_VALUE_MASK GENMASK(31, 16)
51 #define USB4_BA_VALUE_SHIFT 16
53 static int usb4_switch_wait_for_bit(struct tb_switch *sw, u32 offset, u32 bit,
54 u32 value, int timeout_msec)
56 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
62 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, offset, 1);
66 if ((val & bit) == value)
69 usleep_range(50, 100);
70 } while (ktime_before(ktime_get(), timeout));
75 static int usb4_native_switch_op(struct tb_switch *sw, u16 opcode,
76 u32 *metadata, u8 *status,
77 const void *tx_data, size_t tx_dwords,
78 void *rx_data, size_t rx_dwords)
84 ret = tb_sw_write(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
89 ret = tb_sw_write(sw, tx_data, TB_CFG_SWITCH, ROUTER_CS_9,
95 val = opcode | ROUTER_CS_26_OV;
96 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
100 ret = usb4_switch_wait_for_bit(sw, ROUTER_CS_26, ROUTER_CS_26_OV, 0, 500);
104 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
108 if (val & ROUTER_CS_26_ONS)
112 *status = (val & ROUTER_CS_26_STATUS_MASK) >>
113 ROUTER_CS_26_STATUS_SHIFT;
116 ret = tb_sw_read(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
121 ret = tb_sw_read(sw, rx_data, TB_CFG_SWITCH, ROUTER_CS_9,
130 static int __usb4_switch_op(struct tb_switch *sw, u16 opcode, u32 *metadata,
131 u8 *status, const void *tx_data, size_t tx_dwords,
132 void *rx_data, size_t rx_dwords)
134 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
136 if (tx_dwords > NVM_DATA_DWORDS || rx_dwords > NVM_DATA_DWORDS)
140 * If the connection manager implementation provides USB4 router
141 * operation proxy callback, call it here instead of running the
142 * operation natively.
144 if (cm_ops->usb4_switch_op) {
147 ret = cm_ops->usb4_switch_op(sw, opcode, metadata, status,
148 tx_data, tx_dwords, rx_data,
150 if (ret != -EOPNOTSUPP)
154 * If the proxy was not supported then run the native
155 * router operation instead.
159 return usb4_native_switch_op(sw, opcode, metadata, status, tx_data,
160 tx_dwords, rx_data, rx_dwords);
163 static inline int usb4_switch_op(struct tb_switch *sw, u16 opcode,
164 u32 *metadata, u8 *status)
166 return __usb4_switch_op(sw, opcode, metadata, status, NULL, 0, NULL, 0);
169 static inline int usb4_switch_op_data(struct tb_switch *sw, u16 opcode,
170 u32 *metadata, u8 *status,
171 const void *tx_data, size_t tx_dwords,
172 void *rx_data, size_t rx_dwords)
174 return __usb4_switch_op(sw, opcode, metadata, status, tx_data,
175 tx_dwords, rx_data, rx_dwords);
178 static void usb4_switch_check_wakes(struct tb_switch *sw)
180 struct tb_port *port;
184 if (!device_may_wakeup(&sw->dev))
188 if (tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1))
191 tb_sw_dbg(sw, "PCIe wake: %s, USB3 wake: %s\n",
192 (val & ROUTER_CS_6_WOPS) ? "yes" : "no",
193 (val & ROUTER_CS_6_WOUS) ? "yes" : "no");
195 wakeup = val & (ROUTER_CS_6_WOPS | ROUTER_CS_6_WOUS);
198 /* Check for any connected downstream ports for USB4 wake */
199 tb_switch_for_each_port(sw, port) {
200 if (!tb_port_has_remote(port))
203 if (tb_port_read(port, &val, TB_CFG_PORT,
204 port->cap_usb4 + PORT_CS_18, 1))
207 tb_port_dbg(port, "USB4 wake: %s\n",
208 (val & PORT_CS_18_WOU4S) ? "yes" : "no");
210 if (val & PORT_CS_18_WOU4S)
215 pm_wakeup_event(&sw->dev, 0);
218 static bool link_is_usb4(struct tb_port *port)
225 if (tb_port_read(port, &val, TB_CFG_PORT,
226 port->cap_usb4 + PORT_CS_18, 1))
229 return !(val & PORT_CS_18_TCM);
233 * usb4_switch_setup() - Additional setup for USB4 device
234 * @sw: USB4 router to setup
236 * USB4 routers need additional settings in order to enable all the
237 * tunneling. This function enables USB and PCIe tunneling if it can be
238 * enabled (e.g the parent switch also supports them). If USB tunneling
239 * is not available for some reason (like that there is Thunderbolt 3
240 * switch upstream) then the internal xHCI controller is enabled
243 int usb4_switch_setup(struct tb_switch *sw)
245 struct tb_port *downstream_port;
246 struct tb_switch *parent;
251 usb4_switch_check_wakes(sw);
256 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1);
260 parent = tb_switch_parent(sw);
261 downstream_port = tb_port_at(tb_route(sw), parent);
262 sw->link_usb4 = link_is_usb4(downstream_port);
263 tb_sw_dbg(sw, "link: %s\n", sw->link_usb4 ? "USB4" : "TBT");
265 xhci = val & ROUTER_CS_6_HCI;
266 tbt3 = !(val & ROUTER_CS_6_TNS);
268 tb_sw_dbg(sw, "TBT3 support: %s, xHCI: %s\n",
269 tbt3 ? "yes" : "no", xhci ? "yes" : "no");
271 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
275 if (tb_acpi_may_tunnel_usb3() && sw->link_usb4 &&
276 tb_switch_find_port(parent, TB_TYPE_USB3_DOWN)) {
277 val |= ROUTER_CS_5_UTO;
282 * Only enable PCIe tunneling if the parent router supports it
283 * and it is not disabled.
285 if (tb_acpi_may_tunnel_pcie() &&
286 tb_switch_find_port(parent, TB_TYPE_PCIE_DOWN)) {
287 val |= ROUTER_CS_5_PTO;
289 * xHCI can be enabled if PCIe tunneling is supported
290 * and the parent does not have any USB3 dowstream
291 * adapters (so we cannot do USB 3.x tunneling).
294 val |= ROUTER_CS_5_HCO;
297 /* TBT3 supported by the CM */
298 val |= ROUTER_CS_5_C3S;
299 /* Tunneling configuration is ready now */
300 val |= ROUTER_CS_5_CV;
302 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
306 return usb4_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_CR,
311 * usb4_switch_read_uid() - Read UID from USB4 router
313 * @uid: UID is stored here
315 * Reads 64-bit UID from USB4 router config space.
317 int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid)
319 return tb_sw_read(sw, uid, TB_CFG_SWITCH, ROUTER_CS_7, 2);
322 static int usb4_switch_drom_read_block(void *data,
323 unsigned int dwaddress, void *buf,
326 struct tb_switch *sw = data;
331 metadata = (dwords << USB4_DROM_SIZE_SHIFT) & USB4_DROM_SIZE_MASK;
332 metadata |= (dwaddress << USB4_DROM_ADDRESS_SHIFT) &
333 USB4_DROM_ADDRESS_MASK;
335 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_DROM_READ, &metadata,
336 &status, NULL, 0, buf, dwords);
340 return status ? -EIO : 0;
344 * usb4_switch_drom_read() - Read arbitrary bytes from USB4 router DROM
346 * @address: Byte address inside DROM to start reading
347 * @buf: Buffer where the DROM content is stored
348 * @size: Number of bytes to read from DROM
350 * Uses USB4 router operations to read router DROM. For devices this
351 * should always work but for hosts it may return %-EOPNOTSUPP in which
352 * case the host router does not have DROM.
354 int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
357 return tb_nvm_read_data(address, buf, size, USB4_DATA_RETRIES,
358 usb4_switch_drom_read_block, sw);
362 * usb4_switch_lane_bonding_possible() - Are conditions met for lane bonding
365 * Checks whether conditions are met so that lane bonding can be
366 * established with the upstream router. Call only for device routers.
368 bool usb4_switch_lane_bonding_possible(struct tb_switch *sw)
374 up = tb_upstream_port(sw);
375 ret = tb_port_read(up, &val, TB_CFG_PORT, up->cap_usb4 + PORT_CS_18, 1);
379 return !!(val & PORT_CS_18_BE);
383 * usb4_switch_set_wake() - Enabled/disable wake
385 * @flags: Wakeup flags (%0 to disable)
387 * Enables/disables router to wake up from sleep.
389 int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags)
391 struct tb_port *port;
392 u64 route = tb_route(sw);
397 * Enable wakes coming from all USB4 downstream ports (from
398 * child routers). For device routers do this also for the
399 * upstream USB4 port.
401 tb_switch_for_each_port(sw, port) {
402 if (!tb_port_is_null(port))
404 if (!route && tb_is_upstream_port(port))
409 ret = tb_port_read(port, &val, TB_CFG_PORT,
410 port->cap_usb4 + PORT_CS_19, 1);
414 val &= ~(PORT_CS_19_WOC | PORT_CS_19_WOD | PORT_CS_19_WOU4);
416 if (tb_is_upstream_port(port)) {
417 val |= PORT_CS_19_WOU4;
419 bool configured = val & PORT_CS_19_PC;
421 if ((flags & TB_WAKE_ON_CONNECT) && !configured)
422 val |= PORT_CS_19_WOC;
423 if ((flags & TB_WAKE_ON_DISCONNECT) && configured)
424 val |= PORT_CS_19_WOD;
425 if ((flags & TB_WAKE_ON_USB4) && configured)
426 val |= PORT_CS_19_WOU4;
429 ret = tb_port_write(port, &val, TB_CFG_PORT,
430 port->cap_usb4 + PORT_CS_19, 1);
436 * Enable wakes from PCIe, USB 3.x and DP on this router. Only
437 * needed for device routers.
440 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
444 val &= ~(ROUTER_CS_5_WOP | ROUTER_CS_5_WOU | ROUTER_CS_5_WOD);
445 if (flags & TB_WAKE_ON_USB3)
446 val |= ROUTER_CS_5_WOU;
447 if (flags & TB_WAKE_ON_PCIE)
448 val |= ROUTER_CS_5_WOP;
449 if (flags & TB_WAKE_ON_DP)
450 val |= ROUTER_CS_5_WOD;
452 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
461 * usb4_switch_set_sleep() - Prepare the router to enter sleep
464 * Sets sleep bit for the router. Returns when the router sleep ready
465 * bit has been asserted.
467 int usb4_switch_set_sleep(struct tb_switch *sw)
472 /* Set sleep bit and wait for sleep ready to be asserted */
473 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
477 val |= ROUTER_CS_5_SLP;
479 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
483 return usb4_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_SLPR,
484 ROUTER_CS_6_SLPR, 500);
488 * usb4_switch_nvm_sector_size() - Return router NVM sector size
491 * If the router supports NVM operations this function returns the NVM
492 * sector size in bytes. If NVM operations are not supported returns
495 int usb4_switch_nvm_sector_size(struct tb_switch *sw)
501 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SECTOR_SIZE, &metadata,
507 return status == 0x2 ? -EOPNOTSUPP : -EIO;
509 return metadata & USB4_NVM_SECTOR_SIZE_MASK;
512 static int usb4_switch_nvm_read_block(void *data,
513 unsigned int dwaddress, void *buf, size_t dwords)
515 struct tb_switch *sw = data;
520 metadata = (dwords << USB4_NVM_READ_LENGTH_SHIFT) &
521 USB4_NVM_READ_LENGTH_MASK;
522 metadata |= (dwaddress << USB4_NVM_READ_OFFSET_SHIFT) &
523 USB4_NVM_READ_OFFSET_MASK;
525 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_NVM_READ, &metadata,
526 &status, NULL, 0, buf, dwords);
530 return status ? -EIO : 0;
534 * usb4_switch_nvm_read() - Read arbitrary bytes from router NVM
536 * @address: Starting address in bytes
537 * @buf: Read data is placed here
538 * @size: How many bytes to read
540 * Reads NVM contents of the router. If NVM is not supported returns
543 int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
546 return tb_nvm_read_data(address, buf, size, USB4_DATA_RETRIES,
547 usb4_switch_nvm_read_block, sw);
551 * usb4_switch_nvm_set_offset() - Set NVM write offset
553 * @address: Start offset
555 * Explicitly sets NVM write offset. Normally when writing to NVM this
556 * is done automatically by usb4_switch_nvm_write().
558 * Returns %0 in success and negative errno if there was a failure.
560 int usb4_switch_nvm_set_offset(struct tb_switch *sw, unsigned int address)
562 u32 metadata, dwaddress;
566 dwaddress = address / 4;
567 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
568 USB4_NVM_SET_OFFSET_MASK;
570 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SET_OFFSET, &metadata,
575 return status ? -EIO : 0;
578 static int usb4_switch_nvm_write_next_block(void *data, unsigned int dwaddress,
579 const void *buf, size_t dwords)
581 struct tb_switch *sw = data;
585 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_NVM_WRITE, NULL, &status,
586 buf, dwords, NULL, 0);
590 return status ? -EIO : 0;
594 * usb4_switch_nvm_write() - Write to the router NVM
596 * @address: Start address where to write in bytes
597 * @buf: Pointer to the data to write
598 * @size: Size of @buf in bytes
600 * Writes @buf to the router NVM using USB4 router operations. If NVM
601 * write is not supported returns %-EOPNOTSUPP.
603 int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
604 const void *buf, size_t size)
608 ret = usb4_switch_nvm_set_offset(sw, address);
612 return tb_nvm_write_data(address, buf, size, USB4_DATA_RETRIES,
613 usb4_switch_nvm_write_next_block, sw);
617 * usb4_switch_nvm_authenticate() - Authenticate new NVM
620 * After the new NVM has been written via usb4_switch_nvm_write(), this
621 * function triggers NVM authentication process. The router gets power
622 * cycled and if the authentication is successful the new NVM starts
623 * running. In case of failure returns negative errno.
625 * The caller should call usb4_switch_nvm_authenticate_status() to read
626 * the status of the authentication after power cycle. It should be the
627 * first router operation to avoid the status being lost.
629 int usb4_switch_nvm_authenticate(struct tb_switch *sw)
633 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_AUTH, NULL, NULL);
636 * The router is power cycled once NVM_AUTH is started so it is
637 * expected to get any of the following errors back.
650 * usb4_switch_nvm_authenticate_status() - Read status of last NVM authenticate
652 * @status: Status code of the operation
654 * The function checks if there is status available from the last NVM
655 * authenticate router operation. If there is status then %0 is returned
656 * and the status code is placed in @status. Returns negative errno in case
659 * Must be called before any other router operation.
661 int usb4_switch_nvm_authenticate_status(struct tb_switch *sw, u32 *status)
663 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
668 if (cm_ops->usb4_switch_nvm_authenticate_status) {
669 ret = cm_ops->usb4_switch_nvm_authenticate_status(sw, status);
670 if (ret != -EOPNOTSUPP)
674 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
678 /* Check that the opcode is correct */
679 opcode = val & ROUTER_CS_26_OPCODE_MASK;
680 if (opcode == USB4_SWITCH_OP_NVM_AUTH) {
681 if (val & ROUTER_CS_26_OV)
683 if (val & ROUTER_CS_26_ONS)
686 *status = (val & ROUTER_CS_26_STATUS_MASK) >>
687 ROUTER_CS_26_STATUS_SHIFT;
696 * usb4_switch_credits_init() - Read buffer allocation parameters
699 * Reads @sw buffer allocation parameters and initializes @sw buffer
700 * allocation fields accordingly. Specifically @sw->credits_allocation
701 * is set to %true if these parameters can be used in tunneling.
703 * Returns %0 on success and negative errno otherwise.
705 int usb4_switch_credits_init(struct tb_switch *sw)
707 int max_usb3, min_dp_aux, min_dp_main, max_pcie, max_dma;
708 int ret, length, i, nports;
709 const struct tb_port *port;
710 u32 data[NVM_DATA_DWORDS];
714 memset(data, 0, sizeof(data));
715 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_BUFFER_ALLOC, &metadata,
716 &status, NULL, 0, data, ARRAY_SIZE(data));
722 length = metadata & USB4_BA_LENGTH_MASK;
723 if (WARN_ON(length > ARRAY_SIZE(data)))
732 tb_sw_dbg(sw, "credit allocation parameters:\n");
734 for (i = 0; i < length; i++) {
737 index = data[i] & USB4_BA_INDEX_MASK;
738 value = (data[i] & USB4_BA_VALUE_MASK) >> USB4_BA_VALUE_SHIFT;
741 case USB4_BA_MAX_USB3:
742 tb_sw_dbg(sw, " USB3: %u\n", value);
745 case USB4_BA_MIN_DP_AUX:
746 tb_sw_dbg(sw, " DP AUX: %u\n", value);
749 case USB4_BA_MIN_DP_MAIN:
750 tb_sw_dbg(sw, " DP main: %u\n", value);
753 case USB4_BA_MAX_PCIE:
754 tb_sw_dbg(sw, " PCIe: %u\n", value);
758 tb_sw_dbg(sw, " DMA: %u\n", value);
762 tb_sw_dbg(sw, " unknown credit allocation index %#x, skipping\n",
769 * Validate the buffer allocation preferences. If we find
770 * issues, log a warning and fall back using the hard-coded
774 /* Host router must report baMaxHI */
775 if (!tb_route(sw) && max_dma < 0) {
776 tb_sw_warn(sw, "host router is missing baMaxHI\n");
781 tb_switch_for_each_port(sw, port) {
782 if (tb_port_is_null(port))
786 /* Must have DP buffer allocation (multiple USB4 ports) */
787 if (nports > 2 && (min_dp_aux < 0 || min_dp_main < 0)) {
788 tb_sw_warn(sw, "multiple USB4 ports require baMinDPaux/baMinDPmain\n");
792 tb_switch_for_each_port(sw, port) {
793 if (tb_port_is_dpout(port) && min_dp_main < 0) {
794 tb_sw_warn(sw, "missing baMinDPmain");
797 if ((tb_port_is_dpin(port) || tb_port_is_dpout(port)) &&
799 tb_sw_warn(sw, "missing baMinDPaux");
802 if ((tb_port_is_usb3_down(port) || tb_port_is_usb3_up(port)) &&
804 tb_sw_warn(sw, "missing baMaxUSB3");
807 if ((tb_port_is_pcie_down(port) || tb_port_is_pcie_up(port)) &&
809 tb_sw_warn(sw, "missing baMaxPCIe");
815 * Buffer allocation passed the validation so we can use it in
818 sw->credit_allocation = true;
820 sw->max_usb3_credits = max_usb3;
822 sw->min_dp_aux_credits = min_dp_aux;
824 sw->min_dp_main_credits = min_dp_main;
826 sw->max_pcie_credits = max_pcie;
828 sw->max_dma_credits = max_dma;
837 * usb4_switch_query_dp_resource() - Query availability of DP IN resource
841 * For DP tunneling this function can be used to query availability of
842 * DP IN resource. Returns true if the resource is available for DP
843 * tunneling, false otherwise.
845 bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in)
847 u32 metadata = in->port;
851 ret = usb4_switch_op(sw, USB4_SWITCH_OP_QUERY_DP_RESOURCE, &metadata,
854 * If DP resource allocation is not supported assume it is
857 if (ret == -EOPNOTSUPP)
866 * usb4_switch_alloc_dp_resource() - Allocate DP IN resource
870 * Allocates DP IN resource for DP tunneling using USB4 router
871 * operations. If the resource was allocated returns %0. Otherwise
872 * returns negative errno, in particular %-EBUSY if the resource is
875 int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
877 u32 metadata = in->port;
881 ret = usb4_switch_op(sw, USB4_SWITCH_OP_ALLOC_DP_RESOURCE, &metadata,
883 if (ret == -EOPNOTSUPP)
888 return status ? -EBUSY : 0;
892 * usb4_switch_dealloc_dp_resource() - Releases allocated DP IN resource
896 * Releases the previously allocated DP IN resource.
898 int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
900 u32 metadata = in->port;
904 ret = usb4_switch_op(sw, USB4_SWITCH_OP_DEALLOC_DP_RESOURCE, &metadata,
906 if (ret == -EOPNOTSUPP)
911 return status ? -EIO : 0;
914 static int usb4_port_idx(const struct tb_switch *sw, const struct tb_port *port)
919 /* Assume port is primary */
920 tb_switch_for_each_port(sw, p) {
921 if (!tb_port_is_null(p))
923 if (tb_is_upstream_port(p))
936 * usb4_switch_map_pcie_down() - Map USB4 port to a PCIe downstream adapter
940 * USB4 routers have direct mapping between USB4 ports and PCIe
941 * downstream adapters where the PCIe topology is extended. This
942 * function returns the corresponding downstream PCIe adapter or %NULL
943 * if no such mapping was possible.
945 struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
946 const struct tb_port *port)
948 int usb4_idx = usb4_port_idx(sw, port);
952 /* Find PCIe down port matching usb4_port */
953 tb_switch_for_each_port(sw, p) {
954 if (!tb_port_is_pcie_down(p))
957 if (pcie_idx == usb4_idx)
967 * usb4_switch_map_usb3_down() - Map USB4 port to a USB3 downstream adapter
971 * USB4 routers have direct mapping between USB4 ports and USB 3.x
972 * downstream adapters where the USB 3.x topology is extended. This
973 * function returns the corresponding downstream USB 3.x adapter or
974 * %NULL if no such mapping was possible.
976 struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
977 const struct tb_port *port)
979 int usb4_idx = usb4_port_idx(sw, port);
983 /* Find USB3 down port matching usb4_port */
984 tb_switch_for_each_port(sw, p) {
985 if (!tb_port_is_usb3_down(p))
988 if (usb_idx == usb4_idx)
998 * usb4_switch_add_ports() - Add USB4 ports for this router
1001 * For USB4 router finds all USB4 ports and registers devices for each.
1002 * Can be called to any router.
1004 * Return %0 in case of success and negative errno in case of failure.
1006 int usb4_switch_add_ports(struct tb_switch *sw)
1008 struct tb_port *port;
1010 if (tb_switch_is_icm(sw) || !tb_switch_is_usb4(sw))
1013 tb_switch_for_each_port(sw, port) {
1014 struct usb4_port *usb4;
1016 if (!tb_port_is_null(port))
1018 if (!port->cap_usb4)
1021 usb4 = usb4_port_device_add(port);
1023 usb4_switch_remove_ports(sw);
1024 return PTR_ERR(usb4);
1034 * usb4_switch_remove_ports() - Removes USB4 ports from this router
1037 * Unregisters previously registered USB4 ports.
1039 void usb4_switch_remove_ports(struct tb_switch *sw)
1041 struct tb_port *port;
1043 tb_switch_for_each_port(sw, port) {
1045 usb4_port_device_remove(port->usb4);
1052 * usb4_port_unlock() - Unlock USB4 downstream port
1053 * @port: USB4 port to unlock
1055 * Unlocks USB4 downstream port so that the connection manager can
1056 * access the router below this port.
1058 int usb4_port_unlock(struct tb_port *port)
1063 ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
1067 val &= ~ADP_CS_4_LCK;
1068 return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
1072 * usb4_port_hotplug_enable() - Enables hotplug for a port
1073 * @port: USB4 port to operate on
1075 * Enables hot plug events on a given port. This is only intended
1076 * to be used on lane, DP-IN, and DP-OUT adapters.
1078 int usb4_port_hotplug_enable(struct tb_port *port)
1083 ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_5, 1);
1087 val &= ~ADP_CS_5_DHP;
1088 return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_5, 1);
1091 static int usb4_port_set_configured(struct tb_port *port, bool configured)
1096 if (!port->cap_usb4)
1099 ret = tb_port_read(port, &val, TB_CFG_PORT,
1100 port->cap_usb4 + PORT_CS_19, 1);
1105 val |= PORT_CS_19_PC;
1107 val &= ~PORT_CS_19_PC;
1109 return tb_port_write(port, &val, TB_CFG_PORT,
1110 port->cap_usb4 + PORT_CS_19, 1);
1114 * usb4_port_configure() - Set USB4 port configured
1115 * @port: USB4 router
1117 * Sets the USB4 link to be configured for power management purposes.
1119 int usb4_port_configure(struct tb_port *port)
1121 return usb4_port_set_configured(port, true);
1125 * usb4_port_unconfigure() - Set USB4 port unconfigured
1126 * @port: USB4 router
1128 * Sets the USB4 link to be unconfigured for power management purposes.
1130 void usb4_port_unconfigure(struct tb_port *port)
1132 usb4_port_set_configured(port, false);
1135 static int usb4_set_xdomain_configured(struct tb_port *port, bool configured)
1140 if (!port->cap_usb4)
1143 ret = tb_port_read(port, &val, TB_CFG_PORT,
1144 port->cap_usb4 + PORT_CS_19, 1);
1149 val |= PORT_CS_19_PID;
1151 val &= ~PORT_CS_19_PID;
1153 return tb_port_write(port, &val, TB_CFG_PORT,
1154 port->cap_usb4 + PORT_CS_19, 1);
1158 * usb4_port_configure_xdomain() - Configure port for XDomain
1159 * @port: USB4 port connected to another host
1161 * Marks the USB4 port as being connected to another host. Returns %0 in
1162 * success and negative errno in failure.
1164 int usb4_port_configure_xdomain(struct tb_port *port)
1166 return usb4_set_xdomain_configured(port, true);
1170 * usb4_port_unconfigure_xdomain() - Unconfigure port for XDomain
1171 * @port: USB4 port that was connected to another host
1173 * Clears USB4 port from being marked as XDomain.
1175 void usb4_port_unconfigure_xdomain(struct tb_port *port)
1177 usb4_set_xdomain_configured(port, false);
1180 static int usb4_port_wait_for_bit(struct tb_port *port, u32 offset, u32 bit,
1181 u32 value, int timeout_msec)
1183 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
1189 ret = tb_port_read(port, &val, TB_CFG_PORT, offset, 1);
1193 if ((val & bit) == value)
1196 usleep_range(50, 100);
1197 } while (ktime_before(ktime_get(), timeout));
1202 static int usb4_port_read_data(struct tb_port *port, void *data, size_t dwords)
1204 if (dwords > NVM_DATA_DWORDS)
1207 return tb_port_read(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
1211 static int usb4_port_write_data(struct tb_port *port, const void *data,
1214 if (dwords > NVM_DATA_DWORDS)
1217 return tb_port_write(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
1221 static int usb4_port_sb_read(struct tb_port *port, enum usb4_sb_target target,
1222 u8 index, u8 reg, void *buf, u8 size)
1224 size_t dwords = DIV_ROUND_UP(size, 4);
1228 if (!port->cap_usb4)
1232 val |= size << PORT_CS_1_LENGTH_SHIFT;
1233 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1234 if (target == USB4_SB_TARGET_RETIMER)
1235 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1236 val |= PORT_CS_1_PND;
1238 ret = tb_port_write(port, &val, TB_CFG_PORT,
1239 port->cap_usb4 + PORT_CS_1, 1);
1243 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1244 PORT_CS_1_PND, 0, 500);
1248 ret = tb_port_read(port, &val, TB_CFG_PORT,
1249 port->cap_usb4 + PORT_CS_1, 1);
1253 if (val & PORT_CS_1_NR)
1255 if (val & PORT_CS_1_RC)
1258 return buf ? usb4_port_read_data(port, buf, dwords) : 0;
1261 static int usb4_port_sb_write(struct tb_port *port, enum usb4_sb_target target,
1262 u8 index, u8 reg, const void *buf, u8 size)
1264 size_t dwords = DIV_ROUND_UP(size, 4);
1268 if (!port->cap_usb4)
1272 ret = usb4_port_write_data(port, buf, dwords);
1278 val |= size << PORT_CS_1_LENGTH_SHIFT;
1279 val |= PORT_CS_1_WNR_WRITE;
1280 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1281 if (target == USB4_SB_TARGET_RETIMER)
1282 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1283 val |= PORT_CS_1_PND;
1285 ret = tb_port_write(port, &val, TB_CFG_PORT,
1286 port->cap_usb4 + PORT_CS_1, 1);
1290 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1291 PORT_CS_1_PND, 0, 500);
1295 ret = tb_port_read(port, &val, TB_CFG_PORT,
1296 port->cap_usb4 + PORT_CS_1, 1);
1300 if (val & PORT_CS_1_NR)
1302 if (val & PORT_CS_1_RC)
1308 static int usb4_port_sb_op(struct tb_port *port, enum usb4_sb_target target,
1309 u8 index, enum usb4_sb_opcode opcode, int timeout_msec)
1316 ret = usb4_port_sb_write(port, target, index, USB4_SB_OPCODE, &val,
1321 timeout = ktime_add_ms(ktime_get(), timeout_msec);
1325 ret = usb4_port_sb_read(port, target, index, USB4_SB_OPCODE,
1334 case USB4_SB_OPCODE_ERR:
1337 case USB4_SB_OPCODE_ONS:
1345 } while (ktime_before(ktime_get(), timeout));
1350 static int usb4_port_set_router_offline(struct tb_port *port, bool offline)
1355 ret = usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1356 USB4_SB_METADATA, &val, sizeof(val));
1360 val = USB4_SB_OPCODE_ROUTER_OFFLINE;
1361 return usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1362 USB4_SB_OPCODE, &val, sizeof(val));
1366 * usb4_port_router_offline() - Put the USB4 port to offline mode
1369 * This function puts the USB4 port into offline mode. In this mode the
1370 * port does not react on hotplug events anymore. This needs to be
1371 * called before retimer access is done when the USB4 links is not up.
1373 * Returns %0 in case of success and negative errno if there was an
1376 int usb4_port_router_offline(struct tb_port *port)
1378 return usb4_port_set_router_offline(port, true);
1382 * usb4_port_router_online() - Put the USB4 port back to online
1385 * Makes the USB4 port functional again.
1387 int usb4_port_router_online(struct tb_port *port)
1389 return usb4_port_set_router_offline(port, false);
1393 * usb4_port_enumerate_retimers() - Send RT broadcast transaction
1396 * This forces the USB4 port to send broadcast RT transaction which
1397 * makes the retimers on the link to assign index to themselves. Returns
1398 * %0 in case of success and negative errno if there was an error.
1400 int usb4_port_enumerate_retimers(struct tb_port *port)
1404 val = USB4_SB_OPCODE_ENUMERATE_RETIMERS;
1405 return usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1406 USB4_SB_OPCODE, &val, sizeof(val));
1409 static inline int usb4_port_retimer_op(struct tb_port *port, u8 index,
1410 enum usb4_sb_opcode opcode,
1413 return usb4_port_sb_op(port, USB4_SB_TARGET_RETIMER, index, opcode,
1418 * usb4_port_retimer_set_inbound_sbtx() - Enable sideband channel transactions
1420 * @index: Retimer index
1422 * Enables sideband channel transations on SBTX. Can be used when USB4
1423 * link does not go up, for example if there is no device connected.
1425 int usb4_port_retimer_set_inbound_sbtx(struct tb_port *port, u8 index)
1429 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_SET_INBOUND_SBTX,
1436 * Per the USB4 retimer spec, the retimer is not required to
1437 * send an RT (Retimer Transaction) response for the first
1438 * SET_INBOUND_SBTX command
1440 return usb4_port_retimer_op(port, index, USB4_SB_OPCODE_SET_INBOUND_SBTX,
1445 * usb4_port_retimer_read() - Read from retimer sideband registers
1447 * @index: Retimer index
1448 * @reg: Sideband register to read
1449 * @buf: Data from @reg is stored here
1450 * @size: Number of bytes to read
1452 * Function reads retimer sideband registers starting from @reg. The
1453 * retimer is connected to @port at @index. Returns %0 in case of
1454 * success, and read data is copied to @buf. If there is no retimer
1455 * present at given @index returns %-ENODEV. In any other failure
1456 * returns negative errno.
1458 int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
1461 return usb4_port_sb_read(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1466 * usb4_port_retimer_write() - Write to retimer sideband registers
1468 * @index: Retimer index
1469 * @reg: Sideband register to write
1470 * @buf: Data that is written starting from @reg
1471 * @size: Number of bytes to write
1473 * Writes retimer sideband registers starting from @reg. The retimer is
1474 * connected to @port at @index. Returns %0 in case of success. If there
1475 * is no retimer present at given @index returns %-ENODEV. In any other
1476 * failure returns negative errno.
1478 int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
1479 const void *buf, u8 size)
1481 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1486 * usb4_port_retimer_is_last() - Is the retimer last on-board retimer
1488 * @index: Retimer index
1490 * If the retimer at @index is last one (connected directly to the
1491 * Type-C port) this function returns %1. If it is not returns %0. If
1492 * the retimer is not present returns %-ENODEV. Otherwise returns
1495 int usb4_port_retimer_is_last(struct tb_port *port, u8 index)
1500 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_QUERY_LAST_RETIMER,
1505 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1507 return ret ? ret : metadata & 1;
1511 * usb4_port_retimer_nvm_sector_size() - Read retimer NVM sector size
1513 * @index: Retimer index
1515 * Reads NVM sector size (in bytes) of a retimer at @index. This
1516 * operation can be used to determine whether the retimer supports NVM
1517 * upgrade for example. Returns sector size in bytes or negative errno
1518 * in case of error. Specifically returns %-ENODEV if there is no
1519 * retimer at @index.
1521 int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index)
1526 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_GET_NVM_SECTOR_SIZE,
1531 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1533 return ret ? ret : metadata & USB4_NVM_SECTOR_SIZE_MASK;
1537 * usb4_port_retimer_nvm_set_offset() - Set NVM write offset
1539 * @index: Retimer index
1540 * @address: Start offset
1542 * Exlicitly sets NVM write offset. Normally when writing to NVM this is
1543 * done automatically by usb4_port_retimer_nvm_write().
1545 * Returns %0 in success and negative errno if there was a failure.
1547 int usb4_port_retimer_nvm_set_offset(struct tb_port *port, u8 index,
1548 unsigned int address)
1550 u32 metadata, dwaddress;
1553 dwaddress = address / 4;
1554 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
1555 USB4_NVM_SET_OFFSET_MASK;
1557 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1562 return usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_SET_OFFSET,
1566 struct retimer_info {
1567 struct tb_port *port;
1571 static int usb4_port_retimer_nvm_write_next_block(void *data,
1572 unsigned int dwaddress, const void *buf, size_t dwords)
1575 const struct retimer_info *info = data;
1576 struct tb_port *port = info->port;
1577 u8 index = info->index;
1580 ret = usb4_port_retimer_write(port, index, USB4_SB_DATA,
1585 return usb4_port_retimer_op(port, index,
1586 USB4_SB_OPCODE_NVM_BLOCK_WRITE, 1000);
1590 * usb4_port_retimer_nvm_write() - Write to retimer NVM
1592 * @index: Retimer index
1593 * @address: Byte address where to start the write
1594 * @buf: Data to write
1595 * @size: Size in bytes how much to write
1597 * Writes @size bytes from @buf to the retimer NVM. Used for NVM
1598 * upgrade. Returns %0 if the data was written successfully and negative
1599 * errno in case of failure. Specifically returns %-ENODEV if there is
1600 * no retimer at @index.
1602 int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index, unsigned int address,
1603 const void *buf, size_t size)
1605 struct retimer_info info = { .port = port, .index = index };
1608 ret = usb4_port_retimer_nvm_set_offset(port, index, address);
1612 return tb_nvm_write_data(address, buf, size, USB4_DATA_RETRIES,
1613 usb4_port_retimer_nvm_write_next_block, &info);
1617 * usb4_port_retimer_nvm_authenticate() - Start retimer NVM upgrade
1619 * @index: Retimer index
1621 * After the new NVM image has been written via usb4_port_retimer_nvm_write()
1622 * this function can be used to trigger the NVM upgrade process. If
1623 * successful the retimer restarts with the new NVM and may not have the
1624 * index set so one needs to call usb4_port_enumerate_retimers() to
1625 * force index to be assigned.
1627 int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index)
1632 * We need to use the raw operation here because once the
1633 * authentication completes the retimer index is not set anymore
1634 * so we do not get back the status now.
1636 val = USB4_SB_OPCODE_NVM_AUTH_WRITE;
1637 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index,
1638 USB4_SB_OPCODE, &val, sizeof(val));
1642 * usb4_port_retimer_nvm_authenticate_status() - Read status of NVM upgrade
1644 * @index: Retimer index
1645 * @status: Raw status code read from metadata
1647 * This can be called after usb4_port_retimer_nvm_authenticate() and
1648 * usb4_port_enumerate_retimers() to fetch status of the NVM upgrade.
1650 * Returns %0 if the authentication status was successfully read. The
1651 * completion metadata (the result) is then stored into @status. If
1652 * reading the status fails, returns negative errno.
1654 int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
1660 ret = usb4_port_retimer_read(port, index, USB4_SB_OPCODE, &val,
1670 case USB4_SB_OPCODE_ERR:
1671 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA,
1672 &metadata, sizeof(metadata));
1676 *status = metadata & USB4_SB_METADATA_NVM_AUTH_WRITE_MASK;
1679 case USB4_SB_OPCODE_ONS:
1687 static int usb4_port_retimer_nvm_read_block(void *data, unsigned int dwaddress,
1688 void *buf, size_t dwords)
1690 const struct retimer_info *info = data;
1691 struct tb_port *port = info->port;
1692 u8 index = info->index;
1696 metadata = dwaddress << USB4_NVM_READ_OFFSET_SHIFT;
1697 if (dwords < NVM_DATA_DWORDS)
1698 metadata |= dwords << USB4_NVM_READ_LENGTH_SHIFT;
1700 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1705 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_READ, 500);
1709 return usb4_port_retimer_read(port, index, USB4_SB_DATA, buf,
1714 * usb4_port_retimer_nvm_read() - Read contents of retimer NVM
1716 * @index: Retimer index
1717 * @address: NVM address (in bytes) to start reading
1718 * @buf: Data read from NVM is stored here
1719 * @size: Number of bytes to read
1721 * Reads retimer NVM and copies the contents to @buf. Returns %0 if the
1722 * read was successful and negative errno in case of failure.
1723 * Specifically returns %-ENODEV if there is no retimer at @index.
1725 int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
1726 unsigned int address, void *buf, size_t size)
1728 struct retimer_info info = { .port = port, .index = index };
1730 return tb_nvm_read_data(address, buf, size, USB4_DATA_RETRIES,
1731 usb4_port_retimer_nvm_read_block, &info);
1735 * usb4_usb3_port_max_link_rate() - Maximum support USB3 link rate
1736 * @port: USB3 adapter port
1738 * Return maximum supported link rate of a USB3 adapter in Mb/s.
1739 * Negative errno in case of error.
1741 int usb4_usb3_port_max_link_rate(struct tb_port *port)
1746 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
1749 ret = tb_port_read(port, &val, TB_CFG_PORT,
1750 port->cap_adap + ADP_USB3_CS_4, 1);
1754 lr = (val & ADP_USB3_CS_4_MSLR_MASK) >> ADP_USB3_CS_4_MSLR_SHIFT;
1755 return lr == ADP_USB3_CS_4_MSLR_20G ? 20000 : 10000;
1759 * usb4_usb3_port_actual_link_rate() - Established USB3 link rate
1760 * @port: USB3 adapter port
1762 * Return actual established link rate of a USB3 adapter in Mb/s. If the
1763 * link is not up returns %0 and negative errno in case of failure.
1765 int usb4_usb3_port_actual_link_rate(struct tb_port *port)
1770 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
1773 ret = tb_port_read(port, &val, TB_CFG_PORT,
1774 port->cap_adap + ADP_USB3_CS_4, 1);
1778 if (!(val & ADP_USB3_CS_4_ULV))
1781 lr = val & ADP_USB3_CS_4_ALR_MASK;
1782 return lr == ADP_USB3_CS_4_ALR_20G ? 20000 : 10000;
1785 static int usb4_usb3_port_cm_request(struct tb_port *port, bool request)
1790 if (!tb_port_is_usb3_down(port))
1792 if (tb_route(port->sw))
1795 ret = tb_port_read(port, &val, TB_CFG_PORT,
1796 port->cap_adap + ADP_USB3_CS_2, 1);
1801 val |= ADP_USB3_CS_2_CMR;
1803 val &= ~ADP_USB3_CS_2_CMR;
1805 ret = tb_port_write(port, &val, TB_CFG_PORT,
1806 port->cap_adap + ADP_USB3_CS_2, 1);
1811 * We can use val here directly as the CMR bit is in the same place
1812 * as HCA. Just mask out others.
1814 val &= ADP_USB3_CS_2_CMR;
1815 return usb4_port_wait_for_bit(port, port->cap_adap + ADP_USB3_CS_1,
1816 ADP_USB3_CS_1_HCA, val, 1500);
1819 static inline int usb4_usb3_port_set_cm_request(struct tb_port *port)
1821 return usb4_usb3_port_cm_request(port, true);
1824 static inline int usb4_usb3_port_clear_cm_request(struct tb_port *port)
1826 return usb4_usb3_port_cm_request(port, false);
1829 static unsigned int usb3_bw_to_mbps(u32 bw, u8 scale)
1831 unsigned long uframes;
1833 uframes = bw * 512UL << scale;
1834 return DIV_ROUND_CLOSEST(uframes * 8000, 1000 * 1000);
1837 static u32 mbps_to_usb3_bw(unsigned int mbps, u8 scale)
1839 unsigned long uframes;
1841 /* 1 uframe is 1/8 ms (125 us) -> 1 / 8000 s */
1842 uframes = ((unsigned long)mbps * 1000 * 1000) / 8000;
1843 return DIV_ROUND_UP(uframes, 512UL << scale);
1846 static int usb4_usb3_port_read_allocated_bandwidth(struct tb_port *port,
1853 ret = tb_port_read(port, &val, TB_CFG_PORT,
1854 port->cap_adap + ADP_USB3_CS_2, 1);
1858 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1859 port->cap_adap + ADP_USB3_CS_3, 1);
1863 scale &= ADP_USB3_CS_3_SCALE_MASK;
1865 bw = val & ADP_USB3_CS_2_AUBW_MASK;
1866 *upstream_bw = usb3_bw_to_mbps(bw, scale);
1868 bw = (val & ADP_USB3_CS_2_ADBW_MASK) >> ADP_USB3_CS_2_ADBW_SHIFT;
1869 *downstream_bw = usb3_bw_to_mbps(bw, scale);
1875 * usb4_usb3_port_allocated_bandwidth() - Bandwidth allocated for USB3
1876 * @port: USB3 adapter port
1877 * @upstream_bw: Allocated upstream bandwidth is stored here
1878 * @downstream_bw: Allocated downstream bandwidth is stored here
1880 * Stores currently allocated USB3 bandwidth into @upstream_bw and
1881 * @downstream_bw in Mb/s. Returns %0 in case of success and negative
1884 int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
1889 ret = usb4_usb3_port_set_cm_request(port);
1893 ret = usb4_usb3_port_read_allocated_bandwidth(port, upstream_bw,
1895 usb4_usb3_port_clear_cm_request(port);
1900 static int usb4_usb3_port_read_consumed_bandwidth(struct tb_port *port,
1907 ret = tb_port_read(port, &val, TB_CFG_PORT,
1908 port->cap_adap + ADP_USB3_CS_1, 1);
1912 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1913 port->cap_adap + ADP_USB3_CS_3, 1);
1917 scale &= ADP_USB3_CS_3_SCALE_MASK;
1919 bw = val & ADP_USB3_CS_1_CUBW_MASK;
1920 *upstream_bw = usb3_bw_to_mbps(bw, scale);
1922 bw = (val & ADP_USB3_CS_1_CDBW_MASK) >> ADP_USB3_CS_1_CDBW_SHIFT;
1923 *downstream_bw = usb3_bw_to_mbps(bw, scale);
1928 static int usb4_usb3_port_write_allocated_bandwidth(struct tb_port *port,
1932 u32 val, ubw, dbw, scale;
1935 /* Read the used scale, hardware default is 0 */
1936 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1937 port->cap_adap + ADP_USB3_CS_3, 1);
1941 scale &= ADP_USB3_CS_3_SCALE_MASK;
1942 ubw = mbps_to_usb3_bw(upstream_bw, scale);
1943 dbw = mbps_to_usb3_bw(downstream_bw, scale);
1945 ret = tb_port_read(port, &val, TB_CFG_PORT,
1946 port->cap_adap + ADP_USB3_CS_2, 1);
1950 val &= ~(ADP_USB3_CS_2_AUBW_MASK | ADP_USB3_CS_2_ADBW_MASK);
1951 val |= dbw << ADP_USB3_CS_2_ADBW_SHIFT;
1954 return tb_port_write(port, &val, TB_CFG_PORT,
1955 port->cap_adap + ADP_USB3_CS_2, 1);
1959 * usb4_usb3_port_allocate_bandwidth() - Allocate bandwidth for USB3
1960 * @port: USB3 adapter port
1961 * @upstream_bw: New upstream bandwidth
1962 * @downstream_bw: New downstream bandwidth
1964 * This can be used to set how much bandwidth is allocated for the USB3
1965 * tunneled isochronous traffic. @upstream_bw and @downstream_bw are the
1966 * new values programmed to the USB3 adapter allocation registers. If
1967 * the values are lower than what is currently consumed the allocation
1968 * is set to what is currently consumed instead (consumed bandwidth
1969 * cannot be taken away by CM). The actual new values are returned in
1970 * @upstream_bw and @downstream_bw.
1972 * Returns %0 in case of success and negative errno if there was a
1975 int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
1978 int ret, consumed_up, consumed_down, allocate_up, allocate_down;
1980 ret = usb4_usb3_port_set_cm_request(port);
1984 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
1989 /* Don't allow it go lower than what is consumed */
1990 allocate_up = max(*upstream_bw, consumed_up);
1991 allocate_down = max(*downstream_bw, consumed_down);
1993 ret = usb4_usb3_port_write_allocated_bandwidth(port, allocate_up,
1998 *upstream_bw = allocate_up;
1999 *downstream_bw = allocate_down;
2002 usb4_usb3_port_clear_cm_request(port);
2007 * usb4_usb3_port_release_bandwidth() - Release allocated USB3 bandwidth
2008 * @port: USB3 adapter port
2009 * @upstream_bw: New allocated upstream bandwidth
2010 * @downstream_bw: New allocated downstream bandwidth
2012 * Releases USB3 allocated bandwidth down to what is actually consumed.
2013 * The new bandwidth is returned in @upstream_bw and @downstream_bw.
2015 * Returns 0% in success and negative errno in case of failure.
2017 int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
2020 int ret, consumed_up, consumed_down;
2022 ret = usb4_usb3_port_set_cm_request(port);
2026 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
2032 * Always keep 1000 Mb/s to make sure xHCI has at least some
2033 * bandwidth available for isochronous traffic.
2035 if (consumed_up < 1000)
2037 if (consumed_down < 1000)
2038 consumed_down = 1000;
2040 ret = usb4_usb3_port_write_allocated_bandwidth(port, consumed_up,
2045 *upstream_bw = consumed_up;
2046 *downstream_bw = consumed_down;
2049 usb4_usb3_port_clear_cm_request(port);