1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Thunderbolt control channel messages
5 * Copyright (C) 2014 Andreas Noever <andreas.noever@gmail.com>
6 * Copyright (C) 2017, Intel Corporation
12 #include <linux/types.h>
13 #include <linux/uuid.h>
23 TB_CFG_ERROR_PORT_NOT_CONNECTED = 0,
24 TB_CFG_ERROR_LINK_ERROR = 1,
25 TB_CFG_ERROR_INVALID_CONFIG_SPACE = 2,
26 TB_CFG_ERROR_NO_SUCH_PORT = 4,
27 TB_CFG_ERROR_ACK_PLUG_EVENT = 7, /* send as reply to TB_CFG_PKG_EVENT */
28 TB_CFG_ERROR_LOOP = 8,
29 TB_CFG_ERROR_HEC_ERROR_DETECTED = 12,
30 TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13,
31 TB_CFG_ERROR_LOCK = 15,
32 TB_CFG_ERROR_DP_BW = 32,
36 struct tb_cfg_header {
38 u32 unknown:10; /* highest order bit is set on replies */
42 /* additional header for read/write packets */
43 struct tb_cfg_address {
44 u32 offset:13; /* in dwords */
45 u32 length:6; /* in dwords */
47 enum tb_cfg_space space:2;
48 u32 seq:2; /* sequence number */
52 /* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */
54 struct tb_cfg_header header;
55 struct tb_cfg_address addr;
58 /* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */
59 struct cfg_write_pkg {
60 struct tb_cfg_header header;
61 struct tb_cfg_address addr;
62 u32 data[64]; /* maximum size, tb_cfg_address.length has 6 bits */
65 /* TB_CFG_PKG_ERROR */
66 struct cfg_error_pkg {
67 struct tb_cfg_header header;
68 enum tb_cfg_error error:8;
75 struct tb_cfg_header header;
78 #define TB_CFG_ERROR_PG_HOT_PLUG 0x2
79 #define TB_CFG_ERROR_PG_HOT_UNPLUG 0x3
81 /* TB_CFG_PKG_EVENT */
82 struct cfg_event_pkg {
83 struct tb_cfg_header header;
89 /* TB_CFG_PKG_RESET */
90 struct cfg_reset_pkg {
91 struct tb_cfg_header header;
94 /* TB_CFG_PKG_PREPARE_TO_SLEEP */
96 struct tb_cfg_header header;
103 ICM_GET_TOPOLOGY = 0x1,
104 ICM_DRIVER_READY = 0x3,
105 ICM_APPROVE_DEVICE = 0x4,
106 ICM_CHALLENGE_DEVICE = 0x5,
107 ICM_ADD_DEVICE_KEY = 0x6,
109 ICM_APPROVE_XDOMAIN = 0x10,
110 ICM_DISCONNECT_XDOMAIN = 0x11,
111 ICM_PREBOOT_ACL = 0x18,
112 ICM_USB4_SWITCH_OP = 0x20,
115 enum icm_event_code {
116 ICM_EVENT_DEVICE_CONNECTED = 0x3,
117 ICM_EVENT_DEVICE_DISCONNECTED = 0x4,
118 ICM_EVENT_XDOMAIN_CONNECTED = 0x6,
119 ICM_EVENT_XDOMAIN_DISCONNECTED = 0x7,
120 ICM_EVENT_RTD3_VETO = 0xa,
123 struct icm_pkg_header {
130 #define ICM_FLAGS_ERROR BIT(0)
131 #define ICM_FLAGS_NO_KEY BIT(1)
132 #define ICM_FLAGS_SLEVEL_SHIFT 3
133 #define ICM_FLAGS_SLEVEL_MASK GENMASK(4, 3)
134 #define ICM_FLAGS_DUAL_LANE BIT(5)
135 #define ICM_FLAGS_SPEED_GEN3 BIT(7)
136 #define ICM_FLAGS_WRITE BIT(7)
138 struct icm_pkg_driver_ready {
139 struct icm_pkg_header hdr;
142 /* Falcon Ridge only messages */
144 struct icm_fr_pkg_driver_ready_response {
145 struct icm_pkg_header hdr;
151 #define ICM_FR_SLEVEL_MASK 0xf
153 /* Falcon Ridge & Alpine Ridge common messages */
155 struct icm_fr_pkg_get_topology {
156 struct icm_pkg_header hdr;
159 #define ICM_GET_TOPOLOGY_PACKETS 14
161 struct icm_fr_pkg_get_topology_response {
162 struct icm_pkg_header hdr;
167 u8 drom_i2c_address_index;
171 u32 port_hop_info[16];
174 #define ICM_SWITCH_USED BIT(0)
175 #define ICM_SWITCH_UPSTREAM_PORT_MASK GENMASK(7, 1)
176 #define ICM_SWITCH_UPSTREAM_PORT_SHIFT 1
178 #define ICM_PORT_TYPE_MASK GENMASK(23, 0)
179 #define ICM_PORT_INDEX_SHIFT 24
180 #define ICM_PORT_INDEX_MASK GENMASK(31, 24)
182 struct icm_fr_event_device_connected {
183 struct icm_pkg_header hdr;
191 #define ICM_LINK_INFO_LINK_MASK 0x7
192 #define ICM_LINK_INFO_DEPTH_SHIFT 4
193 #define ICM_LINK_INFO_DEPTH_MASK GENMASK(7, 4)
194 #define ICM_LINK_INFO_APPROVED BIT(8)
195 #define ICM_LINK_INFO_REJECTED BIT(9)
196 #define ICM_LINK_INFO_BOOT BIT(10)
198 struct icm_fr_pkg_approve_device {
199 struct icm_pkg_header hdr;
206 struct icm_fr_event_device_disconnected {
207 struct icm_pkg_header hdr;
212 struct icm_fr_event_xdomain_connected {
213 struct icm_pkg_header hdr;
224 struct icm_fr_event_xdomain_disconnected {
225 struct icm_pkg_header hdr;
231 struct icm_fr_pkg_add_device_key {
232 struct icm_pkg_header hdr;
240 struct icm_fr_pkg_add_device_key_response {
241 struct icm_pkg_header hdr;
248 struct icm_fr_pkg_challenge_device {
249 struct icm_pkg_header hdr;
257 struct icm_fr_pkg_challenge_device_response {
258 struct icm_pkg_header hdr;
267 struct icm_fr_pkg_approve_xdomain {
268 struct icm_pkg_header hdr;
278 struct icm_fr_pkg_approve_xdomain_response {
279 struct icm_pkg_header hdr;
289 /* Alpine Ridge only messages */
291 struct icm_ar_pkg_driver_ready_response {
292 struct icm_pkg_header hdr;
298 #define ICM_AR_FLAGS_RTD3 BIT(6)
300 #define ICM_AR_INFO_SLEVEL_MASK GENMASK(3, 0)
301 #define ICM_AR_INFO_BOOT_ACL_SHIFT 7
302 #define ICM_AR_INFO_BOOT_ACL_MASK GENMASK(11, 7)
303 #define ICM_AR_INFO_BOOT_ACL_SUPPORTED BIT(13)
305 struct icm_ar_pkg_get_route {
306 struct icm_pkg_header hdr;
311 struct icm_ar_pkg_get_route_response {
312 struct icm_pkg_header hdr;
319 struct icm_ar_boot_acl_entry {
324 #define ICM_AR_PREBOOT_ACL_ENTRIES 16
326 struct icm_ar_pkg_preboot_acl {
327 struct icm_pkg_header hdr;
328 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
331 struct icm_ar_pkg_preboot_acl_response {
332 struct icm_pkg_header hdr;
333 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
336 /* Titan Ridge messages */
338 struct icm_tr_pkg_driver_ready_response {
339 struct icm_pkg_header hdr;
347 #define ICM_TR_FLAGS_RTD3 BIT(6)
349 #define ICM_TR_INFO_SLEVEL_MASK GENMASK(2, 0)
350 #define ICM_TR_INFO_PROTO_VERSION_MASK GENMASK(6, 4)
351 #define ICM_TR_INFO_PROTO_VERSION_SHIFT 4
352 #define ICM_TR_INFO_BOOT_ACL_SHIFT 7
353 #define ICM_TR_INFO_BOOT_ACL_MASK GENMASK(12, 7)
355 struct icm_tr_event_device_connected {
356 struct icm_pkg_header hdr;
366 struct icm_tr_event_device_disconnected {
367 struct icm_pkg_header hdr;
372 struct icm_tr_event_xdomain_connected {
373 struct icm_pkg_header hdr;
384 struct icm_tr_event_xdomain_disconnected {
385 struct icm_pkg_header hdr;
391 struct icm_tr_pkg_approve_device {
392 struct icm_pkg_header hdr;
400 struct icm_tr_pkg_add_device_key {
401 struct icm_pkg_header hdr;
410 struct icm_tr_pkg_challenge_device {
411 struct icm_pkg_header hdr;
420 struct icm_tr_pkg_approve_xdomain {
421 struct icm_pkg_header hdr;
431 struct icm_tr_pkg_disconnect_xdomain {
432 struct icm_pkg_header hdr;
440 struct icm_tr_pkg_challenge_device_response {
441 struct icm_pkg_header hdr;
451 struct icm_tr_pkg_add_device_key_response {
452 struct icm_pkg_header hdr;
460 struct icm_tr_pkg_approve_xdomain_response {
461 struct icm_pkg_header hdr;
471 struct icm_tr_pkg_disconnect_xdomain_response {
472 struct icm_pkg_header hdr;
480 /* Ice Lake messages */
482 struct icm_icl_event_rtd3_veto {
483 struct icm_pkg_header hdr;
487 /* USB4 ICM messages */
489 struct icm_usb4_switch_op {
490 struct icm_pkg_header hdr;
499 #define ICM_USB4_SWITCH_DATA_LEN_MASK GENMASK(3, 0)
500 #define ICM_USB4_SWITCH_DATA_VALID BIT(4)
502 struct icm_usb4_switch_op_response {
503 struct icm_pkg_header hdr;
512 /* XDomain messages */
514 struct tb_xdomain_header {
520 #define TB_XDOMAIN_LENGTH_MASK GENMASK(5, 0)
521 #define TB_XDOMAIN_SN_MASK GENMASK(28, 27)
522 #define TB_XDOMAIN_SN_SHIFT 27
525 UUID_REQUEST_OLD = 1,
529 PROPERTIES_CHANGED_REQUEST,
530 PROPERTIES_CHANGED_RESPONSE,
533 LINK_STATE_STATUS_REQUEST = 15,
534 LINK_STATE_STATUS_RESPONSE,
535 LINK_STATE_CHANGE_REQUEST,
536 LINK_STATE_CHANGE_RESPONSE,
539 struct tb_xdp_header {
540 struct tb_xdomain_header xd_hdr;
545 struct tb_xdp_error_response {
546 struct tb_xdp_header hdr;
550 struct tb_xdp_link_state_status {
551 struct tb_xdp_header hdr;
554 struct tb_xdp_link_state_status_response {
556 struct tb_xdp_error_response err;
558 struct tb_xdp_header hdr;
568 struct tb_xdp_link_state_change {
569 struct tb_xdp_header hdr;
575 struct tb_xdp_link_state_change_response {
577 struct tb_xdp_error_response err;
579 struct tb_xdp_header hdr;
586 struct tb_xdp_header hdr;
589 struct tb_xdp_uuid_response {
591 struct tb_xdp_error_response err;
593 struct tb_xdp_header hdr;
601 struct tb_xdp_properties {
602 struct tb_xdp_header hdr;
609 struct tb_xdp_properties_response {
611 struct tb_xdp_error_response err;
613 struct tb_xdp_header hdr;
625 * Max length of data array single XDomain property response is allowed
628 #define TB_XDP_PROPERTIES_MAX_DATA_LENGTH \
629 (((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4)
631 /* Maximum size of the total property block in dwords we allow */
632 #define TB_XDP_PROPERTIES_MAX_LENGTH 500
634 struct tb_xdp_properties_changed {
635 struct tb_xdp_header hdr;
639 struct tb_xdp_properties_changed_response {
641 struct tb_xdp_error_response err;
642 struct tb_xdp_header hdr;
648 ERROR_UNKNOWN_PACKET,
649 ERROR_UNKNOWN_DOMAIN,