Merge tag 'md-fixes-20230914' of https://git.kernel.org/pub/scm/linux/kernel/git...
[platform/kernel/linux-rpi.git] / drivers / thunderbolt / quirks.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Thunderbolt driver - quirks
4  *
5  * Copyright (c) 2020 Mario Limonciello <mario.limonciello@dell.com>
6  */
7
8 #include "tb.h"
9
10 static void quirk_force_power_link(struct tb_switch *sw)
11 {
12         sw->quirks |= QUIRK_FORCE_POWER_LINK_CONTROLLER;
13         tb_sw_dbg(sw, "forcing power to link controller\n");
14 }
15
16 static void quirk_dp_credit_allocation(struct tb_switch *sw)
17 {
18         if (sw->credit_allocation && sw->min_dp_main_credits == 56) {
19                 sw->min_dp_main_credits = 18;
20                 tb_sw_dbg(sw, "quirked DP main: %u\n", sw->min_dp_main_credits);
21         }
22 }
23
24 static void quirk_clx_disable(struct tb_switch *sw)
25 {
26         sw->quirks |= QUIRK_NO_CLX;
27         tb_sw_dbg(sw, "disabling CL states\n");
28 }
29
30 static void quirk_usb3_maximum_bandwidth(struct tb_switch *sw)
31 {
32         struct tb_port *port;
33
34         tb_switch_for_each_port(sw, port) {
35                 if (!tb_port_is_usb3_down(port))
36                         continue;
37                 port->max_bw = 16376;
38                 tb_port_dbg(port, "USB3 maximum bandwidth limited to %u Mb/s\n",
39                             port->max_bw);
40         }
41 }
42
43 struct tb_quirk {
44         u16 hw_vendor_id;
45         u16 hw_device_id;
46         u16 vendor;
47         u16 device;
48         void (*hook)(struct tb_switch *sw);
49 };
50
51 static const struct tb_quirk tb_quirks[] = {
52         /* Dell WD19TB supports self-authentication on unplug */
53         { 0x0000, 0x0000, 0x00d4, 0xb070, quirk_force_power_link },
54         { 0x0000, 0x0000, 0x00d4, 0xb071, quirk_force_power_link },
55         /*
56          * Intel Goshen Ridge NVM 27 and before report wrong number of
57          * DP buffers.
58          */
59         { 0x8087, 0x0b26, 0x0000, 0x0000, quirk_dp_credit_allocation },
60         /*
61          * Limit the maximum USB3 bandwidth for the following Intel USB4
62          * host routers due to a hardware issue.
63          */
64         { 0x8087, PCI_DEVICE_ID_INTEL_ADL_NHI0, 0x0000, 0x0000,
65                   quirk_usb3_maximum_bandwidth },
66         { 0x8087, PCI_DEVICE_ID_INTEL_ADL_NHI1, 0x0000, 0x0000,
67                   quirk_usb3_maximum_bandwidth },
68         { 0x8087, PCI_DEVICE_ID_INTEL_RPL_NHI0, 0x0000, 0x0000,
69                   quirk_usb3_maximum_bandwidth },
70         { 0x8087, PCI_DEVICE_ID_INTEL_RPL_NHI1, 0x0000, 0x0000,
71                   quirk_usb3_maximum_bandwidth },
72         { 0x8087, PCI_DEVICE_ID_INTEL_MTL_M_NHI0, 0x0000, 0x0000,
73                   quirk_usb3_maximum_bandwidth },
74         { 0x8087, PCI_DEVICE_ID_INTEL_MTL_P_NHI0, 0x0000, 0x0000,
75                   quirk_usb3_maximum_bandwidth },
76         { 0x8087, PCI_DEVICE_ID_INTEL_MTL_P_NHI1, 0x0000, 0x0000,
77                   quirk_usb3_maximum_bandwidth },
78         { 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_80G_NHI, 0x0000, 0x0000,
79                   quirk_usb3_maximum_bandwidth },
80         { 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_40G_NHI, 0x0000, 0x0000,
81                   quirk_usb3_maximum_bandwidth },
82         { 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HUB_80G_BRIDGE, 0x0000, 0x0000,
83                   quirk_usb3_maximum_bandwidth },
84         { 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HUB_40G_BRIDGE, 0x0000, 0x0000,
85                   quirk_usb3_maximum_bandwidth },
86         /*
87          * CLx is not supported on AMD USB4 Yellow Carp and Pink Sardine platforms.
88          */
89         { 0x0438, 0x0208, 0x0000, 0x0000, quirk_clx_disable },
90         { 0x0438, 0x0209, 0x0000, 0x0000, quirk_clx_disable },
91         { 0x0438, 0x020a, 0x0000, 0x0000, quirk_clx_disable },
92         { 0x0438, 0x020b, 0x0000, 0x0000, quirk_clx_disable },
93 };
94
95 /**
96  * tb_check_quirks() - Check for quirks to apply
97  * @sw: Thunderbolt switch
98  *
99  * Apply any quirks for the Thunderbolt controller.
100  */
101 void tb_check_quirks(struct tb_switch *sw)
102 {
103         int i;
104
105         for (i = 0; i < ARRAY_SIZE(tb_quirks); i++) {
106                 const struct tb_quirk *q = &tb_quirks[i];
107
108                 if (q->hw_vendor_id && q->hw_vendor_id != sw->config.vendor_id)
109                         continue;
110                 if (q->hw_device_id && q->hw_device_id != sw->config.device_id)
111                         continue;
112                 if (q->vendor && q->vendor != sw->vendor)
113                         continue;
114                 if (q->device && q->device != sw->device)
115                         continue;
116
117                 tb_sw_dbg(sw, "running %ps\n", q->hook);
118                 q->hook(sw);
119         }
120 }