2 * Copyright (c) 2004 Picture Elements, Inc.
3 * Stephen Williams (XXXXXXXXXXXXXXXX)
5 * This source code is free software; you can redistribute it
6 * and/or modify it in source code form under the terms of the GNU
7 * General Public License as published by the Free Software
8 * Foundation; either version 2 of the License, or (at your option)
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
22 * The Xilinx SystemACE chip support is activated by defining
23 * CONFIG_SYSTEMACE to turn on support, and CFG_SYSTEMACE_BASE
24 * to set the base address of the device. This code currently
25 * assumes that the chip is connected via a byte-wide bus.
27 * The CONFIG_SYSTEMACE also adds to fat support the device class
28 * "ace" that allows the user to execute "fatls ace 0" and the
29 * like. This works by making the systemace_get_dev function
30 * available to cmd_fat.c:get_dev and filling in a block device
31 * description that has all the bits needed for FAT support to
34 * According to Xilinx technical support, before accessing the
35 * SystemACE CF you need to set the following control bits:
43 #include <systemace.h>
47 #ifdef CONFIG_SYSTEMACE
50 * The ace_readw and writew functions read/write 16bit words, but the
51 * offset value is the BYTE offset as most used in the Xilinx
52 * datasheet for the SystemACE chip. The CFG_SYSTEMACE_BASE is defined
53 * to be the base address for the chip, usually in the local
56 #if (CFG_SYSTEMACE_WIDTH == 8)
57 #if !defined(__BIG_ENDIAN)
58 #define ace_readw(off) ((readb(CFG_SYSTEMACE_BASE+off)<<8) | \
59 (readb(CFG_SYSTEMACE_BASE+off+1)))
60 #define ace_write(val, off) {writeb(val>>8, CFG_SYSTEMACE_BASE+off); \
61 writeb(val, CFG_SYSTEMACE_BASE+off+1);}
63 #define ace_readw(off) ((readb(CFG_SYSTEMACE_BASE+off)) | \
64 (readb(CFG_SYSTEMACE_BASE+off+1)<<8))
65 #define ace_write(val, off) {writeb(val, CFG_SYSTEMACE_BASE+off); \
66 writeb(val>>8, CFG_SYSTEMACE_BASE+off+1);}
69 #define ace_readw(off) (readw(CFG_SYSTEMACE_BASE+off))
70 #define ace_writew(val, off) (writew(val, CFG_SYSTEMACE_BASE+off))
75 static unsigned long systemace_read(int dev, unsigned long start,
77 unsigned long *buffer);
79 static block_dev_desc_t systemace_dev = { 0 };
81 static int get_cf_lock(void)
85 /* CONTROLREG = LOCKREG */
86 unsigned val = ace_readw(0x18);
88 ace_writew((val & 0xffff), 0x18);
90 /* Wait for MPULOCK in STATUSREG[15:0] */
91 while (!(ace_readw(0x04) & 0x0002)) {
103 static void release_cf_lock(void)
105 unsigned val = ace_readw(0x18);
107 ace_writew((val & 0xffff), 0x18);
110 block_dev_desc_t *systemace_get_dev(int dev)
112 /* The first time through this, the systemace_dev object is
113 not yet initialized. In that case, fill it in. */
114 if (systemace_dev.blksz == 0) {
115 systemace_dev.if_type = IF_TYPE_UNKNOWN;
116 systemace_dev.dev = 0;
117 systemace_dev.part_type = PART_TYPE_UNKNOWN;
118 systemace_dev.type = DEV_TYPE_HARDDISK;
119 systemace_dev.blksz = 512;
120 systemace_dev.removable = 1;
121 systemace_dev.block_read = systemace_read;
123 init_part(&systemace_dev);
127 return &systemace_dev;
131 * This function is called (by dereferencing the block_read pointer in
132 * the dev_desc) to read blocks of data. The return value is the
133 * number of blocks read. A zero return indicates an error.
135 static unsigned long systemace_read(int dev, unsigned long start,
136 unsigned long blkcnt, unsigned long *buffer)
139 unsigned blk_countdown;
140 unsigned char *dp = (unsigned char *)buffer;
143 if (get_cf_lock() < 0) {
144 unsigned status = ace_readw(0x04);
146 /* If CFDETECT is false, card is missing. */
147 if (!(status & 0x0010)) {
148 printf("** CompactFlash card not present. **\n");
152 printf("**** ACE locked away from me (STATUSREG=%04x)\n",
156 #ifdef DEBUG_SYSTEMACE
157 printf("... systemace read %lu sectors at %lu\n", blkcnt, start);
162 val = ace_readw(0x04);
164 /* If CFDETECT is false, card is missing. */
165 if (!(val & 0x0010)) {
166 printf("**** ACE CompactFlash not found.\n");
171 /* If RDYFORCMD, then we are ready to go. */
176 printf("**** SystemACE not ready.\n");
185 /* The SystemACE can only transfer 256 sectors at a time, so
186 limit the current chunk of sectors. The blk_countdown
187 variable is the number of sectors left to transfer. */
189 blk_countdown = blkcnt;
190 while (blk_countdown > 0) {
191 unsigned trans = blk_countdown;
196 #ifdef DEBUG_SYSTEMACE
197 printf("... transfer %lu sector in a chunk\n", trans);
199 /* Write LBA block address */
200 ace_writew((start >> 0) & 0xffff, 0x10);
201 ace_writew((start >> 16) & 0x00ff, 0x12);
203 /* NOTE: in the Write Sector count below, a count of 0
204 causes a transfer of 256, so &0xff gives the right
205 value for whatever transfer count we want. */
207 /* Write sector count | ReadMemCardData. */
208 ace_writew((trans & 0xff) | 0x0300, 0x14);
210 /* Reset the configruation controller */
211 val = ace_readw(0x18);
213 ace_writew(val, 0x18);
219 /* Wait for buffer to become ready. */
220 while (!(ace_readw(0x04) & 0x0020)) {
224 /* Read 16 words of 2bytes from the sector buffer. */
225 for (idx = 0; idx < 16; idx += 1) {
226 unsigned short val = ace_readw(0x40);
228 *dp++ = (val >> 8) & 0xff;
234 /* Clear the configruation controller reset */
235 val = ace_readw(0x18);
237 ace_writew(val, 0x18);
239 /* Count the blocks we transfer this time. */
241 blk_countdown -= trans;
248 #endif /* CONFIG_SYSTEMACE */