2 tm6000-core.c - driver for TM5600/TM6000/TM6010 USB video capture devices
4 Copyright (C) 2006-2007 Mauro Carvalho Chehab <mchehab@infradead.org>
6 Copyright (C) 2007 Michel Ludwig <michel.ludwig@gmail.com>
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation version 2
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/usb.h>
26 #include <linux/i2c.h>
28 #include "tm6000-regs.h"
29 #include <media/v4l2-common.h>
30 #include <media/tuner.h>
32 #define USB_TIMEOUT 5*HZ /* ms */
34 int tm6000_read_write_usb (struct tm6000_core *dev, u8 req_type, u8 req,
35 u16 value, u16 index, u8 *buf, u16 len)
39 static int ini=0, last=0, n=0;
43 data = kzalloc(len, GFP_KERNEL);
46 if (req_type & USB_DIR_IN)
47 pipe=usb_rcvctrlpipe(dev->udev, 0);
49 pipe=usb_sndctrlpipe(dev->udev, 0);
50 memcpy(data, buf, len);
53 if (tm6000_debug & V4L2_DEBUG_I2C) {
57 printk("%06i (dev %p, pipe %08x): ", n, dev->udev, pipe);
59 printk( "%s: %06u ms %06u ms %02x %02x %02x %02x %02x %02x %02x %02x ",
60 (req_type & USB_DIR_IN)?" IN":"OUT",
61 jiffies_to_msecs(jiffies-last),
62 jiffies_to_msecs(jiffies-ini),
63 req_type, req,value&0xff,value>>8, index&0xff, index>>8,
68 if ( !(req_type & USB_DIR_IN) ) {
71 printk(" %02x",buf[i]);
77 ret = usb_control_msg(dev->udev, pipe, req, req_type, value, index, data,
80 if (req_type & USB_DIR_IN)
81 memcpy(buf, data, len);
83 if (tm6000_debug & V4L2_DEBUG_I2C) {
85 if (req_type & USB_DIR_IN)
86 printk("<<< (len=%d)\n",len);
88 printk("%s: Error #%d\n", __FUNCTION__, ret);
89 } else if (req_type & USB_DIR_IN) {
92 printk(" %02x",buf[i]);
105 int tm6000_set_reg (struct tm6000_core *dev, u8 req, u16 value, u16 index)
108 tm6000_read_write_usb (dev, USB_DIR_OUT | USB_TYPE_VENDOR,
109 req, value, index, NULL, 0);
111 EXPORT_SYMBOL_GPL(tm6000_set_reg);
113 int tm6000_get_reg (struct tm6000_core *dev, u8 req, u16 value, u16 index)
118 rc=tm6000_read_write_usb (dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
119 value, index, buf, 1);
126 EXPORT_SYMBOL_GPL(tm6000_get_reg);
128 int tm6000_get_reg16 (struct tm6000_core *dev, u8 req, u16 value, u16 index)
133 rc=tm6000_read_write_usb (dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
134 value, index, buf, 2);
139 return buf[1]|buf[0]<<8;
142 int tm6000_get_reg32 (struct tm6000_core *dev, u8 req, u16 value, u16 index)
147 rc=tm6000_read_write_usb (dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
148 value, index, buf, 4);
153 return buf[3] | buf[2] << 8 | buf[1] << 16 | buf[0] << 24;
156 int tm6000_i2c_reset(struct tm6000_core *dev, u16 tsleep)
160 rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 0);
166 rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 1);
172 void tm6000_set_fourcc_format(struct tm6000_core *dev)
174 if (dev->dev_type == TM6010) {
177 val = tm6000_get_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, 0) & 0xfc;
178 if (dev->fourcc == V4L2_PIX_FMT_UYVY)
179 tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, val);
181 tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, val | 1);
183 if (dev->fourcc == V4L2_PIX_FMT_UYVY)
184 tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0);
186 tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0x90);
190 int tm6000_init_analog_mode (struct tm6000_core *dev)
192 if (dev->dev_type == TM6010) {
196 val = tm6000_get_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, 0);
198 tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, val);
199 val = tm6000_get_reg(dev,
200 TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0);
202 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, val);
205 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
206 tm6000_set_reg(dev, TM6010_REQ07_R41_TELETEXT_VBI_CODE1, 0x27);
207 tm6000_set_reg(dev, TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55);
208 tm6000_set_reg(dev, TM6010_REQ07_R43_VBI_DATA_TYPE_LINE7, 0x66);
209 tm6000_set_reg(dev, TM6010_REQ07_R44_VBI_DATA_TYPE_LINE8, 0x66);
210 tm6000_set_reg(dev, TM6010_REQ07_R45_VBI_DATA_TYPE_LINE9, 0x66);
212 TM6010_REQ07_R46_VBI_DATA_TYPE_LINE10, 0x66);
214 TM6010_REQ07_R47_VBI_DATA_TYPE_LINE11, 0x66);
216 TM6010_REQ07_R48_VBI_DATA_TYPE_LINE12, 0x66);
218 TM6010_REQ07_R49_VBI_DATA_TYPE_LINE13, 0x66);
220 TM6010_REQ07_R4A_VBI_DATA_TYPE_LINE14, 0x66);
222 TM6010_REQ07_R4B_VBI_DATA_TYPE_LINE15, 0x66);
224 TM6010_REQ07_R4C_VBI_DATA_TYPE_LINE16, 0x66);
226 TM6010_REQ07_R4D_VBI_DATA_TYPE_LINE17, 0x66);
228 TM6010_REQ07_R4E_VBI_DATA_TYPE_LINE18, 0x66);
230 TM6010_REQ07_R4F_VBI_DATA_TYPE_LINE19, 0x66);
232 TM6010_REQ07_R50_VBI_DATA_TYPE_LINE20, 0x66);
234 TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x66);
236 TM6010_REQ07_R52_VBI_DATA_TYPE_LINE22, 0x66);
238 TM6010_REQ07_R53_VBI_DATA_TYPE_LINE23, 0x00);
240 TM6010_REQ07_R54_VBI_DATA_TYPE_RLINES, 0x00);
242 TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01);
244 TM6010_REQ07_R56_VBI_LOOP_FILTER_I_GAIN, 0x00);
246 TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02);
247 tm6000_set_reg(dev, TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35);
248 tm6000_set_reg(dev, TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0);
249 tm6000_set_reg(dev, TM6010_REQ07_R5A_VBI_TELETEXT_DTO1, 0x11);
250 tm6000_set_reg(dev, TM6010_REQ07_R5B_VBI_TELETEXT_DTO0, 0x4c);
251 tm6000_set_reg(dev, TM6010_REQ07_R40_TELETEXT_VBI_CODE0, 0x01);
252 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00);
256 tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x00);
257 tm6000_set_reg(dev, TM6010_REQ08_R02_A_FIX_GAIN_CTRL, 0x04);
258 tm6000_set_reg(dev, TM6010_REQ08_R03_A_AUTO_GAIN_CTRL, 0x00);
259 tm6000_set_reg(dev, TM6010_REQ08_R04_A_SIF_AMP_CTRL, 0xa0);
260 tm6000_set_reg(dev, TM6010_REQ08_R05_A_STANDARD_MOD, 0x05);
261 tm6000_set_reg(dev, TM6010_REQ08_R06_A_SOUND_MOD, 0x06);
262 tm6000_set_reg(dev, TM6010_REQ08_R07_A_LEFT_VOL, 0x00);
263 tm6000_set_reg(dev, TM6010_REQ08_R08_A_RIGHT_VOL, 0x00);
264 tm6000_set_reg(dev, TM6010_REQ08_R09_A_MAIN_VOL, 0x08);
265 tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, 0x91);
266 tm6000_set_reg(dev, TM6010_REQ08_R0B_A_ASD_THRES1, 0x20);
267 tm6000_set_reg(dev, TM6010_REQ08_R0C_A_ASD_THRES2, 0x12);
268 tm6000_set_reg(dev, TM6010_REQ08_R0D_A_AMD_THRES, 0x20);
269 tm6000_set_reg(dev, TM6010_REQ08_R0E_A_MONO_THRES1, 0xf0);
270 tm6000_set_reg(dev, TM6010_REQ08_R0F_A_MONO_THRES2, 0x80);
271 tm6000_set_reg(dev, TM6010_REQ08_R10_A_MUTE_THRES1, 0xc0);
272 tm6000_set_reg(dev, TM6010_REQ08_R11_A_MUTE_THRES2, 0x80);
273 tm6000_set_reg(dev, TM6010_REQ08_R12_A_AGC_U, 0x12);
274 tm6000_set_reg(dev, TM6010_REQ08_R13_A_AGC_ERR_T, 0xfe);
275 tm6000_set_reg(dev, TM6010_REQ08_R14_A_AGC_GAIN_INIT, 0x20);
276 tm6000_set_reg(dev, TM6010_REQ08_R15_A_AGC_STEP_THR, 0x14);
277 tm6000_set_reg(dev, TM6010_REQ08_R16_A_AGC_GAIN_MAX, 0xfe);
278 tm6000_set_reg(dev, TM6010_REQ08_R17_A_AGC_GAIN_MIN, 0x01);
279 tm6000_set_reg(dev, TM6010_REQ08_R18_A_TR_CTRL, 0xa0);
280 tm6000_set_reg(dev, TM6010_REQ08_R19_A_FH_2FH_GAIN, 0x32);
281 tm6000_set_reg(dev, TM6010_REQ08_R1A_A_NICAM_SER_MAX, 0x64);
282 tm6000_set_reg(dev, TM6010_REQ08_R1B_A_NICAM_SER_MIN, 0x20);
283 tm6000_set_reg(dev, REQ_08_SET_GET_AVREG_BIT, 0x1c, 0x00);
284 tm6000_set_reg(dev, REQ_08_SET_GET_AVREG_BIT, 0x1d, 0x00);
285 tm6000_set_reg(dev, TM6010_REQ08_R1E_A_GAIN_DEEMPH_OUT, 0x13);
286 tm6000_set_reg(dev, TM6010_REQ08_R1F_A_TEST_INTF_SEL, 0x00);
287 tm6000_set_reg(dev, TM6010_REQ08_R20_A_TEST_PIN_SEL, 0x00);
288 tm6000_set_reg(dev, TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3);
289 tm6000_set_reg(dev, TM6010_REQ08_R06_A_SOUND_MOD, 0x00);
290 tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x80);
293 /* Enables soft reset */
294 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
297 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x20);
299 /* Enable Hfilter and disable TS Drop err */
300 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x80);
303 tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x88);
304 tm6000_set_reg(dev, TM6010_REQ07_RD8_IR_WAKEUP_SEL, 0x23);
305 tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xc0);
306 tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xd8);
307 tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x06);
308 tm6000_set_reg(dev, TM6010_REQ07_RD8_IR_PULSE_CNT0, 0x1f);
310 /* AP Software reset */
311 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08);
312 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00);
314 tm6000_set_fourcc_format(dev);
316 /* Disables soft reset */
317 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00);
319 /* E3: Select input 0 - TV tuner */
320 tm6000_set_reg(dev, TM6010_REQ07_RE3_OUT_SEL1, 0x00);
321 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xeb, 0x60);
323 /* This controls input */
324 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_2, 0x0);
325 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_3, 0x01);
329 /* Tuner firmware can now be loaded */
332 struct v4l2_frequency f;
333 mutex_lock(&dev->lock);
334 f.frequency=dev->freq;
335 v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_frequency, &f);
336 mutex_unlock(&dev->lock);
339 tm6000_set_standard (dev, &dev->norm);
340 tm6000_set_audio_bitrate (dev,48000);
342 /* switch dvb led off */
343 if (dev->gpio.dvb_led) {
344 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
345 dev->gpio.dvb_led, 0x01);
351 int tm6000_init_digital_mode (struct tm6000_core *dev)
353 if (dev->dev_type == TM6010) {
358 val = tm6000_get_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, 0);
360 tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, val);
361 val = tm6000_get_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0);
363 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, val);
364 tm6000_set_reg(dev, TM6010_REQ07_RFE_POWER_DOWN, 0x28);
365 tm6000_set_reg(dev, TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xfc);
366 tm6000_set_reg(dev, TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0xff);
367 tm6000_set_reg(dev, TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe);
368 tm6000_read_write_usb (dev, 0xc0, 0x0e, 0x00c2, 0x0008, buf, 2);
369 printk (KERN_INFO "buf %#x %#x \n", buf[0], buf[1]);
373 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08);
374 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00);
375 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
376 tm6000_set_reg(dev, TM6010_REQ07_RD8_IR_PULSE_CNT0, 0x08);
377 tm6000_set_reg(dev, TM6010_REQ07_RE2_OUT_SEL2, 0x0c);
378 tm6000_set_reg(dev, TM6010_REQ07_RE8_TYPESEL_MOS_I2S, 0xff);
379 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00eb, 0xd8);
380 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x40);
381 tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0);
382 tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x09);
383 tm6000_set_reg(dev, TM6010_REQ07_RD8_IR_WAKEUP_SEL, 0x37);
384 tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xd8);
385 tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xc0);
386 tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x60);
388 tm6000_set_reg(dev, TM6010_REQ07_RE2_OUT_SEL2, 0x0c);
389 tm6000_set_reg(dev, TM6010_REQ07_RE8_TYPESEL_MOS_I2S, 0xff);
390 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00eb, 0x08);
393 tm6000_set_reg (dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
395 tm6000_set_reg (dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x01);
397 tm6000_set_reg (dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
401 /* switch dvb led on */
402 if (dev->gpio.dvb_led) {
403 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
404 dev->gpio.dvb_led, 0x00);
416 /* The meaning of those initializations are unknown */
417 struct reg_init tm6000_init_tab[] = {
419 { TM6010_REQ07_RD8_IR_PULSE_CNT0, 0x1f },
420 { TM6010_REQ07_RFF_SOFT_RESET, 0x08 },
421 { TM6010_REQ07_RFF_SOFT_RESET, 0x00 },
422 { TM6010_REQ07_RD5_POWERSAVE, 0x4f },
423 { TM6010_REQ07_RD8_IR_WAKEUP_SEL, 0x23 },
424 { TM6010_REQ07_RD8_IR_WAKEUP_ADD, 0x08 },
425 { TM6010_REQ07_RE2_OUT_SEL2, 0x00 },
426 { TM6010_REQ07_RE3_OUT_SEL1, 0x10 },
427 { TM6010_REQ07_RE5_REMOTE_WAKEUP, 0x00 },
428 { TM6010_REQ07_RE8_TYPESEL_MOS_I2S, 0x00 },
429 { REQ_07_SET_GET_AVREG, 0xeb, 0x64 }, /* 48000 bits/sample, external input */
430 { REQ_07_SET_GET_AVREG, 0xee, 0xc2 },
431 { TM6010_REQ07_R3F_RESET, 0x01 }, /* Start of soft reset */
432 { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 },
433 { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 },
434 { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f },
435 { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 },
436 { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 },
437 { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 },
438 { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 },
439 { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 },
440 { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 },
441 { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a },
442 { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 },
443 { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 },
444 { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b },
445 { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 },
446 { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f },
447 { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd },
448 { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e },
449 { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b },
450 { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 },
451 { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 },
452 { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c },
453 { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc },
454 { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc },
455 { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd },
456 { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c },
457 { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c },
458 { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 },
459 { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 },
460 { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 },
461 { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 },
462 { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 },
463 { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c },
464 { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 },
465 { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c },
466 { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a },
467 { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 },
468 { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 },
469 { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a },
470 { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 },
471 { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 },
472 { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 },
473 { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 },
474 { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 },
475 { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 },
476 { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 },
477 { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 },
478 { TM6010_REQ07_RC1_TRESHOLD, 0xd0 },
479 { TM6010_REQ07_RC3_HSTART1, 0x88 },
480 { TM6010_REQ07_R3F_RESET, 0x00 }, /* End of the soft reset */
481 { TM6010_REQ05_R18_IMASK7, 0x00 },
484 struct reg_init tm6010_init_tab[] = {
485 { TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x00 },
486 { TM6010_REQ07_RC4_HSTART0, 0xa0 },
487 { TM6010_REQ07_RC6_HEND0, 0x40 },
488 { TM6010_REQ07_RCA_VEND0, 0x31 },
489 { TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, 0xe1 },
490 { TM6010_REQ07_RE0_DVIDEO_SOURCE, 0x03 },
491 { TM6010_REQ07_RFE_POWER_DOWN, 0x7f },
493 { TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0 },
494 { TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4 },
495 { TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8 },
496 { TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00 },
497 { TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2 },
498 { TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0 },
499 { TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2 },
500 { TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60 },
501 { TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc },
503 { TM6010_REQ07_R3F_RESET, 0x01 },
504 { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 },
505 { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 },
506 { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f },
507 { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 },
508 { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 },
509 { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 },
510 { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 },
511 { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 },
512 { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 },
513 { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a },
514 { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 },
515 { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 },
516 { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b },
517 { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 },
518 { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f },
519 { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd },
520 { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e },
521 { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b },
522 { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 },
523 { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 },
524 { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c },
525 { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc },
526 { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc },
527 { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd },
528 { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c },
529 { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c },
530 { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 },
531 { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 },
532 { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 },
533 { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 },
534 { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 },
535 { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c },
536 { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 },
537 { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c },
538 { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a },
539 { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 },
540 { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 },
541 { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a },
542 { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 },
543 { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 },
544 { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 },
545 { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 },
546 { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 },
547 { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 },
548 { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 },
549 { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 },
550 { TM6010_REQ07_RC1_TRESHOLD, 0xd0 },
551 { TM6010_REQ07_RC3_HSTART1, 0x88 },
552 { TM6010_REQ07_R3F_RESET, 0x00 },
554 { TM6010_REQ05_R18_IMASK7, 0x00 },
556 { TM6010_REQ07_RD8_IR_LEADER1, 0xaa },
557 { TM6010_REQ07_RD8_IR_LEADER0, 0x30 },
558 { TM6010_REQ07_RD8_IR_PULSE_CNT1, 0x20 },
559 { TM6010_REQ07_RD8_IR_PULSE_CNT0, 0xd0 },
560 { REQ_04_EN_DISABLE_MCU_INT, 0x02, 0x00 },
561 { TM6010_REQ07_RD8_IR, 0x2f },
563 /* set remote wakeup key:any key wakeup */
564 { TM6010_REQ07_RE5_REMOTE_WAKEUP, 0xfe },
565 { TM6010_REQ07_RD8_IR_WAKEUP_SEL, 0xff },
568 int tm6000_init (struct tm6000_core *dev)
570 int board, rc=0, i, size;
571 struct reg_init *tab;
573 if (dev->dev_type == TM6010) {
574 tab = tm6010_init_tab;
575 size = ARRAY_SIZE(tm6010_init_tab);
577 tab = tm6000_init_tab;
578 size = ARRAY_SIZE(tm6000_init_tab);
581 /* Load board's initialization table */
582 for (i=0; i< size; i++) {
583 rc= tm6000_set_reg (dev, tab[i].req, tab[i].reg, tab[i].val);
585 printk (KERN_ERR "Error %i while setting req %d, "
586 "reg %d to value %d\n", rc,
587 tab[i].req,tab[i].reg, tab[i].val);
592 msleep(5); /* Just to be conservative */
594 /* Check board version - maybe 10Moons specific */
595 board=tm6000_get_reg32 (dev, REQ_40_GET_VERSION, 0, 0);
597 printk (KERN_INFO "Board version = 0x%08x\n",board);
599 printk (KERN_ERR "Error %i while retrieving board version\n",board);
602 rc = tm6000_cards_setup(dev);
607 int tm6000_set_audio_bitrate(struct tm6000_core *dev, int bitrate)
611 val=tm6000_get_reg (dev, REQ_07_SET_GET_AVREG, 0xeb, 0x0);
612 printk("Original value=%d\n",val);
616 val &= 0x0f; /* Preserve the audio input control bits */
620 dev->audio_bitrate=bitrate;
624 dev->audio_bitrate=bitrate;
627 val=tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xeb, val);
631 EXPORT_SYMBOL_GPL(tm6000_set_audio_bitrate);
633 static LIST_HEAD(tm6000_devlist);
634 static DEFINE_MUTEX(tm6000_devlist_mutex);
637 * tm6000_realease_resource()
640 void tm6000_remove_from_devlist(struct tm6000_core *dev)
642 mutex_lock(&tm6000_devlist_mutex);
643 list_del(&dev->devlist);
644 mutex_unlock(&tm6000_devlist_mutex);
647 void tm6000_add_into_devlist(struct tm6000_core *dev)
649 mutex_lock(&tm6000_devlist_mutex);
650 list_add_tail(&dev->devlist, &tm6000_devlist);
651 mutex_unlock(&tm6000_devlist_mutex);
655 * Extension interface
658 static LIST_HEAD(tm6000_extension_devlist);
659 static DEFINE_MUTEX(tm6000_extension_devlist_lock);
661 int tm6000_register_extension(struct tm6000_ops *ops)
663 struct tm6000_core *dev = NULL;
665 mutex_lock(&tm6000_devlist_mutex);
666 mutex_lock(&tm6000_extension_devlist_lock);
667 list_add_tail(&ops->next, &tm6000_extension_devlist);
668 list_for_each_entry(dev, &tm6000_devlist, devlist) {
672 printk(KERN_INFO "tm6000: Initialized (%s) extension\n", ops->name);
673 mutex_unlock(&tm6000_extension_devlist_lock);
674 mutex_unlock(&tm6000_devlist_mutex);
677 EXPORT_SYMBOL(tm6000_register_extension);
679 void tm6000_unregister_extension(struct tm6000_ops *ops)
681 struct tm6000_core *dev = NULL;
683 mutex_lock(&tm6000_devlist_mutex);
684 list_for_each_entry(dev, &tm6000_devlist, devlist) {
689 mutex_lock(&tm6000_extension_devlist_lock);
690 printk(KERN_INFO "tm6000: Remove (%s) extension\n", ops->name);
691 list_del(&ops->next);
692 mutex_unlock(&tm6000_extension_devlist_lock);
693 mutex_unlock(&tm6000_devlist_mutex);
695 EXPORT_SYMBOL(tm6000_unregister_extension);
697 void tm6000_init_extension(struct tm6000_core *dev)
699 struct tm6000_ops *ops = NULL;
701 mutex_lock(&tm6000_extension_devlist_lock);
702 if (!list_empty(&tm6000_extension_devlist)) {
703 list_for_each_entry(ops, &tm6000_extension_devlist, next) {
708 mutex_unlock(&tm6000_extension_devlist_lock);
711 void tm6000_close_extension(struct tm6000_core *dev)
713 struct tm6000_ops *ops = NULL;
715 mutex_lock(&tm6000_extension_devlist_lock);
716 if (!list_empty(&tm6000_extension_devlist)) {
717 list_for_each_entry(ops, &tm6000_extension_devlist, next) {
722 mutex_unlock(&tm6000_extension_devlist_lock);