4 * DSP-BIOS Bridge driver support functions for TI OMAP processors.
6 * Bridge driver BRD_IOCtl reserved command definitions.
8 * Copyright (C) 2005-2006 Texas Instruments, Inc.
10 * This package is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
16 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
22 /* ------------------------------------ Hardware Abstraction Layer */
27 * Any IOCTLS at or above this value are reserved for standard Bridge driver
30 #define BRDIOCTL_RESERVEDBASE 0x8000
32 #define BRDIOCTL_CHNLREAD (BRDIOCTL_RESERVEDBASE + 0x10)
33 #define BRDIOCTL_CHNLWRITE (BRDIOCTL_RESERVEDBASE + 0x20)
35 #define BRDIOCTL_SETMMUCONFIG (BRDIOCTL_RESERVEDBASE + 0x60)
37 #define BRDIOCTL_PWRCONTROL (BRDIOCTL_RESERVEDBASE + 0x70)
39 /* attention, modifiers:
40 * Some of these control enumerations are made visible to user for power
41 * control, so any changes to this list, should also be updated in the user
42 * header file 'dbdefs.h' ***/
43 /* These ioctls are reserved for PWR power commands for the DSP */
44 #define BRDIOCTL_DEEPSLEEP (BRDIOCTL_PWRCONTROL + 0x0)
45 #define BRDIOCTL_EMERGENCYSLEEP (BRDIOCTL_PWRCONTROL + 0x1)
46 #define BRDIOCTL_WAKEUP (BRDIOCTL_PWRCONTROL + 0x2)
47 #define BRDIOCTL_CLK_CTRL (BRDIOCTL_PWRCONTROL + 0x7)
48 /* DSP Initiated Hibernate */
49 #define BRDIOCTL_PWR_HIBERNATE (BRDIOCTL_PWRCONTROL + 0x8)
50 #define BRDIOCTL_PRESCALE_NOTIFY (BRDIOCTL_PWRCONTROL + 0x9)
51 #define BRDIOCTL_POSTSCALE_NOTIFY (BRDIOCTL_PWRCONTROL + 0xA)
52 #define BRDIOCTL_CONSTRAINT_REQUEST (BRDIOCTL_PWRCONTROL + 0xB)
54 /* Number of actual DSP-MMU TLB entries */
55 #define BRDIOCTL_NUMOFMMUTLB 32
57 struct bridge_ioctl_extproc {
58 u32 dsp_va; /* DSP virtual address */
59 u32 gpp_pa; /* GPP physical address */
60 /* GPP virtual address. __va does not work for ioremapped addresses */
62 u32 size; /* Size of the mapped memory in bytes */
63 enum hw_endianism_t endianism;
64 enum hw_mmu_mixed_size_t mixed_mode;
65 enum hw_element_size_t elem_size;
68 #endif /* DSPIOCTL_ */