4 * DSP-BIOS Bridge driver support functions for TI OMAP processors.
6 * Implements upper edge DSP exception handling (DEH) functions.
8 * Copyright (C) 2005-2006 Texas Instruments, Inc.
9 * Copyright (C) 2010 Felipe Contreras
11 * This package is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
15 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
17 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
20 #include <linux/kernel.h>
21 #include <linux/interrupt.h>
23 #include <dspbridge/dbdefs.h>
24 #include <dspbridge/dspdeh.h>
25 #include <dspbridge/dev.h>
29 #include <dspbridge/io_sm.h>
30 #include <dspbridge/drv.h>
31 #include <dspbridge/wdt.h>
33 static u32 fault_addr;
35 static void mmu_fault_dpc(unsigned long data)
37 struct deh_mgr *deh = (void *)data;
42 bridge_deh_notify(deh, DSP_MMUFAULT, 0);
45 static irqreturn_t mmu_fault_isr(int irq, void *data)
47 struct deh_mgr *deh = data;
48 struct cfg_hostres *resources;
54 resources = deh->bridge_context->resources;
56 dev_dbg(bridge, "%s: Failed to get Host Resources\n",
61 hw_mmu_event_status(resources->dmmu_base, &event);
62 if (event == HW_MMU_TRANSLATION_FAULT) {
63 hw_mmu_fault_addr_read(resources->dmmu_base, &fault_addr);
64 dev_dbg(bridge, "%s: event=0x%x, fault_addr=0x%x\n", __func__,
67 * Schedule a DPC directly. In the future, it may be
68 * necessary to check if DSP MMU fault is intended for
71 tasklet_schedule(&deh->dpc_tasklet);
73 /* Disable the MMU events, else once we clear it will
74 * start to raise INTs again */
75 hw_mmu_event_disable(resources->dmmu_base,
76 HW_MMU_TRANSLATION_FAULT);
78 hw_mmu_event_disable(resources->dmmu_base,
79 HW_MMU_ALL_INTERRUPTS);
84 int bridge_deh_create(struct deh_mgr **ret_deh,
85 struct dev_object *hdev_obj)
89 struct bridge_dev_context *hbridge_context = NULL;
91 /* Message manager will be created when a file is loaded, since
92 * size of message buffer in shared memory is configurable in
94 /* Get Bridge context info. */
95 dev_get_bridge_context(hdev_obj, &hbridge_context);
96 /* Allocate IO manager object: */
97 deh = kzalloc(sizeof(*deh), GFP_KERNEL);
103 /* Create an NTFY object to manage notifications */
104 deh->ntfy_obj = kmalloc(sizeof(struct ntfy_object), GFP_KERNEL);
105 if (!deh->ntfy_obj) {
109 ntfy_init(deh->ntfy_obj);
111 /* Create a MMUfault DPC */
112 tasklet_init(&deh->dpc_tasklet, mmu_fault_dpc, (u32) deh);
114 /* Fill in context structure */
115 deh->bridge_context = hbridge_context;
117 /* Install ISR function for DSP MMU fault */
118 status = request_irq(INT_DSP_MMU_IRQ, mmu_fault_isr, 0,
119 "DspBridge\tiommu fault", deh);
127 bridge_deh_destroy(deh);
132 int bridge_deh_destroy(struct deh_mgr *deh)
137 /* If notification object exists, delete it */
139 ntfy_delete(deh->ntfy_obj);
140 kfree(deh->ntfy_obj);
142 /* Disable DSP MMU fault */
143 free_irq(INT_DSP_MMU_IRQ, deh);
145 /* Free DPC object */
146 tasklet_kill(&deh->dpc_tasklet);
148 /* Deallocate the DEH manager object */
154 int bridge_deh_register_notify(struct deh_mgr *deh, u32 event_mask,
156 struct dsp_notification *hnotification)
162 return ntfy_register(deh->ntfy_obj, hnotification,
163 event_mask, notify_type);
165 return ntfy_unregister(deh->ntfy_obj, hnotification);
168 #ifdef CONFIG_TIDSPBRIDGE_BACKTRACE
169 static void mmu_fault_print_stack(struct bridge_dev_context *dev_context)
171 struct cfg_hostres *resources;
172 struct hw_mmu_map_attrs_t map_attrs = {
173 .endianism = HW_LITTLE_ENDIAN,
174 .element_size = HW_ELEM_SIZE16BIT,
175 .mixed_size = HW_MMU_CPUES,
179 resources = dev_context->resources;
180 dummy_va_addr = (void*)__get_free_page(GFP_ATOMIC);
183 * Before acking the MMU fault, let's make sure MMU can only
184 * access entry #0. Then add a new entry so that the DSP OS
185 * can continue in order to dump the stack.
187 hw_mmu_twl_disable(resources->dmmu_base);
188 hw_mmu_tlb_flush_all(resources->dmmu_base);
190 hw_mmu_tlb_add(resources->dmmu_base,
191 virt_to_phys(dummy_va_addr), fault_addr,
193 &map_attrs, HW_SET, HW_SET);
195 dsp_clk_enable(DSP_CLK_GPT8);
197 dsp_gpt_wait_overflow(DSP_CLK_GPT8, 0xfffffffe);
199 /* Clear MMU interrupt */
200 hw_mmu_event_ack(resources->dmmu_base,
201 HW_MMU_TRANSLATION_FAULT);
202 dump_dsp_stack(dev_context);
203 dsp_clk_disable(DSP_CLK_GPT8);
205 hw_mmu_disable(resources->dmmu_base);
206 free_page((unsigned long)dummy_va_addr);
210 static inline const char *event_to_string(int event)
213 case DSP_SYSERROR: return "DSP_SYSERROR"; break;
214 case DSP_MMUFAULT: return "DSP_MMUFAULT"; break;
215 case DSP_PWRERROR: return "DSP_PWRERROR"; break;
216 case DSP_WDTOVERFLOW: return "DSP_WDTOVERFLOW"; break;
217 default: return "unknown event"; break;
221 void bridge_deh_notify(struct deh_mgr *deh, int event, int info)
223 struct bridge_dev_context *dev_context;
224 const char *str = event_to_string(event);
229 dev_dbg(bridge, "%s: device exception", __func__);
230 dev_context = deh->bridge_context;
234 dev_err(bridge, "%s: %s, info=0x%x", __func__,
236 #ifdef CONFIG_TIDSPBRIDGE_BACKTRACE
237 dump_dl_modules(dev_context);
238 dump_dsp_stack(dev_context);
242 dev_err(bridge, "%s: %s, addr=0x%x", __func__,
244 #ifdef CONFIG_TIDSPBRIDGE_BACKTRACE
245 print_dsp_trace_buffer(dev_context);
246 dump_dl_modules(dev_context);
247 mmu_fault_print_stack(dev_context);
251 dev_err(bridge, "%s: %s", __func__, str);
255 /* Filter subsequent notifications when an error occurs */
256 if (dev_context->brd_state != BRD_ERROR) {
257 ntfy_notify(deh->ntfy_obj, event);
258 #ifdef CONFIG_TIDSPBRIDGE_RECOVERY
259 bridge_recover_schedule();
263 /* Set the Board state as ERROR */
264 dev_context->brd_state = BRD_ERROR;
265 /* Disable all the clocks that were enabled by DSP */
266 dsp_clock_disable_all(dev_context->dsp_per_clks);
268 * Avoid the subsequent WDT if it happens once,
269 * also if fatal error occurs.
271 dsp_wdt_enable(false);