1 /******************************************************************************
3 * Copyright(c) 2009-2010 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
26 * Larry Finger <Larry.Finger@lwfinger.net>
28 *****************************************************************************/
35 * This routine deal with the Power Configuration CMDs
36 * parsing for RTL8723/RTL8188E Series IC.
38 * We should follow specific format which was released from HW SD.
40 * 2011.07.07, added by Roger.
42 bool rtl_hal_pwrseqcmdparsing (struct rtl_priv* rtlpriv, u8 cut_version,
43 u8 fab_version, u8 interface_type,
44 struct wlan_pwr_cfg pwrcfgcmd[])
47 struct wlan_pwr_cfg pwr_cfg_cmd = {0};
48 bool polling_bit = false;
52 u32 polling_count = 0;
53 u32 max_polling_cnt = 5000;
56 pwr_cfg_cmd = pwrcfgcmd[ary_idx];
57 RT_TRACE(COMP_INIT, DBG_TRACE,
58 ("rtl_hal_pwrseqcmdparsing(): offset(%#x),cut_msk(%#x), fab_msk(%#x),"
59 "interface_msk(%#x), base(%#x), cmd(%#x), msk(%#x), value(%#x)\n",
60 GET_PWR_CFG_OFFSET(pwr_cfg_cmd), GET_PWR_CFG_CUT_MASK(pwr_cfg_cmd),
61 GET_PWR_CFG_FAB_MASK(pwr_cfg_cmd), GET_PWR_CFG_INTF_MASK(pwr_cfg_cmd),
62 GET_PWR_CFG_BASE(pwr_cfg_cmd), GET_PWR_CFG_CMD(pwr_cfg_cmd),
63 GET_PWR_CFG_MASK(pwr_cfg_cmd), GET_PWR_CFG_VALUE(pwr_cfg_cmd)));
65 if ((GET_PWR_CFG_FAB_MASK(pwr_cfg_cmd)&fab_version) &&
66 (GET_PWR_CFG_CUT_MASK(pwr_cfg_cmd)&cut_version) &&
67 (GET_PWR_CFG_INTF_MASK(pwr_cfg_cmd)&interface_type)) {
68 switch (GET_PWR_CFG_CMD(pwr_cfg_cmd)) {
70 RT_TRACE(COMP_INIT, DBG_TRACE,
71 ("rtl_hal_pwrseqcmdparsing(): PWR_CMD_READ\n"));
75 RT_TRACE(COMP_INIT, DBG_TRACE,
76 ("rtl_hal_pwrseqcmdparsing(): PWR_CMD_WRITE\n"));
77 offset = GET_PWR_CFG_OFFSET(pwr_cfg_cmd);
79 /*Read the value from system register*/
80 value = rtl_read_byte(rtlpriv, offset);
81 value = value & (~(GET_PWR_CFG_MASK(pwr_cfg_cmd)));
82 value = value | (GET_PWR_CFG_VALUE(pwr_cfg_cmd)
83 & GET_PWR_CFG_MASK(pwr_cfg_cmd));
85 /*Write the value back to sytem register*/
86 rtl_write_byte(rtlpriv, offset, value);
91 RT_TRACE(COMP_INIT, DBG_TRACE,
92 ("rtl_hal_pwrseqcmdparsing(): PWR_CMD_POLLING\n"));
94 offset = GET_PWR_CFG_OFFSET(pwr_cfg_cmd);
97 value = rtl_read_byte(rtlpriv, offset);
99 value = value & GET_PWR_CFG_MASK(pwr_cfg_cmd);
100 if (value == (GET_PWR_CFG_VALUE(pwr_cfg_cmd)
101 & GET_PWR_CFG_MASK(pwr_cfg_cmd)))
106 if (polling_count++ > max_polling_cnt) {
109 } while (!polling_bit);
114 RT_TRACE(COMP_INIT, DBG_TRACE,
115 ("rtl_hal_pwrseqcmdparsing(): PWR_CMD_DELAY\n"));
116 if (GET_PWR_CFG_VALUE(pwr_cfg_cmd) == PWRSEQ_DELAY_US)
117 udelay(GET_PWR_CFG_OFFSET(pwr_cfg_cmd));
119 mdelay(GET_PWR_CFG_OFFSET(pwr_cfg_cmd));
123 RT_TRACE(COMP_INIT, DBG_TRACE,
124 ("rtl_hal_pwrseqcmdparsing(): PWR_CMD_END\n"));
130 ("rtl_hal_pwrseqcmdparsing(): Unknown CMD!!\n"));